[mirror_qemu.git] / include / hw / i386 / pc.h

#ifndef HW_PC_H
#define HW_PC_H

#include "qemu-common.h"
#include "exec/memory.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/i386/ioapic.h"

#include "qemu/range.h"
#include "qemu/bitmap.h"
#include "sysemu/sysemu.h"
#include "hw/pci/pci.h"

#define HPET_INTCAP "hpet-intcap"

/* PC-style peripherals (also used by other machines).  */

typedef struct PcPciInfo {
    Range w32;
    Range w64;
} PcPciInfo;

#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
#define ACPI_PM_PROP_S4_VAL "s4_val"
#define ACPI_PM_PROP_SCI_INT "sci_int"
#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"

struct PcGuestInfo {
    bool has_pci_info;
    bool isapc_ram_fw;
    hwaddr ram_size;
    unsigned apic_id_limit;
    bool apic_xrupt_override;
    uint64_t numa_nodes;
    uint64_t *node_mem;
    uint64_t *node_cpu;
    FWCfgState *fw_cfg;
    bool has_acpi_build;
};

/* parallel.c */
static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
{
    DeviceState *dev;
    ISADevice *isadev;

    isadev = isa_try_create(bus, "isa-parallel");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "index", index);
    qdev_prop_set_chr(dev, "chardev", chr);
    if (qdev_init(dev) < 0) {
        return false;
    }
    return true;
}

bool parallel_mm_init(MemoryRegion *address_space,
                      hwaddr base, int it_shift, qemu_irq irq,
                      CharDriverState *chr);

/* i8259.c */

extern DeviceState *isa_pic;
qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
qemu_irq *kvm_i8259_init(ISABus *bus);
int pic_read_irq(DeviceState *d);
int pic_get_output(DeviceState *d);
void pic_info(Monitor *mon, const QDict *qdict);
void irq_info(Monitor *mon, const QDict *qdict);

/* Global System Interrupts */

#define GSI_NUM_PINS IOAPIC_NUM_PINS

typedef struct GSIState {
    qemu_irq i8259_irq[ISA_NUM_IRQS];
    qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
} GSIState;

void gsi_handler(void *opaque, int n, int level);

/* vmport.c */
typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);

static inline void vmport_init(ISABus *bus)
{
    isa_create_simple(bus, "vmport");
}

void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);

/* pckbd.c */

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
                   MemoryRegion *region, ram_addr_t size,
                   hwaddr mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);

/* pc.c */
extern int fd_bootchk;

void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);

void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
void pc_hot_add_cpu(const int64_t id, Error **errp);
void pc_acpi_init(const char *default_dsdt);

PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
                                ram_addr_t above_4g_mem_size);

#define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
#define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
#define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
#define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)


void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
                            MemoryRegion *pci_address_space);

FWCfgState *pc_memory_init(MemoryRegion *system_memory,
                           const char *kernel_filename,
                           const char *kernel_cmdline,
                           const char *initrd_filename,
                           ram_addr_t below_4g_mem_size,
                           ram_addr_t above_4g_mem_size,
                           MemoryRegion *rom_memory,
                           MemoryRegion **ram_memory,
                           PcGuestInfo *guest_info);
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
                          ISADevice **rtc_state,
                          ISADevice **floppy,
                          bool no_vmport,
                          uint32 hpet_irqs);
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                  const char *boot_device,
                  ISADevice *floppy, BusState *ide0, BusState *ide1,
                  ISADevice *s);
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);

typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);

void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);

/* acpi_piix.c */

i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                       qemu_irq sci_irq, qemu_irq smi_irq,
                       int kvm_enabled, FWCfgState *fw_cfg);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);

/* hpet.c */
extern int no_hpet;

/* piix_pci.c */
struct PCII440FXState;
typedef struct PCII440FXState PCII440FXState;

PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
                    ISABus **isa_bus, qemu_irq *pic,
                    MemoryRegion *address_space_mem,
                    MemoryRegion *address_space_io,
                    ram_addr_t ram_size,
                    ram_addr_t below_4g_mem_size,
                    ram_addr_t above_4g_mem_size,
                    MemoryRegion *pci_memory,
                    MemoryRegion *ram_memory);

PCIBus *find_i440fx(void);
/* piix4.c */
extern PCIDevice *piix4_dev;
int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);

/* vga.c */
enum vga_retrace_method {
    VGA_RETRACE_DUMB,
    VGA_RETRACE_PRECISE
};

extern enum vga_retrace_method vga_retrace_method;

int isa_vga_mm_init(hwaddr vram_base,
                    hwaddr ctrl_base, int it_shift,
                    MemoryRegion *address_space);

/* ne2000.c */
static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
{
    DeviceState *dev;
    ISADevice *isadev;

    qemu_check_nic_model(nd, "ne2k_isa");

    isadev = isa_try_create(bus, "ne2k_isa");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "iobase", base);
    qdev_prop_set_uint32(dev, "irq",    irq);
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
    return true;
}

/* pc_sysfw.c */
void pc_system_firmware_init(MemoryRegion *rom_memory,
                             bool isapc_ram_fw);

/* pvpanic.c */
uint16_t pvpanic_port(void);

/* e820 types */
#define E820_RAM        1
#define E820_RESERVED   2
#define E820_ACPI       3
#define E820_NVS        4
#define E820_UNUSABLE   5

int e820_add_entry(uint64_t, uint64_t, uint32_t);

#define PC_Q35_COMPAT_1_7 \
        {\
            .driver   = "hpet",\
            .property = HPET_INTCAP,\
            .value    = stringify(4),\
        }

#define PC_Q35_COMPAT_1_6 \
        PC_COMPAT_1_6, \
        PC_Q35_COMPAT_1_7

#define PC_Q35_COMPAT_1_5 \
        PC_COMPAT_1_5, \
        PC_Q35_COMPAT_1_6

#define PC_Q35_COMPAT_1_4 \
        PC_COMPAT_1_4, \
        PC_Q35_COMPAT_1_5

#define PC_COMPAT_1_6 \
        {\
            .driver   = "e1000",\
            .property = "mitigation",\
            .value    = "off",\
        },{\
            .driver   = "qemu64-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "qemu32-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(3),\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        }

#define PC_COMPAT_1_5 \
        PC_COMPAT_1_6, \
        {\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "any_layout",\
            .value    = "off",\
        },{\
            .driver = TYPE_X86_CPU,\
            .property = "pmu",\
            .value = "on",\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        }

#define PC_COMPAT_1_4 \
        PC_COMPAT_1_5, \
        {\
            .driver   = "scsi-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-disk",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-drive",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
        },{\
            .driver   = "virtio-blk-pci",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "virtio-serial-pci",\
            .property = "vectors",\
            /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
            .value    = stringify(0xFFFFFFFF),\
        },{ \
            .driver   = "virtio-net-pci", \
            .property = "ctrl_guest_offloads", \
            .value    = "off", \
        },{\
            .driver   = "e1000",\
            .property = "romfile",\
            .value    = "pxe-e1000.rom",\
        },{\
            .driver   = "ne2k_pci",\
            .property = "romfile",\
            .value    = "pxe-ne2k_pci.rom",\
        },{\
            .driver   = "pcnet",\
            .property = "romfile",\
            .value    = "pxe-pcnet.rom",\
        },{\
            .driver   = "rtl8139",\
            .property = "romfile",\
            .value    = "pxe-rtl8139.rom",\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "romfile",\
            .value    = "pxe-virtio.rom",\
        },{\
            .driver   = "486-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(0),\
        }

#define PC_COMMON_MACHINE_OPTIONS \
    .default_boot_order = "cad"

#define PC_DEFAULT_MACHINE_OPTIONS \
    PC_COMMON_MACHINE_OPTIONS, \
    .hot_add_cpu = pc_hot_add_cpu, \
    .max_cpus = 255

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_PC_H
87ecb68b PB	2	#define HW_PC_H
376253ec AL	3
376253ec AL	4	#include "qemu-common.h"
022c62cb	5	#include "exec/memory.h"
0d09e41a PB	6	#include "hw/isa/isa.h"
0d09e41a PB	7	#include "hw/block/fdc.h"
1422e32d	8	#include "net/net.h"
0d09e41a	9	#include "hw/i386/ioapic.h"
376253ec	10
3459a625	11	#include "qemu/range.h"
b20c9bd5 MT	12	#include "qemu/bitmap.h"
	13	#include "sysemu/sysemu.h"
	14	#include "hw/pci/pci.h"
3459a625	15
7a10ef51 LPF	16	#define HPET_INTCAP "hpet-intcap"
7a10ef51 LPF	17
87ecb68b PB	18	/* PC-style peripherals (also used by other machines). */
87ecb68b PB	19
3459a625 MT	20	typedef struct PcPciInfo {
	21	Range w32;
	22	Range w64;
	23	} PcPciInfo;
	24
f854ecc7 MT	25	#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
	26	#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
	27	#define ACPI_PM_PROP_S4_VAL "s4_val"
	28	#define ACPI_PM_PROP_SCI_INT "sci_int"
	29	#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
	30	#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
	31	#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
	32	#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
	33	#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
	34
3459a625	35	struct PcGuestInfo {
f8c457b8	36	bool has_pci_info;
6dd2a5c9	37	bool isapc_ram_fw;
b20c9bd5 MT	38	hwaddr ram_size;
	39	unsigned apic_id_limit;
	40	bool apic_xrupt_override;
	41	uint64_t numa_nodes;
	42	uint64_t *node_mem;
	43	uint64_t *node_cpu;
3459a625	44	FWCfgState *fw_cfg;
72c194f7	45	bool has_acpi_build;
3459a625 MT	46	};
3459a625 MT	47
87ecb68b	48	/* parallel.c */
48a18b3c	49	static inline bool parallel_init(ISABus bus, int index, CharDriverState chr)
defdb20e	50	{
4a17cc4f AF	51	DeviceState *dev;
4a17cc4f AF	52	ISADevice *isadev;
defdb20e	53
4a17cc4f AF	54	isadev = isa_try_create(bus, "isa-parallel");
4a17cc4f AF	55	if (!isadev) {
73531538 BS	56	return false;
73531538 BS	57	}
4a17cc4f AF	58	dev = DEVICE(isadev);
	59	qdev_prop_set_uint32(dev, "index", index);
	60	qdev_prop_set_chr(dev, "chardev", chr);
	61	if (qdev_init(dev) < 0) {
defdb20e BS	62	return false;
	63	}
	64	return true;
	65	}
	66
63858cd9	67	bool parallel_mm_init(MemoryRegion *address_space,
a8170e5e	68	hwaddr base, int it_shift, qemu_irq irq,
defdb20e	69	CharDriverState *chr);
87ecb68b PB	70
	71	/* i8259.c */
	72
9aa78c42	73	extern DeviceState *isa_pic;
48a18b3c	74	qemu_irq i8259_init(ISABus bus, qemu_irq parent_irq);
10b61882	75	qemu_irq kvm_i8259_init(ISABus bus);
9aa78c42 JK	76	int pic_read_irq(DeviceState *d);
9aa78c42 JK	77	int pic_get_output(DeviceState *d);
84f2d0ea WX	78	void pic_info(Monitor mon, const QDict qdict);
84f2d0ea WX	79	void irq_info(Monitor mon, const QDict qdict);
87ecb68b	80
b881fbe9	81	/* Global System Interrupts */
96051119	82
b881fbe9	83	#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab	84
b881fbe9	85	typedef struct GSIState {
43a0db35	86	qemu_irq i8259_irq[ISA_NUM_IRQS];
b881fbe9 JK	87	qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
	88	} GSIState;
	89
	90	void gsi_handler(void *opaque, int n, int level);
845773ab	91
87ecb68b	92	/* vmport.c */
d67f679d JK	93	typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
d67f679d JK	94
48a18b3c	95	static inline void vmport_init(ISABus *bus)
6872ef61	96	{
48a18b3c	97	isa_create_simple(bus, "vmport");
6872ef61	98	}
d67f679d JK	99
d67f679d JK	100	void vmport_register(unsigned char command, VMPortReadFunc func, void opaque);
86d86414 BS	101	void vmmouse_get_data(uint32_t *data);
86d86414 BS	102	void vmmouse_set_data(const uint32_t *data);
87ecb68b	103
87ecb68b PB	104	/* pckbd.c */
	105
	106	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
	107	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac	108	MemoryRegion *region, ram_addr_t size,
a8170e5e	109	hwaddr mask);
956a3e6b BS	110	void i8042_isa_mouse_fake_event(void *opaque);
956a3e6b BS	111	void i8042_setup_a20_line(ISADevice dev, qemu_irq a20_out);
87ecb68b	112
87ecb68b PB	113	/* pc.c */
	114	extern int fd_bootchk;
	115
8e78eb28	116	void pc_register_ferr_irq(qemu_irq irq);
845773ab IY	117	void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
845773ab IY	118
62fc403f	119	void pc_cpus_init(const char cpu_model, DeviceState icc_bridge);
c649983b	120	void pc_hot_add_cpu(const int64_t id, Error **errp);
f7e4dd6c	121	void pc_acpi_init(const char *default_dsdt);
3459a625 MT	122
	123	PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
	124	ram_addr_t above_4g_mem_size);
	125
39848901 IM	126	#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
	127	#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
	128	#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
	129	#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
	130	#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
1466cef3 MT	131	#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
1466cef3 MT	132
39848901	133
83d08f26 MT	134	void pc_pci_as_mapping_init(Object owner, MemoryRegion system_memory,
83d08f26 MT	135	MemoryRegion *pci_address_space);
39848901	136
a88b362c LE	137	FWCfgState pc_memory_init(MemoryRegion system_memory,
	138	const char *kernel_filename,
	139	const char *kernel_cmdline,
	140	const char *initrd_filename,
	141	ram_addr_t below_4g_mem_size,
	142	ram_addr_t above_4g_mem_size,
	143	MemoryRegion *rom_memory,
3459a625 MT	144	MemoryRegion **ram_memory,
3459a625 MT	145	PcGuestInfo *guest_info);
845773ab	146	qemu_irq *pc_allocate_cpu_irq(void);
48a18b3c HP	147	DeviceState pc_vga_init(ISABus isa_bus, PCIBus *pci_bus);
48a18b3c HP	148	void pc_basic_device_init(ISABus isa_bus, qemu_irq gsi,
1611977c	149	ISADevice **rtc_state,
34d4260e	150	ISADevice **floppy,
7a10ef51 LPF	151	bool no_vmport,
7a10ef51 LPF	152	uint32 hpet_irqs);
48a18b3c	153	void pc_init_ne2k_isa(ISABus bus, NICInfo nd);
845773ab	154	void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
c0897e0c	155	const char *boot_device,
34d4260e	156	ISADevice floppy, BusState ide0, BusState *ide1,
63ffb564	157	ISADevice *s);
9011a1a7	158	void pc_nic_init(ISABus isa_bus, PCIBus pci_bus);
845773ab	159	void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28	160
f885f1ea IY	161	typedef void (cpu_set_smm_t)(int smm, void arg);
	162	void cpu_smm_register(cpu_set_smm_t callback, void *arg);
	163
a39e3564 JB	164	void ioapic_init_gsi(GSIState gsi_state, const char parent_name);
a39e3564 JB	165
9d5e77a2	166	/* acpi_piix.c */
53b67b30	167
cf7a2fe2	168	i2c_bus piix4_pm_init(PCIBus bus, int devfn, uint32_t smb_io_base,
da98c8eb	169	qemu_irq sci_irq, qemu_irq smi_irq,
a88b362c	170	int kvm_enabled, FWCfgState *fw_cfg);
87ecb68b	171	void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b	172
16b29ae1 AL	173	/* hpet.c */
	174	extern int no_hpet;
	175
87ecb68b	176	/* piix_pci.c */
0a3bacf3 JQ	177	struct PCII440FXState;
	178	typedef struct PCII440FXState PCII440FXState;
	179
1e39101c	180	PCIBus i440fx_init(PCII440FXState pi440fx_state, int piix_devfn,
60573079	181	ISABus *isa_bus, qemu_irq pic,
aee97b84 AK	182	MemoryRegion *address_space_mem,
aee97b84 AK	183	MemoryRegion *address_space_io,
ae0a5466	184	ram_addr_t ram_size,
ddaaefb4	185	ram_addr_t below_4g_mem_size,
39848901	186	ram_addr_t above_4g_mem_size,
ae0a5466 AK	187	MemoryRegion *pci_memory,
ae0a5466 AK	188	MemoryRegion *ram_memory);
87ecb68b	189
277e9340	190	PCIBus *find_i440fx(void);
823e675a	191	/* piix4.c */
b1d8e52e	192	extern PCIDevice *piix4_dev;
142e9787	193	int piix4_init(PCIBus bus, ISABus *isa_bus, int devfn);
87ecb68b PB	194
87ecb68b PB	195	/* vga.c */
cb5a7aa8	196	enum vga_retrace_method {
	197	VGA_RETRACE_DUMB,
	198	VGA_RETRACE_PRECISE
	199	};
	200
	201	extern enum vga_retrace_method vga_retrace_method;
87ecb68b	202
a8170e5e AK	203	int isa_vga_mm_init(hwaddr vram_base,
a8170e5e AK	204	hwaddr ctrl_base, int it_shift,
be20f9e9	205	MemoryRegion *address_space);
87ecb68b	206
87ecb68b	207	/* ne2000.c */
48a18b3c	208	static inline bool isa_ne2000_init(ISABus bus, int base, int irq, NICInfo nd)
60a14ad3	209	{
4a17cc4f AF	210	DeviceState *dev;
4a17cc4f AF	211	ISADevice *isadev;
87ecb68b	212
60a14ad3 BS	213	qemu_check_nic_model(nd, "ne2k_isa");
60a14ad3 BS	214
4a17cc4f AF	215	isadev = isa_try_create(bus, "ne2k_isa");
4a17cc4f AF	216	if (!isadev) {
cd1b8a8b BS	217	return false;
cd1b8a8b BS	218	}
4a17cc4f AF	219	dev = DEVICE(isadev);
	220	qdev_prop_set_uint32(dev, "iobase", base);
	221	qdev_prop_set_uint32(dev, "irq", irq);
	222	qdev_set_nic_properties(dev, nd);
	223	qdev_init_nofail(dev);
cd1b8a8b	224	return true;
60a14ad3	225	}
87ecb68b	226
cbc5b5f3	227	/* pc_sysfw.c */
6dd2a5c9 PB	228	void pc_system_firmware_init(MemoryRegion *rom_memory,
6dd2a5c9 PB	229	bool isapc_ram_fw);
cbc5b5f3	230
3ab135f3	231	/* pvpanic.c */
309cd62d	232	uint16_t pvpanic_port(void);
3ab135f3	233
4c5b10b7 JS	234	/* e820 types */
	235	#define E820_RAM 1
	236	#define E820_RESERVED 2
	237	#define E820_ACPI 3
	238	#define E820_NVS 4
	239	#define E820_UNUSABLE 5
	240
	241	int e820_add_entry(uint64_t, uint64_t, uint32_t);
	242
7a10ef51 LPF	243	#define PC_Q35_COMPAT_1_7 \
	244	{\
	245	.driver = "hpet",\
	246	.property = HPET_INTCAP,\
	247	.value = stringify(4),\
	248	}
	249
	250	#define PC_Q35_COMPAT_1_6 \
	251	PC_COMPAT_1_6, \
	252	PC_Q35_COMPAT_1_7
	253
	254	#define PC_Q35_COMPAT_1_5 \
	255	PC_COMPAT_1_5, \
	256	PC_Q35_COMPAT_1_6
	257
	258	#define PC_Q35_COMPAT_1_4 \
	259	PC_COMPAT_1_4, \
	260	PC_Q35_COMPAT_1_5
	261
e9845f09 VM	262	#define PC_COMPAT_1_6 \
	263	{\
	264	.driver = "e1000",\
	265	.property = "mitigation",\
	266	.value = "off",\
f8e6a11a EH	267	},{\
	268	.driver = "qemu64-" TYPE_X86_CPU,\
	269	.property = "model",\
	270	.value = stringify(2),\
	271	},{\
	272	.driver = "qemu32-" TYPE_X86_CPU,\
	273	.property = "model",\
	274	.value = stringify(3),\
04c7d8b8 CR	275	},{\
	276	.driver = "i440FX-pcihost",\
	277	.property = "short_root_bus",\
	278	.value = stringify(1),\
	279	},{\
	280	.driver = "q35-pcihost",\
	281	.property = "short_root_bus",\
	282	.value = stringify(1),\
e9845f09 VM	283	}
e9845f09 VM	284
ffce9ebb	285	#define PC_COMPAT_1_5 \
e9845f09	286	PC_COMPAT_1_6, \
ffce9ebb EH	287	{\
	288	.driver = "Conroe-" TYPE_X86_CPU,\
	289	.property = "model",\
	290	.value = stringify(2),\
6b11322e EH	291	},{\
	292	.driver = "Conroe-" TYPE_X86_CPU,\
	293	.property = "level",\
	294	.value = stringify(2),\
ffce9ebb EH	295	},{\
	296	.driver = "Penryn-" TYPE_X86_CPU,\
	297	.property = "model",\
	298	.value = stringify(2),\
6b11322e EH	299	},{\
	300	.driver = "Penryn-" TYPE_X86_CPU,\
	301	.property = "level",\
	302	.value = stringify(2),\
ffce9ebb EH	303	},{\
	304	.driver = "Nehalem-" TYPE_X86_CPU,\
	305	.property = "model",\
	306	.value = stringify(2),\
6b11322e EH	307	},{\
	308	.driver = "Nehalem-" TYPE_X86_CPU,\
	309	.property = "level",\
	310	.value = stringify(2),\
488f069b MT	311	},{\
	312	.driver = "virtio-net-pci",\
	313	.property = "any_layout",\
	314	.value = "off",\
9337e3b6 EH	315	},{\
	316	.driver = TYPE_X86_CPU,\
	317	.property = "pmu",\
	318	.value = "on",\
04c7d8b8 CR	319	},{\
	320	.driver = "i440FX-pcihost",\
	321	.property = "short_root_bus",\
	322	.value = stringify(0),\
	323	},{\
	324	.driver = "q35-pcihost",\
	325	.property = "short_root_bus",\
	326	.value = stringify(0),\
ffce9ebb EH	327	}
ffce9ebb EH	328
bf3caa3d	329	#define PC_COMPAT_1_4 \
ffce9ebb	330	PC_COMPAT_1_5, \
bf3caa3d PB	331	{\
	332	.driver = "scsi-hd",\
	333	.property = "discard_granularity",\
	334	.value = stringify(0),\
	335	},{\
	336	.driver = "scsi-cd",\
	337	.property = "discard_granularity",\
	338	.value = stringify(0),\
	339	},{\
	340	.driver = "scsi-disk",\
	341	.property = "discard_granularity",\
	342	.value = stringify(0),\
	343	},{\
	344	.driver = "ide-hd",\
	345	.property = "discard_granularity",\
	346	.value = stringify(0),\
	347	},{\
	348	.driver = "ide-cd",\
	349	.property = "discard_granularity",\
	350	.value = stringify(0),\
	351	},{\
	352	.driver = "ide-drive",\
	353	.property = "discard_granularity",\
	354	.value = stringify(0),\
c45e5b5b	355	},{\
bf3caa3d PB	356	.driver = "virtio-blk-pci",\
	357	.property = "discard_granularity",\
	358	.value = stringify(0),\
554f1997 GH	359	},{\
	360	.driver = "virtio-serial-pci",\
	361	.property = "vectors",\
	362	/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
	363	.value = stringify(0xFFFFFFFF),\
644c9858 DF	364	},{ \
	365	.driver = "virtio-net-pci", \
	366	.property = "ctrl_guest_offloads", \
	367	.value = "off", \
c45e5b5b GH	368	},{\
	369	.driver = "e1000",\
	370	.property = "romfile",\
	371	.value = "pxe-e1000.rom",\
	372	},{\
	373	.driver = "ne2k_pci",\
	374	.property = "romfile",\
	375	.value = "pxe-ne2k_pci.rom",\
	376	},{\
	377	.driver = "pcnet",\
	378	.property = "romfile",\
	379	.value = "pxe-pcnet.rom",\
	380	},{\
	381	.driver = "rtl8139",\
	382	.property = "romfile",\
	383	.value = "pxe-rtl8139.rom",\
	384	},{\
	385	.driver = "virtio-net-pci",\
	386	.property = "romfile",\
	387	.value = "pxe-virtio.rom",\
b2a856d9 AF	388	},{\
	389	.driver = "486-" TYPE_X86_CPU,\
	390	.property = "model",\
	391	.value = stringify(0),\
c45e5b5b	392	}
bf3caa3d	393
a0dba644 MT	394	#define PC_COMMON_MACHINE_OPTIONS \
	395	.default_boot_order = "cad"
	396
	397	#define PC_DEFAULT_MACHINE_OPTIONS \
	398	PC_COMMON_MACHINE_OPTIONS, \
	399	.hot_add_cpu = pc_hot_add_cpu, \
	400	.max_cpus = 255
	401
87ecb68b	402	#endif