[mirror_qemu.git] / include / hw / i386 / pc.h

#ifndef HW_PC_H
#define HW_PC_H

#include "qemu-common.h"
#include "exec/memory.h"
#include "exec/ioport.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/i386/ioapic.h"

/* PC-style peripherals (also used by other machines).  */

/* parallel.c */
static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
{
    DeviceState *dev;
    ISADevice *isadev;

    isadev = isa_try_create(bus, "isa-parallel");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "index", index);
    qdev_prop_set_chr(dev, "chardev", chr);
    if (qdev_init(dev) < 0) {
        return false;
    }
    return true;
}

bool parallel_mm_init(MemoryRegion *address_space,
                      hwaddr base, int it_shift, qemu_irq irq,
                      CharDriverState *chr);

/* i8259.c */

extern DeviceState *isa_pic;
qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
qemu_irq *kvm_i8259_init(ISABus *bus);
int pic_read_irq(DeviceState *d);
int pic_get_output(DeviceState *d);
void pic_info(Monitor *mon, const QDict *qdict);
void irq_info(Monitor *mon, const QDict *qdict);

/* Global System Interrupts */

#define GSI_NUM_PINS IOAPIC_NUM_PINS

typedef struct GSIState {
    qemu_irq i8259_irq[ISA_NUM_IRQS];
    qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
} GSIState;

void gsi_handler(void *opaque, int n, int level);

/* vmport.c */
static inline void vmport_init(ISABus *bus)
{
    isa_create_simple(bus, "vmport");
}
void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);

/* pckbd.c */

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
                   MemoryRegion *region, ram_addr_t size,
                   hwaddr mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);

/* pc.c */
extern int fd_bootchk;

void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);

void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
void pc_hot_add_cpu(const int64_t id, Error **errp);
void pc_acpi_init(const char *default_dsdt);
FWCfgState *pc_memory_init(MemoryRegion *system_memory,
                           const char *kernel_filename,
                           const char *kernel_cmdline,
                           const char *initrd_filename,
                           ram_addr_t below_4g_mem_size,
                           ram_addr_t above_4g_mem_size,
                           MemoryRegion *rom_memory,
                           MemoryRegion **ram_memory);
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
                          ISADevice **rtc_state,
                          ISADevice **floppy,
                          bool no_vmport);
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                  const char *boot_device,
                  ISADevice *floppy, BusState *ide0, BusState *ide1,
                  ISADevice *s);
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);

typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);

void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);

/* acpi_piix.c */

i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                       qemu_irq sci_irq, qemu_irq smi_irq,
                       int kvm_enabled, FWCfgState *fw_cfg);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);

/* hpet.c */
extern int no_hpet;

/* piix_pci.c */
struct PCII440FXState;
typedef struct PCII440FXState PCII440FXState;

PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
                    ISABus **isa_bus, qemu_irq *pic,
                    MemoryRegion *address_space_mem,
                    MemoryRegion *address_space_io,
                    ram_addr_t ram_size,
                    hwaddr pci_hole_start,
                    hwaddr pci_hole_size,
                    hwaddr pci_hole64_start,
                    hwaddr pci_hole64_size,
                    MemoryRegion *pci_memory,
                    MemoryRegion *ram_memory);

/* piix4.c */
extern PCIDevice *piix4_dev;
int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);

/* vga.c */
enum vga_retrace_method {
    VGA_RETRACE_DUMB,
    VGA_RETRACE_PRECISE
};

extern enum vga_retrace_method vga_retrace_method;

int isa_vga_mm_init(hwaddr vram_base,
                    hwaddr ctrl_base, int it_shift,
                    MemoryRegion *address_space);

/* ne2000.c */
static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
{
    DeviceState *dev;
    ISADevice *isadev;

    qemu_check_nic_model(nd, "ne2k_isa");

    isadev = isa_try_create(bus, "ne2k_isa");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "iobase", base);
    qdev_prop_set_uint32(dev, "irq",    irq);
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
    return true;
}

/* pc_sysfw.c */
void pc_system_firmware_init(MemoryRegion *rom_memory);

/* pvpanic.c */
int pvpanic_init(ISABus *bus);

/* e820 types */
#define E820_RAM        1
#define E820_RESERVED   2
#define E820_ACPI       3
#define E820_NVS        4
#define E820_UNUSABLE   5

int e820_add_entry(uint64_t, uint64_t, uint32_t);

#define PC_COMPAT_1_5 \
        {\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        }

#define PC_COMPAT_1_4 \
        PC_COMPAT_1_5, \
        {\
            .driver   = "scsi-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-disk",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-drive",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
        },{\
            .driver   = "virtio-blk-pci",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "virtio-serial-pci",\
            .property = "vectors",\
            /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
            .value    = stringify(0xFFFFFFFF),\
        },{ \
            .driver   = "virtio-net-pci", \
            .property = "ctrl_guest_offloads", \
            .value    = "off", \
        },{\
            .driver   = "e1000",\
            .property = "romfile",\
            .value    = "pxe-e1000.rom",\
        },{\
            .driver   = "ne2k_pci",\
            .property = "romfile",\
            .value    = "pxe-ne2k_pci.rom",\
        },{\
            .driver   = "pcnet",\
            .property = "romfile",\
            .value    = "pxe-pcnet.rom",\
        },{\
            .driver   = "rtl8139",\
            .property = "romfile",\
            .value    = "pxe-rtl8139.rom",\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "romfile",\
            .value    = "pxe-virtio.rom",\
        },{\
            .driver   = "486-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(0),\
        }

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_PC_H
87ecb68b PB	2	#define HW_PC_H
376253ec AL	3
376253ec AL	4	#include "qemu-common.h"
022c62cb PB	5	#include "exec/memory.h"
022c62cb PB	6	#include "exec/ioport.h"
0d09e41a PB	7	#include "hw/isa/isa.h"
0d09e41a PB	8	#include "hw/block/fdc.h"
1422e32d	9	#include "net/net.h"
0d09e41a	10	#include "hw/i386/ioapic.h"
376253ec	11
87ecb68b PB	12	/* PC-style peripherals (also used by other machines). */
87ecb68b PB	13
87ecb68b	14	/* parallel.c */
48a18b3c	15	static inline bool parallel_init(ISABus bus, int index, CharDriverState chr)
defdb20e	16	{
4a17cc4f AF	17	DeviceState *dev;
4a17cc4f AF	18	ISADevice *isadev;
defdb20e	19
4a17cc4f AF	20	isadev = isa_try_create(bus, "isa-parallel");
4a17cc4f AF	21	if (!isadev) {
73531538 BS	22	return false;
73531538 BS	23	}
4a17cc4f AF	24	dev = DEVICE(isadev);
	25	qdev_prop_set_uint32(dev, "index", index);
	26	qdev_prop_set_chr(dev, "chardev", chr);
	27	if (qdev_init(dev) < 0) {
defdb20e BS	28	return false;
	29	}
	30	return true;
	31	}
	32
63858cd9	33	bool parallel_mm_init(MemoryRegion *address_space,
a8170e5e	34	hwaddr base, int it_shift, qemu_irq irq,
defdb20e	35	CharDriverState *chr);
87ecb68b PB	36
	37	/* i8259.c */
	38
9aa78c42	39	extern DeviceState *isa_pic;
48a18b3c	40	qemu_irq i8259_init(ISABus bus, qemu_irq parent_irq);
10b61882	41	qemu_irq kvm_i8259_init(ISABus bus);
9aa78c42 JK	42	int pic_read_irq(DeviceState *d);
9aa78c42 JK	43	int pic_get_output(DeviceState *d);
84f2d0ea WX	44	void pic_info(Monitor mon, const QDict qdict);
84f2d0ea WX	45	void irq_info(Monitor mon, const QDict qdict);
87ecb68b	46
b881fbe9	47	/* Global System Interrupts */
96051119	48
b881fbe9	49	#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab	50
b881fbe9	51	typedef struct GSIState {
43a0db35	52	qemu_irq i8259_irq[ISA_NUM_IRQS];
b881fbe9 JK	53	qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
	54	} GSIState;
	55
	56	void gsi_handler(void *opaque, int n, int level);
845773ab	57
87ecb68b	58	/* vmport.c */
48a18b3c	59	static inline void vmport_init(ISABus *bus)
6872ef61	60	{
48a18b3c	61	isa_create_simple(bus, "vmport");
6872ef61	62	}
87ecb68b	63	void vmport_register(unsigned char command, IOPortReadFunc func, void opaque);
86d86414 BS	64	void vmmouse_get_data(uint32_t *data);
86d86414 BS	65	void vmmouse_set_data(const uint32_t *data);
87ecb68b	66
87ecb68b PB	67	/* pckbd.c */
	68
	69	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
	70	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac	71	MemoryRegion *region, ram_addr_t size,
a8170e5e	72	hwaddr mask);
956a3e6b BS	73	void i8042_isa_mouse_fake_event(void *opaque);
956a3e6b BS	74	void i8042_setup_a20_line(ISADevice dev, qemu_irq a20_out);
87ecb68b	75
87ecb68b PB	76	/* pc.c */
	77	extern int fd_bootchk;
	78
8e78eb28	79	void pc_register_ferr_irq(qemu_irq irq);
845773ab IY	80	void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
845773ab IY	81
62fc403f	82	void pc_cpus_init(const char cpu_model, DeviceState icc_bridge);
c649983b	83	void pc_hot_add_cpu(const int64_t id, Error **errp);
f7e4dd6c	84	void pc_acpi_init(const char *default_dsdt);
a88b362c LE	85	FWCfgState pc_memory_init(MemoryRegion system_memory,
	86	const char *kernel_filename,
	87	const char *kernel_cmdline,
	88	const char *initrd_filename,
	89	ram_addr_t below_4g_mem_size,
	90	ram_addr_t above_4g_mem_size,
	91	MemoryRegion *rom_memory,
	92	MemoryRegion **ram_memory);
845773ab	93	qemu_irq *pc_allocate_cpu_irq(void);
48a18b3c HP	94	DeviceState pc_vga_init(ISABus isa_bus, PCIBus *pci_bus);
48a18b3c HP	95	void pc_basic_device_init(ISABus isa_bus, qemu_irq gsi,
1611977c	96	ISADevice **rtc_state,
34d4260e	97	ISADevice **floppy,
1611977c	98	bool no_vmport);
48a18b3c	99	void pc_init_ne2k_isa(ISABus bus, NICInfo nd);
845773ab	100	void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
c0897e0c	101	const char *boot_device,
34d4260e	102	ISADevice floppy, BusState ide0, BusState *ide1,
63ffb564	103	ISADevice *s);
9011a1a7	104	void pc_nic_init(ISABus isa_bus, PCIBus pci_bus);
845773ab	105	void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28	106
f885f1ea IY	107	typedef void (cpu_set_smm_t)(int smm, void arg);
	108	void cpu_smm_register(cpu_set_smm_t callback, void *arg);
	109
a39e3564 JB	110	void ioapic_init_gsi(GSIState gsi_state, const char parent_name);
a39e3564 JB	111
9d5e77a2	112	/* acpi_piix.c */
53b67b30	113
cf7a2fe2	114	i2c_bus piix4_pm_init(PCIBus bus, int devfn, uint32_t smb_io_base,
da98c8eb	115	qemu_irq sci_irq, qemu_irq smi_irq,
a88b362c	116	int kvm_enabled, FWCfgState *fw_cfg);
87ecb68b	117	void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b	118
16b29ae1 AL	119	/* hpet.c */
	120	extern int no_hpet;
	121
87ecb68b	122	/* piix_pci.c */
0a3bacf3 JQ	123	struct PCII440FXState;
	124	typedef struct PCII440FXState PCII440FXState;
	125
1e39101c	126	PCIBus i440fx_init(PCII440FXState pi440fx_state, int piix_devfn,
60573079	127	ISABus *isa_bus, qemu_irq pic,
aee97b84 AK	128	MemoryRegion *address_space_mem,
aee97b84 AK	129	MemoryRegion *address_space_io,
ae0a5466	130	ram_addr_t ram_size,
a8170e5e AK	131	hwaddr pci_hole_start,
	132	hwaddr pci_hole_size,
	133	hwaddr pci_hole64_start,
	134	hwaddr pci_hole64_size,
ae0a5466 AK	135	MemoryRegion *pci_memory,
ae0a5466 AK	136	MemoryRegion *ram_memory);
87ecb68b	137
823e675a	138	/* piix4.c */
b1d8e52e	139	extern PCIDevice *piix4_dev;
142e9787	140	int piix4_init(PCIBus bus, ISABus *isa_bus, int devfn);
87ecb68b PB	141
87ecb68b PB	142	/* vga.c */
cb5a7aa8	143	enum vga_retrace_method {
	144	VGA_RETRACE_DUMB,
	145	VGA_RETRACE_PRECISE
	146	};
	147
	148	extern enum vga_retrace_method vga_retrace_method;
87ecb68b	149
a8170e5e AK	150	int isa_vga_mm_init(hwaddr vram_base,
a8170e5e AK	151	hwaddr ctrl_base, int it_shift,
be20f9e9	152	MemoryRegion *address_space);
87ecb68b	153
87ecb68b	154	/* ne2000.c */
48a18b3c	155	static inline bool isa_ne2000_init(ISABus bus, int base, int irq, NICInfo nd)
60a14ad3	156	{
4a17cc4f AF	157	DeviceState *dev;
4a17cc4f AF	158	ISADevice *isadev;
87ecb68b	159
60a14ad3 BS	160	qemu_check_nic_model(nd, "ne2k_isa");
60a14ad3 BS	161
4a17cc4f AF	162	isadev = isa_try_create(bus, "ne2k_isa");
4a17cc4f AF	163	if (!isadev) {
cd1b8a8b BS	164	return false;
cd1b8a8b BS	165	}
4a17cc4f AF	166	dev = DEVICE(isadev);
	167	qdev_prop_set_uint32(dev, "iobase", base);
	168	qdev_prop_set_uint32(dev, "irq", irq);
	169	qdev_set_nic_properties(dev, nd);
	170	qdev_init_nofail(dev);
cd1b8a8b	171	return true;
60a14ad3	172	}
87ecb68b	173
cbc5b5f3 JJ	174	/* pc_sysfw.c */
	175	void pc_system_firmware_init(MemoryRegion *rom_memory);
	176
3ab135f3 HT	177	/* pvpanic.c */
	178	int pvpanic_init(ISABus *bus);
	179
4c5b10b7 JS	180	/* e820 types */
	181	#define E820_RAM 1
	182	#define E820_RESERVED 2
	183	#define E820_ACPI 3
	184	#define E820_NVS 4
	185	#define E820_UNUSABLE 5
	186
	187	int e820_add_entry(uint64_t, uint64_t, uint32_t);
	188
ffce9ebb EH	189	#define PC_COMPAT_1_5 \
	190	{\
	191	.driver = "Conroe-" TYPE_X86_CPU,\
	192	.property = "model",\
	193	.value = stringify(2),\
6b11322e EH	194	},{\
	195	.driver = "Conroe-" TYPE_X86_CPU,\
	196	.property = "level",\
	197	.value = stringify(2),\
ffce9ebb EH	198	},{\
	199	.driver = "Penryn-" TYPE_X86_CPU,\
	200	.property = "model",\
	201	.value = stringify(2),\
6b11322e EH	202	},{\
	203	.driver = "Penryn-" TYPE_X86_CPU,\
	204	.property = "level",\
	205	.value = stringify(2),\
ffce9ebb EH	206	},{\
	207	.driver = "Nehalem-" TYPE_X86_CPU,\
	208	.property = "model",\
	209	.value = stringify(2),\
6b11322e EH	210	},{\
	211	.driver = "Nehalem-" TYPE_X86_CPU,\
	212	.property = "level",\
	213	.value = stringify(2),\
ffce9ebb EH	214	}
ffce9ebb EH	215
bf3caa3d	216	#define PC_COMPAT_1_4 \
ffce9ebb	217	PC_COMPAT_1_5, \
bf3caa3d PB	218	{\
	219	.driver = "scsi-hd",\
	220	.property = "discard_granularity",\
	221	.value = stringify(0),\
	222	},{\
	223	.driver = "scsi-cd",\
	224	.property = "discard_granularity",\
	225	.value = stringify(0),\
	226	},{\
	227	.driver = "scsi-disk",\
	228	.property = "discard_granularity",\
	229	.value = stringify(0),\
	230	},{\
	231	.driver = "ide-hd",\
	232	.property = "discard_granularity",\
	233	.value = stringify(0),\
	234	},{\
	235	.driver = "ide-cd",\
	236	.property = "discard_granularity",\
	237	.value = stringify(0),\
	238	},{\
	239	.driver = "ide-drive",\
	240	.property = "discard_granularity",\
	241	.value = stringify(0),\
c45e5b5b	242	},{\
bf3caa3d PB	243	.driver = "virtio-blk-pci",\
	244	.property = "discard_granularity",\
	245	.value = stringify(0),\
554f1997 GH	246	},{\
	247	.driver = "virtio-serial-pci",\
	248	.property = "vectors",\
	249	/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
	250	.value = stringify(0xFFFFFFFF),\
644c9858 DF	251	},{ \
	252	.driver = "virtio-net-pci", \
	253	.property = "ctrl_guest_offloads", \
	254	.value = "off", \
c45e5b5b GH	255	},{\
	256	.driver = "e1000",\
	257	.property = "romfile",\
	258	.value = "pxe-e1000.rom",\
	259	},{\
	260	.driver = "ne2k_pci",\
	261	.property = "romfile",\
	262	.value = "pxe-ne2k_pci.rom",\
	263	},{\
	264	.driver = "pcnet",\
	265	.property = "romfile",\
	266	.value = "pxe-pcnet.rom",\
	267	},{\
	268	.driver = "rtl8139",\
	269	.property = "romfile",\
	270	.value = "pxe-rtl8139.rom",\
	271	},{\
	272	.driver = "virtio-net-pci",\
	273	.property = "romfile",\
	274	.value = "pxe-virtio.rom",\
b2a856d9 AF	275	},{\
	276	.driver = "486-" TYPE_X86_CPU,\
	277	.property = "model",\
	278	.value = stringify(0),\
c45e5b5b	279	}
bf3caa3d	280
87ecb68b	281	#endif