]>
Commit | Line | Data |
---|---|---|
dd83b06a AF |
1 | /* |
2 | * QEMU CPU model | |
3 | * | |
4 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see | |
18 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
19 | */ | |
20 | #ifndef QEMU_CPU_H | |
21 | #define QEMU_CPU_H | |
22 | ||
fcd7d003 | 23 | #include <signal.h> |
961f8395 | 24 | #include "hw/qdev-core.h" |
c658b94f | 25 | #include "exec/hwaddr.h" |
1de7afc9 | 26 | #include "qemu/thread.h" |
4917cf44 | 27 | #include "qemu/tls.h" |
a23bbfda | 28 | #include "qemu/typedefs.h" |
dd83b06a | 29 | |
c72bf468 JF |
30 | typedef int (*WriteCoreDumpFunction)(void *buf, size_t size, void *opaque); |
31 | ||
dd83b06a AF |
32 | /** |
33 | * SECTION:cpu | |
34 | * @section_id: QEMU-cpu | |
35 | * @title: CPU Class | |
36 | * @short_description: Base class for all CPUs | |
37 | */ | |
38 | ||
39 | #define TYPE_CPU "cpu" | |
40 | ||
41 | #define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU) | |
42 | #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU) | |
43 | #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU) | |
44 | ||
45 | typedef struct CPUState CPUState; | |
46 | ||
c658b94f AF |
47 | typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr, |
48 | bool is_write, bool is_exec, int opaque, | |
49 | unsigned size); | |
50 | ||
dd83b06a AF |
51 | /** |
52 | * CPUClass: | |
2b8c2754 AF |
53 | * @class_by_name: Callback to map -cpu command line model name to an |
54 | * instantiatable CPU type. | |
f5df5baf | 55 | * @reset: Callback to reset the #CPUState to its initial state. |
97a8ea5a | 56 | * @do_interrupt: Callback for interrupt handling. |
c658b94f | 57 | * @do_unassigned_access: Callback for unassigned access handling. |
878096ee AF |
58 | * @dump_state: Callback for dumping state. |
59 | * @dump_statistics: Callback for dumping statistics. | |
997395d3 | 60 | * @get_arch_id: Callback for getting architecture-dependent CPU ID. |
444d5590 | 61 | * @get_paging_enabled: Callback for inquiring whether paging is enabled. |
a23bbfda | 62 | * @get_memory_mapping: Callback for obtaining the memory mappings. |
b170fce3 | 63 | * @vmsd: State description for migration. |
dd83b06a AF |
64 | * |
65 | * Represents a CPU family or model. | |
66 | */ | |
67 | typedef struct CPUClass { | |
68 | /*< private >*/ | |
961f8395 | 69 | DeviceClass parent_class; |
dd83b06a AF |
70 | /*< public >*/ |
71 | ||
2b8c2754 AF |
72 | ObjectClass *(*class_by_name)(const char *cpu_model); |
73 | ||
dd83b06a | 74 | void (*reset)(CPUState *cpu); |
97a8ea5a | 75 | void (*do_interrupt)(CPUState *cpu); |
c658b94f | 76 | CPUUnassignedAccess do_unassigned_access; |
878096ee AF |
77 | void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, |
78 | int flags); | |
79 | void (*dump_statistics)(CPUState *cpu, FILE *f, | |
80 | fprintf_function cpu_fprintf, int flags); | |
997395d3 | 81 | int64_t (*get_arch_id)(CPUState *cpu); |
444d5590 | 82 | bool (*get_paging_enabled)(const CPUState *cpu); |
a23bbfda AF |
83 | void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, |
84 | Error **errp); | |
b170fce3 AF |
85 | |
86 | const struct VMStateDescription *vmsd; | |
c72bf468 JF |
87 | int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, |
88 | int cpuid, void *opaque); | |
89 | int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, | |
90 | void *opaque); | |
91 | int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu, | |
92 | int cpuid, void *opaque); | |
93 | int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, | |
94 | void *opaque); | |
dd83b06a AF |
95 | } CPUClass; |
96 | ||
a60f24b5 | 97 | struct KVMState; |
f7575c96 | 98 | struct kvm_run; |
a60f24b5 | 99 | |
dd83b06a AF |
100 | /** |
101 | * CPUState: | |
55e5c285 | 102 | * @cpu_index: CPU index (informative). |
ce3960eb AF |
103 | * @nr_cores: Number of cores within this CPU package. |
104 | * @nr_threads: Number of threads within this CPU. | |
1b1ed8dc | 105 | * @numa_node: NUMA node this CPU is belonging to. |
0d34282f | 106 | * @host_tid: Host thread ID. |
0315c31c | 107 | * @running: #true if CPU is currently running (usermode). |
61a46217 | 108 | * @created: Indicates whether the CPU thread has been successfully created. |
259186a7 AF |
109 | * @interrupt_request: Indicates a pending interrupt request. |
110 | * @halted: Nonzero if the CPU is in suspended state. | |
4fdeee7c | 111 | * @stop: Indicates a pending stop request. |
f324e766 | 112 | * @stopped: Indicates the CPU has been artificially stopped. |
378df4b2 PM |
113 | * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this |
114 | * CPU and return to its top level loop. | |
c05efcb1 | 115 | * @env_ptr: Pointer to subclass-specific CPUArchState field. |
d77953b9 | 116 | * @current_tb: Currently executing TB. |
8737c51c | 117 | * @kvm_fd: vCPU file descriptor for KVM. |
dd83b06a AF |
118 | * |
119 | * State of one CPU core or thread. | |
120 | */ | |
121 | struct CPUState { | |
122 | /*< private >*/ | |
961f8395 | 123 | DeviceState parent_obj; |
dd83b06a AF |
124 | /*< public >*/ |
125 | ||
ce3960eb AF |
126 | int nr_cores; |
127 | int nr_threads; | |
1b1ed8dc | 128 | int numa_node; |
ce3960eb | 129 | |
814e612e | 130 | struct QemuThread *thread; |
bcba2a72 AF |
131 | #ifdef _WIN32 |
132 | HANDLE hThread; | |
133 | #endif | |
9f09e18a | 134 | int thread_id; |
0d34282f | 135 | uint32_t host_tid; |
0315c31c | 136 | bool running; |
f5c121b8 | 137 | struct QemuCond *halt_cond; |
c64ca814 | 138 | struct qemu_work_item *queued_work_first, *queued_work_last; |
216fc9a4 | 139 | bool thread_kicked; |
61a46217 | 140 | bool created; |
4fdeee7c | 141 | bool stop; |
f324e766 | 142 | bool stopped; |
fcd7d003 | 143 | volatile sig_atomic_t exit_request; |
378df4b2 | 144 | volatile sig_atomic_t tcg_exit_req; |
259186a7 | 145 | uint32_t interrupt_request; |
bcba2a72 | 146 | |
c05efcb1 | 147 | void *env_ptr; /* CPUArchState */ |
d77953b9 AF |
148 | struct TranslationBlock *current_tb; |
149 | ||
8737c51c | 150 | int kvm_fd; |
20d695a9 | 151 | bool kvm_vcpu_dirty; |
a60f24b5 | 152 | struct KVMState *kvm_state; |
f7575c96 | 153 | struct kvm_run *kvm_run; |
8737c51c | 154 | |
f5df5baf | 155 | /* TODO Move common fields from CPUArchState here. */ |
55e5c285 | 156 | int cpu_index; /* used by alpha TCG */ |
259186a7 | 157 | uint32_t halted; /* used by alpha, cris, ppc TCG */ |
dd83b06a AF |
158 | }; |
159 | ||
4917cf44 AF |
160 | DECLARE_TLS(CPUState *, current_cpu); |
161 | #define current_cpu tls_var(current_cpu) | |
162 | ||
444d5590 AF |
163 | /** |
164 | * cpu_paging_enabled: | |
165 | * @cpu: The CPU whose state is to be inspected. | |
166 | * | |
167 | * Returns: %true if paging is enabled, %false otherwise. | |
168 | */ | |
169 | bool cpu_paging_enabled(const CPUState *cpu); | |
170 | ||
a23bbfda AF |
171 | /** |
172 | * cpu_get_memory_mapping: | |
173 | * @cpu: The CPU whose memory mappings are to be obtained. | |
174 | * @list: Where to write the memory mappings to. | |
175 | * @errp: Pointer for reporting an #Error. | |
176 | */ | |
177 | void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, | |
178 | Error **errp); | |
179 | ||
c72bf468 JF |
180 | /** |
181 | * cpu_write_elf64_note: | |
182 | * @f: pointer to a function that writes memory to a file | |
183 | * @cpu: The CPU whose memory is to be dumped | |
184 | * @cpuid: ID number of the CPU | |
185 | * @opaque: pointer to the CPUState struct | |
186 | */ | |
187 | int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, | |
188 | int cpuid, void *opaque); | |
189 | ||
190 | /** | |
191 | * cpu_write_elf64_qemunote: | |
192 | * @f: pointer to a function that writes memory to a file | |
193 | * @cpu: The CPU whose memory is to be dumped | |
194 | * @cpuid: ID number of the CPU | |
195 | * @opaque: pointer to the CPUState struct | |
196 | */ | |
197 | int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, | |
198 | void *opaque); | |
199 | ||
200 | /** | |
201 | * cpu_write_elf32_note: | |
202 | * @f: pointer to a function that writes memory to a file | |
203 | * @cpu: The CPU whose memory is to be dumped | |
204 | * @cpuid: ID number of the CPU | |
205 | * @opaque: pointer to the CPUState struct | |
206 | */ | |
207 | int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, | |
208 | int cpuid, void *opaque); | |
209 | ||
210 | /** | |
211 | * cpu_write_elf32_qemunote: | |
212 | * @f: pointer to a function that writes memory to a file | |
213 | * @cpu: The CPU whose memory is to be dumped | |
214 | * @cpuid: ID number of the CPU | |
215 | * @opaque: pointer to the CPUState struct | |
216 | */ | |
217 | int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, | |
218 | void *opaque); | |
dd83b06a | 219 | |
878096ee AF |
220 | /** |
221 | * CPUDumpFlags: | |
222 | * @CPU_DUMP_CODE: | |
223 | * @CPU_DUMP_FPU: dump FPU register state, not just integer | |
224 | * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state | |
225 | */ | |
226 | enum CPUDumpFlags { | |
227 | CPU_DUMP_CODE = 0x00010000, | |
228 | CPU_DUMP_FPU = 0x00020000, | |
229 | CPU_DUMP_CCOP = 0x00040000, | |
230 | }; | |
231 | ||
232 | /** | |
233 | * cpu_dump_state: | |
234 | * @cpu: The CPU whose state is to be dumped. | |
235 | * @f: File to dump to. | |
236 | * @cpu_fprintf: Function to dump with. | |
237 | * @flags: Flags what to dump. | |
238 | * | |
239 | * Dumps CPU state. | |
240 | */ | |
241 | void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, | |
242 | int flags); | |
243 | ||
244 | /** | |
245 | * cpu_dump_statistics: | |
246 | * @cpu: The CPU whose state is to be dumped. | |
247 | * @f: File to dump to. | |
248 | * @cpu_fprintf: Function to dump with. | |
249 | * @flags: Flags what to dump. | |
250 | * | |
251 | * Dumps CPU statistics. | |
252 | */ | |
253 | void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, | |
254 | int flags); | |
255 | ||
dd83b06a AF |
256 | /** |
257 | * cpu_reset: | |
258 | * @cpu: The CPU whose state is to be reset. | |
259 | */ | |
260 | void cpu_reset(CPUState *cpu); | |
261 | ||
2b8c2754 AF |
262 | /** |
263 | * cpu_class_by_name: | |
264 | * @typename: The CPU base type. | |
265 | * @cpu_model: The model string without any parameters. | |
266 | * | |
267 | * Looks up a CPU #ObjectClass matching name @cpu_model. | |
268 | * | |
269 | * Returns: A #CPUClass or %NULL if not matching class is found. | |
270 | */ | |
271 | ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); | |
272 | ||
ca91b15f AF |
273 | /** |
274 | * cpu_class_set_vmsd: | |
275 | * @cc: CPU class | |
276 | * @value: Value to set. Unused for %CONFIG_USER_ONLY. | |
277 | * | |
278 | * Sets #VMStateDescription for @cc. | |
279 | * | |
280 | * The @value argument is intentionally discarded for the non-softmmu targets | |
281 | * to avoid linker errors or excessive preprocessor usage. If this behavior | |
76d5f029 | 282 | * is undesired, you should assign #CPUClass.vmsd directly instead. |
ca91b15f AF |
283 | */ |
284 | #ifndef CONFIG_USER_ONLY | |
285 | static inline void cpu_class_set_vmsd(CPUClass *cc, | |
286 | const struct VMStateDescription *value) | |
287 | { | |
288 | cc->vmsd = value; | |
289 | } | |
290 | #else | |
291 | #define cpu_class_set_vmsd(cc, value) ((cc)->vmsd = NULL) | |
292 | #endif | |
293 | ||
c658b94f AF |
294 | #ifndef CONFIG_USER_ONLY |
295 | static inline void cpu_class_set_do_unassigned_access(CPUClass *cc, | |
296 | CPUUnassignedAccess value) | |
297 | { | |
298 | cc->do_unassigned_access = value; | |
299 | } | |
300 | #else | |
301 | #define cpu_class_set_do_unassigned_access(cc, value) \ | |
302 | ((cc)->do_unassigned_access = NULL) | |
303 | #endif | |
304 | ||
19e3835c AF |
305 | /** |
306 | * device_class_set_vmsd: | |
307 | * @dc: Device class | |
308 | * @value: Value to set. Unused for %CONFIG_USER_ONLY. | |
309 | * | |
310 | * Sets #VMStateDescription for @dc. | |
311 | * | |
312 | * The @value argument is intentionally discarded for the non-softmmu targets | |
313 | * to avoid linker errors or excessive preprocessor usage. If this behavior | |
314 | * is undesired, you should assign #DeviceClass.vmsd directly instead. | |
315 | */ | |
316 | #ifndef CONFIG_USER_ONLY | |
317 | static inline void device_class_set_vmsd(DeviceClass *dc, | |
318 | const struct VMStateDescription *value) | |
319 | { | |
320 | dc->vmsd = value; | |
321 | } | |
322 | #else | |
323 | #define device_class_set_vmsd(dc, value) ((dc)->vmsd = NULL) | |
324 | #endif | |
325 | ||
3993c6bd AF |
326 | /** |
327 | * qemu_cpu_has_work: | |
328 | * @cpu: The vCPU to check. | |
329 | * | |
330 | * Checks whether the CPU has work to do. | |
331 | * | |
332 | * Returns: %true if the CPU has work, %false otherwise. | |
333 | */ | |
334 | bool qemu_cpu_has_work(CPUState *cpu); | |
335 | ||
60e82579 AF |
336 | /** |
337 | * qemu_cpu_is_self: | |
338 | * @cpu: The vCPU to check against. | |
339 | * | |
340 | * Checks whether the caller is executing on the vCPU thread. | |
341 | * | |
342 | * Returns: %true if called from @cpu's thread, %false otherwise. | |
343 | */ | |
344 | bool qemu_cpu_is_self(CPUState *cpu); | |
345 | ||
c08d7424 AF |
346 | /** |
347 | * qemu_cpu_kick: | |
348 | * @cpu: The vCPU to kick. | |
349 | * | |
350 | * Kicks @cpu's thread. | |
351 | */ | |
352 | void qemu_cpu_kick(CPUState *cpu); | |
353 | ||
2fa45344 AF |
354 | /** |
355 | * cpu_is_stopped: | |
356 | * @cpu: The CPU to check. | |
357 | * | |
358 | * Checks whether the CPU is stopped. | |
359 | * | |
360 | * Returns: %true if run state is not running or if artificially stopped; | |
361 | * %false otherwise. | |
362 | */ | |
363 | bool cpu_is_stopped(CPUState *cpu); | |
364 | ||
f100f0b3 AF |
365 | /** |
366 | * run_on_cpu: | |
367 | * @cpu: The vCPU to run on. | |
368 | * @func: The function to be executed. | |
369 | * @data: Data to pass to the function. | |
370 | * | |
371 | * Schedules the function @func for execution on the vCPU @cpu. | |
372 | */ | |
373 | void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); | |
374 | ||
d6b9e0d6 MT |
375 | /** |
376 | * qemu_for_each_cpu: | |
377 | * @func: The function to be executed. | |
378 | * @data: Data to pass to the function. | |
379 | * | |
380 | * Executes @func for each CPU. | |
381 | */ | |
382 | void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data); | |
383 | ||
38d8f5c8 AF |
384 | /** |
385 | * qemu_get_cpu: | |
386 | * @index: The CPUState@cpu_index value of the CPU to obtain. | |
387 | * | |
388 | * Gets a CPU matching @index. | |
389 | * | |
390 | * Returns: The CPU or %NULL if there is no matching CPU. | |
391 | */ | |
392 | CPUState *qemu_get_cpu(int index); | |
393 | ||
69e5ff06 IM |
394 | /** |
395 | * cpu_exists: | |
396 | * @id: Guest-exposed CPU ID to lookup. | |
397 | * | |
398 | * Search for CPU with specified ID. | |
399 | * | |
400 | * Returns: %true - CPU is found, %false - CPU isn't found. | |
401 | */ | |
402 | bool cpu_exists(int64_t id); | |
403 | ||
c3affe56 AF |
404 | #ifndef CONFIG_USER_ONLY |
405 | ||
406 | typedef void (*CPUInterruptHandler)(CPUState *, int); | |
407 | ||
408 | extern CPUInterruptHandler cpu_interrupt_handler; | |
409 | ||
410 | /** | |
411 | * cpu_interrupt: | |
412 | * @cpu: The CPU to set an interrupt on. | |
413 | * @mask: The interupts to set. | |
414 | * | |
415 | * Invokes the interrupt handler. | |
416 | */ | |
417 | static inline void cpu_interrupt(CPUState *cpu, int mask) | |
418 | { | |
419 | cpu_interrupt_handler(cpu, mask); | |
420 | } | |
421 | ||
422 | #else /* USER_ONLY */ | |
423 | ||
424 | void cpu_interrupt(CPUState *cpu, int mask); | |
425 | ||
426 | #endif /* USER_ONLY */ | |
427 | ||
c658b94f AF |
428 | #ifndef CONFIG_USER_ONLY |
429 | ||
430 | static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr, | |
431 | bool is_write, bool is_exec, | |
432 | int opaque, unsigned size) | |
433 | { | |
434 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
435 | ||
436 | if (cc->do_unassigned_access) { | |
437 | cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size); | |
438 | } | |
439 | } | |
440 | ||
441 | #endif | |
442 | ||
d8ed887b AF |
443 | /** |
444 | * cpu_reset_interrupt: | |
445 | * @cpu: The CPU to clear the interrupt on. | |
446 | * @mask: The interrupt mask to clear. | |
447 | * | |
448 | * Resets interrupts on the vCPU @cpu. | |
449 | */ | |
450 | void cpu_reset_interrupt(CPUState *cpu, int mask); | |
451 | ||
60a3e17a AF |
452 | /** |
453 | * cpu_exit: | |
454 | * @cpu: The CPU to exit. | |
455 | * | |
456 | * Requests the CPU @cpu to exit execution. | |
457 | */ | |
458 | void cpu_exit(CPUState *cpu); | |
459 | ||
2993683b IM |
460 | /** |
461 | * cpu_resume: | |
462 | * @cpu: The CPU to resume. | |
463 | * | |
464 | * Resumes CPU, i.e. puts CPU into runnable state. | |
465 | */ | |
466 | void cpu_resume(CPUState *cpu); | |
dd83b06a | 467 | |
c643bed9 AF |
468 | /** |
469 | * qemu_init_vcpu: | |
470 | * @cpu: The vCPU to initialize. | |
471 | * | |
472 | * Initializes a vCPU. | |
473 | */ | |
474 | void qemu_init_vcpu(CPUState *cpu); | |
475 | ||
1a1562f5 AF |
476 | #ifdef CONFIG_SOFTMMU |
477 | extern const struct VMStateDescription vmstate_cpu_common; | |
478 | #else | |
479 | #define vmstate_cpu_common vmstate_dummy | |
480 | #endif | |
481 | ||
482 | #define VMSTATE_CPU() { \ | |
483 | .name = "parent_obj", \ | |
484 | .size = sizeof(CPUState), \ | |
485 | .vmsd = &vmstate_cpu_common, \ | |
486 | .flags = VMS_STRUCT, \ | |
487 | .offset = 0, \ | |
488 | } | |
489 | ||
dd83b06a | 490 | #endif |