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swiotlb: add arch hook to force mapping
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CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4 23#include <linux/spinlock.h>
8c5df16b 24#include <linux/swiotlb.h>
1da177e4 25#include <linux/string.h>
0016fdee 26#include <linux/swiotlb.h>
1da177e4
LT
27#include <linux/types.h>
28#include <linux/ctype.h>
29
30#include <asm/io.h>
1da177e4 31#include <asm/dma.h>
17e5ad6c 32#include <asm/scatterlist.h>
1da177e4
LT
33
34#include <linux/init.h>
35#include <linux/bootmem.h>
a8522509 36#include <linux/iommu-helper.h>
1da177e4
LT
37
38#define OFFSET(val,align) ((unsigned long) \
39 ( (val) & ( (align) - 1)))
40
f9527f12 41#define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
93fbff63 42#define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
1da177e4 43
0b9afede
AW
44#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
45
46/*
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 */
51#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
52
de69e0f0
JL
53/*
54 * Enumeration for sync targets
55 */
56enum dma_sync_target {
57 SYNC_FOR_CPU = 0,
58 SYNC_FOR_DEVICE = 1,
59};
60
1da177e4
LT
61int swiotlb_force;
62
63/*
64 * Used to do a quick range check in swiotlb_unmap_single and
65 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
66 * API.
67 */
68static char *io_tlb_start, *io_tlb_end;
69
70/*
71 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
72 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
73 */
74static unsigned long io_tlb_nslabs;
75
76/*
77 * When the IOMMU overflows we return a fallback buffer. This sets the size.
78 */
79static unsigned long io_tlb_overflow = 32*1024;
80
81void *io_tlb_overflow_buffer;
82
83/*
84 * This is a free list describing the number of free entries available from
85 * each index
86 */
87static unsigned int *io_tlb_list;
88static unsigned int io_tlb_index;
89
90/*
91 * We need to save away the original address corresponding to a mapped entry
92 * for the sync operations.
93 */
25667d67 94static unsigned char **io_tlb_orig_addr;
1da177e4
LT
95
96/*
97 * Protect the above data structures in the map and unmap calls
98 */
99static DEFINE_SPINLOCK(io_tlb_lock);
100
101static int __init
102setup_io_tlb_npages(char *str)
103{
104 if (isdigit(*str)) {
e8579e72 105 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
108 }
109 if (*str == ',')
110 ++str;
111 if (!strcmp(str, "force"))
112 swiotlb_force = 1;
113 return 1;
114}
115__setup("swiotlb=", setup_io_tlb_npages);
116/* make io_tlb_overflow tunable too? */
117
8c5df16b
JF
118void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs)
119{
120 return alloc_bootmem_low_pages(size);
121}
122
123void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
124{
125 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
126}
127
e08e1f7a
IC
128dma_addr_t __weak swiotlb_phys_to_bus(phys_addr_t paddr)
129{
130 return paddr;
131}
132
133phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
134{
135 return baddr;
136}
137
138static dma_addr_t swiotlb_virt_to_bus(volatile void *address)
139{
140 return swiotlb_phys_to_bus(virt_to_phys(address));
141}
142
143static void *swiotlb_bus_to_virt(dma_addr_t address)
144{
145 return phys_to_virt(swiotlb_bus_to_phys(address));
146}
147
b81ea27b
IC
148int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
149{
150 return 0;
151}
152
1da177e4
LT
153/*
154 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 155 * structures for the software IO TLB used to implement the DMA API.
1da177e4 156 */
563aaf06
JB
157void __init
158swiotlb_init_with_default_size(size_t default_size)
1da177e4 159{
563aaf06 160 unsigned long i, bytes;
1da177e4
LT
161
162 if (!io_tlb_nslabs) {
e8579e72 163 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
164 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
165 }
166
563aaf06
JB
167 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
168
1da177e4
LT
169 /*
170 * Get IO TLB memory from the low pages
171 */
8c5df16b 172 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
1da177e4
LT
173 if (!io_tlb_start)
174 panic("Cannot allocate SWIOTLB buffer");
563aaf06 175 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
176
177 /*
178 * Allocate and initialize the free list array. This array is used
179 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
180 * between io_tlb_start and io_tlb_end.
181 */
182 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 183 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
184 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
185 io_tlb_index = 0;
25667d67 186 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
1da177e4
LT
187
188 /*
189 * Get the overflow emergency buffer
190 */
191 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
192 if (!io_tlb_overflow_buffer)
193 panic("Cannot allocate SWIOTLB overflow buffer!\n");
194
25667d67 195 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
e08e1f7a 196 swiotlb_virt_to_bus(io_tlb_start), swiotlb_virt_to_bus(io_tlb_end));
1da177e4
LT
197}
198
563aaf06
JB
199void __init
200swiotlb_init(void)
1da177e4 201{
25667d67 202 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
203}
204
0b9afede
AW
205/*
206 * Systems with larger DMA zones (those that don't support ISA) can
207 * initialize the swiotlb later using the slab allocator if needed.
208 * This should be just like above, but with some error catching.
209 */
210int
563aaf06 211swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 212{
563aaf06 213 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
214 unsigned int order;
215
216 if (!io_tlb_nslabs) {
217 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
218 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
219 }
220
221 /*
222 * Get IO TLB memory from the low pages
223 */
563aaf06 224 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 225 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 226 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
227
228 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
8c5df16b 229 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
0b9afede
AW
230 if (io_tlb_start)
231 break;
232 order--;
233 }
234
235 if (!io_tlb_start)
236 goto cleanup1;
237
563aaf06 238 if (order != get_order(bytes)) {
0b9afede
AW
239 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
240 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
241 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 242 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 243 }
563aaf06
JB
244 io_tlb_end = io_tlb_start + bytes;
245 memset(io_tlb_start, 0, bytes);
0b9afede
AW
246
247 /*
248 * Allocate and initialize the free list array. This array is used
249 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
250 * between io_tlb_start and io_tlb_end.
251 */
252 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
253 get_order(io_tlb_nslabs * sizeof(int)));
254 if (!io_tlb_list)
255 goto cleanup2;
256
257 for (i = 0; i < io_tlb_nslabs; i++)
258 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
259 io_tlb_index = 0;
260
25667d67
TL
261 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
262 get_order(io_tlb_nslabs * sizeof(char *)));
0b9afede
AW
263 if (!io_tlb_orig_addr)
264 goto cleanup3;
265
25667d67 266 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
0b9afede
AW
267
268 /*
269 * Get the overflow emergency buffer
270 */
271 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
272 get_order(io_tlb_overflow));
273 if (!io_tlb_overflow_buffer)
274 goto cleanup4;
275
25667d67
TL
276 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
277 "0x%lx\n", bytes >> 20,
e08e1f7a 278 swiotlb_virt_to_bus(io_tlb_start), swiotlb_virt_to_bus(io_tlb_end));
0b9afede
AW
279
280 return 0;
281
282cleanup4:
25667d67
TL
283 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
284 sizeof(char *)));
0b9afede
AW
285 io_tlb_orig_addr = NULL;
286cleanup3:
25667d67
TL
287 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
288 sizeof(int)));
0b9afede 289 io_tlb_list = NULL;
0b9afede 290cleanup2:
563aaf06 291 io_tlb_end = NULL;
0b9afede
AW
292 free_pages((unsigned long)io_tlb_start, order);
293 io_tlb_start = NULL;
294cleanup1:
295 io_tlb_nslabs = req_nslabs;
296 return -ENOMEM;
297}
298
be6b0267 299static int
2797982e 300address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
1da177e4 301{
07a2c01a 302 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
1da177e4
LT
303}
304
b81ea27b
IC
305static inline int range_needs_mapping(void *ptr, size_t size)
306{
307 return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
308}
309
640aebfe
FT
310static int is_swiotlb_buffer(char *addr)
311{
312 return addr >= io_tlb_start && addr < io_tlb_end;
313}
314
1da177e4
LT
315/*
316 * Allocates bounce buffer and returns its kernel virtual address.
317 */
318static void *
25667d67 319map_single(struct device *hwdev, char *buffer, size_t size, int dir)
1da177e4
LT
320{
321 unsigned long flags;
322 char *dma_addr;
323 unsigned int nslots, stride, index, wrap;
324 int i;
681cc5cd
FT
325 unsigned long start_dma_addr;
326 unsigned long mask;
327 unsigned long offset_slots;
328 unsigned long max_slots;
329
330 mask = dma_get_seg_boundary(hwdev);
e08e1f7a 331 start_dma_addr = swiotlb_virt_to_bus(io_tlb_start) & mask;
681cc5cd
FT
332
333 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
a5ddde4a
IC
334
335 /*
336 * Carefully handle integer overflow which can occur when mask == ~0UL.
337 */
b15a3891
JB
338 max_slots = mask + 1
339 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
340 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
341
342 /*
343 * For mappings greater than a page, we limit the stride (and
344 * hence alignment) to a page size.
345 */
346 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
347 if (size > PAGE_SIZE)
348 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
349 else
350 stride = 1;
351
34814545 352 BUG_ON(!nslots);
1da177e4
LT
353
354 /*
355 * Find suitable number of IO TLB entries size that will fit this
356 * request and allocate a buffer from that IO TLB pool.
357 */
358 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
359 index = ALIGN(io_tlb_index, stride);
360 if (index >= io_tlb_nslabs)
361 index = 0;
362 wrap = index;
363
364 do {
a8522509
FT
365 while (iommu_is_span_boundary(index, nslots, offset_slots,
366 max_slots)) {
b15a3891
JB
367 index += stride;
368 if (index >= io_tlb_nslabs)
369 index = 0;
a7133a15
AM
370 if (index == wrap)
371 goto not_found;
372 }
373
374 /*
375 * If we find a slot that indicates we have 'nslots' number of
376 * contiguous buffers, we allocate the buffers from that slot
377 * and mark the entries as '0' indicating unavailable.
378 */
379 if (io_tlb_list[index] >= nslots) {
380 int count = 0;
381
382 for (i = index; i < (int) (index + nslots); i++)
383 io_tlb_list[i] = 0;
384 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
385 io_tlb_list[i] = ++count;
386 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 387
a7133a15
AM
388 /*
389 * Update the indices to avoid searching in the next
390 * round.
391 */
392 io_tlb_index = ((index + nslots) < io_tlb_nslabs
393 ? (index + nslots) : 0);
394
395 goto found;
396 }
397 index += stride;
398 if (index >= io_tlb_nslabs)
399 index = 0;
400 } while (index != wrap);
401
402not_found:
403 spin_unlock_irqrestore(&io_tlb_lock, flags);
404 return NULL;
405found:
1da177e4
LT
406 spin_unlock_irqrestore(&io_tlb_lock, flags);
407
408 /*
409 * Save away the mapping from the original address to the DMA address.
410 * This is needed when we sync the memory. Then we sync the buffer if
411 * needed.
412 */
df336d1c
KF
413 for (i = 0; i < nslots; i++)
414 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
1da177e4 415 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
25667d67 416 memcpy(dma_addr, buffer, size);
1da177e4
LT
417
418 return dma_addr;
419}
420
421/*
422 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
423 */
424static void
425unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
426{
427 unsigned long flags;
428 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
429 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 430 char *buffer = io_tlb_orig_addr[index];
1da177e4
LT
431
432 /*
433 * First, sync the memory before unmapping the entry
434 */
25667d67 435 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
1da177e4
LT
436 /*
437 * bounce... copy the data back into the original buffer * and
438 * delete the bounce buffer.
439 */
25667d67 440 memcpy(buffer, dma_addr, size);
1da177e4
LT
441
442 /*
443 * Return the buffer to the free list by setting the corresponding
444 * entries to indicate the number of contigous entries available.
445 * While returning the entries to the free list, we merge the entries
446 * with slots below and above the pool being returned.
447 */
448 spin_lock_irqsave(&io_tlb_lock, flags);
449 {
450 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
451 io_tlb_list[index + nslots] : 0);
452 /*
453 * Step 1: return the slots to the free list, merging the
454 * slots with superceeding slots
455 */
456 for (i = index + nslots - 1; i >= index; i--)
457 io_tlb_list[i] = ++count;
458 /*
459 * Step 2: merge the returned slots with the preceding slots,
460 * if available (non zero)
461 */
462 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
463 io_tlb_list[i] = ++count;
464 }
465 spin_unlock_irqrestore(&io_tlb_lock, flags);
466}
467
468static void
de69e0f0
JL
469sync_single(struct device *hwdev, char *dma_addr, size_t size,
470 int dir, int target)
1da177e4
LT
471{
472 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 473 char *buffer = io_tlb_orig_addr[index];
1da177e4 474
df336d1c
KF
475 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
476
de69e0f0
JL
477 switch (target) {
478 case SYNC_FOR_CPU:
479 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 480 memcpy(buffer, dma_addr, size);
34814545
ES
481 else
482 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
483 break;
484 case SYNC_FOR_DEVICE:
485 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 486 memcpy(dma_addr, buffer, size);
34814545
ES
487 else
488 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
489 break;
490 default:
1da177e4 491 BUG();
de69e0f0 492 }
1da177e4
LT
493}
494
495void *
496swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 497 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 498{
563aaf06 499 dma_addr_t dev_addr;
1da177e4
LT
500 void *ret;
501 int order = get_order(size);
1e74f300
FT
502 u64 dma_mask = DMA_32BIT_MASK;
503
504 if (hwdev && hwdev->coherent_dma_mask)
505 dma_mask = hwdev->coherent_dma_mask;
1da177e4 506
25667d67 507 ret = (void *)__get_free_pages(flags, order);
e08e1f7a 508 if (ret && !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(ret), size)) {
1da177e4
LT
509 /*
510 * The allocated memory isn't reachable by the device.
511 * Fall back on swiotlb_map_single().
512 */
513 free_pages((unsigned long) ret, order);
514 ret = NULL;
515 }
516 if (!ret) {
517 /*
518 * We are either out of memory or the device can't DMA
519 * to GFP_DMA memory; fall back on
520 * swiotlb_map_single(), which will grab memory from
521 * the lowest available address range.
522 */
9dfda12b
FT
523 ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE);
524 if (!ret)
1da177e4 525 return NULL;
1da177e4
LT
526 }
527
528 memset(ret, 0, size);
e08e1f7a 529 dev_addr = swiotlb_virt_to_bus(ret);
1da177e4
LT
530
531 /* Confirm address can be DMA'd by device */
1e74f300 532 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
563aaf06 533 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
1e74f300 534 (unsigned long long)dma_mask,
563aaf06 535 (unsigned long long)dev_addr);
a2b89b59
FT
536
537 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
538 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
539 return NULL;
1da177e4
LT
540 }
541 *dma_handle = dev_addr;
542 return ret;
543}
544
545void
546swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
547 dma_addr_t dma_handle)
548{
aa24886e 549 WARN_ON(irqs_disabled());
640aebfe 550 if (!is_swiotlb_buffer(vaddr))
1da177e4
LT
551 free_pages((unsigned long) vaddr, get_order(size));
552 else
553 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
21f6c4de 554 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4
LT
555}
556
557static void
558swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
559{
560 /*
561 * Ran out of IOMMU space for this operation. This is very bad.
562 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 563 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
564 * When the mapping is small enough return a static buffer to limit
565 * the damage, or panic when the transfer is too big.
566 */
563aaf06 567 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
568 "device %s\n", size, dev ? dev->bus_id : "?");
569
570 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
571 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
572 panic("DMA: Memory would be corrupted\n");
573 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
574 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
575 }
576}
577
578/*
579 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 580 * physical address to use is returned.
1da177e4
LT
581 *
582 * Once the device is given the dma address, the device owns this memory until
583 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
584 */
585dma_addr_t
309df0c5
AK
586swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
587 int dir, struct dma_attrs *attrs)
1da177e4 588{
e08e1f7a 589 dma_addr_t dev_addr = swiotlb_virt_to_bus(ptr);
1da177e4
LT
590 void *map;
591
34814545 592 BUG_ON(dir == DMA_NONE);
1da177e4
LT
593 /*
594 * If the pointer passed in happens to be in the device's DMA window,
595 * we can safely return the device addr and not worry about bounce
596 * buffering it.
597 */
b81ea27b
IC
598 if (!address_needs_mapping(hwdev, dev_addr, size) &&
599 !range_needs_mapping(ptr, size))
1da177e4
LT
600 return dev_addr;
601
602 /*
603 * Oh well, have to allocate and map a bounce buffer.
604 */
25667d67 605 map = map_single(hwdev, ptr, size, dir);
1da177e4
LT
606 if (!map) {
607 swiotlb_full(hwdev, size, dir, 1);
608 map = io_tlb_overflow_buffer;
609 }
610
e08e1f7a 611 dev_addr = swiotlb_virt_to_bus(map);
1da177e4
LT
612
613 /*
614 * Ensure that the address returned is DMA'ble
615 */
2797982e 616 if (address_needs_mapping(hwdev, dev_addr, size))
1da177e4
LT
617 panic("map_single: bounce buffer is not DMA'ble");
618
619 return dev_addr;
620}
309df0c5
AK
621EXPORT_SYMBOL(swiotlb_map_single_attrs);
622
623dma_addr_t
624swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
625{
626 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
627}
1da177e4 628
1da177e4
LT
629/*
630 * Unmap a single streaming mode DMA translation. The dma_addr and size must
631 * match what was provided for in a previous swiotlb_map_single call. All
632 * other usages are undefined.
633 *
634 * After this call, reads by the cpu to the buffer are guaranteed to see
635 * whatever the device wrote there.
636 */
637void
309df0c5
AK
638swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
639 size_t size, int dir, struct dma_attrs *attrs)
1da177e4 640{
e08e1f7a 641 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 642
34814545 643 BUG_ON(dir == DMA_NONE);
640aebfe 644 if (is_swiotlb_buffer(dma_addr))
1da177e4
LT
645 unmap_single(hwdev, dma_addr, size, dir);
646 else if (dir == DMA_FROM_DEVICE)
cde14bbf 647 dma_mark_clean(dma_addr, size);
1da177e4 648}
309df0c5 649EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
1da177e4 650
309df0c5
AK
651void
652swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
653 int dir)
654{
655 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
656}
1da177e4
LT
657/*
658 * Make physical memory consistent for a single streaming mode DMA translation
659 * after a transfer.
660 *
661 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
662 * using the cpu, yet do not wish to teardown the dma mapping, you must
663 * call this function before doing so. At the next point you give the dma
1da177e4
LT
664 * address back to the card, you must first perform a
665 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
666 */
be6b0267 667static void
8270f3f1 668swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 669 size_t size, int dir, int target)
1da177e4 670{
e08e1f7a 671 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 672
34814545 673 BUG_ON(dir == DMA_NONE);
640aebfe 674 if (is_swiotlb_buffer(dma_addr))
de69e0f0 675 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 676 else if (dir == DMA_FROM_DEVICE)
cde14bbf 677 dma_mark_clean(dma_addr, size);
1da177e4
LT
678}
679
8270f3f1
JL
680void
681swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
682 size_t size, int dir)
683{
de69e0f0 684 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
685}
686
1da177e4
LT
687void
688swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
689 size_t size, int dir)
690{
de69e0f0 691 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
692}
693
878a97cf
JL
694/*
695 * Same as above, but for a sub-range of the mapping.
696 */
be6b0267 697static void
878a97cf 698swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
699 unsigned long offset, size_t size,
700 int dir, int target)
878a97cf 701{
e08e1f7a 702 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
878a97cf 703
34814545 704 BUG_ON(dir == DMA_NONE);
640aebfe 705 if (is_swiotlb_buffer(dma_addr))
de69e0f0 706 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 707 else if (dir == DMA_FROM_DEVICE)
cde14bbf 708 dma_mark_clean(dma_addr, size);
878a97cf
JL
709}
710
711void
712swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
713 unsigned long offset, size_t size, int dir)
714{
de69e0f0
JL
715 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
716 SYNC_FOR_CPU);
878a97cf
JL
717}
718
719void
720swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
721 unsigned long offset, size_t size, int dir)
722{
de69e0f0
JL
723 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
724 SYNC_FOR_DEVICE);
878a97cf
JL
725}
726
309df0c5
AK
727void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
728 struct dma_attrs *);
1da177e4
LT
729/*
730 * Map a set of buffers described by scatterlist in streaming mode for DMA.
731 * This is the scatter-gather version of the above swiotlb_map_single
732 * interface. Here the scatter gather list elements are each tagged with the
733 * appropriate dma address and length. They are obtained via
734 * sg_dma_{address,length}(SG).
735 *
736 * NOTE: An implementation may be able to use a smaller number of
737 * DMA address/length pairs than there are SG table elements.
738 * (for example via virtual mapping capabilities)
739 * The routine returns the number of addr/length pairs actually
740 * used, at most nents.
741 *
742 * Device ownership issues as mentioned above for swiotlb_map_single are the
743 * same here.
744 */
745int
309df0c5
AK
746swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
747 int dir, struct dma_attrs *attrs)
1da177e4 748{
dbfd49fe 749 struct scatterlist *sg;
25667d67 750 void *addr;
563aaf06 751 dma_addr_t dev_addr;
1da177e4
LT
752 int i;
753
34814545 754 BUG_ON(dir == DMA_NONE);
1da177e4 755
dbfd49fe 756 for_each_sg(sgl, sg, nelems, i) {
25667d67 757 addr = SG_ENT_VIRT_ADDRESS(sg);
e08e1f7a 758 dev_addr = swiotlb_virt_to_bus(addr);
b81ea27b 759 if (range_needs_mapping(sg_virt(sg), sg->length) ||
2797982e 760 address_needs_mapping(hwdev, dev_addr, sg->length)) {
25667d67 761 void *map = map_single(hwdev, addr, sg->length, dir);
7e870233 762 if (!map) {
1da177e4
LT
763 /* Don't panic here, we expect map_sg users
764 to do proper error handling. */
765 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
766 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
767 attrs);
dbfd49fe 768 sgl[0].dma_length = 0;
1da177e4
LT
769 return 0;
770 }
e08e1f7a 771 sg->dma_address = swiotlb_virt_to_bus(map);
1da177e4
LT
772 } else
773 sg->dma_address = dev_addr;
774 sg->dma_length = sg->length;
775 }
776 return nelems;
777}
309df0c5
AK
778EXPORT_SYMBOL(swiotlb_map_sg_attrs);
779
780int
781swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
782 int dir)
783{
784 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
785}
1da177e4
LT
786
787/*
788 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
789 * concerning calls here are the same as for swiotlb_unmap_single() above.
790 */
791void
309df0c5
AK
792swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
793 int nelems, int dir, struct dma_attrs *attrs)
1da177e4 794{
dbfd49fe 795 struct scatterlist *sg;
1da177e4
LT
796 int i;
797
34814545 798 BUG_ON(dir == DMA_NONE);
1da177e4 799
dbfd49fe 800 for_each_sg(sgl, sg, nelems, i) {
1da177e4 801 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
e08e1f7a 802 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
93fbff63 803 sg->dma_length, dir);
1da177e4 804 else if (dir == DMA_FROM_DEVICE)
cde14bbf 805 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 806 }
1da177e4 807}
309df0c5
AK
808EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
809
810void
811swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
812 int dir)
813{
814 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
815}
1da177e4
LT
816
817/*
818 * Make physical memory consistent for a set of streaming mode DMA translations
819 * after a transfer.
820 *
821 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
822 * and usage.
823 */
be6b0267 824static void
dbfd49fe 825swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 826 int nelems, int dir, int target)
1da177e4 827{
dbfd49fe 828 struct scatterlist *sg;
1da177e4
LT
829 int i;
830
34814545 831 BUG_ON(dir == DMA_NONE);
1da177e4 832
dbfd49fe 833 for_each_sg(sgl, sg, nelems, i) {
1da177e4 834 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
e08e1f7a 835 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
de69e0f0 836 sg->dma_length, dir, target);
cde14bbf
JB
837 else if (dir == DMA_FROM_DEVICE)
838 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 839 }
1da177e4
LT
840}
841
8270f3f1
JL
842void
843swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
844 int nelems, int dir)
845{
de69e0f0 846 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1
JL
847}
848
1da177e4
LT
849void
850swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
851 int nelems, int dir)
852{
de69e0f0 853 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
854}
855
856int
8d8bb39b 857swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 858{
e08e1f7a 859 return (dma_addr == swiotlb_virt_to_bus(io_tlb_overflow_buffer));
1da177e4
LT
860}
861
862/*
17e5ad6c 863 * Return whether the given device DMA address mask can be supported
1da177e4 864 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 865 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
866 * this function.
867 */
868int
563aaf06 869swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 870{
e08e1f7a 871 return swiotlb_virt_to_bus(io_tlb_end - 1) <= mask;
1da177e4
LT
872}
873
1da177e4
LT
874EXPORT_SYMBOL(swiotlb_map_single);
875EXPORT_SYMBOL(swiotlb_unmap_single);
876EXPORT_SYMBOL(swiotlb_map_sg);
877EXPORT_SYMBOL(swiotlb_unmap_sg);
878EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
879EXPORT_SYMBOL(swiotlb_sync_single_for_device);
878a97cf
JL
880EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
881EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
LT
882EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
883EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
884EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
885EXPORT_SYMBOL(swiotlb_alloc_coherent);
886EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 887EXPORT_SYMBOL(swiotlb_dma_supported);