]> git.proxmox.com Git - qemu.git/blame - linux-user/arm/nwfpe/fpa11.c
Fix most warnings that would be caused by gcc flag -Wundef
[qemu.git] / linux-user / arm / nwfpe / fpa11.c
CommitLineData
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1/*
2 NetWinder Floating Point Emulator
3 (c) Rebel.COM, 1998,1999
4
5 Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#include "fpa11.h"
23
24#include "fpopcode.h"
25
26//#include "fpmodule.h"
27//#include "fpmodule.inl"
28
29//#include <asm/system.h>
30
31#include <stdio.h>
32
33/* forward declarations */
34unsigned int EmulateCPDO(const unsigned int);
35unsigned int EmulateCPDT(const unsigned int);
36unsigned int EmulateCPRT(const unsigned int);
37
38FPA11* qemufpa=0;
19b045de 39CPUARMState* user_registers;
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40
41/* Reset the FPA11 chip. Called to initialize and reset the emulator. */
42void resetFPA11(void)
43{
44 int i;
45 FPA11 *fpa11 = GET_FPA11();
3b46e624 46
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47 /* initialize the register type array */
48 for (i=0;i<=7;i++)
49 {
50 fpa11->fType[i] = typeNone;
51 }
3b46e624 52
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53 /* FPSR: set system id to FP_EMULATOR, set AC, clear all other bits */
54 fpa11->fpsr = FP_EMULATOR | BIT_AC;
3b46e624 55
00406dff 56 /* FPCR: set SB, AB and DA bits, clear all others */
eb38c52c 57#ifdef MAINTAIN_FPCR
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58 fpa11->fpcr = MASK_RESET;
59#endif
60}
61
62void SetRoundingMode(const unsigned int opcode)
63{
20495218 64 int rounding_mode;
00406dff 65 FPA11 *fpa11 = GET_FPA11();
20495218 66
eb38c52c 67#ifdef MAINTAIN_FPCR
00406dff 68 fpa11->fpcr &= ~MASK_ROUNDING_MODE;
3b46e624 69#endif
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70 switch (opcode & MASK_ROUNDING_MODE)
71 {
72 default:
73 case ROUND_TO_NEAREST:
20495218 74 rounding_mode = float_round_nearest_even;
eb38c52c 75#ifdef MAINTAIN_FPCR
00406dff 76 fpa11->fpcr |= ROUND_TO_NEAREST;
3b46e624 77#endif
00406dff 78 break;
3b46e624 79
00406dff 80 case ROUND_TO_PLUS_INFINITY:
20495218 81 rounding_mode = float_round_up;
eb38c52c 82#ifdef MAINTAIN_FPCR
00406dff 83 fpa11->fpcr |= ROUND_TO_PLUS_INFINITY;
3b46e624 84#endif
00406dff 85 break;
3b46e624 86
00406dff 87 case ROUND_TO_MINUS_INFINITY:
20495218 88 rounding_mode = float_round_down;
eb38c52c 89#ifdef MAINTAIN_FPCR
00406dff 90 fpa11->fpcr |= ROUND_TO_MINUS_INFINITY;
3b46e624 91#endif
00406dff 92 break;
3b46e624 93
00406dff 94 case ROUND_TO_ZERO:
20495218 95 rounding_mode = float_round_to_zero;
eb38c52c 96#ifdef MAINTAIN_FPCR
00406dff 97 fpa11->fpcr |= ROUND_TO_ZERO;
3b46e624 98#endif
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99 break;
100 }
20495218 101 set_float_rounding_mode(rounding_mode, &fpa11->fp_status);
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102}
103
104void SetRoundingPrecision(const unsigned int opcode)
105{
20495218 106 int rounding_precision;
00406dff 107 FPA11 *fpa11 = GET_FPA11();
eb38c52c 108#ifdef MAINTAIN_FPCR
00406dff 109 fpa11->fpcr &= ~MASK_ROUNDING_PRECISION;
3b46e624 110#endif
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111 switch (opcode & MASK_ROUNDING_PRECISION)
112 {
113 case ROUND_SINGLE:
20495218 114 rounding_precision = 32;
eb38c52c 115#ifdef MAINTAIN_FPCR
00406dff 116 fpa11->fpcr |= ROUND_SINGLE;
3b46e624 117#endif
00406dff 118 break;
3b46e624 119
00406dff 120 case ROUND_DOUBLE:
20495218 121 rounding_precision = 64;
eb38c52c 122#ifdef MAINTAIN_FPCR
00406dff 123 fpa11->fpcr |= ROUND_DOUBLE;
3b46e624 124#endif
00406dff 125 break;
3b46e624 126
00406dff 127 case ROUND_EXTENDED:
20495218 128 rounding_precision = 80;
eb38c52c 129#ifdef MAINTAIN_FPCR
00406dff 130 fpa11->fpcr |= ROUND_EXTENDED;
3b46e624 131#endif
00406dff 132 break;
3b46e624 133
20495218 134 default: rounding_precision = 80;
00406dff 135 }
20495218 136 set_floatx80_rounding_precision(rounding_precision, &fpa11->fp_status);
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137}
138
139/* Emulate the instruction in the opcode. */
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140/* ??? This is not thread safe. */
141unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
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142{
143 unsigned int nRc = 0;
144// unsigned long flags;
5fafdf24 145 FPA11 *fpa11;
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146// save_flags(flags); sti();
147
148 qemufpa=qfpa;
149 user_registers=qregs;
3b46e624 150
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151#if 0
152 fprintf(stderr,"emulating FP insn 0x%08x, PC=0x%08x\n",
153 opcode, qregs[REG_PC]);
154#endif
155 fpa11 = GET_FPA11();
156
157 if (fpa11->initflag == 0) /* good place for __builtin_expect */
158 {
159 resetFPA11();
160 SetRoundingMode(ROUND_TO_NEAREST);
161 SetRoundingPrecision(ROUND_EXTENDED);
162 fpa11->initflag = 1;
163 }
164
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165 set_float_exception_flags(0, &fpa11->fp_status);
166
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167 if (TEST_OPCODE(opcode,MASK_CPRT))
168 {
169 //fprintf(stderr,"emulating CPRT\n");
170 /* Emulate conversion opcodes. */
171 /* Emulate register transfer opcodes. */
172 /* Emulate comparison opcodes. */
173 nRc = EmulateCPRT(opcode);
174 }
175 else if (TEST_OPCODE(opcode,MASK_CPDO))
176 {
177 //fprintf(stderr,"emulating CPDO\n");
178 /* Emulate monadic arithmetic opcodes. */
179 /* Emulate dyadic arithmetic opcodes. */
180 nRc = EmulateCPDO(opcode);
181 }
182 else if (TEST_OPCODE(opcode,MASK_CPDT))
183 {
184 //fprintf(stderr,"emulating CPDT\n");
185 /* Emulate load/store opcodes. */
186 /* Emulate load/store multiple opcodes. */
187 nRc = EmulateCPDT(opcode);
188 }
189 else
190 {
191 /* Invalid instruction detected. Return FALSE. */
192 nRc = 0;
193 }
194
195// restore_flags(flags);
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196 if(nRc == 1 && get_float_exception_flags(&fpa11->fp_status))
197 {
198 //printf("fef 0x%x\n",float_exception_flags);
199 nRc=-get_float_exception_flags(&fpa11->fp_status);
200 }
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201
202 //printf("returning %d\n",nRc);
203 return(nRc);
204}
205
206#if 0
207unsigned int EmulateAll1(unsigned int opcode)
208{
209 switch ((opcode >> 24) & 0xf)
210 {
211 case 0xc:
212 case 0xd:
213 if ((opcode >> 20) & 0x1)
214 {
215 switch ((opcode >> 8) & 0xf)
216 {
217 case 0x1: return PerformLDF(opcode); break;
218 case 0x2: return PerformLFM(opcode); break;
219 default: return 0;
220 }
221 }
222 else
223 {
224 switch ((opcode >> 8) & 0xf)
225 {
226 case 0x1: return PerformSTF(opcode); break;
227 case 0x2: return PerformSFM(opcode); break;
228 default: return 0;
229 }
230 }
231 break;
3b46e624 232
5fafdf24 233 case 0xe:
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234 if (opcode & 0x10)
235 return EmulateCPDO(opcode);
236 else
237 return EmulateCPRT(opcode);
238 break;
3b46e624 239
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240 default: return 0;
241 }
242}
243#endif
244