]> git.proxmox.com Git - qemu.git/blame - linux-user/main.c
projects / qemu.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
linux-user: Implement new ARM 64 bit cmpxchg kernel helper
[qemu.git] / linux-user / main.c
CommitLineData
31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a
FB		 18 */
19#include <stdlib.h>
20#include <stdio.h>
21#include <stdarg.h>
04369ff2 22#include <string.h>
31e31b8a 23#include <errno.h>
0ecfa993 24#include <unistd.h>
e441570f 25#include <sys/mman.h>
edf8e2af 26#include <sys/syscall.h>
703e0e89 27#include <sys/resource.h>
31e31b8a 28
3ef693a0 29#include "qemu.h"
ca10f867 30#include "qemu-common.h"
902b3d5c 31#include "cache-utils.h"
2b41f10e 32#include "cpu.h"
9002ec79 33#include "tcg.h"
29e922b6 34#include "qemu-timer.h"
04a6dfeb
AJ		 35#include "envlist.h"
36
3ef693a0 37#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 38
d088d664
AJ		 39char *exec_path;
40
1b530a6d 41int singlestep;
379f6698 42unsigned long mmap_min_addr;
14f24e14 43#if defined(CONFIG_USE_GUEST_BASE)
379f6698
PB		 44unsigned long guest_base;
45int have_guest_base;
68a1c816 46unsigned long reserved_va;
379f6698 47#endif
1b530a6d 48
7ee2822c 49static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
c5937220 50const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 51
9de5e440
FB		 52/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
53 we allocate a bigger stack. Need a better solution, for example
54 by remapping the process stack directly at the right place */
703e0e89 55unsigned long guest_stack_size = 8 * 1024 * 1024UL;
31e31b8a
FB		 56
57void gemu_log(const char *fmt, ...)
58{
59 va_list ap;
60
61 va_start(ap, fmt);
62 vfprintf(stderr, fmt, ap);
63 va_end(ap);
64}
65
8fcd3692 66#if defined(TARGET_I386)
a541f297 67int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 68{
69 return -1;
70}
8fcd3692 71#endif
92ccca6a 72
28ab0e2e
FB		 73/* timers for rdtsc */
74
1dce7c3c 75#if 0
28ab0e2e
FB		 76
77static uint64_t emu_time;
78
79int64_t cpu_get_real_ticks(void)
80{
81 return emu_time++;
82}
83
84#endif
85
2f7bb878 86#if defined(CONFIG_USE_NPTL)
d5975363
PB		 87/***********************************************************/
88/* Helper routines for implementing atomic operations. */
89
90/* To implement exclusive operations we force all cpus to syncronise.
91 We don't require a full sync, only that no cpus are executing guest code.
92 The alternative is to map target atomic ops onto host equivalents,
93 which requires quite a lot of per host/target work. */
c2764719 94static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 95static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
96static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
97static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
98static int pending_cpus;
99
100/* Make sure everything is in a consistent state for calling fork(). */
101void fork_start(void)
102{
d5975363
PB		 103 pthread_mutex_lock(&tb_lock);
104 pthread_mutex_lock(&exclusive_lock);
d032d1b4 105 mmap_fork_start();
d5975363
PB		 106}
107
108void fork_end(int child)
109{
d032d1b4 110 mmap_fork_end(child);
d5975363
PB		 111 if (child) {
112 /* Child processes created by fork() only have a single thread.
113 Discard information about the parent threads. */
114 first_cpu = thread_env;
115 thread_env->next_cpu = NULL;
116 pending_cpus = 0;
117 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 118 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 119 pthread_cond_init(&exclusive_cond, NULL);
120 pthread_cond_init(&exclusive_resume, NULL);
121 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 122 gdbserver_fork(thread_env);
d5975363
PB		 123 } else {
124 pthread_mutex_unlock(&exclusive_lock);
125 pthread_mutex_unlock(&tb_lock);
126 }
d5975363
PB		 127}
128
129/* Wait for pending exclusive operations to complete. The exclusive lock
130 must be held. */
131static inline void exclusive_idle(void)
132{
133 while (pending_cpus) {
134 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
135 }
136}
137
138/* Start an exclusive operation.
139 Must only be called from outside cpu_arm_exec. */
140static inline void start_exclusive(void)
141{
142 CPUState *other;
143 pthread_mutex_lock(&exclusive_lock);
144 exclusive_idle();
145
146 pending_cpus = 1;
147 /* Make all other cpus stop executing. */
148 for (other = first_cpu; other; other = other->next_cpu) {
149 if (other->running) {
150 pending_cpus++;
3098dba0 151 cpu_exit(other);
d5975363
PB		 152 }
153 }
154 if (pending_cpus > 1) {
155 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
156 }
157}
158
159/* Finish an exclusive operation. */
160static inline void end_exclusive(void)
161{
162 pending_cpus = 0;
163 pthread_cond_broadcast(&exclusive_resume);
164 pthread_mutex_unlock(&exclusive_lock);
165}
166
167/* Wait for exclusive ops to finish, and begin cpu execution. */
168static inline void cpu_exec_start(CPUState *env)
169{
170 pthread_mutex_lock(&exclusive_lock);
171 exclusive_idle();
172 env->running = 1;
173 pthread_mutex_unlock(&exclusive_lock);
174}
175
176/* Mark cpu as not executing, and release pending exclusive ops. */
177static inline void cpu_exec_end(CPUState *env)
178{
179 pthread_mutex_lock(&exclusive_lock);
180 env->running = 0;
181 if (pending_cpus > 1) {
182 pending_cpus--;
183 if (pending_cpus == 1) {
184 pthread_cond_signal(&exclusive_cond);
185 }
186 }
187 exclusive_idle();
188 pthread_mutex_unlock(&exclusive_lock);
189}
c2764719
PB		 190
191void cpu_list_lock(void)
192{
193 pthread_mutex_lock(&cpu_list_mutex);
194}
195
196void cpu_list_unlock(void)
197{
198 pthread_mutex_unlock(&cpu_list_mutex);
199}
2f7bb878 200#else /* if !CONFIG_USE_NPTL */
d5975363
PB		 201/* These are no-ops because we are not threadsafe. */
202static inline void cpu_exec_start(CPUState *env)
203{
204}
205
206static inline void cpu_exec_end(CPUState *env)
207{
208}
209
210static inline void start_exclusive(void)
211{
212}
213
214static inline void end_exclusive(void)
215{
216}
217
218void fork_start(void)
219{
220}
221
222void fork_end(int child)
223{
2b1319c8
AJ		 224 if (child) {
225 gdbserver_fork(thread_env);
226 }
d5975363 227}
c2764719
PB		 228
229void cpu_list_lock(void)
230{
231}
232
233void cpu_list_unlock(void)
234{
235}
d5975363
PB		 236#endif
237
238
a541f297
FB		 239#ifdef TARGET_I386
240/***********************************************************/
241/* CPUX86 core interface */
242
02a1602e
FB		 243void cpu_smm_update(CPUState *env)
244{
245}
246
28ab0e2e
FB		 247uint64_t cpu_get_tsc(CPUX86State *env)
248{
249 return cpu_get_real_ticks();
250}
251
5fafdf24 252static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 253 int flags)
6dbad63e 254{
f4beb510 255 unsigned int e1, e2;
53a5960a 256 uint32_t *p;
6dbad63e
FB		 257 e1 = (addr << 16) | (limit & 0xffff);
258 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 259 e2 |= flags;
53a5960a 260 p = ptr;
d538e8f5 261 p[0] = tswap32(e1);
262 p[1] = tswap32(e2);
f4beb510
FB		 263}
264
e441570f 265static uint64_t *idt_table;
eb38c52c 266#ifdef TARGET_X86_64
d2fd1af7
FB		 267static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
268 uint64_t addr, unsigned int sel)
f4beb510 269{
4dbc422b 270 uint32_t *p, e1, e2;
f4beb510
FB		 271 e1 = (addr & 0xffff) | (sel << 16);
272 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 273 p = ptr;
4dbc422b
FB		 274 p[0] = tswap32(e1);
275 p[1] = tswap32(e2);
276 p[2] = tswap32(addr >> 32);
277 p[3] = 0;
6dbad63e 278}
d2fd1af7
FB		 279/* only dpl matters as we do only user space emulation */
280static void set_idt(int n, unsigned int dpl)
281{
282 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
283}
284#else
d2fd1af7
FB		 285static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
286 uint32_t addr, unsigned int sel)
287{
4dbc422b 288 uint32_t *p, e1, e2;
d2fd1af7
FB		 289 e1 = (addr & 0xffff) | (sel << 16);
290 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
291 p = ptr;
4dbc422b
FB		 292 p[0] = tswap32(e1);
293 p[1] = tswap32(e2);
d2fd1af7
FB		 294}
295
f4beb510
FB		 296/* only dpl matters as we do only user space emulation */
297static void set_idt(int n, unsigned int dpl)
298{
299 set_gate(idt_table + n, 0, dpl, 0, 0);
300}
d2fd1af7 301#endif
31e31b8a 302
89e957e7 303void cpu_loop(CPUX86State *env)
1b6b029e 304{
bc8a22cc 305 int trapnr;
992f48a0 306 abi_ulong pc;
c227f099 307 target_siginfo_t info;
851e67a1 308
1b6b029e 309 for(;;) {
bc8a22cc 310 trapnr = cpu_x86_exec(env);
bc8a22cc 311 switch(trapnr) {
f4beb510 312 case 0x80:
d2fd1af7 313 /* linux syscall from int $0x80 */
5fafdf24
TS		 314 env->regs[R_EAX] = do_syscall(env,
315 env->regs[R_EAX],
f4beb510
FB		 316 env->regs[R_EBX],
317 env->regs[R_ECX],
318 env->regs[R_EDX],
319 env->regs[R_ESI],
320 env->regs[R_EDI],
5945cfcb
PM		 321 env->regs[R_EBP],
322 0, 0);
f4beb510 323 break;
d2fd1af7
FB		 324#ifndef TARGET_ABI32
325 case EXCP_SYSCALL:
5ba18547 326 /* linux syscall from syscall instruction */
d2fd1af7
FB		 327 env->regs[R_EAX] = do_syscall(env,
328 env->regs[R_EAX],
329 env->regs[R_EDI],
330 env->regs[R_ESI],
331 env->regs[R_EDX],
332 env->regs[10],
333 env->regs[8],
5945cfcb
PM		 334 env->regs[9],
335 0, 0);
d2fd1af7
FB		 336 env->eip = env->exception_next_eip;
337 break;
338#endif
f4beb510
FB		 339 case EXCP0B_NOSEG:
340 case EXCP0C_STACK:
341 info.si_signo = SIGBUS;
342 info.si_errno = 0;
343 info.si_code = TARGET_SI_KERNEL;
344 info._sifields._sigfault._addr = 0;
624f7979 345 queue_signal(env, info.si_signo, &info);
f4beb510 346 break;
1b6b029e 347 case EXCP0D_GPF:
d2fd1af7 348 /* XXX: potential problem if ABI32 */
84409ddb 349#ifndef TARGET_X86_64
851e67a1 350 if (env->eflags & VM_MASK) {
89e957e7 351 handle_vm86_fault(env);
84409ddb
JM		 352 } else
353#endif
354 {
f4beb510
FB		 355 info.si_signo = SIGSEGV;
356 info.si_errno = 0;
357 info.si_code = TARGET_SI_KERNEL;
358 info._sifields._sigfault._addr = 0;
624f7979 359 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 360 }
361 break;
b689bc57
FB		 362 case EXCP0E_PAGE:
363 info.si_signo = SIGSEGV;
364 info.si_errno = 0;
365 if (!(env->error_code & 1))
366 info.si_code = TARGET_SEGV_MAPERR;
367 else
368 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 369 info._sifields._sigfault._addr = env->cr[2];
624f7979 370 queue_signal(env, info.si_signo, &info);
b689bc57 371 break;
9de5e440 372 case EXCP00_DIVZ:
84409ddb 373#ifndef TARGET_X86_64
bc8a22cc 374 if (env->eflags & VM_MASK) {
447db213 375 handle_vm86_trap(env, trapnr);
84409ddb
JM		 376 } else
377#endif
378 {
bc8a22cc
FB		 379 /* division by zero */
380 info.si_signo = SIGFPE;
381 info.si_errno = 0;
382 info.si_code = TARGET_FPE_INTDIV;
383 info._sifields._sigfault._addr = env->eip;
624f7979 384 queue_signal(env, info.si_signo, &info);
bc8a22cc 385 }
9de5e440 386 break;
01df040b 387 case EXCP01_DB:
447db213 388 case EXCP03_INT3:
84409ddb 389#ifndef TARGET_X86_64
447db213
FB		 390 if (env->eflags & VM_MASK) {
391 handle_vm86_trap(env, trapnr);
84409ddb
JM		 392 } else
393#endif
394 {
447db213
FB		 395 info.si_signo = SIGTRAP;
396 info.si_errno = 0;
01df040b 397 if (trapnr == EXCP01_DB) {
447db213
FB		 398 info.si_code = TARGET_TRAP_BRKPT;
399 info._sifields._sigfault._addr = env->eip;
400 } else {
401 info.si_code = TARGET_SI_KERNEL;
402 info._sifields._sigfault._addr = 0;
403 }
624f7979 404 queue_signal(env, info.si_signo, &info);
447db213
FB		 405 }
406 break;
9de5e440
FB		 407 case EXCP04_INTO:
408 case EXCP05_BOUND:
84409ddb 409#ifndef TARGET_X86_64
bc8a22cc 410 if (env->eflags & VM_MASK) {
447db213 411 handle_vm86_trap(env, trapnr);
84409ddb
JM		 412 } else
413#endif
414 {
bc8a22cc
FB		 415 info.si_signo = SIGSEGV;
416 info.si_errno = 0;
b689bc57 417 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 418 info._sifields._sigfault._addr = 0;
624f7979 419 queue_signal(env, info.si_signo, &info);
bc8a22cc 420 }
9de5e440
FB		 421 break;
422 case EXCP06_ILLOP:
423 info.si_signo = SIGILL;
424 info.si_errno = 0;
425 info.si_code = TARGET_ILL_ILLOPN;
426 info._sifields._sigfault._addr = env->eip;
624f7979 427 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 428 break;
429 case EXCP_INTERRUPT:
430 /* just indicate that signals should be handled asap */
431 break;
1fddef4b
FB		 432 case EXCP_DEBUG:
433 {
434 int sig;
435
436 sig = gdb_handlesig (env, TARGET_SIGTRAP);
437 if (sig)
438 {
439 info.si_signo = sig;
440 info.si_errno = 0;
441 info.si_code = TARGET_TRAP_BRKPT;
624f7979 442 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 443 }
444 }
445 break;
1b6b029e 446 default:
970a87a6 447 pc = env->segs[R_CS].base + env->eip;
5fafdf24 448 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 449 (long)pc, trapnr);
1b6b029e
FB		 450 abort();
451 }
66fb9763 452 process_pending_signals(env);
1b6b029e
FB		 453 }
454}
b346ff46
FB		 455#endif
456
457#ifdef TARGET_ARM
458
97cc7560
DDAG		 459/*
460 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
461 * Input:
462 * r0 = pointer to oldval
463 * r1 = pointer to newval
464 * r2 = pointer to target value
465 *
466 * Output:
467 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
468 * C set if *ptr was changed, clear if no exchange happened
469 *
470 * Note segv's in kernel helpers are a bit tricky, we can set the
471 * data address sensibly but the PC address is just the entry point.
472 */
473static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
474{
475 uint64_t oldval, newval, val;
476 uint32_t addr, cpsr;
477 target_siginfo_t info;
478
479 /* Based on the 32 bit code in do_kernel_trap */
480
481 /* XXX: This only works between threads, not between processes.
482 It's probably possible to implement this with native host
483 operations. However things like ldrex/strex are much harder so
484 there's not much point trying. */
485 start_exclusive();
486 cpsr = cpsr_read(env);
487 addr = env->regs[2];
488
489 if (get_user_u64(oldval, env->regs[0])) {
490 env->cp15.c6_data = env->regs[0];
491 goto segv;
492 };
493
494 if (get_user_u64(newval, env->regs[1])) {
495 env->cp15.c6_data = env->regs[1];
496 goto segv;
497 };
498
499 if (get_user_u64(val, addr)) {
500 env->cp15.c6_data = addr;
501 goto segv;
502 }
503
504 if (val == oldval) {
505 val = newval;
506
507 if (put_user_u64(val, addr)) {
508 env->cp15.c6_data = addr;
509 goto segv;
510 };
511
512 env->regs[0] = 0;
513 cpsr |= CPSR_C;
514 } else {
515 env->regs[0] = -1;
516 cpsr &= ~CPSR_C;
517 }
518 cpsr_write(env, cpsr, CPSR_C);
519 end_exclusive();
520 return;
521
522segv:
523 end_exclusive();
524 /* We get the PC of the entry address - which is as good as anything,
525 on a real kernel what you get depends on which mode it uses. */
526 info.si_signo = SIGSEGV;
527 info.si_errno = 0;
528 /* XXX: check env->error_code */
529 info.si_code = TARGET_SEGV_MAPERR;
530 info._sifields._sigfault._addr = env->cp15.c6_data;
531 queue_signal(env, info.si_signo, &info);
532
533 end_exclusive();
534}
535
fbb4a2e3
PB		 536/* Handle a jump to the kernel code page. */
537static int
538do_kernel_trap(CPUARMState *env)
539{
540 uint32_t addr;
541 uint32_t cpsr;
542 uint32_t val;
543
544 switch (env->regs[15]) {
545 case 0xffff0fa0: /* __kernel_memory_barrier */
546 /* ??? No-op. Will need to do better for SMP. */
547 break;
548 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 549 /* XXX: This only works between threads, not between processes.
550 It's probably possible to implement this with native host
551 operations. However things like ldrex/strex are much harder so
552 there's not much point trying. */
553 start_exclusive();
fbb4a2e3
PB		 554 cpsr = cpsr_read(env);
555 addr = env->regs[2];
556 /* FIXME: This should SEGV if the access fails. */
557 if (get_user_u32(val, addr))
558 val = ~env->regs[0];
559 if (val == env->regs[0]) {
560 val = env->regs[1];
561 /* FIXME: Check for segfaults. */
562 put_user_u32(val, addr);
563 env->regs[0] = 0;
564 cpsr |= CPSR_C;
565 } else {
566 env->regs[0] = -1;
567 cpsr &= ~CPSR_C;
568 }
569 cpsr_write(env, cpsr, CPSR_C);
d5975363 570 end_exclusive();
fbb4a2e3
PB		 571 break;
572 case 0xffff0fe0: /* __kernel_get_tls */
573 env->regs[0] = env->cp15.c13_tls2;
574 break;
97cc7560
DDAG		 575 case 0xffff0f60: /* __kernel_cmpxchg64 */
576 arm_kernel_cmpxchg64_helper(env);
577 break;
578
fbb4a2e3
PB		 579 default:
580 return 1;
581 }
582 /* Jump back to the caller. */
583 addr = env->regs[14];
584 if (addr & 1) {
585 env->thumb = 1;
586 addr &= ~1;
587 }
588 env->regs[15] = addr;
589
590 return 0;
591}
592
426f5abc
PB		 593static int do_strex(CPUARMState *env)
594{
595 uint32_t val;
596 int size;
597 int rc = 1;
598 int segv = 0;
599 uint32_t addr;
600 start_exclusive();
601 addr = env->exclusive_addr;
602 if (addr != env->exclusive_test) {
603 goto fail;
604 }
605 size = env->exclusive_info & 0xf;
606 switch (size) {
607 case 0:
608 segv = get_user_u8(val, addr);
609 break;
610 case 1:
611 segv = get_user_u16(val, addr);
612 break;
613 case 2:
614 case 3:
615 segv = get_user_u32(val, addr);
616 break;
f7001a3b
AJ		 617 default:
618 abort();
426f5abc
PB		 619 }
620 if (segv) {
621 env->cp15.c6_data = addr;
622 goto done;
623 }
624 if (val != env->exclusive_val) {
625 goto fail;
626 }
627 if (size == 3) {
628 segv = get_user_u32(val, addr + 4);
629 if (segv) {
630 env->cp15.c6_data = addr + 4;
631 goto done;
632 }
633 if (val != env->exclusive_high) {
634 goto fail;
635 }
636 }
637 val = env->regs[(env->exclusive_info >> 8) & 0xf];
638 switch (size) {
639 case 0:
640 segv = put_user_u8(val, addr);
641 break;
642 case 1:
643 segv = put_user_u16(val, addr);
644 break;
645 case 2:
646 case 3:
647 segv = put_user_u32(val, addr);
648 break;
649 }
650 if (segv) {
651 env->cp15.c6_data = addr;
652 goto done;
653 }
654 if (size == 3) {
655 val = env->regs[(env->exclusive_info >> 12) & 0xf];
2c9adbda 656 segv = put_user_u32(val, addr + 4);
426f5abc
PB		 657 if (segv) {
658 env->cp15.c6_data = addr + 4;
659 goto done;
660 }
661 }
662 rc = 0;
663fail:
725b8a69 664 env->regs[15] += 4;
426f5abc
PB		 665 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
666done:
667 end_exclusive();
668 return segv;
669}
670
b346ff46
FB		 671void cpu_loop(CPUARMState *env)
672{
673 int trapnr;
674 unsigned int n, insn;
c227f099 675 target_siginfo_t info;
b5ff1b31 676 uint32_t addr;
3b46e624 677
b346ff46 678 for(;;) {
d5975363 679 cpu_exec_start(env);
b346ff46 680 trapnr = cpu_arm_exec(env);
d5975363 681 cpu_exec_end(env);
b346ff46
FB		 682 switch(trapnr) {
683 case EXCP_UDEF:
c6981055
FB		 684 {
685 TaskState *ts = env->opaque;
686 uint32_t opcode;
6d9a42be 687 int rc;
c6981055
FB		 688
689 /* we handle the FPU emulation here, as Linux */
690 /* we get the opcode */
2f619698
FB		 691 /* FIXME - what to do if get_user() fails? */
692 get_user_u32(opcode, env->regs[15]);
3b46e624 693
6d9a42be
AJ		 694 rc = EmulateAll(opcode, &ts->fpa, env);
695 if (rc == 0) { /* illegal instruction */
c6981055
FB		 696 info.si_signo = SIGILL;
697 info.si_errno = 0;
698 info.si_code = TARGET_ILL_ILLOPN;
699 info._sifields._sigfault._addr = env->regs[15];
624f7979 700 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 701 } else if (rc < 0) { /* FP exception */
702 int arm_fpe=0;
703
704 /* translate softfloat flags to FPSR flags */
705 if (-rc & float_flag_invalid)
706 arm_fpe |= BIT_IOC;
707 if (-rc & float_flag_divbyzero)
708 arm_fpe |= BIT_DZC;
709 if (-rc & float_flag_overflow)
710 arm_fpe |= BIT_OFC;
711 if (-rc & float_flag_underflow)
712 arm_fpe |= BIT_UFC;
713 if (-rc & float_flag_inexact)
714 arm_fpe |= BIT_IXC;
715
716 FPSR fpsr = ts->fpa.fpsr;
717 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
718
719 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
720 info.si_signo = SIGFPE;
721 info.si_errno = 0;
722
723 /* ordered by priority, least first */
724 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
725 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
726 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
727 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
728 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
729
730 info._sifields._sigfault._addr = env->regs[15];
624f7979 731 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 732 } else {
733 env->regs[15] += 4;
734 }
735
736 /* accumulate unenabled exceptions */
737 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
738 fpsr |= BIT_IXC;
739 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
740 fpsr |= BIT_UFC;
741 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
742 fpsr |= BIT_OFC;
743 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
744 fpsr |= BIT_DZC;
745 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
746 fpsr |= BIT_IOC;
747 ts->fpa.fpsr=fpsr;
748 } else { /* everything OK */
c6981055
FB		 749 /* increment PC */
750 env->regs[15] += 4;
751 }
752 }
b346ff46
FB		 753 break;
754 case EXCP_SWI:
06c949e6 755 case EXCP_BKPT:
b346ff46 756 {
ce4defa0 757 env->eabi = 1;
b346ff46 758 /* system call */
06c949e6
PB		 759 if (trapnr == EXCP_BKPT) {
760 if (env->thumb) {
2f619698
FB		 761 /* FIXME - what to do if get_user() fails? */
762 get_user_u16(insn, env->regs[15]);
06c949e6
PB		 763 n = insn & 0xff;
764 env->regs[15] += 2;
765 } else {
2f619698
FB		 766 /* FIXME - what to do if get_user() fails? */
767 get_user_u32(insn, env->regs[15]);
06c949e6
PB		 768 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
769 env->regs[15] += 4;
770 }
192c7bd9 771 } else {
06c949e6 772 if (env->thumb) {
2f619698
FB		 773 /* FIXME - what to do if get_user() fails? */
774 get_user_u16(insn, env->regs[15] - 2);
06c949e6
PB		 775 n = insn & 0xff;
776 } else {
2f619698
FB		 777 /* FIXME - what to do if get_user() fails? */
778 get_user_u32(insn, env->regs[15] - 4);
06c949e6
PB		 779 n = insn & 0xffffff;
780 }
192c7bd9
FB		 781 }
782
6f1f31c0 783 if (n == ARM_NR_cacheflush) {
dcfd14b3 784 /* nop */
a4f81979
FB		 785 } else if (n == ARM_NR_semihosting
786 || n == ARM_NR_thumb_semihosting) {
787 env->regs[0] = do_arm_semihosting (env);
ce4defa0 788 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 789 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 790 /* linux syscall */
ce4defa0 791 if (env->thumb || n == 0) {
192c7bd9
FB		 792 n = env->regs[7];
793 } else {
794 n -= ARM_SYSCALL_BASE;
ce4defa0 795 env->eabi = 0;
192c7bd9 796 }
fbb4a2e3
PB		 797 if ( n > ARM_NR_BASE) {
798 switch (n) {
799 case ARM_NR_cacheflush:
dcfd14b3 800 /* nop */
fbb4a2e3
PB		 801 break;
802 case ARM_NR_set_tls:
803 cpu_set_tls(env, env->regs[0]);
804 env->regs[0] = 0;
805 break;
806 default:
807 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
808 n);
809 env->regs[0] = -TARGET_ENOSYS;
810 break;
811 }
812 } else {
813 env->regs[0] = do_syscall(env,
814 n,
815 env->regs[0],
816 env->regs[1],
817 env->regs[2],
818 env->regs[3],
819 env->regs[4],
5945cfcb
PM		 820 env->regs[5],
821 0, 0);
fbb4a2e3 822 }
b346ff46
FB		 823 } else {
824 goto error;
825 }
826 }
827 break;
43fff238
FB		 828 case EXCP_INTERRUPT:
829 /* just indicate that signals should be handled asap */
830 break;
68016c62 831 case EXCP_PREFETCH_ABORT:
eae473c1 832 addr = env->cp15.c6_insn;
b5ff1b31 833 goto do_segv;
68016c62 834 case EXCP_DATA_ABORT:
eae473c1 835 addr = env->cp15.c6_data;
b5ff1b31 836 do_segv:
68016c62
FB		 837 {
838 info.si_signo = SIGSEGV;
839 info.si_errno = 0;
840 /* XXX: check env->error_code */
841 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 842 info._sifields._sigfault._addr = addr;
624f7979 843 queue_signal(env, info.si_signo, &info);
68016c62
FB		 844 }
845 break;
1fddef4b
FB		 846 case EXCP_DEBUG:
847 {
848 int sig;
849
850 sig = gdb_handlesig (env, TARGET_SIGTRAP);
851 if (sig)
852 {
853 info.si_signo = sig;
854 info.si_errno = 0;
855 info.si_code = TARGET_TRAP_BRKPT;
624f7979 856 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 857 }
858 }
859 break;
fbb4a2e3
PB		 860 case EXCP_KERNEL_TRAP:
861 if (do_kernel_trap(env))
862 goto error;
863 break;
426f5abc
PB		 864 case EXCP_STREX:
865 if (do_strex(env)) {
866 addr = env->cp15.c6_data;
867 goto do_segv;
868 }
e9273455 869 break;
b346ff46
FB		 870 default:
871 error:
5fafdf24 872 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 873 trapnr);
7fe48483 874 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 875 abort();
876 }
877 process_pending_signals(env);
878 }
879}
880
881#endif
1b6b029e 882
d2fbca94
GX		 883#ifdef TARGET_UNICORE32
884
885void cpu_loop(CPUState *env)
886{
887 int trapnr;
888 unsigned int n, insn;
889 target_siginfo_t info;
890
891 for (;;) {
892 cpu_exec_start(env);
893 trapnr = uc32_cpu_exec(env);
894 cpu_exec_end(env);
895 switch (trapnr) {
896 case UC32_EXCP_PRIV:
897 {
898 /* system call */
899 get_user_u32(insn, env->regs[31] - 4);
900 n = insn & 0xffffff;
901
902 if (n >= UC32_SYSCALL_BASE) {
903 /* linux syscall */
904 n -= UC32_SYSCALL_BASE;
905 if (n == UC32_SYSCALL_NR_set_tls) {
906 cpu_set_tls(env, env->regs[0]);
907 env->regs[0] = 0;
908 } else {
909 env->regs[0] = do_syscall(env,
910 n,
911 env->regs[0],
912 env->regs[1],
913 env->regs[2],
914 env->regs[3],
915 env->regs[4],
5945cfcb
PM		 916 env->regs[5],
917 0, 0);
d2fbca94
GX		 918 }
919 } else {
920 goto error;
921 }
922 }
923 break;
924 case UC32_EXCP_TRAP:
925 info.si_signo = SIGSEGV;
926 info.si_errno = 0;
927 /* XXX: check env->error_code */
928 info.si_code = TARGET_SEGV_MAPERR;
929 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
930 queue_signal(env, info.si_signo, &info);
931 break;
932 case EXCP_INTERRUPT:
933 /* just indicate that signals should be handled asap */
934 break;
935 case EXCP_DEBUG:
936 {
937 int sig;
938
939 sig = gdb_handlesig(env, TARGET_SIGTRAP);
940 if (sig) {
941 info.si_signo = sig;
942 info.si_errno = 0;
943 info.si_code = TARGET_TRAP_BRKPT;
944 queue_signal(env, info.si_signo, &info);
945 }
946 }
947 break;
948 default:
949 goto error;
950 }
951 process_pending_signals(env);
952 }
953
954error:
955 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
956 cpu_dump_state(env, stderr, fprintf, 0);
957 abort();
958}
959#endif
960
93ac68bc 961#ifdef TARGET_SPARC
ed23fbd9 962#define SPARC64_STACK_BIAS 2047
93ac68bc 963
060366c5
FB		 964//#define DEBUG_WIN
965
2623cbaf
FB		 966/* WARNING: dealing with register windows _is_ complicated. More info
967 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 968static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
969{
1a14026e 970 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 971 /* wrap handling : if cwp is on the last window, then we use the
972 registers 'after' the end */
1a14026e
BS		 973 if (index < 8 && env->cwp == env->nwindows - 1)
974 index += 16 * env->nwindows;
060366c5
FB		 975 return index;
976}
977
2623cbaf
FB		 978/* save the register window 'cwp1' */
979static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 980{
2623cbaf 981 unsigned int i;
992f48a0 982 abi_ulong sp_ptr;
3b46e624 983
53a5960a 984 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 985#ifdef TARGET_SPARC64
986 if (sp_ptr & 3)
987 sp_ptr += SPARC64_STACK_BIAS;
988#endif
060366c5 989#if defined(DEBUG_WIN)
2daf0284
BS		 990 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
991 sp_ptr, cwp1);
060366c5 992#endif
2623cbaf 993 for(i = 0; i < 16; i++) {
2f619698
FB		 994 /* FIXME - what to do if put_user() fails? */
995 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 996 sp_ptr += sizeof(abi_ulong);
2623cbaf 997 }
060366c5
FB		 998}
999
1000static void save_window(CPUSPARCState *env)
1001{
5ef54116 1002#ifndef TARGET_SPARC64
2623cbaf 1003 unsigned int new_wim;
1a14026e
BS		 1004 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
1005 ((1LL << env->nwindows) - 1);
1006 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 1007 env->wim = new_wim;
5ef54116 1008#else
1a14026e 1009 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 1010 env->cansave++;
1011 env->canrestore--;
1012#endif
060366c5
FB		 1013}
1014
1015static void restore_window(CPUSPARCState *env)
1016{
eda52953
BS		 1017#ifndef TARGET_SPARC64
1018 unsigned int new_wim;
1019#endif
1020 unsigned int i, cwp1;
992f48a0 1021 abi_ulong sp_ptr;
3b46e624 1022
eda52953 1023#ifndef TARGET_SPARC64
1a14026e
BS		 1024 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1025 ((1LL << env->nwindows) - 1);
eda52953 1026#endif
3b46e624 1027
060366c5 1028 /* restore the invalid window */
1a14026e 1029 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 1030 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 1031#ifdef TARGET_SPARC64
1032 if (sp_ptr & 3)
1033 sp_ptr += SPARC64_STACK_BIAS;
1034#endif
060366c5 1035#if defined(DEBUG_WIN)
2daf0284
BS		 1036 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1037 sp_ptr, cwp1);
060366c5 1038#endif
2623cbaf 1039 for(i = 0; i < 16; i++) {
2f619698
FB		 1040 /* FIXME - what to do if get_user() fails? */
1041 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 1042 sp_ptr += sizeof(abi_ulong);
2623cbaf 1043 }
5ef54116
FB		 1044#ifdef TARGET_SPARC64
1045 env->canrestore++;
1a14026e
BS		 1046 if (env->cleanwin < env->nwindows - 1)
1047 env->cleanwin++;
5ef54116 1048 env->cansave--;
eda52953
BS		 1049#else
1050 env->wim = new_wim;
5ef54116 1051#endif
060366c5
FB		 1052}
1053
1054static void flush_windows(CPUSPARCState *env)
1055{
1056 int offset, cwp1;
2623cbaf
FB		 1057
1058 offset = 1;
060366c5
FB		 1059 for(;;) {
1060 /* if restore would invoke restore_window(), then we can stop */
1a14026e 1061 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 1062#ifndef TARGET_SPARC64
060366c5
FB		 1063 if (env->wim & (1 << cwp1))
1064 break;
eda52953
BS		 1065#else
1066 if (env->canrestore == 0)
1067 break;
1068 env->cansave++;
1069 env->canrestore--;
1070#endif
2623cbaf 1071 save_window_offset(env, cwp1);
060366c5
FB		 1072 offset++;
1073 }
1a14026e 1074 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 1075#ifndef TARGET_SPARC64
1076 /* set wim so that restore will reload the registers */
2623cbaf 1077 env->wim = 1 << cwp1;
eda52953 1078#endif
2623cbaf
FB		 1079#if defined(DEBUG_WIN)
1080 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 1081#endif
2623cbaf 1082}
060366c5 1083
93ac68bc
FB		 1084void cpu_loop (CPUSPARCState *env)
1085{
2cc20260
RH		 1086 int trapnr;
1087 abi_long ret;
c227f099 1088 target_siginfo_t info;
3b46e624 1089
060366c5
FB		 1090 while (1) {
1091 trapnr = cpu_sparc_exec (env);
3b46e624 1092
060366c5 1093 switch (trapnr) {
5ef54116 1094#ifndef TARGET_SPARC64
5fafdf24 1095 case 0x88:
060366c5 1096 case 0x90:
5ef54116 1097#else
cb33da57 1098 case 0x110:
5ef54116
FB		 1099 case 0x16d:
1100#endif
060366c5 1101 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 1102 env->regwptr[0], env->regwptr[1],
1103 env->regwptr[2], env->regwptr[3],
5945cfcb
PM		 1104 env->regwptr[4], env->regwptr[5],
1105 0, 0);
2cc20260 1106 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
992f48a0 1107#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1108 env->xcc |= PSR_CARRY;
1109#else
060366c5 1110 env->psr |= PSR_CARRY;
27908725 1111#endif
060366c5
FB		 1112 ret = -ret;
1113 } else {
992f48a0 1114#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1115 env->xcc &= ~PSR_CARRY;
1116#else
060366c5 1117 env->psr &= ~PSR_CARRY;
27908725 1118#endif
060366c5
FB		 1119 }
1120 env->regwptr[0] = ret;
1121 /* next instruction */
1122 env->pc = env->npc;
1123 env->npc = env->npc + 4;
1124 break;
1125 case 0x83: /* flush windows */
992f48a0
BS		 1126#ifdef TARGET_ABI32
1127 case 0x103:
1128#endif
2623cbaf 1129 flush_windows(env);
060366c5
FB		 1130 /* next instruction */
1131 env->pc = env->npc;
1132 env->npc = env->npc + 4;
1133 break;
3475187d 1134#ifndef TARGET_SPARC64
060366c5
FB		 1135 case TT_WIN_OVF: /* window overflow */
1136 save_window(env);
1137 break;
1138 case TT_WIN_UNF: /* window underflow */
1139 restore_window(env);
1140 break;
61ff6f58
FB		 1141 case TT_TFAULT:
1142 case TT_DFAULT:
1143 {
1144 info.si_signo = SIGSEGV;
1145 info.si_errno = 0;
1146 /* XXX: check env->error_code */
1147 info.si_code = TARGET_SEGV_MAPERR;
1148 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 1149 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 1150 }
1151 break;
3475187d 1152#else
5ef54116
FB		 1153 case TT_SPILL: /* window overflow */
1154 save_window(env);
1155 break;
1156 case TT_FILL: /* window underflow */
1157 restore_window(env);
1158 break;
7f84a729
BS		 1159 case TT_TFAULT:
1160 case TT_DFAULT:
1161 {
1162 info.si_signo = SIGSEGV;
1163 info.si_errno = 0;
1164 /* XXX: check env->error_code */
1165 info.si_code = TARGET_SEGV_MAPERR;
1166 if (trapnr == TT_DFAULT)
1167 info._sifields._sigfault._addr = env->dmmuregs[4];
1168 else
8194f35a 1169 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
624f7979 1170 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 1171 }
1172 break;
27524dc3 1173#ifndef TARGET_ABI32
5bfb56b2
BS		 1174 case 0x16e:
1175 flush_windows(env);
1176 sparc64_get_context(env);
1177 break;
1178 case 0x16f:
1179 flush_windows(env);
1180 sparc64_set_context(env);
1181 break;
27524dc3 1182#endif
3475187d 1183#endif
48dc41eb
FB		 1184 case EXCP_INTERRUPT:
1185 /* just indicate that signals should be handled asap */
1186 break;
1fddef4b
FB		 1187 case EXCP_DEBUG:
1188 {
1189 int sig;
1190
1191 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1192 if (sig)
1193 {
1194 info.si_signo = sig;
1195 info.si_errno = 0;
1196 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1197 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 1198 }
1199 }
1200 break;
060366c5
FB		 1201 default:
1202 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 1203 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 1204 exit (1);
1205 }
1206 process_pending_signals (env);
1207 }
93ac68bc
FB		 1208}
1209
1210#endif
1211
67867308 1212#ifdef TARGET_PPC
9fddaa0c
FB		 1213static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1214{
1215 /* TO FIX */
1216 return 0;
1217}
3b46e624 1218
e3ea6529 1219uint64_t cpu_ppc_load_tbl (CPUState *env)
9fddaa0c 1220{
e3ea6529 1221 return cpu_ppc_get_tb(env);
9fddaa0c 1222}
3b46e624 1223
9fddaa0c
FB		 1224uint32_t cpu_ppc_load_tbu (CPUState *env)
1225{
1226 return cpu_ppc_get_tb(env) >> 32;
1227}
3b46e624 1228
b711de95 1229uint64_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 1230{
b711de95 1231 return cpu_ppc_get_tb(env);
9fddaa0c 1232}
5fafdf24 1233
a062e36c 1234uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 1235{
a062e36c 1236 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1237}
76a66253 1238
76a66253
JM		 1239uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1240__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1241
76a66253 1242uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 1243{
76a66253 1244 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1245}
76a66253 1246
a750fc0b 1247/* XXX: to be fixed */
73b01960 1248int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
a750fc0b
JM		 1249{
1250 return -1;
1251}
1252
73b01960 1253int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
a750fc0b
JM		 1254{
1255 return -1;
1256}
1257
001faf32
BS		 1258#define EXCP_DUMP(env, fmt, ...) \
1259do { \
1260 fprintf(stderr, fmt , ## __VA_ARGS__); \
1261 cpu_dump_state(env, stderr, fprintf, 0); \
1262 qemu_log(fmt, ## __VA_ARGS__); \
430c7ec7 1263 if (logfile) \
1264 log_cpu_state(env, 0); \
e1833e1f
JM		 1265} while (0)
1266
56f066bb
NF		 1267static int do_store_exclusive(CPUPPCState *env)
1268{
1269 target_ulong addr;
1270 target_ulong page_addr;
1271 target_ulong val;
1272 int flags;
1273 int segv = 0;
1274
1275 addr = env->reserve_ea;
1276 page_addr = addr & TARGET_PAGE_MASK;
1277 start_exclusive();
1278 mmap_lock();
1279 flags = page_get_flags(page_addr);
1280 if ((flags & PAGE_READ) == 0) {
1281 segv = 1;
1282 } else {
1283 int reg = env->reserve_info & 0x1f;
1284 int size = (env->reserve_info >> 5) & 0xf;
1285 int stored = 0;
1286
1287 if (addr == env->reserve_addr) {
1288 switch (size) {
1289 case 1: segv = get_user_u8(val, addr); break;
1290 case 2: segv = get_user_u16(val, addr); break;
1291 case 4: segv = get_user_u32(val, addr); break;
1292#if defined(TARGET_PPC64)
1293 case 8: segv = get_user_u64(val, addr); break;
1294#endif
1295 default: abort();
1296 }
1297 if (!segv && val == env->reserve_val) {
1298 val = env->gpr[reg];
1299 switch (size) {
1300 case 1: segv = put_user_u8(val, addr); break;
1301 case 2: segv = put_user_u16(val, addr); break;
1302 case 4: segv = put_user_u32(val, addr); break;
1303#if defined(TARGET_PPC64)
1304 case 8: segv = put_user_u64(val, addr); break;
1305#endif
1306 default: abort();
1307 }
1308 if (!segv) {
1309 stored = 1;
1310 }
1311 }
1312 }
1313 env->crf[0] = (stored << 1) | xer_so;
1314 env->reserve_addr = (target_ulong)-1;
1315 }
1316 if (!segv) {
1317 env->nip += 4;
1318 }
1319 mmap_unlock();
1320 end_exclusive();
1321 return segv;
1322}
1323
67867308
FB		 1324void cpu_loop(CPUPPCState *env)
1325{
c227f099 1326 target_siginfo_t info;
61190b14
FB		 1327 int trapnr;
1328 uint32_t ret;
3b46e624 1329
67867308 1330 for(;;) {
56f066bb 1331 cpu_exec_start(env);
67867308 1332 trapnr = cpu_ppc_exec(env);
56f066bb 1333 cpu_exec_end(env);
67867308 1334 switch(trapnr) {
e1833e1f
JM		 1335 case POWERPC_EXCP_NONE:
1336 /* Just go on */
67867308 1337 break;
e1833e1f
JM		 1338 case POWERPC_EXCP_CRITICAL: /* Critical input */
1339 cpu_abort(env, "Critical interrupt while in user mode. "
1340 "Aborting\n");
61190b14 1341 break;
e1833e1f
JM		 1342 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1343 cpu_abort(env, "Machine check exception while in user mode. "
1344 "Aborting\n");
1345 break;
1346 case POWERPC_EXCP_DSI: /* Data storage exception */
90e189ec 1347 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
e1833e1f
JM		 1348 env->spr[SPR_DAR]);
1349 /* XXX: check this. Seems bugged */
2be0071f
FB		 1350 switch (env->error_code & 0xFF000000) {
1351 case 0x40000000:
61190b14
FB		 1352 info.si_signo = TARGET_SIGSEGV;
1353 info.si_errno = 0;
1354 info.si_code = TARGET_SEGV_MAPERR;
1355 break;
2be0071f 1356 case 0x04000000:
61190b14
FB		 1357 info.si_signo = TARGET_SIGILL;
1358 info.si_errno = 0;
1359 info.si_code = TARGET_ILL_ILLADR;
1360 break;
2be0071f 1361 case 0x08000000:
61190b14
FB		 1362 info.si_signo = TARGET_SIGSEGV;
1363 info.si_errno = 0;
1364 info.si_code = TARGET_SEGV_ACCERR;
1365 break;
61190b14
FB		 1366 default:
1367 /* Let's send a regular segfault... */
e1833e1f
JM		 1368 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1369 env->error_code);
61190b14
FB		 1370 info.si_signo = TARGET_SIGSEGV;
1371 info.si_errno = 0;
1372 info.si_code = TARGET_SEGV_MAPERR;
1373 break;
1374 }
67867308 1375 info._sifields._sigfault._addr = env->nip;
624f7979 1376 queue_signal(env, info.si_signo, &info);
67867308 1377 break;
e1833e1f 1378 case POWERPC_EXCP_ISI: /* Instruction storage exception */
90e189ec
BS		 1379 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1380 "\n", env->spr[SPR_SRR0]);
e1833e1f 1381 /* XXX: check this */
2be0071f
FB		 1382 switch (env->error_code & 0xFF000000) {
1383 case 0x40000000:
61190b14 1384 info.si_signo = TARGET_SIGSEGV;
67867308 1385 info.si_errno = 0;
61190b14
FB		 1386 info.si_code = TARGET_SEGV_MAPERR;
1387 break;
2be0071f
FB		 1388 case 0x10000000:
1389 case 0x08000000:
61190b14
FB		 1390 info.si_signo = TARGET_SIGSEGV;
1391 info.si_errno = 0;
1392 info.si_code = TARGET_SEGV_ACCERR;
1393 break;
1394 default:
1395 /* Let's send a regular segfault... */
e1833e1f
JM		 1396 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1397 env->error_code);
61190b14
FB		 1398 info.si_signo = TARGET_SIGSEGV;
1399 info.si_errno = 0;
1400 info.si_code = TARGET_SEGV_MAPERR;
1401 break;
1402 }
1403 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1404 queue_signal(env, info.si_signo, &info);
67867308 1405 break;
e1833e1f
JM		 1406 case POWERPC_EXCP_EXTERNAL: /* External input */
1407 cpu_abort(env, "External interrupt while in user mode. "
1408 "Aborting\n");
1409 break;
1410 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1411 EXCP_DUMP(env, "Unaligned memory access\n");
1412 /* XXX: check this */
61190b14 1413 info.si_signo = TARGET_SIGBUS;
67867308 1414 info.si_errno = 0;
61190b14
FB		 1415 info.si_code = TARGET_BUS_ADRALN;
1416 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1417 queue_signal(env, info.si_signo, &info);
67867308 1418 break;
e1833e1f
JM		 1419 case POWERPC_EXCP_PROGRAM: /* Program exception */
1420 /* XXX: check this */
61190b14 1421 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1422 case POWERPC_EXCP_FP:
1423 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1424 info.si_signo = TARGET_SIGFPE;
1425 info.si_errno = 0;
1426 switch (env->error_code & 0xF) {
e1833e1f 1427 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1428 info.si_code = TARGET_FPE_FLTOVF;
1429 break;
e1833e1f 1430 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1431 info.si_code = TARGET_FPE_FLTUND;
1432 break;
e1833e1f
JM		 1433 case POWERPC_EXCP_FP_ZX:
1434 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1435 info.si_code = TARGET_FPE_FLTDIV;
1436 break;
e1833e1f 1437 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1438 info.si_code = TARGET_FPE_FLTRES;
1439 break;
e1833e1f 1440 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1441 info.si_code = TARGET_FPE_FLTINV;
1442 break;
7c58044c 1443 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1444 case POWERPC_EXCP_FP_VXISI:
1445 case POWERPC_EXCP_FP_VXIDI:
1446 case POWERPC_EXCP_FP_VXIMZ:
1447 case POWERPC_EXCP_FP_VXVC:
1448 case POWERPC_EXCP_FP_VXSQRT:
1449 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1450 info.si_code = TARGET_FPE_FLTSUB;
1451 break;
1452 default:
e1833e1f
JM		 1453 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1454 env->error_code);
1455 break;
61190b14 1456 }
e1833e1f
JM		 1457 break;
1458 case POWERPC_EXCP_INVAL:
1459 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1460 info.si_signo = TARGET_SIGILL;
1461 info.si_errno = 0;
1462 switch (env->error_code & 0xF) {
e1833e1f 1463 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1464 info.si_code = TARGET_ILL_ILLOPC;
1465 break;
e1833e1f 1466 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1467 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1468 break;
e1833e1f 1469 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1470 info.si_code = TARGET_ILL_PRVREG;
1471 break;
e1833e1f 1472 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1473 info.si_code = TARGET_ILL_COPROC;
1474 break;
1475 default:
e1833e1f
JM		 1476 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1477 env->error_code & 0xF);
61190b14
FB		 1478 info.si_code = TARGET_ILL_ILLADR;
1479 break;
1480 }
1481 break;
e1833e1f
JM		 1482 case POWERPC_EXCP_PRIV:
1483 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1484 info.si_signo = TARGET_SIGILL;
1485 info.si_errno = 0;
1486 switch (env->error_code & 0xF) {
e1833e1f 1487 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1488 info.si_code = TARGET_ILL_PRVOPC;
1489 break;
e1833e1f 1490 case POWERPC_EXCP_PRIV_REG:
61190b14 1491 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1492 break;
61190b14 1493 default:
e1833e1f
JM		 1494 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1495 env->error_code & 0xF);
61190b14
FB		 1496 info.si_code = TARGET_ILL_PRVOPC;
1497 break;
1498 }
1499 break;
e1833e1f
JM		 1500 case POWERPC_EXCP_TRAP:
1501 cpu_abort(env, "Tried to call a TRAP\n");
1502 break;
61190b14
FB		 1503 default:
1504 /* Should not happen ! */
e1833e1f
JM		 1505 cpu_abort(env, "Unknown program exception (%02x)\n",
1506 env->error_code);
1507 break;
61190b14
FB		 1508 }
1509 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1510 queue_signal(env, info.si_signo, &info);
67867308 1511 break;
e1833e1f
JM		 1512 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1513 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1514 info.si_signo = TARGET_SIGILL;
67867308 1515 info.si_errno = 0;
61190b14
FB		 1516 info.si_code = TARGET_ILL_COPROC;
1517 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1518 queue_signal(env, info.si_signo, &info);
67867308 1519 break;
e1833e1f
JM		 1520 case POWERPC_EXCP_SYSCALL: /* System call exception */
1521 cpu_abort(env, "Syscall exception while in user mode. "
1522 "Aborting\n");
61190b14 1523 break;
e1833e1f
JM		 1524 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1525 EXCP_DUMP(env, "No APU instruction allowed\n");
1526 info.si_signo = TARGET_SIGILL;
1527 info.si_errno = 0;
1528 info.si_code = TARGET_ILL_COPROC;
1529 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1530 queue_signal(env, info.si_signo, &info);
61190b14 1531 break;
e1833e1f
JM		 1532 case POWERPC_EXCP_DECR: /* Decrementer exception */
1533 cpu_abort(env, "Decrementer interrupt while in user mode. "
1534 "Aborting\n");
61190b14 1535 break;
e1833e1f
JM		 1536 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1537 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1538 "Aborting\n");
1539 break;
1540 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1541 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1542 "Aborting\n");
1543 break;
1544 case POWERPC_EXCP_DTLB: /* Data TLB error */
1545 cpu_abort(env, "Data TLB exception while in user mode. "
1546 "Aborting\n");
1547 break;
1548 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1549 cpu_abort(env, "Instruction TLB exception while in user mode. "
1550 "Aborting\n");
1551 break;
e1833e1f
JM		 1552 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1553 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1554 info.si_signo = TARGET_SIGILL;
1555 info.si_errno = 0;
1556 info.si_code = TARGET_ILL_COPROC;
1557 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1558 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1559 break;
1560 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1561 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1562 break;
1563 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1564 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1565 break;
1566 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1567 cpu_abort(env, "Performance monitor exception not handled\n");
1568 break;
1569 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1570 cpu_abort(env, "Doorbell interrupt while in user mode. "
1571 "Aborting\n");
1572 break;
1573 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1574 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1575 "Aborting\n");
1576 break;
1577 case POWERPC_EXCP_RESET: /* System reset exception */
1578 cpu_abort(env, "Reset interrupt while in user mode. "
1579 "Aborting\n");
1580 break;
e1833e1f
JM		 1581 case POWERPC_EXCP_DSEG: /* Data segment exception */
1582 cpu_abort(env, "Data segment exception while in user mode. "
1583 "Aborting\n");
1584 break;
1585 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1586 cpu_abort(env, "Instruction segment exception "
1587 "while in user mode. Aborting\n");
1588 break;
e85e7c6e 1589 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1590 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1591 cpu_abort(env, "Hypervisor decrementer interrupt "
1592 "while in user mode. Aborting\n");
1593 break;
e1833e1f
JM		 1594 case POWERPC_EXCP_TRACE: /* Trace exception */
1595 /* Nothing to do:
1596 * we use this exception to emulate step-by-step execution mode.
1597 */
1598 break;
e85e7c6e 1599 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1600 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1601 cpu_abort(env, "Hypervisor data storage exception "
1602 "while in user mode. Aborting\n");
1603 break;
1604 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1605 cpu_abort(env, "Hypervisor instruction storage exception "
1606 "while in user mode. Aborting\n");
1607 break;
1608 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1609 cpu_abort(env, "Hypervisor data segment exception "
1610 "while in user mode. Aborting\n");
1611 break;
1612 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1613 cpu_abort(env, "Hypervisor instruction segment exception "
1614 "while in user mode. Aborting\n");
1615 break;
e1833e1f
JM		 1616 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1617 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1618 info.si_signo = TARGET_SIGILL;
1619 info.si_errno = 0;
1620 info.si_code = TARGET_ILL_COPROC;
1621 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1622 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1623 break;
1624 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1625 cpu_abort(env, "Programable interval timer interrupt "
1626 "while in user mode. Aborting\n");
1627 break;
1628 case POWERPC_EXCP_IO: /* IO error exception */
1629 cpu_abort(env, "IO error exception while in user mode. "
1630 "Aborting\n");
1631 break;
1632 case POWERPC_EXCP_RUNM: /* Run mode exception */
1633 cpu_abort(env, "Run mode exception while in user mode. "
1634 "Aborting\n");
1635 break;
1636 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1637 cpu_abort(env, "Emulation trap exception not handled\n");
1638 break;
1639 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1640 cpu_abort(env, "Instruction fetch TLB exception "
1641 "while in user-mode. Aborting");
1642 break;
1643 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1644 cpu_abort(env, "Data load TLB exception while in user-mode. "
1645 "Aborting");
1646 break;
1647 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1648 cpu_abort(env, "Data store TLB exception while in user-mode. "
1649 "Aborting");
1650 break;
1651 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1652 cpu_abort(env, "Floating-point assist exception not handled\n");
1653 break;
1654 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1655 cpu_abort(env, "Instruction address breakpoint exception "
1656 "not handled\n");
1657 break;
1658 case POWERPC_EXCP_SMI: /* System management interrupt */
1659 cpu_abort(env, "System management interrupt while in user mode. "
1660 "Aborting\n");
1661 break;
1662 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1663 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1664 "Aborting\n");
1665 break;
1666 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1667 cpu_abort(env, "Performance monitor exception not handled\n");
1668 break;
1669 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1670 cpu_abort(env, "Vector assist exception not handled\n");
1671 break;
1672 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1673 cpu_abort(env, "Soft patch exception not handled\n");
1674 break;
1675 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1676 cpu_abort(env, "Maintenance exception while in user mode. "
1677 "Aborting\n");
1678 break;
1679 case POWERPC_EXCP_STOP: /* stop translation */
1680 /* We did invalidate the instruction cache. Go on */
1681 break;
1682 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1683 /* We just stopped because of a branch. Go on */
1684 break;
1685 case POWERPC_EXCP_SYSCALL_USER:
1686 /* system call in user-mode emulation */
1687 /* WARNING:
1688 * PPC ABI uses overflow flag in cr0 to signal an error
1689 * in syscalls.
1690 */
1691#if 0
1692 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1693 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1694#endif
1695 env->crf[0] &= ~0x1;
1696 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1697 env->gpr[5], env->gpr[6], env->gpr[7],
5945cfcb 1698 env->gpr[8], 0, 0);
bcd4933a
NF		 1699 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1700 /* Returning from a successful sigreturn syscall.
1701 Avoid corrupting register state. */
1702 break;
1703 }
e1833e1f
JM		 1704 if (ret > (uint32_t)(-515)) {
1705 env->crf[0] |= 0x1;
1706 ret = -ret;
61190b14 1707 }
e1833e1f
JM		 1708 env->gpr[3] = ret;
1709#if 0
1710 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1711#endif
1712 break;
56f066bb
NF		 1713 case POWERPC_EXCP_STCX:
1714 if (do_store_exclusive(env)) {
1715 info.si_signo = TARGET_SIGSEGV;
1716 info.si_errno = 0;
1717 info.si_code = TARGET_SEGV_MAPERR;
1718 info._sifields._sigfault._addr = env->nip;
1719 queue_signal(env, info.si_signo, &info);
1720 }
1721 break;
71f75756
AJ		 1722 case EXCP_DEBUG:
1723 {
1724 int sig;
1725
1726 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1727 if (sig) {
1728 info.si_signo = sig;
1729 info.si_errno = 0;
1730 info.si_code = TARGET_TRAP_BRKPT;
1731 queue_signal(env, info.si_signo, &info);
1732 }
1733 }
1734 break;
56ba31ff
JM		 1735 case EXCP_INTERRUPT:
1736 /* just indicate that signals should be handled asap */
1737 break;
e1833e1f
JM		 1738 default:
1739 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1740 break;
67867308
FB		 1741 }
1742 process_pending_signals(env);
1743 }
1744}
1745#endif
1746
048f6b4d
FB		 1747#ifdef TARGET_MIPS
1748
1749#define MIPS_SYS(name, args) args,
1750
1751static const uint8_t mips_syscall_args[] = {
1752 MIPS_SYS(sys_syscall , 0) /* 4000 */
1753 MIPS_SYS(sys_exit , 1)
1754 MIPS_SYS(sys_fork , 0)
1755 MIPS_SYS(sys_read , 3)
1756 MIPS_SYS(sys_write , 3)
1757 MIPS_SYS(sys_open , 3) /* 4005 */
1758 MIPS_SYS(sys_close , 1)
1759 MIPS_SYS(sys_waitpid , 3)
1760 MIPS_SYS(sys_creat , 2)
1761 MIPS_SYS(sys_link , 2)
1762 MIPS_SYS(sys_unlink , 1) /* 4010 */
1763 MIPS_SYS(sys_execve , 0)
1764 MIPS_SYS(sys_chdir , 1)
1765 MIPS_SYS(sys_time , 1)
1766 MIPS_SYS(sys_mknod , 3)
1767 MIPS_SYS(sys_chmod , 2) /* 4015 */
1768 MIPS_SYS(sys_lchown , 3)
1769 MIPS_SYS(sys_ni_syscall , 0)
1770 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1771 MIPS_SYS(sys_lseek , 3)
1772 MIPS_SYS(sys_getpid , 0) /* 4020 */
1773 MIPS_SYS(sys_mount , 5)
1774 MIPS_SYS(sys_oldumount , 1)
1775 MIPS_SYS(sys_setuid , 1)
1776 MIPS_SYS(sys_getuid , 0)
1777 MIPS_SYS(sys_stime , 1) /* 4025 */
1778 MIPS_SYS(sys_ptrace , 4)
1779 MIPS_SYS(sys_alarm , 1)
1780 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1781 MIPS_SYS(sys_pause , 0)
1782 MIPS_SYS(sys_utime , 2) /* 4030 */
1783 MIPS_SYS(sys_ni_syscall , 0)
1784 MIPS_SYS(sys_ni_syscall , 0)
1785 MIPS_SYS(sys_access , 2)
1786 MIPS_SYS(sys_nice , 1)
1787 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1788 MIPS_SYS(sys_sync , 0)
1789 MIPS_SYS(sys_kill , 2)
1790 MIPS_SYS(sys_rename , 2)
1791 MIPS_SYS(sys_mkdir , 2)
1792 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1793 MIPS_SYS(sys_dup , 1)
1794 MIPS_SYS(sys_pipe , 0)
1795 MIPS_SYS(sys_times , 1)
1796 MIPS_SYS(sys_ni_syscall , 0)
1797 MIPS_SYS(sys_brk , 1) /* 4045 */
1798 MIPS_SYS(sys_setgid , 1)
1799 MIPS_SYS(sys_getgid , 0)
1800 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1801 MIPS_SYS(sys_geteuid , 0)
1802 MIPS_SYS(sys_getegid , 0) /* 4050 */
1803 MIPS_SYS(sys_acct , 0)
1804 MIPS_SYS(sys_umount , 2)
1805 MIPS_SYS(sys_ni_syscall , 0)
1806 MIPS_SYS(sys_ioctl , 3)
1807 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1808 MIPS_SYS(sys_ni_syscall , 2)
1809 MIPS_SYS(sys_setpgid , 2)
1810 MIPS_SYS(sys_ni_syscall , 0)
1811 MIPS_SYS(sys_olduname , 1)
1812 MIPS_SYS(sys_umask , 1) /* 4060 */
1813 MIPS_SYS(sys_chroot , 1)
1814 MIPS_SYS(sys_ustat , 2)
1815 MIPS_SYS(sys_dup2 , 2)
1816 MIPS_SYS(sys_getppid , 0)
1817 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1818 MIPS_SYS(sys_setsid , 0)
1819 MIPS_SYS(sys_sigaction , 3)
1820 MIPS_SYS(sys_sgetmask , 0)
1821 MIPS_SYS(sys_ssetmask , 1)
1822 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1823 MIPS_SYS(sys_setregid , 2)
1824 MIPS_SYS(sys_sigsuspend , 0)
1825 MIPS_SYS(sys_sigpending , 1)
1826 MIPS_SYS(sys_sethostname , 2)
1827 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1828 MIPS_SYS(sys_getrlimit , 2)
1829 MIPS_SYS(sys_getrusage , 2)
1830 MIPS_SYS(sys_gettimeofday, 2)
1831 MIPS_SYS(sys_settimeofday, 2)
1832 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1833 MIPS_SYS(sys_setgroups , 2)
1834 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1835 MIPS_SYS(sys_symlink , 2)
1836 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1837 MIPS_SYS(sys_readlink , 3) /* 4085 */
1838 MIPS_SYS(sys_uselib , 1)
1839 MIPS_SYS(sys_swapon , 2)
1840 MIPS_SYS(sys_reboot , 3)
1841 MIPS_SYS(old_readdir , 3)
1842 MIPS_SYS(old_mmap , 6) /* 4090 */
1843 MIPS_SYS(sys_munmap , 2)
1844 MIPS_SYS(sys_truncate , 2)
1845 MIPS_SYS(sys_ftruncate , 2)
1846 MIPS_SYS(sys_fchmod , 2)
1847 MIPS_SYS(sys_fchown , 3) /* 4095 */
1848 MIPS_SYS(sys_getpriority , 2)
1849 MIPS_SYS(sys_setpriority , 3)
1850 MIPS_SYS(sys_ni_syscall , 0)
1851 MIPS_SYS(sys_statfs , 2)
1852 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1853 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1854 MIPS_SYS(sys_socketcall , 2)
1855 MIPS_SYS(sys_syslog , 3)
1856 MIPS_SYS(sys_setitimer , 3)
1857 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1858 MIPS_SYS(sys_newstat , 2)
1859 MIPS_SYS(sys_newlstat , 2)
1860 MIPS_SYS(sys_newfstat , 2)
1861 MIPS_SYS(sys_uname , 1)
1862 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1863 MIPS_SYS(sys_vhangup , 0)
1864 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1865 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1866 MIPS_SYS(sys_wait4 , 4)
1867 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1868 MIPS_SYS(sys_sysinfo , 1)
1869 MIPS_SYS(sys_ipc , 6)
1870 MIPS_SYS(sys_fsync , 1)
1871 MIPS_SYS(sys_sigreturn , 0)
18113962 1872 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1873 MIPS_SYS(sys_setdomainname, 2)
1874 MIPS_SYS(sys_newuname , 1)
1875 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1876 MIPS_SYS(sys_adjtimex , 1)
1877 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1878 MIPS_SYS(sys_sigprocmask , 3)
1879 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1880 MIPS_SYS(sys_init_module , 5)
1881 MIPS_SYS(sys_delete_module, 1)
1882 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1883 MIPS_SYS(sys_quotactl , 0)
1884 MIPS_SYS(sys_getpgid , 1)
1885 MIPS_SYS(sys_fchdir , 1)
1886 MIPS_SYS(sys_bdflush , 2)
1887 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1888 MIPS_SYS(sys_personality , 1)
1889 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1890 MIPS_SYS(sys_setfsuid , 1)
1891 MIPS_SYS(sys_setfsgid , 1)
1892 MIPS_SYS(sys_llseek , 5) /* 4140 */
1893 MIPS_SYS(sys_getdents , 3)
1894 MIPS_SYS(sys_select , 5)
1895 MIPS_SYS(sys_flock , 2)
1896 MIPS_SYS(sys_msync , 3)
1897 MIPS_SYS(sys_readv , 3) /* 4145 */
1898 MIPS_SYS(sys_writev , 3)
1899 MIPS_SYS(sys_cacheflush , 3)
1900 MIPS_SYS(sys_cachectl , 3)
1901 MIPS_SYS(sys_sysmips , 4)
1902 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1903 MIPS_SYS(sys_getsid , 1)
1904 MIPS_SYS(sys_fdatasync , 0)
1905 MIPS_SYS(sys_sysctl , 1)
1906 MIPS_SYS(sys_mlock , 2)
1907 MIPS_SYS(sys_munlock , 2) /* 4155 */
1908 MIPS_SYS(sys_mlockall , 1)
1909 MIPS_SYS(sys_munlockall , 0)
1910 MIPS_SYS(sys_sched_setparam, 2)
1911 MIPS_SYS(sys_sched_getparam, 2)
1912 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1913 MIPS_SYS(sys_sched_getscheduler, 1)
1914 MIPS_SYS(sys_sched_yield , 0)
1915 MIPS_SYS(sys_sched_get_priority_max, 1)
1916 MIPS_SYS(sys_sched_get_priority_min, 1)
1917 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1918 MIPS_SYS(sys_nanosleep, 2)
1919 MIPS_SYS(sys_mremap , 4)
1920 MIPS_SYS(sys_accept , 3)
1921 MIPS_SYS(sys_bind , 3)
1922 MIPS_SYS(sys_connect , 3) /* 4170 */
1923 MIPS_SYS(sys_getpeername , 3)
1924 MIPS_SYS(sys_getsockname , 3)
1925 MIPS_SYS(sys_getsockopt , 5)
1926 MIPS_SYS(sys_listen , 2)
1927 MIPS_SYS(sys_recv , 4) /* 4175 */
1928 MIPS_SYS(sys_recvfrom , 6)
1929 MIPS_SYS(sys_recvmsg , 3)
1930 MIPS_SYS(sys_send , 4)
1931 MIPS_SYS(sys_sendmsg , 3)
1932 MIPS_SYS(sys_sendto , 6) /* 4180 */
1933 MIPS_SYS(sys_setsockopt , 5)
1934 MIPS_SYS(sys_shutdown , 2)
1935 MIPS_SYS(sys_socket , 3)
1936 MIPS_SYS(sys_socketpair , 4)
1937 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1938 MIPS_SYS(sys_getresuid , 3)
1939 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1940 MIPS_SYS(sys_poll , 3)
1941 MIPS_SYS(sys_nfsservctl , 3)
1942 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1943 MIPS_SYS(sys_getresgid , 3)
1944 MIPS_SYS(sys_prctl , 5)
1945 MIPS_SYS(sys_rt_sigreturn, 0)
1946 MIPS_SYS(sys_rt_sigaction, 4)
1947 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1948 MIPS_SYS(sys_rt_sigpending, 2)
1949 MIPS_SYS(sys_rt_sigtimedwait, 4)
1950 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1951 MIPS_SYS(sys_rt_sigsuspend, 0)
1952 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1953 MIPS_SYS(sys_pwrite64 , 6)
1954 MIPS_SYS(sys_chown , 3)
1955 MIPS_SYS(sys_getcwd , 2)
1956 MIPS_SYS(sys_capget , 2)
1957 MIPS_SYS(sys_capset , 2) /* 4205 */
053ebb27 1958 MIPS_SYS(sys_sigaltstack , 2)
048f6b4d
FB		 1959 MIPS_SYS(sys_sendfile , 4)
1960 MIPS_SYS(sys_ni_syscall , 0)
1961 MIPS_SYS(sys_ni_syscall , 0)
1962 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1963 MIPS_SYS(sys_truncate64 , 4)
1964 MIPS_SYS(sys_ftruncate64 , 4)
1965 MIPS_SYS(sys_stat64 , 2)
1966 MIPS_SYS(sys_lstat64 , 2)
1967 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1968 MIPS_SYS(sys_pivot_root , 2)
1969 MIPS_SYS(sys_mincore , 3)
1970 MIPS_SYS(sys_madvise , 3)
1971 MIPS_SYS(sys_getdents64 , 3)
1972 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1973 MIPS_SYS(sys_ni_syscall , 0)
1974 MIPS_SYS(sys_gettid , 0)
1975 MIPS_SYS(sys_readahead , 5)
1976 MIPS_SYS(sys_setxattr , 5)
1977 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1978 MIPS_SYS(sys_fsetxattr , 5)
1979 MIPS_SYS(sys_getxattr , 4)
1980 MIPS_SYS(sys_lgetxattr , 4)
1981 MIPS_SYS(sys_fgetxattr , 4)
1982 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1983 MIPS_SYS(sys_llistxattr , 3)
1984 MIPS_SYS(sys_flistxattr , 3)
1985 MIPS_SYS(sys_removexattr , 2)
1986 MIPS_SYS(sys_lremovexattr, 2)
1987 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1988 MIPS_SYS(sys_tkill , 2)
1989 MIPS_SYS(sys_sendfile64 , 5)
1990 MIPS_SYS(sys_futex , 2)
1991 MIPS_SYS(sys_sched_setaffinity, 3)
1992 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1993 MIPS_SYS(sys_io_setup , 2)
1994 MIPS_SYS(sys_io_destroy , 1)
1995 MIPS_SYS(sys_io_getevents, 5)
1996 MIPS_SYS(sys_io_submit , 3)
1997 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1998 MIPS_SYS(sys_exit_group , 1)
1999 MIPS_SYS(sys_lookup_dcookie, 3)
2000 MIPS_SYS(sys_epoll_create, 1)
2001 MIPS_SYS(sys_epoll_ctl , 4)
2002 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
2003 MIPS_SYS(sys_remap_file_pages, 5)
2004 MIPS_SYS(sys_set_tid_address, 1)
2005 MIPS_SYS(sys_restart_syscall, 0)
2006 MIPS_SYS(sys_fadvise64_64, 7)
2007 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
2008 MIPS_SYS(sys_fstatfs64 , 2)
2009 MIPS_SYS(sys_timer_create, 3)
2010 MIPS_SYS(sys_timer_settime, 4)
2011 MIPS_SYS(sys_timer_gettime, 2)
2012 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
2013 MIPS_SYS(sys_timer_delete, 1)
2014 MIPS_SYS(sys_clock_settime, 2)
2015 MIPS_SYS(sys_clock_gettime, 2)
2016 MIPS_SYS(sys_clock_getres, 2)
2017 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
2018 MIPS_SYS(sys_tgkill , 3)
2019 MIPS_SYS(sys_utimes , 2)
2020 MIPS_SYS(sys_mbind , 4)
2021 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
2022 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
2023 MIPS_SYS(sys_mq_open , 4)
2024 MIPS_SYS(sys_mq_unlink , 1)
2025 MIPS_SYS(sys_mq_timedsend, 5)
2026 MIPS_SYS(sys_mq_timedreceive, 5)
2027 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
2028 MIPS_SYS(sys_mq_getsetattr, 3)
2029 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
2030 MIPS_SYS(sys_waitid , 4)
2031 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
2032 MIPS_SYS(sys_add_key , 5)
388bb21a 2033 MIPS_SYS(sys_request_key, 4)
048f6b4d 2034 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 2035 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 2036 MIPS_SYS(sys_inotify_init, 0)
2037 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
2038 MIPS_SYS(sys_inotify_rm_watch, 2)
2039 MIPS_SYS(sys_migrate_pages, 4)
2040 MIPS_SYS(sys_openat, 4)
2041 MIPS_SYS(sys_mkdirat, 3)
2042 MIPS_SYS(sys_mknodat, 4) /* 4290 */
2043 MIPS_SYS(sys_fchownat, 5)
2044 MIPS_SYS(sys_futimesat, 3)
2045 MIPS_SYS(sys_fstatat64, 4)
2046 MIPS_SYS(sys_unlinkat, 3)
2047 MIPS_SYS(sys_renameat, 4) /* 4295 */
2048 MIPS_SYS(sys_linkat, 5)
2049 MIPS_SYS(sys_symlinkat, 3)
2050 MIPS_SYS(sys_readlinkat, 4)
2051 MIPS_SYS(sys_fchmodat, 3)
2052 MIPS_SYS(sys_faccessat, 3) /* 4300 */
2053 MIPS_SYS(sys_pselect6, 6)
2054 MIPS_SYS(sys_ppoll, 5)
2055 MIPS_SYS(sys_unshare, 1)
2056 MIPS_SYS(sys_splice, 4)
2057 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
2058 MIPS_SYS(sys_tee, 4)
2059 MIPS_SYS(sys_vmsplice, 4)
2060 MIPS_SYS(sys_move_pages, 6)
2061 MIPS_SYS(sys_set_robust_list, 2)
2062 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
2063 MIPS_SYS(sys_kexec_load, 4)
2064 MIPS_SYS(sys_getcpu, 3)
2065 MIPS_SYS(sys_epoll_pwait, 6)
2066 MIPS_SYS(sys_ioprio_set, 3)
2067 MIPS_SYS(sys_ioprio_get, 2)
d979e8eb
PM		 2068 MIPS_SYS(sys_utimensat, 4)
2069 MIPS_SYS(sys_signalfd, 3)
2070 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
2071 MIPS_SYS(sys_eventfd, 1)
2072 MIPS_SYS(sys_fallocate, 6) /* 4320 */
2073 MIPS_SYS(sys_timerfd_create, 2)
2074 MIPS_SYS(sys_timerfd_gettime, 2)
2075 MIPS_SYS(sys_timerfd_settime, 4)
2076 MIPS_SYS(sys_signalfd4, 4)
2077 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
2078 MIPS_SYS(sys_epoll_create1, 1)
2079 MIPS_SYS(sys_dup3, 3)
2080 MIPS_SYS(sys_pipe2, 2)
2081 MIPS_SYS(sys_inotify_init1, 1)
2082 MIPS_SYS(sys_preadv, 6) /* 4330 */
2083 MIPS_SYS(sys_pwritev, 6)
2084 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2085 MIPS_SYS(sys_perf_event_open, 5)
2086 MIPS_SYS(sys_accept4, 4)
2087 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2088 MIPS_SYS(sys_fanotify_init, 2)
2089 MIPS_SYS(sys_fanotify_mark, 6)
2090 MIPS_SYS(sys_prlimit64, 4)
2091 MIPS_SYS(sys_name_to_handle_at, 5)
2092 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2093 MIPS_SYS(sys_clock_adjtime, 2)
2094 MIPS_SYS(sys_syncfs, 1)
048f6b4d
FB		 2095};
2096
2097#undef MIPS_SYS
2098
590bc601
PB		 2099static int do_store_exclusive(CPUMIPSState *env)
2100{
2101 target_ulong addr;
2102 target_ulong page_addr;
2103 target_ulong val;
2104 int flags;
2105 int segv = 0;
2106 int reg;
2107 int d;
2108
5499b6ff 2109 addr = env->lladdr;
590bc601
PB		 2110 page_addr = addr & TARGET_PAGE_MASK;
2111 start_exclusive();
2112 mmap_lock();
2113 flags = page_get_flags(page_addr);
2114 if ((flags & PAGE_READ) == 0) {
2115 segv = 1;
2116 } else {
2117 reg = env->llreg & 0x1f;
2118 d = (env->llreg & 0x20) != 0;
2119 if (d) {
2120 segv = get_user_s64(val, addr);
2121 } else {
2122 segv = get_user_s32(val, addr);
2123 }
2124 if (!segv) {
2125 if (val != env->llval) {
2126 env->active_tc.gpr[reg] = 0;
2127 } else {
2128 if (d) {
2129 segv = put_user_u64(env->llnewval, addr);
2130 } else {
2131 segv = put_user_u32(env->llnewval, addr);
2132 }
2133 if (!segv) {
2134 env->active_tc.gpr[reg] = 1;
2135 }
2136 }
2137 }
2138 }
5499b6ff 2139 env->lladdr = -1;
590bc601
PB		 2140 if (!segv) {
2141 env->active_tc.PC += 4;
2142 }
2143 mmap_unlock();
2144 end_exclusive();
2145 return segv;
2146}
2147
048f6b4d
FB		 2148void cpu_loop(CPUMIPSState *env)
2149{
c227f099 2150 target_siginfo_t info;
388bb21a 2151 int trapnr, ret;
048f6b4d 2152 unsigned int syscall_num;
048f6b4d
FB		 2153
2154 for(;;) {
590bc601 2155 cpu_exec_start(env);
048f6b4d 2156 trapnr = cpu_mips_exec(env);
590bc601 2157 cpu_exec_end(env);
048f6b4d
FB		 2158 switch(trapnr) {
2159 case EXCP_SYSCALL:
b5dc7732
TS		 2160 syscall_num = env->active_tc.gpr[2] - 4000;
2161 env->active_tc.PC += 4;
388bb21a 2162 if (syscall_num >= sizeof(mips_syscall_args)) {
7c2f6157 2163 ret = -TARGET_ENOSYS;
388bb21a
TS		 2164 } else {
2165 int nb_args;
992f48a0
BS		 2166 abi_ulong sp_reg;
2167 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 2168
2169 nb_args = mips_syscall_args[syscall_num];
b5dc7732 2170 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 2171 switch (nb_args) {
2172 /* these arguments are taken from the stack */
2f619698
FB		 2173 /* FIXME - what to do if get_user() fails? */
2174 case 8: get_user_ual(arg8, sp_reg + 28);
2175 case 7: get_user_ual(arg7, sp_reg + 24);
2176 case 6: get_user_ual(arg6, sp_reg + 20);
2177 case 5: get_user_ual(arg5, sp_reg + 16);
388bb21a
TS		 2178 default:
2179 break;
048f6b4d 2180 }
b5dc7732
TS		 2181 ret = do_syscall(env, env->active_tc.gpr[2],
2182 env->active_tc.gpr[4],
2183 env->active_tc.gpr[5],
2184 env->active_tc.gpr[6],
2185 env->active_tc.gpr[7],
5945cfcb 2186 arg5, arg6, arg7, arg8);
388bb21a 2187 }
0b1bcb00
PB		 2188 if (ret == -TARGET_QEMU_ESIGRETURN) {
2189 /* Returning from a successful sigreturn syscall.
2190 Avoid clobbering register state. */
2191 break;
2192 }
388bb21a 2193 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 2194 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 2195 ret = -ret;
2196 } else {
b5dc7732 2197 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 2198 }
b5dc7732 2199 env->active_tc.gpr[2] = ret;
048f6b4d 2200 break;
ca7c2b1b
TS		 2201 case EXCP_TLBL:
2202 case EXCP_TLBS:
e6e5bd2d
WT		 2203 case EXCP_AdEL:
2204 case EXCP_AdES:
e4474235
PB		 2205 info.si_signo = TARGET_SIGSEGV;
2206 info.si_errno = 0;
2207 /* XXX: check env->error_code */
2208 info.si_code = TARGET_SEGV_MAPERR;
2209 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2210 queue_signal(env, info.si_signo, &info);
2211 break;
6900e84b 2212 case EXCP_CpU:
048f6b4d 2213 case EXCP_RI:
bc1ad2de
FB		 2214 info.si_signo = TARGET_SIGILL;
2215 info.si_errno = 0;
2216 info.si_code = 0;
624f7979 2217 queue_signal(env, info.si_signo, &info);
048f6b4d 2218 break;
106ec879
FB		 2219 case EXCP_INTERRUPT:
2220 /* just indicate that signals should be handled asap */
2221 break;
d08b2a28
PB		 2222 case EXCP_DEBUG:
2223 {
2224 int sig;
2225
2226 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2227 if (sig)
2228 {
2229 info.si_signo = sig;
2230 info.si_errno = 0;
2231 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2232 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 2233 }
2234 }
2235 break;
590bc601
PB		 2236 case EXCP_SC:
2237 if (do_store_exclusive(env)) {
2238 info.si_signo = TARGET_SIGSEGV;
2239 info.si_errno = 0;
2240 info.si_code = TARGET_SEGV_MAPERR;
2241 info._sifields._sigfault._addr = env->active_tc.PC;
2242 queue_signal(env, info.si_signo, &info);
2243 }
2244 break;
048f6b4d
FB		 2245 default:
2246 // error:
5fafdf24 2247 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 2248 trapnr);
2249 cpu_dump_state(env, stderr, fprintf, 0);
2250 abort();
2251 }
2252 process_pending_signals(env);
2253 }
2254}
2255#endif
2256
fdf9b3e8
FB		 2257#ifdef TARGET_SH4
2258void cpu_loop (CPUState *env)
2259{
2260 int trapnr, ret;
c227f099 2261 target_siginfo_t info;
3b46e624 2262
fdf9b3e8
FB		 2263 while (1) {
2264 trapnr = cpu_sh4_exec (env);
3b46e624 2265
fdf9b3e8
FB		 2266 switch (trapnr) {
2267 case 0x160:
0b6d3ae0 2268 env->pc += 2;
5fafdf24
TS		 2269 ret = do_syscall(env,
2270 env->gregs[3],
2271 env->gregs[4],
2272 env->gregs[5],
2273 env->gregs[6],
2274 env->gregs[7],
2275 env->gregs[0],
5945cfcb
PM		 2276 env->gregs[1],
2277 0, 0);
9c2a9ea1 2278 env->gregs[0] = ret;
fdf9b3e8 2279 break;
c3b5bc8a
TS		 2280 case EXCP_INTERRUPT:
2281 /* just indicate that signals should be handled asap */
2282 break;
355fb23d
PB		 2283 case EXCP_DEBUG:
2284 {
2285 int sig;
2286
2287 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2288 if (sig)
2289 {
2290 info.si_signo = sig;
2291 info.si_errno = 0;
2292 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2293 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 2294 }
2295 }
2296 break;
c3b5bc8a
TS		 2297 case 0xa0:
2298 case 0xc0:
2299 info.si_signo = SIGSEGV;
2300 info.si_errno = 0;
2301 info.si_code = TARGET_SEGV_MAPERR;
2302 info._sifields._sigfault._addr = env->tea;
624f7979 2303 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 2304 break;
2305
fdf9b3e8
FB		 2306 default:
2307 printf ("Unhandled trap: 0x%x\n", trapnr);
2308 cpu_dump_state(env, stderr, fprintf, 0);
2309 exit (1);
2310 }
2311 process_pending_signals (env);
2312 }
2313}
2314#endif
2315
48733d19
TS		 2316#ifdef TARGET_CRIS
2317void cpu_loop (CPUState *env)
2318{
2319 int trapnr, ret;
c227f099 2320 target_siginfo_t info;
48733d19
TS		 2321
2322 while (1) {
2323 trapnr = cpu_cris_exec (env);
2324 switch (trapnr) {
2325 case 0xaa:
2326 {
2327 info.si_signo = SIGSEGV;
2328 info.si_errno = 0;
2329 /* XXX: check env->error_code */
2330 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2331 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 2332 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2333 }
2334 break;
b6d3abda
EI		 2335 case EXCP_INTERRUPT:
2336 /* just indicate that signals should be handled asap */
2337 break;
48733d19
TS		 2338 case EXCP_BREAK:
2339 ret = do_syscall(env,
2340 env->regs[9],
2341 env->regs[10],
2342 env->regs[11],
2343 env->regs[12],
2344 env->regs[13],
2345 env->pregs[7],
5945cfcb
PM		 2346 env->pregs[11],
2347 0, 0);
48733d19 2348 env->regs[10] = ret;
48733d19
TS		 2349 break;
2350 case EXCP_DEBUG:
2351 {
2352 int sig;
2353
2354 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2355 if (sig)
2356 {
2357 info.si_signo = sig;
2358 info.si_errno = 0;
2359 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2360 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2361 }
2362 }
2363 break;
2364 default:
2365 printf ("Unhandled trap: 0x%x\n", trapnr);
2366 cpu_dump_state(env, stderr, fprintf, 0);
2367 exit (1);
2368 }
2369 process_pending_signals (env);
2370 }
2371}
2372#endif
2373
b779e29e
EI		 2374#ifdef TARGET_MICROBLAZE
2375void cpu_loop (CPUState *env)
2376{
2377 int trapnr, ret;
c227f099 2378 target_siginfo_t info;
b779e29e
EI		 2379
2380 while (1) {
2381 trapnr = cpu_mb_exec (env);
2382 switch (trapnr) {
2383 case 0xaa:
2384 {
2385 info.si_signo = SIGSEGV;
2386 info.si_errno = 0;
2387 /* XXX: check env->error_code */
2388 info.si_code = TARGET_SEGV_MAPERR;
2389 info._sifields._sigfault._addr = 0;
2390 queue_signal(env, info.si_signo, &info);
2391 }
2392 break;
2393 case EXCP_INTERRUPT:
2394 /* just indicate that signals should be handled asap */
2395 break;
2396 case EXCP_BREAK:
2397 /* Return address is 4 bytes after the call. */
2398 env->regs[14] += 4;
2399 ret = do_syscall(env,
2400 env->regs[12],
2401 env->regs[5],
2402 env->regs[6],
2403 env->regs[7],
2404 env->regs[8],
2405 env->regs[9],
5945cfcb
PM		 2406 env->regs[10],
2407 0, 0);
b779e29e
EI		 2408 env->regs[3] = ret;
2409 env->sregs[SR_PC] = env->regs[14];
2410 break;
b76da7e3
EI		 2411 case EXCP_HW_EXCP:
2412 env->regs[17] = env->sregs[SR_PC] + 4;
2413 if (env->iflags & D_FLAG) {
2414 env->sregs[SR_ESR] |= 1 << 12;
2415 env->sregs[SR_PC] -= 4;
2416 /* FIXME: if branch was immed, replay the imm aswell. */
2417 }
2418
2419 env->iflags &= ~(IMM_FLAG | D_FLAG);
2420
2421 switch (env->sregs[SR_ESR] & 31) {
22a78d64
EI		 2422 case ESR_EC_DIVZERO:
2423 info.si_signo = SIGFPE;
2424 info.si_errno = 0;
2425 info.si_code = TARGET_FPE_FLTDIV;
2426 info._sifields._sigfault._addr = 0;
2427 queue_signal(env, info.si_signo, &info);
2428 break;
b76da7e3
EI		 2429 case ESR_EC_FPU:
2430 info.si_signo = SIGFPE;
2431 info.si_errno = 0;
2432 if (env->sregs[SR_FSR] & FSR_IO) {
2433 info.si_code = TARGET_FPE_FLTINV;
2434 }
2435 if (env->sregs[SR_FSR] & FSR_DZ) {
2436 info.si_code = TARGET_FPE_FLTDIV;
2437 }
2438 info._sifields._sigfault._addr = 0;
2439 queue_signal(env, info.si_signo, &info);
2440 break;
2441 default:
2442 printf ("Unhandled hw-exception: 0x%x\n",
2e42d52d 2443 env->sregs[SR_ESR] & ESR_EC_MASK);
b76da7e3
EI		 2444 cpu_dump_state(env, stderr, fprintf, 0);
2445 exit (1);
2446 break;
2447 }
2448 break;
b779e29e
EI		 2449 case EXCP_DEBUG:
2450 {
2451 int sig;
2452
2453 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2454 if (sig)
2455 {
2456 info.si_signo = sig;
2457 info.si_errno = 0;
2458 info.si_code = TARGET_TRAP_BRKPT;
2459 queue_signal(env, info.si_signo, &info);
2460 }
2461 }
2462 break;
2463 default:
2464 printf ("Unhandled trap: 0x%x\n", trapnr);
2465 cpu_dump_state(env, stderr, fprintf, 0);
2466 exit (1);
2467 }
2468 process_pending_signals (env);
2469 }
2470}
2471#endif
2472
e6e5906b
PB		 2473#ifdef TARGET_M68K
2474
2475void cpu_loop(CPUM68KState *env)
2476{
2477 int trapnr;
2478 unsigned int n;
c227f099 2479 target_siginfo_t info;
e6e5906b 2480 TaskState *ts = env->opaque;
3b46e624 2481
e6e5906b
PB		 2482 for(;;) {
2483 trapnr = cpu_m68k_exec(env);
2484 switch(trapnr) {
2485 case EXCP_ILLEGAL:
2486 {
2487 if (ts->sim_syscalls) {
2488 uint16_t nr;
2489 nr = lduw(env->pc + 2);
2490 env->pc += 4;
2491 do_m68k_simcall(env, nr);
2492 } else {
2493 goto do_sigill;
2494 }
2495 }
2496 break;
a87295e8 2497 case EXCP_HALT_INSN:
e6e5906b 2498 /* Semihosing syscall. */
a87295e8 2499 env->pc += 4;
e6e5906b
PB		 2500 do_m68k_semihosting(env, env->dregs[0]);
2501 break;
2502 case EXCP_LINEA:
2503 case EXCP_LINEF:
2504 case EXCP_UNSUPPORTED:
2505 do_sigill:
2506 info.si_signo = SIGILL;
2507 info.si_errno = 0;
2508 info.si_code = TARGET_ILL_ILLOPN;
2509 info._sifields._sigfault._addr = env->pc;
624f7979 2510 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2511 break;
2512 case EXCP_TRAP0:
2513 {
2514 ts->sim_syscalls = 0;
2515 n = env->dregs[0];
2516 env->pc += 2;
5fafdf24
TS		 2517 env->dregs[0] = do_syscall(env,
2518 n,
e6e5906b
PB		 2519 env->dregs[1],
2520 env->dregs[2],
2521 env->dregs[3],
2522 env->dregs[4],
2523 env->dregs[5],
5945cfcb
PM		 2524 env->aregs[0],
2525 0, 0);
e6e5906b
PB		 2526 }
2527 break;
2528 case EXCP_INTERRUPT:
2529 /* just indicate that signals should be handled asap */
2530 break;
2531 case EXCP_ACCESS:
2532 {
2533 info.si_signo = SIGSEGV;
2534 info.si_errno = 0;
2535 /* XXX: check env->error_code */
2536 info.si_code = TARGET_SEGV_MAPERR;
2537 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2538 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2539 }
2540 break;
2541 case EXCP_DEBUG:
2542 {
2543 int sig;
2544
2545 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2546 if (sig)
2547 {
2548 info.si_signo = sig;
2549 info.si_errno = 0;
2550 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2551 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2552 }
2553 }
2554 break;
2555 default:
5fafdf24 2556 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2557 trapnr);
2558 cpu_dump_state(env, stderr, fprintf, 0);
2559 abort();
2560 }
2561 process_pending_signals(env);
2562 }
2563}
2564#endif /* TARGET_M68K */
2565
7a3148a9 2566#ifdef TARGET_ALPHA
6910b8f6
RH		 2567static void do_store_exclusive(CPUAlphaState *env, int reg, int quad)
2568{
2569 target_ulong addr, val, tmp;
2570 target_siginfo_t info;
2571 int ret = 0;
2572
2573 addr = env->lock_addr;
2574 tmp = env->lock_st_addr;
2575 env->lock_addr = -1;
2576 env->lock_st_addr = 0;
2577
2578 start_exclusive();
2579 mmap_lock();
2580
2581 if (addr == tmp) {
2582 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
2583 goto do_sigsegv;
2584 }
2585
2586 if (val == env->lock_value) {
2587 tmp = env->ir[reg];
2588 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
2589 goto do_sigsegv;
2590 }
2591 ret = 1;
2592 }
2593 }
2594 env->ir[reg] = ret;
2595 env->pc += 4;
2596
2597 mmap_unlock();
2598 end_exclusive();
2599 return;
2600
2601 do_sigsegv:
2602 mmap_unlock();
2603 end_exclusive();
2604
2605 info.si_signo = TARGET_SIGSEGV;
2606 info.si_errno = 0;
2607 info.si_code = TARGET_SEGV_MAPERR;
2608 info._sifields._sigfault._addr = addr;
2609 queue_signal(env, TARGET_SIGSEGV, &info);
2610}
2611
7a3148a9
JM		 2612void cpu_loop (CPUState *env)
2613{
e96efcfc 2614 int trapnr;
c227f099 2615 target_siginfo_t info;
6049f4f8 2616 abi_long sysret;
3b46e624 2617
7a3148a9
JM		 2618 while (1) {
2619 trapnr = cpu_alpha_exec (env);
3b46e624 2620
ac316ca4
RH		 2621 /* All of the traps imply a transition through PALcode, which
2622 implies an REI instruction has been executed. Which means
2623 that the intr_flag should be cleared. */
2624 env->intr_flag = 0;
2625
7a3148a9
JM		 2626 switch (trapnr) {
2627 case EXCP_RESET:
2628 fprintf(stderr, "Reset requested. Exit\n");
2629 exit(1);
2630 break;
2631 case EXCP_MCHK:
2632 fprintf(stderr, "Machine check exception. Exit\n");
2633 exit(1);
2634 break;
07b6c13b
RH		 2635 case EXCP_SMP_INTERRUPT:
2636 case EXCP_CLK_INTERRUPT:
2637 case EXCP_DEV_INTERRUPT:
5fafdf24 2638 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2639 exit(1);
2640 break;
07b6c13b 2641 case EXCP_MMFAULT:
6910b8f6 2642 env->lock_addr = -1;
6049f4f8
RH		 2643 info.si_signo = TARGET_SIGSEGV;
2644 info.si_errno = 0;
129d8aa5 2645 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
0be1d07c 2646 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
129d8aa5 2647 info._sifields._sigfault._addr = env->trap_arg0;
6049f4f8 2648 queue_signal(env, info.si_signo, &info);
7a3148a9 2649 break;
7a3148a9 2650 case EXCP_UNALIGN:
6910b8f6 2651 env->lock_addr = -1;
6049f4f8
RH		 2652 info.si_signo = TARGET_SIGBUS;
2653 info.si_errno = 0;
2654 info.si_code = TARGET_BUS_ADRALN;
129d8aa5 2655 info._sifields._sigfault._addr = env->trap_arg0;
6049f4f8 2656 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2657 break;
2658 case EXCP_OPCDEC:
6049f4f8 2659 do_sigill:
6910b8f6 2660 env->lock_addr = -1;
6049f4f8
RH		 2661 info.si_signo = TARGET_SIGILL;
2662 info.si_errno = 0;
2663 info.si_code = TARGET_ILL_ILLOPC;
2664 info._sifields._sigfault._addr = env->pc;
2665 queue_signal(env, info.si_signo, &info);
7a3148a9 2666 break;
07b6c13b
RH		 2667 case EXCP_ARITH:
2668 env->lock_addr = -1;
2669 info.si_signo = TARGET_SIGFPE;
2670 info.si_errno = 0;
2671 info.si_code = TARGET_FPE_FLTINV;
2672 info._sifields._sigfault._addr = env->pc;
2673 queue_signal(env, info.si_signo, &info);
2674 break;
7a3148a9 2675 case EXCP_FEN:
6049f4f8 2676 /* No-op. Linux simply re-enables the FPU. */
7a3148a9 2677 break;
07b6c13b 2678 case EXCP_CALL_PAL:
6910b8f6 2679 env->lock_addr = -1;
07b6c13b 2680 switch (env->error_code) {
6049f4f8
RH		 2681 case 0x80:
2682 /* BPT */
2683 info.si_signo = TARGET_SIGTRAP;
2684 info.si_errno = 0;
2685 info.si_code = TARGET_TRAP_BRKPT;
2686 info._sifields._sigfault._addr = env->pc;
2687 queue_signal(env, info.si_signo, &info);
2688 break;
2689 case 0x81:
2690 /* BUGCHK */
2691 info.si_signo = TARGET_SIGTRAP;
2692 info.si_errno = 0;
2693 info.si_code = 0;
2694 info._sifields._sigfault._addr = env->pc;
2695 queue_signal(env, info.si_signo, &info);
2696 break;
2697 case 0x83:
2698 /* CALLSYS */
2699 trapnr = env->ir[IR_V0];
2700 sysret = do_syscall(env, trapnr,
2701 env->ir[IR_A0], env->ir[IR_A1],
2702 env->ir[IR_A2], env->ir[IR_A3],
5945cfcb
PM		 2703 env->ir[IR_A4], env->ir[IR_A5],
2704 0, 0);
a5b3b13b
RH		 2705 if (trapnr == TARGET_NR_sigreturn
2706 || trapnr == TARGET_NR_rt_sigreturn) {
2707 break;
2708 }
2709 /* Syscall writes 0 to V0 to bypass error check, similar
2710 to how this is handled internal to Linux kernel. */
2711 if (env->ir[IR_V0] == 0) {
2712 env->ir[IR_V0] = sysret;
2713 } else {
6049f4f8
RH		 2714 env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
2715 env->ir[IR_A3] = (sysret < 0);
2716 }
2717 break;
2718 case 0x86:
2719 /* IMB */
2720 /* ??? We can probably elide the code using page_unprotect
2721 that is checking for self-modifying code. Instead we
2722 could simply call tb_flush here. Until we work out the
2723 changes required to turn off the extra write protection,
2724 this can be a no-op. */
2725 break;
2726 case 0x9E:
2727 /* RDUNIQUE */
2728 /* Handled in the translator for usermode. */
2729 abort();
2730 case 0x9F:
2731 /* WRUNIQUE */
2732 /* Handled in the translator for usermode. */
2733 abort();
2734 case 0xAA:
2735 /* GENTRAP */
2736 info.si_signo = TARGET_SIGFPE;
2737 switch (env->ir[IR_A0]) {
2738 case TARGET_GEN_INTOVF:
2739 info.si_code = TARGET_FPE_INTOVF;
2740 break;
2741 case TARGET_GEN_INTDIV:
2742 info.si_code = TARGET_FPE_INTDIV;
2743 break;
2744 case TARGET_GEN_FLTOVF:
2745 info.si_code = TARGET_FPE_FLTOVF;
2746 break;
2747 case TARGET_GEN_FLTUND:
2748 info.si_code = TARGET_FPE_FLTUND;
2749 break;
2750 case TARGET_GEN_FLTINV:
2751 info.si_code = TARGET_FPE_FLTINV;
2752 break;
2753 case TARGET_GEN_FLTINE:
2754 info.si_code = TARGET_FPE_FLTRES;
2755 break;
2756 case TARGET_GEN_ROPRAND:
2757 info.si_code = 0;
2758 break;
2759 default:
2760 info.si_signo = TARGET_SIGTRAP;
2761 info.si_code = 0;
2762 break;
2763 }
2764 info.si_errno = 0;
2765 info._sifields._sigfault._addr = env->pc;
2766 queue_signal(env, info.si_signo, &info);
2767 break;
2768 default:
2769 goto do_sigill;
2770 }
7a3148a9 2771 break;
7a3148a9 2772 case EXCP_DEBUG:
6049f4f8
RH		 2773 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2774 if (info.si_signo) {
6910b8f6 2775 env->lock_addr = -1;
6049f4f8
RH		 2776 info.si_errno = 0;
2777 info.si_code = TARGET_TRAP_BRKPT;
2778 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2779 }
2780 break;
6910b8f6
RH		 2781 case EXCP_STL_C:
2782 case EXCP_STQ_C:
2783 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
2784 break;
7a3148a9
JM		 2785 default:
2786 printf ("Unhandled trap: 0x%x\n", trapnr);
2787 cpu_dump_state(env, stderr, fprintf, 0);
2788 exit (1);
2789 }
2790 process_pending_signals (env);
2791 }
2792}
2793#endif /* TARGET_ALPHA */
2794
a4c075f1
UH		 2795#ifdef TARGET_S390X
2796void cpu_loop(CPUS390XState *env)
2797{
2798 int trapnr;
2799 target_siginfo_t info;
2800
2801 while (1) {
2802 trapnr = cpu_s390x_exec (env);
2803
2804 switch (trapnr) {
2805 case EXCP_INTERRUPT:
2806 /* just indicate that signals should be handled asap */
2807 break;
2808 case EXCP_DEBUG:
2809 {
2810 int sig;
2811
2812 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2813 if (sig) {
2814 info.si_signo = sig;
2815 info.si_errno = 0;
2816 info.si_code = TARGET_TRAP_BRKPT;
2817 queue_signal(env, info.si_signo, &info);
2818 }
2819 }
2820 break;
2821 case EXCP_SVC:
2822 {
2823 int n = env->int_svc_code;
2824 if (!n) {
2825 /* syscalls > 255 */
2826 n = env->regs[1];
2827 }
2828 env->psw.addr += env->int_svc_ilc;
2829 env->regs[2] = do_syscall(env, n,
2830 env->regs[2],
2831 env->regs[3],
2832 env->regs[4],
2833 env->regs[5],
2834 env->regs[6],
5945cfcb
PM		 2835 env->regs[7],
2836 0, 0);
a4c075f1
UH		 2837 }
2838 break;
2839 case EXCP_ADDR:
2840 {
2841 info.si_signo = SIGSEGV;
2842 info.si_errno = 0;
2843 /* XXX: check env->error_code */
2844 info.si_code = TARGET_SEGV_MAPERR;
2845 info._sifields._sigfault._addr = env->__excp_addr;
2846 queue_signal(env, info.si_signo, &info);
2847 }
2848 break;
2849 case EXCP_SPEC:
2850 {
2851 fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4));
2852 info.si_signo = SIGILL;
2853 info.si_errno = 0;
2854 info.si_code = TARGET_ILL_ILLOPC;
2855 info._sifields._sigfault._addr = env->__excp_addr;
2856 queue_signal(env, info.si_signo, &info);
2857 }
2858 break;
2859 default:
2860 printf ("Unhandled trap: 0x%x\n", trapnr);
2861 cpu_dump_state(env, stderr, fprintf, 0);
2862 exit (1);
2863 }
2864 process_pending_signals (env);
2865 }
2866}
2867
2868#endif /* TARGET_S390X */
2869
6672b0b2
PM		 2870static void version(void)
2871{
2872 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION
2873 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
2874}
2875
8fcd3692 2876static void usage(void)
31e31b8a 2877{
6672b0b2
PM		 2878 version();
2879 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
b346ff46 2880 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 2881 "\n"
68d0f70e 2882 "Standard options:\n"
b12b6a18 2883 "-h print this help\n"
6672b0b2 2884 "-version display version information and exit\n"
b12b6a18
TS		 2885 "-g port wait gdb connection to port\n"
2886 "-L path set the elf interpreter prefix (default=%s)\n"
2887 "-s size set the stack size in bytes (default=%ld)\n"
2888 "-cpu model select CPU (-cpu ? for list)\n"
2889 "-drop-ld-preload drop LD_PRELOAD for target process\n"
04a6dfeb
AJ		 2890 "-E var=value sets/modifies targets environment variable(s)\n"
2891 "-U var unsets targets environment variable(s)\n"
7d8cec95 2892 "-0 argv0 forces target process argv[0] to be argv0\n"
379f6698
PB		 2893#if defined(CONFIG_USE_GUEST_BASE)
2894 "-B address set guest_base address to address\n"
68a1c816 2895 "-R size reserve size bytes for guest virtual address space\n"
379f6698 2896#endif
54936004 2897 "\n"
68d0f70e 2898 "Debug options:\n"
6f1f31c0 2899 "-d options activate log (logfile=%s)\n"
b6741956 2900 "-p pagesize set the host page size to 'pagesize'\n"
1b530a6d 2901 "-singlestep always run in singlestep mode\n"
b01bcae6
AZ		 2902 "-strace log system calls\n"
2903 "\n"
68d0f70e 2904 "Environment variables:\n"
b01bcae6
AZ		 2905 "QEMU_STRACE Print system calls and arguments similar to the\n"
2906 " 'strace' program. Enable by setting to any value.\n"
04a6dfeb
AJ		 2907 "You can use -E and -U options to set/unset environment variables\n"
2908 "for target process. It is possible to provide several variables\n"
2909 "by repeating the option. For example:\n"
2910 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2911 "Note that if you provide several changes to single variable\n"
2912 "last change will stay in effect.\n"
b01bcae6 2913 ,
b346ff46 2914 TARGET_ARCH,
5fafdf24 2915 interp_prefix,
703e0e89 2916 guest_stack_size,
54936004 2917 DEBUG_LOGFILE);
2d18e637 2918 exit(1);
31e31b8a
FB		 2919}
2920
d5975363 2921THREAD CPUState *thread_env;
59faf6d6 2922
edf8e2af
MW		 2923void task_settid(TaskState *ts)
2924{
2925 if (ts->ts_tid == 0) {
2f7bb878 2926#ifdef CONFIG_USE_NPTL
edf8e2af
MW		 2927 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2928#else
2929 /* when no threads are used, tid becomes pid */
2930 ts->ts_tid = getpid();
2931#endif
2932 }
2933}
2934
2935void stop_all_tasks(void)
2936{
2937 /*
2938 * We trust that when using NPTL, start_exclusive()
2939 * handles thread stopping correctly.
2940 */
2941 start_exclusive();
2942}
2943
c3a92833 2944/* Assumes contents are already zeroed. */
624f7979
PB		 2945void init_task_state(TaskState *ts)
2946{
2947 int i;
2948
624f7979
PB		 2949 ts->used = 1;
2950 ts->first_free = ts->sigqueue_table;
2951 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2952 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2953 }
2954 ts->sigqueue_table[i].next = NULL;
2955}
2956
902b3d5c 2957int main(int argc, char **argv, char **envp)
31e31b8a
FB		 2958{
2959 const char *filename;
b1f9be31 2960 const char *cpu_model;
c235d738
MF		 2961 const char *log_file = DEBUG_LOGFILE;
2962 const char *log_mask = NULL;
01ffc75b 2963 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 2964 struct image_info info1, *info = &info1;
edf8e2af 2965 struct linux_binprm bprm;
48e15fc2 2966 TaskState *ts;
b346ff46 2967 CPUState *env;
586314f2 2968 int optind;
d691f669 2969 const char *r;
74c33bed 2970 int gdbstub_port = 0;
04a6dfeb 2971 char **target_environ, **wrk;
7d8cec95
AJ		 2972 char **target_argv;
2973 int target_argc;
04a6dfeb 2974 envlist_t *envlist = NULL;
7d8cec95
AJ		 2975 const char *argv0 = NULL;
2976 int i;
fd4d81dd 2977 int ret;
b12b6a18 2978
31e31b8a 2979 if (argc <= 1)
44de1b33 2980 usage();
f801f97e 2981
902b3d5c 2982 qemu_cache_utils_init(envp);
2983
04a6dfeb
AJ		 2984 if ((envlist = envlist_create()) == NULL) {
2985 (void) fprintf(stderr, "Unable to allocate envlist\n");
2986 exit(1);
2987 }
2988
2989 /* add current environment into the list */
2990 for (wrk = environ; *wrk != NULL; wrk++) {
2991 (void) envlist_setenv(envlist, *wrk);
2992 }
2993
703e0e89
RH		 2994 /* Read the stack limit from the kernel. If it's "unlimited",
2995 then we can do little else besides use the default. */
2996 {
2997 struct rlimit lim;
2998 if (getrlimit(RLIMIT_STACK, &lim) == 0
81bbe906 2999 && lim.rlim_cur != RLIM_INFINITY
3000 && lim.rlim_cur == (target_long)lim.rlim_cur) {
703e0e89
RH		 3001 guest_stack_size = lim.rlim_cur;
3002 }
3003 }
3004
b1f9be31 3005 cpu_model = NULL;
b5ec5ce0 3006#if defined(cpudef_setup)
3007 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3008#endif
3009
586314f2 3010 optind = 1;
d691f669
FB		 3011 for(;;) {
3012 if (optind >= argc)
3013 break;
3014 r = argv[optind];
3015 if (r[0] != '-')
3016 break;
586314f2 3017 optind++;
d691f669
FB		 3018 r++;
3019 if (!strcmp(r, "-")) {
3020 break;
3021 } else if (!strcmp(r, "d")) {
c235d738 3022 if (optind >= argc) {
6f1f31c0 3023 break;
e19e89a5 3024 }
c235d738
MF		 3025 log_mask = argv[optind++];
3026 } else if (!strcmp(r, "D")) {
3027 if (optind >= argc) {
3028 break;
3029 }
3030 log_file = argv[optind++];
04a6dfeb
AJ		 3031 } else if (!strcmp(r, "E")) {
3032 r = argv[optind++];
3033 if (envlist_setenv(envlist, r) != 0)
3034 usage();
f66724c9
SW		 3035 } else if (!strcmp(r, "ignore-environment")) {
3036 envlist_free(envlist);
3037 if ((envlist = envlist_create()) == NULL) {
3038 (void) fprintf(stderr, "Unable to allocate envlist\n");
3039 exit(1);
3040 }
04a6dfeb
AJ		 3041 } else if (!strcmp(r, "U")) {
3042 r = argv[optind++];
3043 if (envlist_unsetenv(envlist, r) != 0)
3044 usage();
7d8cec95
AJ		 3045 } else if (!strcmp(r, "0")) {
3046 r = argv[optind++];
3047 argv0 = r;
d691f669 3048 } else if (!strcmp(r, "s")) {
491150db
AJ		 3049 if (optind >= argc)
3050 break;
d691f669 3051 r = argv[optind++];
703e0e89
RH		 3052 guest_stack_size = strtoul(r, (char **)&r, 0);
3053 if (guest_stack_size == 0)
44de1b33 3054 usage();
d691f669 3055 if (*r == 'M')
703e0e89 3056 guest_stack_size *= 1024 * 1024;
d691f669 3057 else if (*r == 'k' || *r == 'K')
703e0e89 3058 guest_stack_size *= 1024;
d691f669
FB		 3059 } else if (!strcmp(r, "L")) {
3060 interp_prefix = argv[optind++];
54936004 3061 } else if (!strcmp(r, "p")) {
491150db
AJ		 3062 if (optind >= argc)
3063 break;
83fb7adf
FB		 3064 qemu_host_page_size = atoi(argv[optind++]);
3065 if (qemu_host_page_size == 0 ||
3066 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 3067 fprintf(stderr, "page size must be a power of two\n");
3068 exit(1);
3069 }
1fddef4b 3070 } else if (!strcmp(r, "g")) {
491150db
AJ		 3071 if (optind >= argc)
3072 break;
74c33bed 3073 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 3074 } else if (!strcmp(r, "r")) {
3075 qemu_uname_release = argv[optind++];
b1f9be31
JM		 3076 } else if (!strcmp(r, "cpu")) {
3077 cpu_model = argv[optind++];
491150db 3078 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
c732abe2 3079/* XXX: implement xxx_cpu_list for targets that still miss it */
b5ec5ce0 3080#if defined(cpu_list_id)
3081 cpu_list_id(stdout, &fprintf, "");
6d1db8c3
LV		 3082#elif defined(cpu_list)
3083 cpu_list(stdout, &fprintf); /* deprecated */
b1f9be31 3084#endif
2d18e637 3085 exit(1);
b1f9be31 3086 }
379f6698
PB		 3087#if defined(CONFIG_USE_GUEST_BASE)
3088 } else if (!strcmp(r, "B")) {
3089 guest_base = strtol(argv[optind++], NULL, 0);
3090 have_guest_base = 1;
68a1c816
PB		 3091 } else if (!strcmp(r, "R")) {
3092 char *p;
3093 int shift = 0;
3094 reserved_va = strtoul(argv[optind++], &p, 0);
3095 switch (*p) {
3096 case 'k':
3097 case 'K':
3098 shift = 10;
3099 break;
3100 case 'M':
3101 shift = 20;
3102 break;
3103 case 'G':
3104 shift = 30;
3105 break;
3106 }
3107 if (shift) {
3108 unsigned long unshifted = reserved_va;
3109 p++;
3110 reserved_va <<= shift;
3111 if (((reserved_va >> shift) != unshifted)
3112#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3113 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3114#endif
3115 ) {
3116 fprintf(stderr, "Reserved virtual address too big\n");
3117 exit(1);
3118 }
3119 }
3120 if (*p) {
3121 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
3122 exit(1);
3123 }
379f6698 3124#endif
b12b6a18 3125 } else if (!strcmp(r, "drop-ld-preload")) {
04a6dfeb 3126 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
1b530a6d
AJ		 3127 } else if (!strcmp(r, "singlestep")) {
3128 singlestep = 1;
b6741956
FB		 3129 } else if (!strcmp(r, "strace")) {
3130 do_strace = 1;
6672b0b2
PM		 3131 } else if (!strcmp(r, "version")) {
3132 version();
3133 exit(0);
3134 } else {
d691f669
FB		 3135 usage();
3136 }
586314f2 3137 }
c235d738
MF		 3138 /* init debug */
3139 cpu_set_log_filename(log_file);
3140 if (log_mask) {
3141 int mask;
3142 const CPULogItem *item;
3143
1dfdcaa8 3144 mask = cpu_str_to_log_mask(log_mask);
c235d738
MF		 3145 if (!mask) {
3146 printf("Log items (comma separated):\n");
3147 for (item = cpu_log_items; item->mask != 0; item++) {
3148 printf("%-10s %s\n", item->name, item->help);
3149 }
3150 exit(1);
3151 }
3152 cpu_set_log(mask);
3153 }
4b5dfd82
PM		 3154
3155 if (optind >= argc) {
3156 usage();
3157 }
3158 filename = argv[optind];
3159 exec_path = argv[optind];
586314f2 3160
31e31b8a 3161 /* Zero out regs */
01ffc75b 3162 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 3163
3164 /* Zero out image_info */
3165 memset(info, 0, sizeof(struct image_info));
3166
edf8e2af
MW		 3167 memset(&bprm, 0, sizeof (bprm));
3168
74cd30b8
FB		 3169 /* Scan interp_prefix dir for replacement files. */
3170 init_paths(interp_prefix);
3171
46027c07 3172 if (cpu_model == NULL) {
aaed909a 3173#if defined(TARGET_I386)
46027c07
FB		 3174#ifdef TARGET_X86_64
3175 cpu_model = "qemu64";
3176#else
3177 cpu_model = "qemu32";
3178#endif
aaed909a 3179#elif defined(TARGET_ARM)
088ab16c 3180 cpu_model = "any";
d2fbca94
GX		 3181#elif defined(TARGET_UNICORE32)
3182 cpu_model = "any";
aaed909a
FB		 3183#elif defined(TARGET_M68K)
3184 cpu_model = "any";
3185#elif defined(TARGET_SPARC)
3186#ifdef TARGET_SPARC64
3187 cpu_model = "TI UltraSparc II";
3188#else
3189 cpu_model = "Fujitsu MB86904";
46027c07 3190#endif
aaed909a
FB		 3191#elif defined(TARGET_MIPS)
3192#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3193 cpu_model = "20Kc";
3194#else
3195 cpu_model = "24Kf";
3196#endif
3197#elif defined(TARGET_PPC)
7ded4f52 3198#ifdef TARGET_PPC64
f7177937 3199 cpu_model = "970fx";
7ded4f52 3200#else
aaed909a 3201 cpu_model = "750";
7ded4f52 3202#endif
aaed909a
FB		 3203#else
3204 cpu_model = "any";
3205#endif
3206 }
d5ab9713
JK		 3207 tcg_exec_init(0);
3208 cpu_exec_init_all();
83fb7adf
FB		 3209 /* NOTE: we need to init the CPU at this stage to get
3210 qemu_host_page_size */
aaed909a
FB		 3211 env = cpu_init(cpu_model);
3212 if (!env) {
3213 fprintf(stderr, "Unable to find CPU definition\n");
3214 exit(1);
3215 }
b55a37c9
BS		 3216#if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3217 cpu_reset(env);
3218#endif
3219
d5975363 3220 thread_env = env;
3b46e624 3221
b6741956
FB		 3222 if (getenv("QEMU_STRACE")) {
3223 do_strace = 1;
b92c47c1
TS		 3224 }
3225
04a6dfeb
AJ		 3226 target_environ = envlist_to_environ(envlist, NULL);
3227 envlist_free(envlist);
b12b6a18 3228
379f6698
PB		 3229#if defined(CONFIG_USE_GUEST_BASE)
3230 /*
3231 * Now that page sizes are configured in cpu_init() we can do
3232 * proper page alignment for guest_base.
3233 */
3234 guest_base = HOST_PAGE_ALIGN(guest_base);
68a1c816
PB		 3235
3236 if (reserved_va) {
3237 void *p;
3238 int flags;
3239
3240 flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE;
3241 if (have_guest_base) {
3242 flags |= MAP_FIXED;
3243 }
3244 p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0);
3245 if (p == MAP_FAILED) {
3246 fprintf(stderr, "Unable to reserve guest address space\n");
3247 exit(1);
3248 }
3249 guest_base = (unsigned long)p;
3250 /* Make sure the address is properly aligned. */
3251 if (guest_base & ~qemu_host_page_mask) {
3252 munmap(p, reserved_va);
3253 p = mmap((void *)guest_base, reserved_va + qemu_host_page_size,
3254 PROT_NONE, flags, -1, 0);
3255 if (p == MAP_FAILED) {
3256 fprintf(stderr, "Unable to reserve guest address space\n");
3257 exit(1);
3258 }
3259 guest_base = HOST_PAGE_ALIGN((unsigned long)p);
3260 }
3261 qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va);
3262 }
97cc7560
DDAG		 3263
3264 if (reserved_va || have_guest_base) {
3265 if (!guest_validate_base(guest_base)) {
3266 fprintf(stderr, "Guest base/Reserved VA rejected by guest code\n");
3267 exit(1);
3268 }
3269 }
14f24e14 3270#endif /* CONFIG_USE_GUEST_BASE */
379f6698
PB		 3271
3272 /*
3273 * Read in mmap_min_addr kernel parameter. This value is used
3274 * When loading the ELF image to determine whether guest_base
14f24e14 3275 * is needed. It is also used in mmap_find_vma.
379f6698 3276 */
14f24e14 3277 {
379f6698
PB		 3278 FILE *fp;
3279
3280 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
3281 unsigned long tmp;
3282 if (fscanf(fp, "%lu", &tmp) == 1) {
3283 mmap_min_addr = tmp;
3284 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
3285 }
3286 fclose(fp);
3287 }
3288 }
379f6698 3289
7d8cec95
AJ		 3290 /*
3291 * Prepare copy of argv vector for target.
3292 */
3293 target_argc = argc - optind;
3294 target_argv = calloc(target_argc + 1, sizeof (char *));
3295 if (target_argv == NULL) {
3296 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
3297 exit(1);
3298 }
3299
3300 /*
3301 * If argv0 is specified (using '-0' switch) we replace
3302 * argv[0] pointer with the given one.
3303 */
3304 i = 0;
3305 if (argv0 != NULL) {
3306 target_argv[i++] = strdup(argv0);
3307 }
3308 for (; i < target_argc; i++) {
3309 target_argv[i] = strdup(argv[optind + i]);
3310 }
3311 target_argv[target_argc] = NULL;
3312
7267c094 3313 ts = g_malloc0 (sizeof(TaskState));
edf8e2af
MW		 3314 init_task_state(ts);
3315 /* build Task State */
3316 ts->info = info;
3317 ts->bprm = &bprm;
3318 env->opaque = ts;
3319 task_settid(ts);
3320
fd4d81dd
AP		 3321 ret = loader_exec(filename, target_argv, target_environ, regs,
3322 info, &bprm);
3323 if (ret != 0) {
3324 printf("Error %d while loading %s\n", ret, filename);
b12b6a18
TS		 3325 _exit(1);
3326 }
3327
7d8cec95
AJ		 3328 for (i = 0; i < target_argc; i++) {
3329 free(target_argv[i]);
3330 }
3331 free(target_argv);
3332
b12b6a18
TS		 3333 for (wrk = target_environ; *wrk; wrk++) {
3334 free(*wrk);
31e31b8a 3335 }
3b46e624 3336
b12b6a18
TS		 3337 free(target_environ);
3338
2e77eac6 3339 if (qemu_log_enabled()) {
379f6698
PB		 3340#if defined(CONFIG_USE_GUEST_BASE)
3341 qemu_log("guest_base 0x%lx\n", guest_base);
3342#endif
2e77eac6
BS		 3343 log_page_dump();
3344
3345 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
3346 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
3347 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
3348 info->start_code);
3349 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
3350 info->start_data);
3351 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
3352 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
3353 info->start_stack);
3354 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
3355 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
3356 }
31e31b8a 3357
53a5960a 3358 target_set_brk(info->brk);
31e31b8a 3359 syscall_init();
66fb9763 3360 signal_init();
31e31b8a 3361
9002ec79
RH		 3362#if defined(CONFIG_USE_GUEST_BASE)
3363 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3364 generating the prologue until now so that the prologue can take
3365 the real value of GUEST_BASE into account. */
3366 tcg_prologue_init(&tcg_ctx);
3367#endif
3368
b346ff46 3369#if defined(TARGET_I386)
2e255c6b
FB		 3370 cpu_x86_set_cpl(env, 3);
3371
3802ce26 3372 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 3373 env->hflags |= HF_PE_MASK;
3374 if (env->cpuid_features & CPUID_SSE) {
3375 env->cr[4] |= CR4_OSFXSR_MASK;
3376 env->hflags |= HF_OSFXSR_MASK;
3377 }
d2fd1af7 3378#ifndef TARGET_ABI32
4dbc422b
FB		 3379 /* enable 64 bit mode if possible */
3380 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
3381 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
3382 exit(1);
3383 }
d2fd1af7 3384 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 3385 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 3386 env->hflags |= HF_LMA_MASK;
3387#endif
1bde465e 3388
415e561f
FB		 3389 /* flags setup : we activate the IRQs by default as in user mode */
3390 env->eflags |= IF_MASK;
3b46e624 3391
6dbad63e 3392 /* linux register setup */
d2fd1af7 3393#ifndef TARGET_ABI32
84409ddb
JM		 3394 env->regs[R_EAX] = regs->rax;
3395 env->regs[R_EBX] = regs->rbx;
3396 env->regs[R_ECX] = regs->rcx;
3397 env->regs[R_EDX] = regs->rdx;
3398 env->regs[R_ESI] = regs->rsi;
3399 env->regs[R_EDI] = regs->rdi;
3400 env->regs[R_EBP] = regs->rbp;
3401 env->regs[R_ESP] = regs->rsp;
3402 env->eip = regs->rip;
3403#else
0ecfa993
FB		 3404 env->regs[R_EAX] = regs->eax;
3405 env->regs[R_EBX] = regs->ebx;
3406 env->regs[R_ECX] = regs->ecx;
3407 env->regs[R_EDX] = regs->edx;
3408 env->regs[R_ESI] = regs->esi;
3409 env->regs[R_EDI] = regs->edi;
3410 env->regs[R_EBP] = regs->ebp;
3411 env->regs[R_ESP] = regs->esp;
dab2ed99 3412 env->eip = regs->eip;
84409ddb 3413#endif
31e31b8a 3414
f4beb510 3415 /* linux interrupt setup */
e441570f
AZ		 3416#ifndef TARGET_ABI32
3417 env->idt.limit = 511;
3418#else
3419 env->idt.limit = 255;
3420#endif
3421 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
3422 PROT_READ|PROT_WRITE,
3423 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3424 idt_table = g2h(env->idt.base);
f4beb510
FB		 3425 set_idt(0, 0);
3426 set_idt(1, 0);
3427 set_idt(2, 0);
3428 set_idt(3, 3);
3429 set_idt(4, 3);
ec95da6c 3430 set_idt(5, 0);
f4beb510
FB		 3431 set_idt(6, 0);
3432 set_idt(7, 0);
3433 set_idt(8, 0);
3434 set_idt(9, 0);
3435 set_idt(10, 0);
3436 set_idt(11, 0);
3437 set_idt(12, 0);
3438 set_idt(13, 0);
3439 set_idt(14, 0);
3440 set_idt(15, 0);
3441 set_idt(16, 0);
3442 set_idt(17, 0);
3443 set_idt(18, 0);
3444 set_idt(19, 0);
3445 set_idt(0x80, 3);
3446
6dbad63e 3447 /* linux segment setup */
8d18e893
FB		 3448 {
3449 uint64_t *gdt_table;
e441570f
AZ		 3450 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
3451 PROT_READ|PROT_WRITE,
3452 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 3453 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 3454 gdt_table = g2h(env->gdt.base);
d2fd1af7 3455#ifdef TARGET_ABI32
8d18e893
FB		 3456 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3457 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3458 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 3459#else
3460 /* 64 bit code segment */
3461 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3462 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3463 DESC_L_MASK |
3464 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3465#endif
8d18e893
FB		 3466 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
3467 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3468 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
3469 }
6dbad63e 3470 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 3471 cpu_x86_load_seg(env, R_SS, __USER_DS);
3472#ifdef TARGET_ABI32
6dbad63e
FB		 3473 cpu_x86_load_seg(env, R_DS, __USER_DS);
3474 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 3475 cpu_x86_load_seg(env, R_FS, __USER_DS);
3476 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 3477 /* This hack makes Wine work... */
3478 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 3479#else
3480 cpu_x86_load_seg(env, R_DS, 0);
3481 cpu_x86_load_seg(env, R_ES, 0);
3482 cpu_x86_load_seg(env, R_FS, 0);
3483 cpu_x86_load_seg(env, R_GS, 0);
3484#endif
b346ff46
FB		 3485#elif defined(TARGET_ARM)
3486 {
3487 int i;
b5ff1b31 3488 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 3489 for(i = 0; i < 16; i++) {
3490 env->regs[i] = regs->uregs[i];
3491 }
b346ff46 3492 }
d2fbca94
GX		 3493#elif defined(TARGET_UNICORE32)
3494 {
3495 int i;
3496 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
3497 for (i = 0; i < 32; i++) {
3498 env->regs[i] = regs->uregs[i];
3499 }
3500 }
93ac68bc 3501#elif defined(TARGET_SPARC)
060366c5
FB		 3502 {
3503 int i;
3504 env->pc = regs->pc;
3505 env->npc = regs->npc;
3506 env->y = regs->y;
3507 for(i = 0; i < 8; i++)
3508 env->gregs[i] = regs->u_regs[i];
3509 for(i = 0; i < 8; i++)
3510 env->regwptr[i] = regs->u_regs[i + 8];
3511 }
67867308
FB		 3512#elif defined(TARGET_PPC)
3513 {
3514 int i;
3fc6c082 3515
0411a972
JM		 3516#if defined(TARGET_PPC64)
3517#if defined(TARGET_ABI32)
3518 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 3519#else
0411a972
JM		 3520 env->msr |= (target_ulong)1 << MSR_SF;
3521#endif
84409ddb 3522#endif
67867308
FB		 3523 env->nip = regs->nip;
3524 for(i = 0; i < 32; i++) {
3525 env->gpr[i] = regs->gpr[i];
3526 }
3527 }
e6e5906b
PB		 3528#elif defined(TARGET_M68K)
3529 {
e6e5906b
PB		 3530 env->pc = regs->pc;
3531 env->dregs[0] = regs->d0;
3532 env->dregs[1] = regs->d1;
3533 env->dregs[2] = regs->d2;
3534 env->dregs[3] = regs->d3;
3535 env->dregs[4] = regs->d4;
3536 env->dregs[5] = regs->d5;
3537 env->dregs[6] = regs->d6;
3538 env->dregs[7] = regs->d7;
3539 env->aregs[0] = regs->a0;
3540 env->aregs[1] = regs->a1;
3541 env->aregs[2] = regs->a2;
3542 env->aregs[3] = regs->a3;
3543 env->aregs[4] = regs->a4;
3544 env->aregs[5] = regs->a5;
3545 env->aregs[6] = regs->a6;
3546 env->aregs[7] = regs->usp;
3547 env->sr = regs->sr;
3548 ts->sim_syscalls = 1;
3549 }
b779e29e
EI		 3550#elif defined(TARGET_MICROBLAZE)
3551 {
3552 env->regs[0] = regs->r0;
3553 env->regs[1] = regs->r1;
3554 env->regs[2] = regs->r2;
3555 env->regs[3] = regs->r3;
3556 env->regs[4] = regs->r4;
3557 env->regs[5] = regs->r5;
3558 env->regs[6] = regs->r6;
3559 env->regs[7] = regs->r7;
3560 env->regs[8] = regs->r8;
3561 env->regs[9] = regs->r9;
3562 env->regs[10] = regs->r10;
3563 env->regs[11] = regs->r11;
3564 env->regs[12] = regs->r12;
3565 env->regs[13] = regs->r13;
3566 env->regs[14] = regs->r14;
3567 env->regs[15] = regs->r15;
3568 env->regs[16] = regs->r16;
3569 env->regs[17] = regs->r17;
3570 env->regs[18] = regs->r18;
3571 env->regs[19] = regs->r19;
3572 env->regs[20] = regs->r20;
3573 env->regs[21] = regs->r21;
3574 env->regs[22] = regs->r22;
3575 env->regs[23] = regs->r23;
3576 env->regs[24] = regs->r24;
3577 env->regs[25] = regs->r25;
3578 env->regs[26] = regs->r26;
3579 env->regs[27] = regs->r27;
3580 env->regs[28] = regs->r28;
3581 env->regs[29] = regs->r29;
3582 env->regs[30] = regs->r30;
3583 env->regs[31] = regs->r31;
3584 env->sregs[SR_PC] = regs->pc;
3585 }
048f6b4d
FB		 3586#elif defined(TARGET_MIPS)
3587 {
3588 int i;
3589
3590 for(i = 0; i < 32; i++) {
b5dc7732 3591 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 3592 }
0fddbbf2
NF		 3593 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
3594 if (regs->cp0_epc & 1) {
3595 env->hflags |= MIPS_HFLAG_M16;
3596 }
048f6b4d 3597 }
fdf9b3e8
FB		 3598#elif defined(TARGET_SH4)
3599 {
3600 int i;
3601
3602 for(i = 0; i < 16; i++) {
3603 env->gregs[i] = regs->regs[i];
3604 }
3605 env->pc = regs->pc;
3606 }
7a3148a9
JM		 3607#elif defined(TARGET_ALPHA)
3608 {
3609 int i;
3610
3611 for(i = 0; i < 28; i++) {
992f48a0 3612 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9 3613 }
dad081ee 3614 env->ir[IR_SP] = regs->usp;
7a3148a9 3615 env->pc = regs->pc;
7a3148a9 3616 }
48733d19
TS		 3617#elif defined(TARGET_CRIS)
3618 {
3619 env->regs[0] = regs->r0;
3620 env->regs[1] = regs->r1;
3621 env->regs[2] = regs->r2;
3622 env->regs[3] = regs->r3;
3623 env->regs[4] = regs->r4;
3624 env->regs[5] = regs->r5;
3625 env->regs[6] = regs->r6;
3626 env->regs[7] = regs->r7;
3627 env->regs[8] = regs->r8;
3628 env->regs[9] = regs->r9;
3629 env->regs[10] = regs->r10;
3630 env->regs[11] = regs->r11;
3631 env->regs[12] = regs->r12;
3632 env->regs[13] = regs->r13;
3633 env->regs[14] = info->start_stack;
3634 env->regs[15] = regs->acr;
3635 env->pc = regs->erp;
3636 }
a4c075f1
UH		 3637#elif defined(TARGET_S390X)
3638 {
3639 int i;
3640 for (i = 0; i < 16; i++) {
3641 env->regs[i] = regs->gprs[i];
3642 }
3643 env->psw.mask = regs->psw.mask;
3644 env->psw.addr = regs->psw.addr;
3645 }
b346ff46
FB		 3646#else
3647#error unsupported target CPU
3648#endif
31e31b8a 3649
d2fbca94 3650#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
a87295e8
PB		 3651 ts->stack_base = info->start_stack;
3652 ts->heap_base = info->brk;
3653 /* This will be filled in on the first SYS_HEAPINFO call. */
3654 ts->heap_limit = 0;
3655#endif
3656
74c33bed
FB		 3657 if (gdbstub_port) {
3658 gdbserver_start (gdbstub_port);
1fddef4b
FB		 3659 gdb_handlesig(env, 0);
3660 }
1b6b029e
FB		 3661 cpu_loop(env);
3662 /* never exits */
31e31b8a
FB		 3663 return 0;
3664}
Qemu copy for testing