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linux-user: fix emulation of getdents
[qemu.git] / linux-user / main.c
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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a
FB		 18 */
19#include <stdlib.h>
20#include <stdio.h>
21#include <stdarg.h>
04369ff2 22#include <string.h>
31e31b8a 23#include <errno.h>
0ecfa993 24#include <unistd.h>
e441570f 25#include <sys/mman.h>
edf8e2af 26#include <sys/syscall.h>
703e0e89 27#include <sys/resource.h>
31e31b8a 28
3ef693a0 29#include "qemu.h"
ca10f867 30#include "qemu-common.h"
902b3d5c 31#include "cache-utils.h"
2b41f10e 32#include "cpu.h"
9002ec79 33#include "tcg.h"
29e922b6 34#include "qemu-timer.h"
04a6dfeb 35#include "envlist.h"
d8fd2954 36#include "elf.h"
04a6dfeb 37
3ef693a0 38#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 39
d088d664
AJ		 40char *exec_path;
41
1b530a6d 42int singlestep;
fc9c5412
JS		 43const char *filename;
44const char *argv0;
45int gdbstub_port;
46envlist_t *envlist;
47const char *cpu_model;
379f6698 48unsigned long mmap_min_addr;
14f24e14 49#if defined(CONFIG_USE_GUEST_BASE)
379f6698
PB		 50unsigned long guest_base;
51int have_guest_base;
288e65b9
AG		 52#if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
53/*
54 * When running 32-on-64 we should make sure we can fit all of the possible
55 * guest address space into a contiguous chunk of virtual host memory.
56 *
57 * This way we will never overlap with our own libraries or binaries or stack
58 * or anything else that QEMU maps.
59 */
60unsigned long reserved_va = 0xf7000000;
61#else
68a1c816 62unsigned long reserved_va;
379f6698 63#endif
288e65b9 64#endif
1b530a6d 65
fc9c5412
JS		 66static void usage(void);
67
7ee2822c 68static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
c5937220 69const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 70
9de5e440
FB		 71/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
72 we allocate a bigger stack. Need a better solution, for example
73 by remapping the process stack directly at the right place */
703e0e89 74unsigned long guest_stack_size = 8 * 1024 * 1024UL;
31e31b8a
FB		 75
76void gemu_log(const char *fmt, ...)
77{
78 va_list ap;
79
80 va_start(ap, fmt);
81 vfprintf(stderr, fmt, ap);
82 va_end(ap);
83}
84
8fcd3692 85#if defined(TARGET_I386)
05390248 86int cpu_get_pic_interrupt(CPUX86State *env)
92ccca6a
FB		 87{
88 return -1;
89}
8fcd3692 90#endif
92ccca6a 91
28ab0e2e
FB		 92/* timers for rdtsc */
93
1dce7c3c 94#if 0
28ab0e2e
FB		 95
96static uint64_t emu_time;
97
98int64_t cpu_get_real_ticks(void)
99{
100 return emu_time++;
101}
102
103#endif
104
2f7bb878 105#if defined(CONFIG_USE_NPTL)
d5975363
PB		 106/***********************************************************/
107/* Helper routines for implementing atomic operations. */
108
109/* To implement exclusive operations we force all cpus to syncronise.
110 We don't require a full sync, only that no cpus are executing guest code.
111 The alternative is to map target atomic ops onto host equivalents,
112 which requires quite a lot of per host/target work. */
c2764719 113static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 114static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
115static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
116static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
117static int pending_cpus;
118
119/* Make sure everything is in a consistent state for calling fork(). */
120void fork_start(void)
121{
d5975363
PB		 122 pthread_mutex_lock(&tb_lock);
123 pthread_mutex_lock(&exclusive_lock);
d032d1b4 124 mmap_fork_start();
d5975363
PB		 125}
126
127void fork_end(int child)
128{
d032d1b4 129 mmap_fork_end(child);
d5975363
PB		 130 if (child) {
131 /* Child processes created by fork() only have a single thread.
132 Discard information about the parent threads. */
133 first_cpu = thread_env;
134 thread_env->next_cpu = NULL;
135 pending_cpus = 0;
136 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 137 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 138 pthread_cond_init(&exclusive_cond, NULL);
139 pthread_cond_init(&exclusive_resume, NULL);
140 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 141 gdbserver_fork(thread_env);
d5975363
PB		 142 } else {
143 pthread_mutex_unlock(&exclusive_lock);
144 pthread_mutex_unlock(&tb_lock);
145 }
d5975363
PB		 146}
147
148/* Wait for pending exclusive operations to complete. The exclusive lock
149 must be held. */
150static inline void exclusive_idle(void)
151{
152 while (pending_cpus) {
153 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
154 }
155}
156
157/* Start an exclusive operation.
158 Must only be called from outside cpu_arm_exec. */
159static inline void start_exclusive(void)
160{
9349b4f9 161 CPUArchState *other;
d5975363
PB		 162 pthread_mutex_lock(&exclusive_lock);
163 exclusive_idle();
164
165 pending_cpus = 1;
166 /* Make all other cpus stop executing. */
167 for (other = first_cpu; other; other = other->next_cpu) {
168 if (other->running) {
169 pending_cpus++;
3098dba0 170 cpu_exit(other);
d5975363
PB		 171 }
172 }
173 if (pending_cpus > 1) {
174 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
175 }
176}
177
178/* Finish an exclusive operation. */
179static inline void end_exclusive(void)
180{
181 pending_cpus = 0;
182 pthread_cond_broadcast(&exclusive_resume);
183 pthread_mutex_unlock(&exclusive_lock);
184}
185
186/* Wait for exclusive ops to finish, and begin cpu execution. */
9349b4f9 187static inline void cpu_exec_start(CPUArchState *env)
d5975363
PB		 188{
189 pthread_mutex_lock(&exclusive_lock);
190 exclusive_idle();
191 env->running = 1;
192 pthread_mutex_unlock(&exclusive_lock);
193}
194
195/* Mark cpu as not executing, and release pending exclusive ops. */
9349b4f9 196static inline void cpu_exec_end(CPUArchState *env)
d5975363
PB		 197{
198 pthread_mutex_lock(&exclusive_lock);
199 env->running = 0;
200 if (pending_cpus > 1) {
201 pending_cpus--;
202 if (pending_cpus == 1) {
203 pthread_cond_signal(&exclusive_cond);
204 }
205 }
206 exclusive_idle();
207 pthread_mutex_unlock(&exclusive_lock);
208}
c2764719
PB		 209
210void cpu_list_lock(void)
211{
212 pthread_mutex_lock(&cpu_list_mutex);
213}
214
215void cpu_list_unlock(void)
216{
217 pthread_mutex_unlock(&cpu_list_mutex);
218}
2f7bb878 219#else /* if !CONFIG_USE_NPTL */
d5975363 220/* These are no-ops because we are not threadsafe. */
9349b4f9 221static inline void cpu_exec_start(CPUArchState *env)
d5975363
PB		 222{
223}
224
9349b4f9 225static inline void cpu_exec_end(CPUArchState *env)
d5975363
PB		 226{
227}
228
229static inline void start_exclusive(void)
230{
231}
232
233static inline void end_exclusive(void)
234{
235}
236
237void fork_start(void)
238{
239}
240
241void fork_end(int child)
242{
2b1319c8
AJ		 243 if (child) {
244 gdbserver_fork(thread_env);
245 }
d5975363 246}
c2764719
PB		 247
248void cpu_list_lock(void)
249{
250}
251
252void cpu_list_unlock(void)
253{
254}
d5975363
PB		 255#endif
256
257
a541f297
FB		 258#ifdef TARGET_I386
259/***********************************************************/
260/* CPUX86 core interface */
261
05390248 262void cpu_smm_update(CPUX86State *env)
02a1602e
FB		 263{
264}
265
28ab0e2e
FB		 266uint64_t cpu_get_tsc(CPUX86State *env)
267{
268 return cpu_get_real_ticks();
269}
270
5fafdf24 271static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 272 int flags)
6dbad63e 273{
f4beb510 274 unsigned int e1, e2;
53a5960a 275 uint32_t *p;
6dbad63e
FB		 276 e1 = (addr << 16) | (limit & 0xffff);
277 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 278 e2 |= flags;
53a5960a 279 p = ptr;
d538e8f5 280 p[0] = tswap32(e1);
281 p[1] = tswap32(e2);
f4beb510
FB		 282}
283
e441570f 284static uint64_t *idt_table;
eb38c52c 285#ifdef TARGET_X86_64
d2fd1af7
FB		 286static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
287 uint64_t addr, unsigned int sel)
f4beb510 288{
4dbc422b 289 uint32_t *p, e1, e2;
f4beb510
FB		 290 e1 = (addr & 0xffff) | (sel << 16);
291 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 292 p = ptr;
4dbc422b
FB		 293 p[0] = tswap32(e1);
294 p[1] = tswap32(e2);
295 p[2] = tswap32(addr >> 32);
296 p[3] = 0;
6dbad63e 297}
d2fd1af7
FB		 298/* only dpl matters as we do only user space emulation */
299static void set_idt(int n, unsigned int dpl)
300{
301 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
302}
303#else
d2fd1af7
FB		 304static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
305 uint32_t addr, unsigned int sel)
306{
4dbc422b 307 uint32_t *p, e1, e2;
d2fd1af7
FB		 308 e1 = (addr & 0xffff) | (sel << 16);
309 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
310 p = ptr;
4dbc422b
FB		 311 p[0] = tswap32(e1);
312 p[1] = tswap32(e2);
d2fd1af7
FB		 313}
314
f4beb510
FB		 315/* only dpl matters as we do only user space emulation */
316static void set_idt(int n, unsigned int dpl)
317{
318 set_gate(idt_table + n, 0, dpl, 0, 0);
319}
d2fd1af7 320#endif
31e31b8a 321
89e957e7 322void cpu_loop(CPUX86State *env)
1b6b029e 323{
bc8a22cc 324 int trapnr;
992f48a0 325 abi_ulong pc;
c227f099 326 target_siginfo_t info;
851e67a1 327
1b6b029e 328 for(;;) {
bc8a22cc 329 trapnr = cpu_x86_exec(env);
bc8a22cc 330 switch(trapnr) {
f4beb510 331 case 0x80:
d2fd1af7 332 /* linux syscall from int $0x80 */
5fafdf24
TS		 333 env->regs[R_EAX] = do_syscall(env,
334 env->regs[R_EAX],
f4beb510
FB		 335 env->regs[R_EBX],
336 env->regs[R_ECX],
337 env->regs[R_EDX],
338 env->regs[R_ESI],
339 env->regs[R_EDI],
5945cfcb
PM		 340 env->regs[R_EBP],
341 0, 0);
f4beb510 342 break;
d2fd1af7
FB		 343#ifndef TARGET_ABI32
344 case EXCP_SYSCALL:
5ba18547 345 /* linux syscall from syscall instruction */
d2fd1af7
FB		 346 env->regs[R_EAX] = do_syscall(env,
347 env->regs[R_EAX],
348 env->regs[R_EDI],
349 env->regs[R_ESI],
350 env->regs[R_EDX],
351 env->regs[10],
352 env->regs[8],
5945cfcb
PM		 353 env->regs[9],
354 0, 0);
d2fd1af7
FB		 355 env->eip = env->exception_next_eip;
356 break;
357#endif
f4beb510
FB		 358 case EXCP0B_NOSEG:
359 case EXCP0C_STACK:
360 info.si_signo = SIGBUS;
361 info.si_errno = 0;
362 info.si_code = TARGET_SI_KERNEL;
363 info._sifields._sigfault._addr = 0;
624f7979 364 queue_signal(env, info.si_signo, &info);
f4beb510 365 break;
1b6b029e 366 case EXCP0D_GPF:
d2fd1af7 367 /* XXX: potential problem if ABI32 */
84409ddb 368#ifndef TARGET_X86_64
851e67a1 369 if (env->eflags & VM_MASK) {
89e957e7 370 handle_vm86_fault(env);
84409ddb
JM		 371 } else
372#endif
373 {
f4beb510
FB		 374 info.si_signo = SIGSEGV;
375 info.si_errno = 0;
376 info.si_code = TARGET_SI_KERNEL;
377 info._sifields._sigfault._addr = 0;
624f7979 378 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 379 }
380 break;
b689bc57
FB		 381 case EXCP0E_PAGE:
382 info.si_signo = SIGSEGV;
383 info.si_errno = 0;
384 if (!(env->error_code & 1))
385 info.si_code = TARGET_SEGV_MAPERR;
386 else
387 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 388 info._sifields._sigfault._addr = env->cr[2];
624f7979 389 queue_signal(env, info.si_signo, &info);
b689bc57 390 break;
9de5e440 391 case EXCP00_DIVZ:
84409ddb 392#ifndef TARGET_X86_64
bc8a22cc 393 if (env->eflags & VM_MASK) {
447db213 394 handle_vm86_trap(env, trapnr);
84409ddb
JM		 395 } else
396#endif
397 {
bc8a22cc
FB		 398 /* division by zero */
399 info.si_signo = SIGFPE;
400 info.si_errno = 0;
401 info.si_code = TARGET_FPE_INTDIV;
402 info._sifields._sigfault._addr = env->eip;
624f7979 403 queue_signal(env, info.si_signo, &info);
bc8a22cc 404 }
9de5e440 405 break;
01df040b 406 case EXCP01_DB:
447db213 407 case EXCP03_INT3:
84409ddb 408#ifndef TARGET_X86_64
447db213
FB		 409 if (env->eflags & VM_MASK) {
410 handle_vm86_trap(env, trapnr);
84409ddb
JM		 411 } else
412#endif
413 {
447db213
FB		 414 info.si_signo = SIGTRAP;
415 info.si_errno = 0;
01df040b 416 if (trapnr == EXCP01_DB) {
447db213
FB		 417 info.si_code = TARGET_TRAP_BRKPT;
418 info._sifields._sigfault._addr = env->eip;
419 } else {
420 info.si_code = TARGET_SI_KERNEL;
421 info._sifields._sigfault._addr = 0;
422 }
624f7979 423 queue_signal(env, info.si_signo, &info);
447db213
FB		 424 }
425 break;
9de5e440
FB		 426 case EXCP04_INTO:
427 case EXCP05_BOUND:
84409ddb 428#ifndef TARGET_X86_64
bc8a22cc 429 if (env->eflags & VM_MASK) {
447db213 430 handle_vm86_trap(env, trapnr);
84409ddb
JM		 431 } else
432#endif
433 {
bc8a22cc
FB		 434 info.si_signo = SIGSEGV;
435 info.si_errno = 0;
b689bc57 436 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 437 info._sifields._sigfault._addr = 0;
624f7979 438 queue_signal(env, info.si_signo, &info);
bc8a22cc 439 }
9de5e440
FB		 440 break;
441 case EXCP06_ILLOP:
442 info.si_signo = SIGILL;
443 info.si_errno = 0;
444 info.si_code = TARGET_ILL_ILLOPN;
445 info._sifields._sigfault._addr = env->eip;
624f7979 446 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 447 break;
448 case EXCP_INTERRUPT:
449 /* just indicate that signals should be handled asap */
450 break;
1fddef4b
FB		 451 case EXCP_DEBUG:
452 {
453 int sig;
454
455 sig = gdb_handlesig (env, TARGET_SIGTRAP);
456 if (sig)
457 {
458 info.si_signo = sig;
459 info.si_errno = 0;
460 info.si_code = TARGET_TRAP_BRKPT;
624f7979 461 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 462 }
463 }
464 break;
1b6b029e 465 default:
970a87a6 466 pc = env->segs[R_CS].base + env->eip;
5fafdf24 467 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 468 (long)pc, trapnr);
1b6b029e
FB		 469 abort();
470 }
66fb9763 471 process_pending_signals(env);
1b6b029e
FB		 472 }
473}
b346ff46
FB		 474#endif
475
476#ifdef TARGET_ARM
477
d8fd2954
PB		 478#define get_user_code_u32(x, gaddr, doswap) \
479 ({ abi_long __r = get_user_u32((x), (gaddr)); \
480 if (!__r && (doswap)) { \
481 (x) = bswap32(x); \
482 } \
483 __r; \
484 })
485
486#define get_user_code_u16(x, gaddr, doswap) \
487 ({ abi_long __r = get_user_u16((x), (gaddr)); \
488 if (!__r && (doswap)) { \
489 (x) = bswap16(x); \
490 } \
491 __r; \
492 })
493
97cc7560
DDAG		 494/*
495 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
496 * Input:
497 * r0 = pointer to oldval
498 * r1 = pointer to newval
499 * r2 = pointer to target value
500 *
501 * Output:
502 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
503 * C set if *ptr was changed, clear if no exchange happened
504 *
505 * Note segv's in kernel helpers are a bit tricky, we can set the
506 * data address sensibly but the PC address is just the entry point.
507 */
508static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
509{
510 uint64_t oldval, newval, val;
511 uint32_t addr, cpsr;
512 target_siginfo_t info;
513
514 /* Based on the 32 bit code in do_kernel_trap */
515
516 /* XXX: This only works between threads, not between processes.
517 It's probably possible to implement this with native host
518 operations. However things like ldrex/strex are much harder so
519 there's not much point trying. */
520 start_exclusive();
521 cpsr = cpsr_read(env);
522 addr = env->regs[2];
523
524 if (get_user_u64(oldval, env->regs[0])) {
525 env->cp15.c6_data = env->regs[0];
526 goto segv;
527 };
528
529 if (get_user_u64(newval, env->regs[1])) {
530 env->cp15.c6_data = env->regs[1];
531 goto segv;
532 };
533
534 if (get_user_u64(val, addr)) {
535 env->cp15.c6_data = addr;
536 goto segv;
537 }
538
539 if (val == oldval) {
540 val = newval;
541
542 if (put_user_u64(val, addr)) {
543 env->cp15.c6_data = addr;
544 goto segv;
545 };
546
547 env->regs[0] = 0;
548 cpsr |= CPSR_C;
549 } else {
550 env->regs[0] = -1;
551 cpsr &= ~CPSR_C;
552 }
553 cpsr_write(env, cpsr, CPSR_C);
554 end_exclusive();
555 return;
556
557segv:
558 end_exclusive();
559 /* We get the PC of the entry address - which is as good as anything,
560 on a real kernel what you get depends on which mode it uses. */
561 info.si_signo = SIGSEGV;
562 info.si_errno = 0;
563 /* XXX: check env->error_code */
564 info.si_code = TARGET_SEGV_MAPERR;
565 info._sifields._sigfault._addr = env->cp15.c6_data;
566 queue_signal(env, info.si_signo, &info);
567
568 end_exclusive();
569}
570
fbb4a2e3
PB		 571/* Handle a jump to the kernel code page. */
572static int
573do_kernel_trap(CPUARMState *env)
574{
575 uint32_t addr;
576 uint32_t cpsr;
577 uint32_t val;
578
579 switch (env->regs[15]) {
580 case 0xffff0fa0: /* __kernel_memory_barrier */
581 /* ??? No-op. Will need to do better for SMP. */
582 break;
583 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 584 /* XXX: This only works between threads, not between processes.
585 It's probably possible to implement this with native host
586 operations. However things like ldrex/strex are much harder so
587 there's not much point trying. */
588 start_exclusive();
fbb4a2e3
PB		 589 cpsr = cpsr_read(env);
590 addr = env->regs[2];
591 /* FIXME: This should SEGV if the access fails. */
592 if (get_user_u32(val, addr))
593 val = ~env->regs[0];
594 if (val == env->regs[0]) {
595 val = env->regs[1];
596 /* FIXME: Check for segfaults. */
597 put_user_u32(val, addr);
598 env->regs[0] = 0;
599 cpsr |= CPSR_C;
600 } else {
601 env->regs[0] = -1;
602 cpsr &= ~CPSR_C;
603 }
604 cpsr_write(env, cpsr, CPSR_C);
d5975363 605 end_exclusive();
fbb4a2e3
PB		 606 break;
607 case 0xffff0fe0: /* __kernel_get_tls */
608 env->regs[0] = env->cp15.c13_tls2;
609 break;
97cc7560
DDAG		 610 case 0xffff0f60: /* __kernel_cmpxchg64 */
611 arm_kernel_cmpxchg64_helper(env);
612 break;
613
fbb4a2e3
PB		 614 default:
615 return 1;
616 }
617 /* Jump back to the caller. */
618 addr = env->regs[14];
619 if (addr & 1) {
620 env->thumb = 1;
621 addr &= ~1;
622 }
623 env->regs[15] = addr;
624
625 return 0;
626}
627
426f5abc
PB		 628static int do_strex(CPUARMState *env)
629{
630 uint32_t val;
631 int size;
632 int rc = 1;
633 int segv = 0;
634 uint32_t addr;
635 start_exclusive();
636 addr = env->exclusive_addr;
637 if (addr != env->exclusive_test) {
638 goto fail;
639 }
640 size = env->exclusive_info & 0xf;
641 switch (size) {
642 case 0:
643 segv = get_user_u8(val, addr);
644 break;
645 case 1:
646 segv = get_user_u16(val, addr);
647 break;
648 case 2:
649 case 3:
650 segv = get_user_u32(val, addr);
651 break;
f7001a3b
AJ		 652 default:
653 abort();
426f5abc
PB		 654 }
655 if (segv) {
656 env->cp15.c6_data = addr;
657 goto done;
658 }
659 if (val != env->exclusive_val) {
660 goto fail;
661 }
662 if (size == 3) {
663 segv = get_user_u32(val, addr + 4);
664 if (segv) {
665 env->cp15.c6_data = addr + 4;
666 goto done;
667 }
668 if (val != env->exclusive_high) {
669 goto fail;
670 }
671 }
672 val = env->regs[(env->exclusive_info >> 8) & 0xf];
673 switch (size) {
674 case 0:
675 segv = put_user_u8(val, addr);
676 break;
677 case 1:
678 segv = put_user_u16(val, addr);
679 break;
680 case 2:
681 case 3:
682 segv = put_user_u32(val, addr);
683 break;
684 }
685 if (segv) {
686 env->cp15.c6_data = addr;
687 goto done;
688 }
689 if (size == 3) {
690 val = env->regs[(env->exclusive_info >> 12) & 0xf];
2c9adbda 691 segv = put_user_u32(val, addr + 4);
426f5abc
PB		 692 if (segv) {
693 env->cp15.c6_data = addr + 4;
694 goto done;
695 }
696 }
697 rc = 0;
698fail:
725b8a69 699 env->regs[15] += 4;
426f5abc
PB		 700 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
701done:
702 end_exclusive();
703 return segv;
704}
705
b346ff46
FB		 706void cpu_loop(CPUARMState *env)
707{
708 int trapnr;
709 unsigned int n, insn;
c227f099 710 target_siginfo_t info;
b5ff1b31 711 uint32_t addr;
3b46e624 712
b346ff46 713 for(;;) {
d5975363 714 cpu_exec_start(env);
b346ff46 715 trapnr = cpu_arm_exec(env);
d5975363 716 cpu_exec_end(env);
b346ff46
FB		 717 switch(trapnr) {
718 case EXCP_UDEF:
c6981055
FB		 719 {
720 TaskState *ts = env->opaque;
721 uint32_t opcode;
6d9a42be 722 int rc;
c6981055
FB		 723
724 /* we handle the FPU emulation here, as Linux */
725 /* we get the opcode */
2f619698 726 /* FIXME - what to do if get_user() fails? */
d8fd2954 727 get_user_code_u32(opcode, env->regs[15], env->bswap_code);
3b46e624 728
6d9a42be
AJ		 729 rc = EmulateAll(opcode, &ts->fpa, env);
730 if (rc == 0) { /* illegal instruction */
c6981055
FB		 731 info.si_signo = SIGILL;
732 info.si_errno = 0;
733 info.si_code = TARGET_ILL_ILLOPN;
734 info._sifields._sigfault._addr = env->regs[15];
624f7979 735 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 736 } else if (rc < 0) { /* FP exception */
737 int arm_fpe=0;
738
739 /* translate softfloat flags to FPSR flags */
740 if (-rc & float_flag_invalid)
741 arm_fpe |= BIT_IOC;
742 if (-rc & float_flag_divbyzero)
743 arm_fpe |= BIT_DZC;
744 if (-rc & float_flag_overflow)
745 arm_fpe |= BIT_OFC;
746 if (-rc & float_flag_underflow)
747 arm_fpe |= BIT_UFC;
748 if (-rc & float_flag_inexact)
749 arm_fpe |= BIT_IXC;
750
751 FPSR fpsr = ts->fpa.fpsr;
752 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
753
754 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
755 info.si_signo = SIGFPE;
756 info.si_errno = 0;
757
758 /* ordered by priority, least first */
759 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
760 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
761 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
762 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
763 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
764
765 info._sifields._sigfault._addr = env->regs[15];
624f7979 766 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 767 } else {
768 env->regs[15] += 4;
769 }
770
771 /* accumulate unenabled exceptions */
772 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
773 fpsr |= BIT_IXC;
774 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
775 fpsr |= BIT_UFC;
776 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
777 fpsr |= BIT_OFC;
778 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
779 fpsr |= BIT_DZC;
780 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
781 fpsr |= BIT_IOC;
782 ts->fpa.fpsr=fpsr;
783 } else { /* everything OK */
c6981055
FB		 784 /* increment PC */
785 env->regs[15] += 4;
786 }
787 }
b346ff46
FB		 788 break;
789 case EXCP_SWI:
06c949e6 790 case EXCP_BKPT:
b346ff46 791 {
ce4defa0 792 env->eabi = 1;
b346ff46 793 /* system call */
06c949e6
PB		 794 if (trapnr == EXCP_BKPT) {
795 if (env->thumb) {
2f619698 796 /* FIXME - what to do if get_user() fails? */
d8fd2954 797 get_user_code_u16(insn, env->regs[15], env->bswap_code);
06c949e6
PB		 798 n = insn & 0xff;
799 env->regs[15] += 2;
800 } else {
2f619698 801 /* FIXME - what to do if get_user() fails? */
d8fd2954 802 get_user_code_u32(insn, env->regs[15], env->bswap_code);
06c949e6
PB		 803 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
804 env->regs[15] += 4;
805 }
192c7bd9 806 } else {
06c949e6 807 if (env->thumb) {
2f619698 808 /* FIXME - what to do if get_user() fails? */
d8fd2954
PB		 809 get_user_code_u16(insn, env->regs[15] - 2,
810 env->bswap_code);
06c949e6
PB		 811 n = insn & 0xff;
812 } else {
2f619698 813 /* FIXME - what to do if get_user() fails? */
d8fd2954
PB		 814 get_user_code_u32(insn, env->regs[15] - 4,
815 env->bswap_code);
06c949e6
PB		 816 n = insn & 0xffffff;
817 }
192c7bd9
FB		 818 }
819
6f1f31c0 820 if (n == ARM_NR_cacheflush) {
dcfd14b3 821 /* nop */
a4f81979
FB		 822 } else if (n == ARM_NR_semihosting
823 || n == ARM_NR_thumb_semihosting) {
824 env->regs[0] = do_arm_semihosting (env);
3a1363ac 825 } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) {
b346ff46 826 /* linux syscall */
ce4defa0 827 if (env->thumb || n == 0) {
192c7bd9
FB		 828 n = env->regs[7];
829 } else {
830 n -= ARM_SYSCALL_BASE;
ce4defa0 831 env->eabi = 0;
192c7bd9 832 }
fbb4a2e3
PB		 833 if ( n > ARM_NR_BASE) {
834 switch (n) {
835 case ARM_NR_cacheflush:
dcfd14b3 836 /* nop */
fbb4a2e3
PB		 837 break;
838 case ARM_NR_set_tls:
839 cpu_set_tls(env, env->regs[0]);
840 env->regs[0] = 0;
841 break;
842 default:
843 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
844 n);
845 env->regs[0] = -TARGET_ENOSYS;
846 break;
847 }
848 } else {
849 env->regs[0] = do_syscall(env,
850 n,
851 env->regs[0],
852 env->regs[1],
853 env->regs[2],
854 env->regs[3],
855 env->regs[4],
5945cfcb
PM		 856 env->regs[5],
857 0, 0);
fbb4a2e3 858 }
b346ff46
FB		 859 } else {
860 goto error;
861 }
862 }
863 break;
43fff238
FB		 864 case EXCP_INTERRUPT:
865 /* just indicate that signals should be handled asap */
866 break;
68016c62 867 case EXCP_PREFETCH_ABORT:
eae473c1 868 addr = env->cp15.c6_insn;
b5ff1b31 869 goto do_segv;
68016c62 870 case EXCP_DATA_ABORT:
eae473c1 871 addr = env->cp15.c6_data;
b5ff1b31 872 do_segv:
68016c62
FB		 873 {
874 info.si_signo = SIGSEGV;
875 info.si_errno = 0;
876 /* XXX: check env->error_code */
877 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 878 info._sifields._sigfault._addr = addr;
624f7979 879 queue_signal(env, info.si_signo, &info);
68016c62
FB		 880 }
881 break;
1fddef4b
FB		 882 case EXCP_DEBUG:
883 {
884 int sig;
885
886 sig = gdb_handlesig (env, TARGET_SIGTRAP);
887 if (sig)
888 {
889 info.si_signo = sig;
890 info.si_errno = 0;
891 info.si_code = TARGET_TRAP_BRKPT;
624f7979 892 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 893 }
894 }
895 break;
fbb4a2e3
PB		 896 case EXCP_KERNEL_TRAP:
897 if (do_kernel_trap(env))
898 goto error;
899 break;
426f5abc
PB		 900 case EXCP_STREX:
901 if (do_strex(env)) {
902 addr = env->cp15.c6_data;
903 goto do_segv;
904 }
e9273455 905 break;
b346ff46
FB		 906 default:
907 error:
5fafdf24 908 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 909 trapnr);
7fe48483 910 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 911 abort();
912 }
913 process_pending_signals(env);
914 }
915}
916
917#endif
1b6b029e 918
d2fbca94
GX		 919#ifdef TARGET_UNICORE32
920
05390248 921void cpu_loop(CPUUniCore32State *env)
d2fbca94
GX		 922{
923 int trapnr;
924 unsigned int n, insn;
925 target_siginfo_t info;
926
927 for (;;) {
928 cpu_exec_start(env);
929 trapnr = uc32_cpu_exec(env);
930 cpu_exec_end(env);
931 switch (trapnr) {
932 case UC32_EXCP_PRIV:
933 {
934 /* system call */
935 get_user_u32(insn, env->regs[31] - 4);
936 n = insn & 0xffffff;
937
938 if (n >= UC32_SYSCALL_BASE) {
939 /* linux syscall */
940 n -= UC32_SYSCALL_BASE;
941 if (n == UC32_SYSCALL_NR_set_tls) {
942 cpu_set_tls(env, env->regs[0]);
943 env->regs[0] = 0;
944 } else {
945 env->regs[0] = do_syscall(env,
946 n,
947 env->regs[0],
948 env->regs[1],
949 env->regs[2],
950 env->regs[3],
951 env->regs[4],
5945cfcb
PM		 952 env->regs[5],
953 0, 0);
d2fbca94
GX		 954 }
955 } else {
956 goto error;
957 }
958 }
959 break;
d48813dd
GX		 960 case UC32_EXCP_DTRAP:
961 case UC32_EXCP_ITRAP:
d2fbca94
GX		 962 info.si_signo = SIGSEGV;
963 info.si_errno = 0;
964 /* XXX: check env->error_code */
965 info.si_code = TARGET_SEGV_MAPERR;
966 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
967 queue_signal(env, info.si_signo, &info);
968 break;
969 case EXCP_INTERRUPT:
970 /* just indicate that signals should be handled asap */
971 break;
972 case EXCP_DEBUG:
973 {
974 int sig;
975
976 sig = gdb_handlesig(env, TARGET_SIGTRAP);
977 if (sig) {
978 info.si_signo = sig;
979 info.si_errno = 0;
980 info.si_code = TARGET_TRAP_BRKPT;
981 queue_signal(env, info.si_signo, &info);
982 }
983 }
984 break;
985 default:
986 goto error;
987 }
988 process_pending_signals(env);
989 }
990
991error:
992 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
993 cpu_dump_state(env, stderr, fprintf, 0);
994 abort();
995}
996#endif
997
93ac68bc 998#ifdef TARGET_SPARC
ed23fbd9 999#define SPARC64_STACK_BIAS 2047
93ac68bc 1000
060366c5
FB		 1001//#define DEBUG_WIN
1002
2623cbaf
FB		 1003/* WARNING: dealing with register windows _is_ complicated. More info
1004 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 1005static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
1006{
1a14026e 1007 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 1008 /* wrap handling : if cwp is on the last window, then we use the
1009 registers 'after' the end */
1a14026e
BS		 1010 if (index < 8 && env->cwp == env->nwindows - 1)
1011 index += 16 * env->nwindows;
060366c5
FB		 1012 return index;
1013}
1014
2623cbaf
FB		 1015/* save the register window 'cwp1' */
1016static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 1017{
2623cbaf 1018 unsigned int i;
992f48a0 1019 abi_ulong sp_ptr;
3b46e624 1020
53a5960a 1021 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 1022#ifdef TARGET_SPARC64
1023 if (sp_ptr & 3)
1024 sp_ptr += SPARC64_STACK_BIAS;
1025#endif
060366c5 1026#if defined(DEBUG_WIN)
2daf0284
BS		 1027 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
1028 sp_ptr, cwp1);
060366c5 1029#endif
2623cbaf 1030 for(i = 0; i < 16; i++) {
2f619698
FB		 1031 /* FIXME - what to do if put_user() fails? */
1032 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 1033 sp_ptr += sizeof(abi_ulong);
2623cbaf 1034 }
060366c5
FB		 1035}
1036
1037static void save_window(CPUSPARCState *env)
1038{
5ef54116 1039#ifndef TARGET_SPARC64
2623cbaf 1040 unsigned int new_wim;
1a14026e
BS		 1041 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
1042 ((1LL << env->nwindows) - 1);
1043 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 1044 env->wim = new_wim;
5ef54116 1045#else
1a14026e 1046 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 1047 env->cansave++;
1048 env->canrestore--;
1049#endif
060366c5
FB		 1050}
1051
1052static void restore_window(CPUSPARCState *env)
1053{
eda52953
BS		 1054#ifndef TARGET_SPARC64
1055 unsigned int new_wim;
1056#endif
1057 unsigned int i, cwp1;
992f48a0 1058 abi_ulong sp_ptr;
3b46e624 1059
eda52953 1060#ifndef TARGET_SPARC64
1a14026e
BS		 1061 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1062 ((1LL << env->nwindows) - 1);
eda52953 1063#endif
3b46e624 1064
060366c5 1065 /* restore the invalid window */
1a14026e 1066 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 1067 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 1068#ifdef TARGET_SPARC64
1069 if (sp_ptr & 3)
1070 sp_ptr += SPARC64_STACK_BIAS;
1071#endif
060366c5 1072#if defined(DEBUG_WIN)
2daf0284
BS		 1073 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1074 sp_ptr, cwp1);
060366c5 1075#endif
2623cbaf 1076 for(i = 0; i < 16; i++) {
2f619698
FB		 1077 /* FIXME - what to do if get_user() fails? */
1078 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 1079 sp_ptr += sizeof(abi_ulong);
2623cbaf 1080 }
5ef54116
FB		 1081#ifdef TARGET_SPARC64
1082 env->canrestore++;
1a14026e
BS		 1083 if (env->cleanwin < env->nwindows - 1)
1084 env->cleanwin++;
5ef54116 1085 env->cansave--;
eda52953
BS		 1086#else
1087 env->wim = new_wim;
5ef54116 1088#endif
060366c5
FB		 1089}
1090
1091static void flush_windows(CPUSPARCState *env)
1092{
1093 int offset, cwp1;
2623cbaf
FB		 1094
1095 offset = 1;
060366c5
FB		 1096 for(;;) {
1097 /* if restore would invoke restore_window(), then we can stop */
1a14026e 1098 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 1099#ifndef TARGET_SPARC64
060366c5
FB		 1100 if (env->wim & (1 << cwp1))
1101 break;
eda52953
BS		 1102#else
1103 if (env->canrestore == 0)
1104 break;
1105 env->cansave++;
1106 env->canrestore--;
1107#endif
2623cbaf 1108 save_window_offset(env, cwp1);
060366c5
FB		 1109 offset++;
1110 }
1a14026e 1111 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 1112#ifndef TARGET_SPARC64
1113 /* set wim so that restore will reload the registers */
2623cbaf 1114 env->wim = 1 << cwp1;
eda52953 1115#endif
2623cbaf
FB		 1116#if defined(DEBUG_WIN)
1117 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 1118#endif
2623cbaf 1119}
060366c5 1120
93ac68bc
FB		 1121void cpu_loop (CPUSPARCState *env)
1122{
2cc20260
RH		 1123 int trapnr;
1124 abi_long ret;
c227f099 1125 target_siginfo_t info;
3b46e624 1126
060366c5
FB		 1127 while (1) {
1128 trapnr = cpu_sparc_exec (env);
3b46e624 1129
060366c5 1130 switch (trapnr) {
5ef54116 1131#ifndef TARGET_SPARC64
5fafdf24 1132 case 0x88:
060366c5 1133 case 0x90:
5ef54116 1134#else
cb33da57 1135 case 0x110:
5ef54116
FB		 1136 case 0x16d:
1137#endif
060366c5 1138 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 1139 env->regwptr[0], env->regwptr[1],
1140 env->regwptr[2], env->regwptr[3],
5945cfcb
PM		 1141 env->regwptr[4], env->regwptr[5],
1142 0, 0);
2cc20260 1143 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
992f48a0 1144#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1145 env->xcc |= PSR_CARRY;
1146#else
060366c5 1147 env->psr |= PSR_CARRY;
27908725 1148#endif
060366c5
FB		 1149 ret = -ret;
1150 } else {
992f48a0 1151#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1152 env->xcc &= ~PSR_CARRY;
1153#else
060366c5 1154 env->psr &= ~PSR_CARRY;
27908725 1155#endif
060366c5
FB		 1156 }
1157 env->regwptr[0] = ret;
1158 /* next instruction */
1159 env->pc = env->npc;
1160 env->npc = env->npc + 4;
1161 break;
1162 case 0x83: /* flush windows */
992f48a0
BS		 1163#ifdef TARGET_ABI32
1164 case 0x103:
1165#endif
2623cbaf 1166 flush_windows(env);
060366c5
FB		 1167 /* next instruction */
1168 env->pc = env->npc;
1169 env->npc = env->npc + 4;
1170 break;
3475187d 1171#ifndef TARGET_SPARC64
060366c5
FB		 1172 case TT_WIN_OVF: /* window overflow */
1173 save_window(env);
1174 break;
1175 case TT_WIN_UNF: /* window underflow */
1176 restore_window(env);
1177 break;
61ff6f58
FB		 1178 case TT_TFAULT:
1179 case TT_DFAULT:
1180 {
59f7182f 1181 info.si_signo = TARGET_SIGSEGV;
61ff6f58
FB		 1182 info.si_errno = 0;
1183 /* XXX: check env->error_code */
1184 info.si_code = TARGET_SEGV_MAPERR;
1185 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 1186 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 1187 }
1188 break;
3475187d 1189#else
5ef54116
FB		 1190 case TT_SPILL: /* window overflow */
1191 save_window(env);
1192 break;
1193 case TT_FILL: /* window underflow */
1194 restore_window(env);
1195 break;
7f84a729
BS		 1196 case TT_TFAULT:
1197 case TT_DFAULT:
1198 {
59f7182f 1199 info.si_signo = TARGET_SIGSEGV;
7f84a729
BS		 1200 info.si_errno = 0;
1201 /* XXX: check env->error_code */
1202 info.si_code = TARGET_SEGV_MAPERR;
1203 if (trapnr == TT_DFAULT)
1204 info._sifields._sigfault._addr = env->dmmuregs[4];
1205 else
8194f35a 1206 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
624f7979 1207 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 1208 }
1209 break;
27524dc3 1210#ifndef TARGET_ABI32
5bfb56b2
BS		 1211 case 0x16e:
1212 flush_windows(env);
1213 sparc64_get_context(env);
1214 break;
1215 case 0x16f:
1216 flush_windows(env);
1217 sparc64_set_context(env);
1218 break;
27524dc3 1219#endif
3475187d 1220#endif
48dc41eb
FB		 1221 case EXCP_INTERRUPT:
1222 /* just indicate that signals should be handled asap */
1223 break;
75f22e4e
RH		 1224 case TT_ILL_INSN:
1225 {
1226 info.si_signo = TARGET_SIGILL;
1227 info.si_errno = 0;
1228 info.si_code = TARGET_ILL_ILLOPC;
1229 info._sifields._sigfault._addr = env->pc;
1230 queue_signal(env, info.si_signo, &info);
1231 }
1232 break;
1fddef4b
FB		 1233 case EXCP_DEBUG:
1234 {
1235 int sig;
1236
1237 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1238 if (sig)
1239 {
1240 info.si_signo = sig;
1241 info.si_errno = 0;
1242 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1243 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 1244 }
1245 }
1246 break;
060366c5
FB		 1247 default:
1248 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 1249 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 1250 exit (1);
1251 }
1252 process_pending_signals (env);
1253 }
93ac68bc
FB		 1254}
1255
1256#endif
1257
67867308 1258#ifdef TARGET_PPC
05390248 1259static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
9fddaa0c
FB		 1260{
1261 /* TO FIX */
1262 return 0;
1263}
3b46e624 1264
05390248 1265uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
9fddaa0c 1266{
e3ea6529 1267 return cpu_ppc_get_tb(env);
9fddaa0c 1268}
3b46e624 1269
05390248 1270uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
9fddaa0c
FB		 1271{
1272 return cpu_ppc_get_tb(env) >> 32;
1273}
3b46e624 1274
05390248 1275uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
9fddaa0c 1276{
b711de95 1277 return cpu_ppc_get_tb(env);
9fddaa0c 1278}
5fafdf24 1279
05390248 1280uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
9fddaa0c 1281{
a062e36c 1282 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1283}
76a66253 1284
05390248 1285uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
76a66253
JM		 1286__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1287
05390248 1288uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
9fddaa0c 1289{
76a66253 1290 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1291}
76a66253 1292
a750fc0b 1293/* XXX: to be fixed */
73b01960 1294int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
a750fc0b
JM		 1295{
1296 return -1;
1297}
1298
73b01960 1299int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
a750fc0b
JM		 1300{
1301 return -1;
1302}
1303
001faf32
BS		 1304#define EXCP_DUMP(env, fmt, ...) \
1305do { \
1306 fprintf(stderr, fmt , ## __VA_ARGS__); \
1307 cpu_dump_state(env, stderr, fprintf, 0); \
1308 qemu_log(fmt, ## __VA_ARGS__); \
eeacee4d 1309 if (qemu_log_enabled()) { \
430c7ec7 1310 log_cpu_state(env, 0); \
eeacee4d 1311 } \
e1833e1f
JM		 1312} while (0)
1313
56f066bb
NF		 1314static int do_store_exclusive(CPUPPCState *env)
1315{
1316 target_ulong addr;
1317 target_ulong page_addr;
1318 target_ulong val;
1319 int flags;
1320 int segv = 0;
1321
1322 addr = env->reserve_ea;
1323 page_addr = addr & TARGET_PAGE_MASK;
1324 start_exclusive();
1325 mmap_lock();
1326 flags = page_get_flags(page_addr);
1327 if ((flags & PAGE_READ) == 0) {
1328 segv = 1;
1329 } else {
1330 int reg = env->reserve_info & 0x1f;
1331 int size = (env->reserve_info >> 5) & 0xf;
1332 int stored = 0;
1333
1334 if (addr == env->reserve_addr) {
1335 switch (size) {
1336 case 1: segv = get_user_u8(val, addr); break;
1337 case 2: segv = get_user_u16(val, addr); break;
1338 case 4: segv = get_user_u32(val, addr); break;
1339#if defined(TARGET_PPC64)
1340 case 8: segv = get_user_u64(val, addr); break;
1341#endif
1342 default: abort();
1343 }
1344 if (!segv && val == env->reserve_val) {
1345 val = env->gpr[reg];
1346 switch (size) {
1347 case 1: segv = put_user_u8(val, addr); break;
1348 case 2: segv = put_user_u16(val, addr); break;
1349 case 4: segv = put_user_u32(val, addr); break;
1350#if defined(TARGET_PPC64)
1351 case 8: segv = put_user_u64(val, addr); break;
1352#endif
1353 default: abort();
1354 }
1355 if (!segv) {
1356 stored = 1;
1357 }
1358 }
1359 }
1360 env->crf[0] = (stored << 1) | xer_so;
1361 env->reserve_addr = (target_ulong)-1;
1362 }
1363 if (!segv) {
1364 env->nip += 4;
1365 }
1366 mmap_unlock();
1367 end_exclusive();
1368 return segv;
1369}
1370
67867308
FB		 1371void cpu_loop(CPUPPCState *env)
1372{
c227f099 1373 target_siginfo_t info;
61190b14 1374 int trapnr;
9e0e2f96 1375 target_ulong ret;
3b46e624 1376
67867308 1377 for(;;) {
56f066bb 1378 cpu_exec_start(env);
67867308 1379 trapnr = cpu_ppc_exec(env);
56f066bb 1380 cpu_exec_end(env);
67867308 1381 switch(trapnr) {
e1833e1f
JM		 1382 case POWERPC_EXCP_NONE:
1383 /* Just go on */
67867308 1384 break;
e1833e1f
JM		 1385 case POWERPC_EXCP_CRITICAL: /* Critical input */
1386 cpu_abort(env, "Critical interrupt while in user mode. "
1387 "Aborting\n");
61190b14 1388 break;
e1833e1f
JM		 1389 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1390 cpu_abort(env, "Machine check exception while in user mode. "
1391 "Aborting\n");
1392 break;
1393 case POWERPC_EXCP_DSI: /* Data storage exception */
90e189ec 1394 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
e1833e1f
JM		 1395 env->spr[SPR_DAR]);
1396 /* XXX: check this. Seems bugged */
2be0071f
FB		 1397 switch (env->error_code & 0xFF000000) {
1398 case 0x40000000:
61190b14
FB		 1399 info.si_signo = TARGET_SIGSEGV;
1400 info.si_errno = 0;
1401 info.si_code = TARGET_SEGV_MAPERR;
1402 break;
2be0071f 1403 case 0x04000000:
61190b14
FB		 1404 info.si_signo = TARGET_SIGILL;
1405 info.si_errno = 0;
1406 info.si_code = TARGET_ILL_ILLADR;
1407 break;
2be0071f 1408 case 0x08000000:
61190b14
FB		 1409 info.si_signo = TARGET_SIGSEGV;
1410 info.si_errno = 0;
1411 info.si_code = TARGET_SEGV_ACCERR;
1412 break;
61190b14
FB		 1413 default:
1414 /* Let's send a regular segfault... */
e1833e1f
JM		 1415 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1416 env->error_code);
61190b14
FB		 1417 info.si_signo = TARGET_SIGSEGV;
1418 info.si_errno = 0;
1419 info.si_code = TARGET_SEGV_MAPERR;
1420 break;
1421 }
67867308 1422 info._sifields._sigfault._addr = env->nip;
624f7979 1423 queue_signal(env, info.si_signo, &info);
67867308 1424 break;
e1833e1f 1425 case POWERPC_EXCP_ISI: /* Instruction storage exception */
90e189ec
BS		 1426 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1427 "\n", env->spr[SPR_SRR0]);
e1833e1f 1428 /* XXX: check this */
2be0071f
FB		 1429 switch (env->error_code & 0xFF000000) {
1430 case 0x40000000:
61190b14 1431 info.si_signo = TARGET_SIGSEGV;
67867308 1432 info.si_errno = 0;
61190b14
FB		 1433 info.si_code = TARGET_SEGV_MAPERR;
1434 break;
2be0071f
FB		 1435 case 0x10000000:
1436 case 0x08000000:
61190b14
FB		 1437 info.si_signo = TARGET_SIGSEGV;
1438 info.si_errno = 0;
1439 info.si_code = TARGET_SEGV_ACCERR;
1440 break;
1441 default:
1442 /* Let's send a regular segfault... */
e1833e1f
JM		 1443 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1444 env->error_code);
61190b14
FB		 1445 info.si_signo = TARGET_SIGSEGV;
1446 info.si_errno = 0;
1447 info.si_code = TARGET_SEGV_MAPERR;
1448 break;
1449 }
1450 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1451 queue_signal(env, info.si_signo, &info);
67867308 1452 break;
e1833e1f
JM		 1453 case POWERPC_EXCP_EXTERNAL: /* External input */
1454 cpu_abort(env, "External interrupt while in user mode. "
1455 "Aborting\n");
1456 break;
1457 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1458 EXCP_DUMP(env, "Unaligned memory access\n");
1459 /* XXX: check this */
61190b14 1460 info.si_signo = TARGET_SIGBUS;
67867308 1461 info.si_errno = 0;
61190b14
FB		 1462 info.si_code = TARGET_BUS_ADRALN;
1463 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1464 queue_signal(env, info.si_signo, &info);
67867308 1465 break;
e1833e1f
JM		 1466 case POWERPC_EXCP_PROGRAM: /* Program exception */
1467 /* XXX: check this */
61190b14 1468 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1469 case POWERPC_EXCP_FP:
1470 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1471 info.si_signo = TARGET_SIGFPE;
1472 info.si_errno = 0;
1473 switch (env->error_code & 0xF) {
e1833e1f 1474 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1475 info.si_code = TARGET_FPE_FLTOVF;
1476 break;
e1833e1f 1477 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1478 info.si_code = TARGET_FPE_FLTUND;
1479 break;
e1833e1f
JM		 1480 case POWERPC_EXCP_FP_ZX:
1481 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1482 info.si_code = TARGET_FPE_FLTDIV;
1483 break;
e1833e1f 1484 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1485 info.si_code = TARGET_FPE_FLTRES;
1486 break;
e1833e1f 1487 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1488 info.si_code = TARGET_FPE_FLTINV;
1489 break;
7c58044c 1490 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1491 case POWERPC_EXCP_FP_VXISI:
1492 case POWERPC_EXCP_FP_VXIDI:
1493 case POWERPC_EXCP_FP_VXIMZ:
1494 case POWERPC_EXCP_FP_VXVC:
1495 case POWERPC_EXCP_FP_VXSQRT:
1496 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1497 info.si_code = TARGET_FPE_FLTSUB;
1498 break;
1499 default:
e1833e1f
JM		 1500 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1501 env->error_code);
1502 break;
61190b14 1503 }
e1833e1f
JM		 1504 break;
1505 case POWERPC_EXCP_INVAL:
1506 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1507 info.si_signo = TARGET_SIGILL;
1508 info.si_errno = 0;
1509 switch (env->error_code & 0xF) {
e1833e1f 1510 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1511 info.si_code = TARGET_ILL_ILLOPC;
1512 break;
e1833e1f 1513 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1514 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1515 break;
e1833e1f 1516 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1517 info.si_code = TARGET_ILL_PRVREG;
1518 break;
e1833e1f 1519 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1520 info.si_code = TARGET_ILL_COPROC;
1521 break;
1522 default:
e1833e1f
JM		 1523 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1524 env->error_code & 0xF);
61190b14
FB		 1525 info.si_code = TARGET_ILL_ILLADR;
1526 break;
1527 }
1528 break;
e1833e1f
JM		 1529 case POWERPC_EXCP_PRIV:
1530 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1531 info.si_signo = TARGET_SIGILL;
1532 info.si_errno = 0;
1533 switch (env->error_code & 0xF) {
e1833e1f 1534 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1535 info.si_code = TARGET_ILL_PRVOPC;
1536 break;
e1833e1f 1537 case POWERPC_EXCP_PRIV_REG:
61190b14 1538 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1539 break;
61190b14 1540 default:
e1833e1f
JM		 1541 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1542 env->error_code & 0xF);
61190b14
FB		 1543 info.si_code = TARGET_ILL_PRVOPC;
1544 break;
1545 }
1546 break;
e1833e1f
JM		 1547 case POWERPC_EXCP_TRAP:
1548 cpu_abort(env, "Tried to call a TRAP\n");
1549 break;
61190b14
FB		 1550 default:
1551 /* Should not happen ! */
e1833e1f
JM		 1552 cpu_abort(env, "Unknown program exception (%02x)\n",
1553 env->error_code);
1554 break;
61190b14
FB		 1555 }
1556 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1557 queue_signal(env, info.si_signo, &info);
67867308 1558 break;
e1833e1f
JM		 1559 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1560 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1561 info.si_signo = TARGET_SIGILL;
67867308 1562 info.si_errno = 0;
61190b14
FB		 1563 info.si_code = TARGET_ILL_COPROC;
1564 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1565 queue_signal(env, info.si_signo, &info);
67867308 1566 break;
e1833e1f
JM		 1567 case POWERPC_EXCP_SYSCALL: /* System call exception */
1568 cpu_abort(env, "Syscall exception while in user mode. "
1569 "Aborting\n");
61190b14 1570 break;
e1833e1f
JM		 1571 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1572 EXCP_DUMP(env, "No APU instruction allowed\n");
1573 info.si_signo = TARGET_SIGILL;
1574 info.si_errno = 0;
1575 info.si_code = TARGET_ILL_COPROC;
1576 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1577 queue_signal(env, info.si_signo, &info);
61190b14 1578 break;
e1833e1f
JM		 1579 case POWERPC_EXCP_DECR: /* Decrementer exception */
1580 cpu_abort(env, "Decrementer interrupt while in user mode. "
1581 "Aborting\n");
61190b14 1582 break;
e1833e1f
JM		 1583 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1584 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1585 "Aborting\n");
1586 break;
1587 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1588 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1589 "Aborting\n");
1590 break;
1591 case POWERPC_EXCP_DTLB: /* Data TLB error */
1592 cpu_abort(env, "Data TLB exception while in user mode. "
1593 "Aborting\n");
1594 break;
1595 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1596 cpu_abort(env, "Instruction TLB exception while in user mode. "
1597 "Aborting\n");
1598 break;
e1833e1f
JM		 1599 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1600 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1601 info.si_signo = TARGET_SIGILL;
1602 info.si_errno = 0;
1603 info.si_code = TARGET_ILL_COPROC;
1604 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1605 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1606 break;
1607 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1608 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1609 break;
1610 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1611 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1612 break;
1613 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1614 cpu_abort(env, "Performance monitor exception not handled\n");
1615 break;
1616 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1617 cpu_abort(env, "Doorbell interrupt while in user mode. "
1618 "Aborting\n");
1619 break;
1620 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1621 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1622 "Aborting\n");
1623 break;
1624 case POWERPC_EXCP_RESET: /* System reset exception */
1625 cpu_abort(env, "Reset interrupt while in user mode. "
1626 "Aborting\n");
1627 break;
e1833e1f
JM		 1628 case POWERPC_EXCP_DSEG: /* Data segment exception */
1629 cpu_abort(env, "Data segment exception while in user mode. "
1630 "Aborting\n");
1631 break;
1632 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1633 cpu_abort(env, "Instruction segment exception "
1634 "while in user mode. Aborting\n");
1635 break;
e85e7c6e 1636 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1637 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1638 cpu_abort(env, "Hypervisor decrementer interrupt "
1639 "while in user mode. Aborting\n");
1640 break;
e1833e1f
JM		 1641 case POWERPC_EXCP_TRACE: /* Trace exception */
1642 /* Nothing to do:
1643 * we use this exception to emulate step-by-step execution mode.
1644 */
1645 break;
e85e7c6e 1646 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1647 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1648 cpu_abort(env, "Hypervisor data storage exception "
1649 "while in user mode. Aborting\n");
1650 break;
1651 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1652 cpu_abort(env, "Hypervisor instruction storage exception "
1653 "while in user mode. Aborting\n");
1654 break;
1655 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1656 cpu_abort(env, "Hypervisor data segment exception "
1657 "while in user mode. Aborting\n");
1658 break;
1659 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1660 cpu_abort(env, "Hypervisor instruction segment exception "
1661 "while in user mode. Aborting\n");
1662 break;
e1833e1f
JM		 1663 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1664 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1665 info.si_signo = TARGET_SIGILL;
1666 info.si_errno = 0;
1667 info.si_code = TARGET_ILL_COPROC;
1668 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1669 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1670 break;
1671 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
b4916d7b 1672 cpu_abort(env, "Programmable interval timer interrupt "
e1833e1f
JM		 1673 "while in user mode. Aborting\n");
1674 break;
1675 case POWERPC_EXCP_IO: /* IO error exception */
1676 cpu_abort(env, "IO error exception while in user mode. "
1677 "Aborting\n");
1678 break;
1679 case POWERPC_EXCP_RUNM: /* Run mode exception */
1680 cpu_abort(env, "Run mode exception while in user mode. "
1681 "Aborting\n");
1682 break;
1683 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1684 cpu_abort(env, "Emulation trap exception not handled\n");
1685 break;
1686 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1687 cpu_abort(env, "Instruction fetch TLB exception "
1688 "while in user-mode. Aborting");
1689 break;
1690 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1691 cpu_abort(env, "Data load TLB exception while in user-mode. "
1692 "Aborting");
1693 break;
1694 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1695 cpu_abort(env, "Data store TLB exception while in user-mode. "
1696 "Aborting");
1697 break;
1698 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1699 cpu_abort(env, "Floating-point assist exception not handled\n");
1700 break;
1701 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1702 cpu_abort(env, "Instruction address breakpoint exception "
1703 "not handled\n");
1704 break;
1705 case POWERPC_EXCP_SMI: /* System management interrupt */
1706 cpu_abort(env, "System management interrupt while in user mode. "
1707 "Aborting\n");
1708 break;
1709 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1710 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1711 "Aborting\n");
1712 break;
1713 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1714 cpu_abort(env, "Performance monitor exception not handled\n");
1715 break;
1716 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1717 cpu_abort(env, "Vector assist exception not handled\n");
1718 break;
1719 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1720 cpu_abort(env, "Soft patch exception not handled\n");
1721 break;
1722 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1723 cpu_abort(env, "Maintenance exception while in user mode. "
1724 "Aborting\n");
1725 break;
1726 case POWERPC_EXCP_STOP: /* stop translation */
1727 /* We did invalidate the instruction cache. Go on */
1728 break;
1729 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1730 /* We just stopped because of a branch. Go on */
1731 break;
1732 case POWERPC_EXCP_SYSCALL_USER:
1733 /* system call in user-mode emulation */
1734 /* WARNING:
1735 * PPC ABI uses overflow flag in cr0 to signal an error
1736 * in syscalls.
1737 */
e1833e1f
JM		 1738 env->crf[0] &= ~0x1;
1739 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1740 env->gpr[5], env->gpr[6], env->gpr[7],
5945cfcb 1741 env->gpr[8], 0, 0);
9e0e2f96 1742 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
bcd4933a
NF		 1743 /* Returning from a successful sigreturn syscall.
1744 Avoid corrupting register state. */
1745 break;
1746 }
9e0e2f96 1747 if (ret > (target_ulong)(-515)) {
e1833e1f
JM		 1748 env->crf[0] |= 0x1;
1749 ret = -ret;
61190b14 1750 }
e1833e1f 1751 env->gpr[3] = ret;
e1833e1f 1752 break;
56f066bb
NF		 1753 case POWERPC_EXCP_STCX:
1754 if (do_store_exclusive(env)) {
1755 info.si_signo = TARGET_SIGSEGV;
1756 info.si_errno = 0;
1757 info.si_code = TARGET_SEGV_MAPERR;
1758 info._sifields._sigfault._addr = env->nip;
1759 queue_signal(env, info.si_signo, &info);
1760 }
1761 break;
71f75756
AJ		 1762 case EXCP_DEBUG:
1763 {
1764 int sig;
1765
1766 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1767 if (sig) {
1768 info.si_signo = sig;
1769 info.si_errno = 0;
1770 info.si_code = TARGET_TRAP_BRKPT;
1771 queue_signal(env, info.si_signo, &info);
1772 }
1773 }
1774 break;
56ba31ff
JM		 1775 case EXCP_INTERRUPT:
1776 /* just indicate that signals should be handled asap */
1777 break;
e1833e1f
JM		 1778 default:
1779 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1780 break;
67867308
FB		 1781 }
1782 process_pending_signals(env);
1783 }
1784}
1785#endif
1786
048f6b4d
FB		 1787#ifdef TARGET_MIPS
1788
1789#define MIPS_SYS(name, args) args,
1790
1791static const uint8_t mips_syscall_args[] = {
29fb0f25 1792 MIPS_SYS(sys_syscall , 8) /* 4000 */
048f6b4d
FB		 1793 MIPS_SYS(sys_exit , 1)
1794 MIPS_SYS(sys_fork , 0)
1795 MIPS_SYS(sys_read , 3)
1796 MIPS_SYS(sys_write , 3)
1797 MIPS_SYS(sys_open , 3) /* 4005 */
1798 MIPS_SYS(sys_close , 1)
1799 MIPS_SYS(sys_waitpid , 3)
1800 MIPS_SYS(sys_creat , 2)
1801 MIPS_SYS(sys_link , 2)
1802 MIPS_SYS(sys_unlink , 1) /* 4010 */
1803 MIPS_SYS(sys_execve , 0)
1804 MIPS_SYS(sys_chdir , 1)
1805 MIPS_SYS(sys_time , 1)
1806 MIPS_SYS(sys_mknod , 3)
1807 MIPS_SYS(sys_chmod , 2) /* 4015 */
1808 MIPS_SYS(sys_lchown , 3)
1809 MIPS_SYS(sys_ni_syscall , 0)
1810 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1811 MIPS_SYS(sys_lseek , 3)
1812 MIPS_SYS(sys_getpid , 0) /* 4020 */
1813 MIPS_SYS(sys_mount , 5)
1814 MIPS_SYS(sys_oldumount , 1)
1815 MIPS_SYS(sys_setuid , 1)
1816 MIPS_SYS(sys_getuid , 0)
1817 MIPS_SYS(sys_stime , 1) /* 4025 */
1818 MIPS_SYS(sys_ptrace , 4)
1819 MIPS_SYS(sys_alarm , 1)
1820 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1821 MIPS_SYS(sys_pause , 0)
1822 MIPS_SYS(sys_utime , 2) /* 4030 */
1823 MIPS_SYS(sys_ni_syscall , 0)
1824 MIPS_SYS(sys_ni_syscall , 0)
1825 MIPS_SYS(sys_access , 2)
1826 MIPS_SYS(sys_nice , 1)
1827 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1828 MIPS_SYS(sys_sync , 0)
1829 MIPS_SYS(sys_kill , 2)
1830 MIPS_SYS(sys_rename , 2)
1831 MIPS_SYS(sys_mkdir , 2)
1832 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1833 MIPS_SYS(sys_dup , 1)
1834 MIPS_SYS(sys_pipe , 0)
1835 MIPS_SYS(sys_times , 1)
1836 MIPS_SYS(sys_ni_syscall , 0)
1837 MIPS_SYS(sys_brk , 1) /* 4045 */
1838 MIPS_SYS(sys_setgid , 1)
1839 MIPS_SYS(sys_getgid , 0)
1840 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1841 MIPS_SYS(sys_geteuid , 0)
1842 MIPS_SYS(sys_getegid , 0) /* 4050 */
1843 MIPS_SYS(sys_acct , 0)
1844 MIPS_SYS(sys_umount , 2)
1845 MIPS_SYS(sys_ni_syscall , 0)
1846 MIPS_SYS(sys_ioctl , 3)
1847 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1848 MIPS_SYS(sys_ni_syscall , 2)
1849 MIPS_SYS(sys_setpgid , 2)
1850 MIPS_SYS(sys_ni_syscall , 0)
1851 MIPS_SYS(sys_olduname , 1)
1852 MIPS_SYS(sys_umask , 1) /* 4060 */
1853 MIPS_SYS(sys_chroot , 1)
1854 MIPS_SYS(sys_ustat , 2)
1855 MIPS_SYS(sys_dup2 , 2)
1856 MIPS_SYS(sys_getppid , 0)
1857 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1858 MIPS_SYS(sys_setsid , 0)
1859 MIPS_SYS(sys_sigaction , 3)
1860 MIPS_SYS(sys_sgetmask , 0)
1861 MIPS_SYS(sys_ssetmask , 1)
1862 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1863 MIPS_SYS(sys_setregid , 2)
1864 MIPS_SYS(sys_sigsuspend , 0)
1865 MIPS_SYS(sys_sigpending , 1)
1866 MIPS_SYS(sys_sethostname , 2)
1867 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1868 MIPS_SYS(sys_getrlimit , 2)
1869 MIPS_SYS(sys_getrusage , 2)
1870 MIPS_SYS(sys_gettimeofday, 2)
1871 MIPS_SYS(sys_settimeofday, 2)
1872 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1873 MIPS_SYS(sys_setgroups , 2)
1874 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1875 MIPS_SYS(sys_symlink , 2)
1876 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1877 MIPS_SYS(sys_readlink , 3) /* 4085 */
1878 MIPS_SYS(sys_uselib , 1)
1879 MIPS_SYS(sys_swapon , 2)
1880 MIPS_SYS(sys_reboot , 3)
1881 MIPS_SYS(old_readdir , 3)
1882 MIPS_SYS(old_mmap , 6) /* 4090 */
1883 MIPS_SYS(sys_munmap , 2)
1884 MIPS_SYS(sys_truncate , 2)
1885 MIPS_SYS(sys_ftruncate , 2)
1886 MIPS_SYS(sys_fchmod , 2)
1887 MIPS_SYS(sys_fchown , 3) /* 4095 */
1888 MIPS_SYS(sys_getpriority , 2)
1889 MIPS_SYS(sys_setpriority , 3)
1890 MIPS_SYS(sys_ni_syscall , 0)
1891 MIPS_SYS(sys_statfs , 2)
1892 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1893 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1894 MIPS_SYS(sys_socketcall , 2)
1895 MIPS_SYS(sys_syslog , 3)
1896 MIPS_SYS(sys_setitimer , 3)
1897 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1898 MIPS_SYS(sys_newstat , 2)
1899 MIPS_SYS(sys_newlstat , 2)
1900 MIPS_SYS(sys_newfstat , 2)
1901 MIPS_SYS(sys_uname , 1)
1902 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1903 MIPS_SYS(sys_vhangup , 0)
1904 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1905 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1906 MIPS_SYS(sys_wait4 , 4)
1907 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1908 MIPS_SYS(sys_sysinfo , 1)
1909 MIPS_SYS(sys_ipc , 6)
1910 MIPS_SYS(sys_fsync , 1)
1911 MIPS_SYS(sys_sigreturn , 0)
18113962 1912 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1913 MIPS_SYS(sys_setdomainname, 2)
1914 MIPS_SYS(sys_newuname , 1)
1915 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1916 MIPS_SYS(sys_adjtimex , 1)
1917 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1918 MIPS_SYS(sys_sigprocmask , 3)
1919 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1920 MIPS_SYS(sys_init_module , 5)
1921 MIPS_SYS(sys_delete_module, 1)
1922 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1923 MIPS_SYS(sys_quotactl , 0)
1924 MIPS_SYS(sys_getpgid , 1)
1925 MIPS_SYS(sys_fchdir , 1)
1926 MIPS_SYS(sys_bdflush , 2)
1927 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1928 MIPS_SYS(sys_personality , 1)
1929 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1930 MIPS_SYS(sys_setfsuid , 1)
1931 MIPS_SYS(sys_setfsgid , 1)
1932 MIPS_SYS(sys_llseek , 5) /* 4140 */
1933 MIPS_SYS(sys_getdents , 3)
1934 MIPS_SYS(sys_select , 5)
1935 MIPS_SYS(sys_flock , 2)
1936 MIPS_SYS(sys_msync , 3)
1937 MIPS_SYS(sys_readv , 3) /* 4145 */
1938 MIPS_SYS(sys_writev , 3)
1939 MIPS_SYS(sys_cacheflush , 3)
1940 MIPS_SYS(sys_cachectl , 3)
1941 MIPS_SYS(sys_sysmips , 4)
1942 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1943 MIPS_SYS(sys_getsid , 1)
1944 MIPS_SYS(sys_fdatasync , 0)
1945 MIPS_SYS(sys_sysctl , 1)
1946 MIPS_SYS(sys_mlock , 2)
1947 MIPS_SYS(sys_munlock , 2) /* 4155 */
1948 MIPS_SYS(sys_mlockall , 1)
1949 MIPS_SYS(sys_munlockall , 0)
1950 MIPS_SYS(sys_sched_setparam, 2)
1951 MIPS_SYS(sys_sched_getparam, 2)
1952 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1953 MIPS_SYS(sys_sched_getscheduler, 1)
1954 MIPS_SYS(sys_sched_yield , 0)
1955 MIPS_SYS(sys_sched_get_priority_max, 1)
1956 MIPS_SYS(sys_sched_get_priority_min, 1)
1957 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1958 MIPS_SYS(sys_nanosleep, 2)
1959 MIPS_SYS(sys_mremap , 4)
1960 MIPS_SYS(sys_accept , 3)
1961 MIPS_SYS(sys_bind , 3)
1962 MIPS_SYS(sys_connect , 3) /* 4170 */
1963 MIPS_SYS(sys_getpeername , 3)
1964 MIPS_SYS(sys_getsockname , 3)
1965 MIPS_SYS(sys_getsockopt , 5)
1966 MIPS_SYS(sys_listen , 2)
1967 MIPS_SYS(sys_recv , 4) /* 4175 */
1968 MIPS_SYS(sys_recvfrom , 6)
1969 MIPS_SYS(sys_recvmsg , 3)
1970 MIPS_SYS(sys_send , 4)
1971 MIPS_SYS(sys_sendmsg , 3)
1972 MIPS_SYS(sys_sendto , 6) /* 4180 */
1973 MIPS_SYS(sys_setsockopt , 5)
1974 MIPS_SYS(sys_shutdown , 2)
1975 MIPS_SYS(sys_socket , 3)
1976 MIPS_SYS(sys_socketpair , 4)
1977 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1978 MIPS_SYS(sys_getresuid , 3)
1979 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1980 MIPS_SYS(sys_poll , 3)
1981 MIPS_SYS(sys_nfsservctl , 3)
1982 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1983 MIPS_SYS(sys_getresgid , 3)
1984 MIPS_SYS(sys_prctl , 5)
1985 MIPS_SYS(sys_rt_sigreturn, 0)
1986 MIPS_SYS(sys_rt_sigaction, 4)
1987 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1988 MIPS_SYS(sys_rt_sigpending, 2)
1989 MIPS_SYS(sys_rt_sigtimedwait, 4)
1990 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1991 MIPS_SYS(sys_rt_sigsuspend, 0)
1992 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1993 MIPS_SYS(sys_pwrite64 , 6)
1994 MIPS_SYS(sys_chown , 3)
1995 MIPS_SYS(sys_getcwd , 2)
1996 MIPS_SYS(sys_capget , 2)
1997 MIPS_SYS(sys_capset , 2) /* 4205 */
053ebb27 1998 MIPS_SYS(sys_sigaltstack , 2)
048f6b4d
FB		 1999 MIPS_SYS(sys_sendfile , 4)
2000 MIPS_SYS(sys_ni_syscall , 0)
2001 MIPS_SYS(sys_ni_syscall , 0)
2002 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
2003 MIPS_SYS(sys_truncate64 , 4)
2004 MIPS_SYS(sys_ftruncate64 , 4)
2005 MIPS_SYS(sys_stat64 , 2)
2006 MIPS_SYS(sys_lstat64 , 2)
2007 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
2008 MIPS_SYS(sys_pivot_root , 2)
2009 MIPS_SYS(sys_mincore , 3)
2010 MIPS_SYS(sys_madvise , 3)
2011 MIPS_SYS(sys_getdents64 , 3)
2012 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
2013 MIPS_SYS(sys_ni_syscall , 0)
2014 MIPS_SYS(sys_gettid , 0)
2015 MIPS_SYS(sys_readahead , 5)
2016 MIPS_SYS(sys_setxattr , 5)
2017 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
2018 MIPS_SYS(sys_fsetxattr , 5)
2019 MIPS_SYS(sys_getxattr , 4)
2020 MIPS_SYS(sys_lgetxattr , 4)
2021 MIPS_SYS(sys_fgetxattr , 4)
2022 MIPS_SYS(sys_listxattr , 3) /* 4230 */
2023 MIPS_SYS(sys_llistxattr , 3)
2024 MIPS_SYS(sys_flistxattr , 3)
2025 MIPS_SYS(sys_removexattr , 2)
2026 MIPS_SYS(sys_lremovexattr, 2)
2027 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
2028 MIPS_SYS(sys_tkill , 2)
2029 MIPS_SYS(sys_sendfile64 , 5)
2030 MIPS_SYS(sys_futex , 2)
2031 MIPS_SYS(sys_sched_setaffinity, 3)
2032 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
2033 MIPS_SYS(sys_io_setup , 2)
2034 MIPS_SYS(sys_io_destroy , 1)
2035 MIPS_SYS(sys_io_getevents, 5)
2036 MIPS_SYS(sys_io_submit , 3)
2037 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
2038 MIPS_SYS(sys_exit_group , 1)
2039 MIPS_SYS(sys_lookup_dcookie, 3)
2040 MIPS_SYS(sys_epoll_create, 1)
2041 MIPS_SYS(sys_epoll_ctl , 4)
2042 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
2043 MIPS_SYS(sys_remap_file_pages, 5)
2044 MIPS_SYS(sys_set_tid_address, 1)
2045 MIPS_SYS(sys_restart_syscall, 0)
2046 MIPS_SYS(sys_fadvise64_64, 7)
2047 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
2048 MIPS_SYS(sys_fstatfs64 , 2)
2049 MIPS_SYS(sys_timer_create, 3)
2050 MIPS_SYS(sys_timer_settime, 4)
2051 MIPS_SYS(sys_timer_gettime, 2)
2052 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
2053 MIPS_SYS(sys_timer_delete, 1)
2054 MIPS_SYS(sys_clock_settime, 2)
2055 MIPS_SYS(sys_clock_gettime, 2)
2056 MIPS_SYS(sys_clock_getres, 2)
2057 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
2058 MIPS_SYS(sys_tgkill , 3)
2059 MIPS_SYS(sys_utimes , 2)
2060 MIPS_SYS(sys_mbind , 4)
2061 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
2062 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
2063 MIPS_SYS(sys_mq_open , 4)
2064 MIPS_SYS(sys_mq_unlink , 1)
2065 MIPS_SYS(sys_mq_timedsend, 5)
2066 MIPS_SYS(sys_mq_timedreceive, 5)
2067 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
2068 MIPS_SYS(sys_mq_getsetattr, 3)
2069 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
2070 MIPS_SYS(sys_waitid , 4)
2071 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
2072 MIPS_SYS(sys_add_key , 5)
388bb21a 2073 MIPS_SYS(sys_request_key, 4)
048f6b4d 2074 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 2075 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 2076 MIPS_SYS(sys_inotify_init, 0)
2077 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
2078 MIPS_SYS(sys_inotify_rm_watch, 2)
2079 MIPS_SYS(sys_migrate_pages, 4)
2080 MIPS_SYS(sys_openat, 4)
2081 MIPS_SYS(sys_mkdirat, 3)
2082 MIPS_SYS(sys_mknodat, 4) /* 4290 */
2083 MIPS_SYS(sys_fchownat, 5)
2084 MIPS_SYS(sys_futimesat, 3)
2085 MIPS_SYS(sys_fstatat64, 4)
2086 MIPS_SYS(sys_unlinkat, 3)
2087 MIPS_SYS(sys_renameat, 4) /* 4295 */
2088 MIPS_SYS(sys_linkat, 5)
2089 MIPS_SYS(sys_symlinkat, 3)
2090 MIPS_SYS(sys_readlinkat, 4)
2091 MIPS_SYS(sys_fchmodat, 3)
2092 MIPS_SYS(sys_faccessat, 3) /* 4300 */
2093 MIPS_SYS(sys_pselect6, 6)
2094 MIPS_SYS(sys_ppoll, 5)
2095 MIPS_SYS(sys_unshare, 1)
2096 MIPS_SYS(sys_splice, 4)
2097 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
2098 MIPS_SYS(sys_tee, 4)
2099 MIPS_SYS(sys_vmsplice, 4)
2100 MIPS_SYS(sys_move_pages, 6)
2101 MIPS_SYS(sys_set_robust_list, 2)
2102 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
2103 MIPS_SYS(sys_kexec_load, 4)
2104 MIPS_SYS(sys_getcpu, 3)
2105 MIPS_SYS(sys_epoll_pwait, 6)
2106 MIPS_SYS(sys_ioprio_set, 3)
2107 MIPS_SYS(sys_ioprio_get, 2)
d979e8eb
PM		 2108 MIPS_SYS(sys_utimensat, 4)
2109 MIPS_SYS(sys_signalfd, 3)
2110 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
2111 MIPS_SYS(sys_eventfd, 1)
2112 MIPS_SYS(sys_fallocate, 6) /* 4320 */
2113 MIPS_SYS(sys_timerfd_create, 2)
2114 MIPS_SYS(sys_timerfd_gettime, 2)
2115 MIPS_SYS(sys_timerfd_settime, 4)
2116 MIPS_SYS(sys_signalfd4, 4)
2117 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
2118 MIPS_SYS(sys_epoll_create1, 1)
2119 MIPS_SYS(sys_dup3, 3)
2120 MIPS_SYS(sys_pipe2, 2)
2121 MIPS_SYS(sys_inotify_init1, 1)
2122 MIPS_SYS(sys_preadv, 6) /* 4330 */
2123 MIPS_SYS(sys_pwritev, 6)
2124 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2125 MIPS_SYS(sys_perf_event_open, 5)
2126 MIPS_SYS(sys_accept4, 4)
2127 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2128 MIPS_SYS(sys_fanotify_init, 2)
2129 MIPS_SYS(sys_fanotify_mark, 6)
2130 MIPS_SYS(sys_prlimit64, 4)
2131 MIPS_SYS(sys_name_to_handle_at, 5)
2132 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2133 MIPS_SYS(sys_clock_adjtime, 2)
2134 MIPS_SYS(sys_syncfs, 1)
048f6b4d
FB		 2135};
2136
2137#undef MIPS_SYS
2138
590bc601
PB		 2139static int do_store_exclusive(CPUMIPSState *env)
2140{
2141 target_ulong addr;
2142 target_ulong page_addr;
2143 target_ulong val;
2144 int flags;
2145 int segv = 0;
2146 int reg;
2147 int d;
2148
5499b6ff 2149 addr = env->lladdr;
590bc601
PB		 2150 page_addr = addr & TARGET_PAGE_MASK;
2151 start_exclusive();
2152 mmap_lock();
2153 flags = page_get_flags(page_addr);
2154 if ((flags & PAGE_READ) == 0) {
2155 segv = 1;
2156 } else {
2157 reg = env->llreg & 0x1f;
2158 d = (env->llreg & 0x20) != 0;
2159 if (d) {
2160 segv = get_user_s64(val, addr);
2161 } else {
2162 segv = get_user_s32(val, addr);
2163 }
2164 if (!segv) {
2165 if (val != env->llval) {
2166 env->active_tc.gpr[reg] = 0;
2167 } else {
2168 if (d) {
2169 segv = put_user_u64(env->llnewval, addr);
2170 } else {
2171 segv = put_user_u32(env->llnewval, addr);
2172 }
2173 if (!segv) {
2174 env->active_tc.gpr[reg] = 1;
2175 }
2176 }
2177 }
2178 }
5499b6ff 2179 env->lladdr = -1;
590bc601
PB		 2180 if (!segv) {
2181 env->active_tc.PC += 4;
2182 }
2183 mmap_unlock();
2184 end_exclusive();
2185 return segv;
2186}
2187
048f6b4d
FB		 2188void cpu_loop(CPUMIPSState *env)
2189{
c227f099 2190 target_siginfo_t info;
388bb21a 2191 int trapnr, ret;
048f6b4d 2192 unsigned int syscall_num;
048f6b4d
FB		 2193
2194 for(;;) {
590bc601 2195 cpu_exec_start(env);
048f6b4d 2196 trapnr = cpu_mips_exec(env);
590bc601 2197 cpu_exec_end(env);
048f6b4d
FB		 2198 switch(trapnr) {
2199 case EXCP_SYSCALL:
b5dc7732
TS		 2200 syscall_num = env->active_tc.gpr[2] - 4000;
2201 env->active_tc.PC += 4;
388bb21a 2202 if (syscall_num >= sizeof(mips_syscall_args)) {
7c2f6157 2203 ret = -TARGET_ENOSYS;
388bb21a
TS		 2204 } else {
2205 int nb_args;
992f48a0
BS		 2206 abi_ulong sp_reg;
2207 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 2208
2209 nb_args = mips_syscall_args[syscall_num];
b5dc7732 2210 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 2211 switch (nb_args) {
2212 /* these arguments are taken from the stack */
94c19610
ACH		 2213 case 8:
2214 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
2215 goto done_syscall;
2216 }
2217 case 7:
2218 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
2219 goto done_syscall;
2220 }
2221 case 6:
2222 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
2223 goto done_syscall;
2224 }
2225 case 5:
2226 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
2227 goto done_syscall;
2228 }
388bb21a
TS		 2229 default:
2230 break;
048f6b4d 2231 }
b5dc7732
TS		 2232 ret = do_syscall(env, env->active_tc.gpr[2],
2233 env->active_tc.gpr[4],
2234 env->active_tc.gpr[5],
2235 env->active_tc.gpr[6],
2236 env->active_tc.gpr[7],
5945cfcb 2237 arg5, arg6, arg7, arg8);
388bb21a 2238 }
94c19610 2239done_syscall:
0b1bcb00
PB		 2240 if (ret == -TARGET_QEMU_ESIGRETURN) {
2241 /* Returning from a successful sigreturn syscall.
2242 Avoid clobbering register state. */
2243 break;
2244 }
388bb21a 2245 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 2246 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 2247 ret = -ret;
2248 } else {
b5dc7732 2249 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 2250 }
b5dc7732 2251 env->active_tc.gpr[2] = ret;
048f6b4d 2252 break;
ca7c2b1b
TS		 2253 case EXCP_TLBL:
2254 case EXCP_TLBS:
e6e5bd2d
WT		 2255 case EXCP_AdEL:
2256 case EXCP_AdES:
e4474235
PB		 2257 info.si_signo = TARGET_SIGSEGV;
2258 info.si_errno = 0;
2259 /* XXX: check env->error_code */
2260 info.si_code = TARGET_SEGV_MAPERR;
2261 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2262 queue_signal(env, info.si_signo, &info);
2263 break;
6900e84b 2264 case EXCP_CpU:
048f6b4d 2265 case EXCP_RI:
bc1ad2de
FB		 2266 info.si_signo = TARGET_SIGILL;
2267 info.si_errno = 0;
2268 info.si_code = 0;
624f7979 2269 queue_signal(env, info.si_signo, &info);
048f6b4d 2270 break;
106ec879
FB		 2271 case EXCP_INTERRUPT:
2272 /* just indicate that signals should be handled asap */
2273 break;
d08b2a28
PB		 2274 case EXCP_DEBUG:
2275 {
2276 int sig;
2277
2278 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2279 if (sig)
2280 {
2281 info.si_signo = sig;
2282 info.si_errno = 0;
2283 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2284 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 2285 }
2286 }
2287 break;
590bc601
PB		 2288 case EXCP_SC:
2289 if (do_store_exclusive(env)) {
2290 info.si_signo = TARGET_SIGSEGV;
2291 info.si_errno = 0;
2292 info.si_code = TARGET_SEGV_MAPERR;
2293 info._sifields._sigfault._addr = env->active_tc.PC;
2294 queue_signal(env, info.si_signo, &info);
2295 }
2296 break;
048f6b4d
FB		 2297 default:
2298 // error:
5fafdf24 2299 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 2300 trapnr);
2301 cpu_dump_state(env, stderr, fprintf, 0);
2302 abort();
2303 }
2304 process_pending_signals(env);
2305 }
2306}
2307#endif
2308
d962783e
JL		 2309#ifdef TARGET_OPENRISC
2310
2311void cpu_loop(CPUOpenRISCState *env)
2312{
2313 int trapnr, gdbsig;
2314
2315 for (;;) {
2316 trapnr = cpu_exec(env);
2317 gdbsig = 0;
2318
2319 switch (trapnr) {
2320 case EXCP_RESET:
2321 qemu_log("\nReset request, exit, pc is %#x\n", env->pc);
2322 exit(1);
2323 break;
2324 case EXCP_BUSERR:
2325 qemu_log("\nBus error, exit, pc is %#x\n", env->pc);
2326 gdbsig = SIGBUS;
2327 break;
2328 case EXCP_DPF:
2329 case EXCP_IPF:
2330 cpu_dump_state(env, stderr, fprintf, 0);
2331 gdbsig = TARGET_SIGSEGV;
2332 break;
2333 case EXCP_TICK:
2334 qemu_log("\nTick time interrupt pc is %#x\n", env->pc);
2335 break;
2336 case EXCP_ALIGN:
2337 qemu_log("\nAlignment pc is %#x\n", env->pc);
2338 gdbsig = SIGBUS;
2339 break;
2340 case EXCP_ILLEGAL:
2341 qemu_log("\nIllegal instructionpc is %#x\n", env->pc);
2342 gdbsig = SIGILL;
2343 break;
2344 case EXCP_INT:
2345 qemu_log("\nExternal interruptpc is %#x\n", env->pc);
2346 break;
2347 case EXCP_DTLBMISS:
2348 case EXCP_ITLBMISS:
2349 qemu_log("\nTLB miss\n");
2350 break;
2351 case EXCP_RANGE:
2352 qemu_log("\nRange\n");
2353 gdbsig = SIGSEGV;
2354 break;
2355 case EXCP_SYSCALL:
2356 env->pc += 4; /* 0xc00; */
2357 env->gpr[11] = do_syscall(env,
2358 env->gpr[11], /* return value */
2359 env->gpr[3], /* r3 - r7 are params */
2360 env->gpr[4],
2361 env->gpr[5],
2362 env->gpr[6],
2363 env->gpr[7],
2364 env->gpr[8], 0, 0);
2365 break;
2366 case EXCP_FPE:
2367 qemu_log("\nFloating point error\n");
2368 break;
2369 case EXCP_TRAP:
2370 qemu_log("\nTrap\n");
2371 gdbsig = SIGTRAP;
2372 break;
2373 case EXCP_NR:
2374 qemu_log("\nNR\n");
2375 break;
2376 default:
2377 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2378 trapnr);
2379 cpu_dump_state(env, stderr, fprintf, 0);
2380 gdbsig = TARGET_SIGILL;
2381 break;
2382 }
2383 if (gdbsig) {
2384 gdb_handlesig(env, gdbsig);
2385 if (gdbsig != TARGET_SIGTRAP) {
2386 exit(1);
2387 }
2388 }
2389
2390 process_pending_signals(env);
2391 }
2392}
2393
2394#endif /* TARGET_OPENRISC */
2395
fdf9b3e8 2396#ifdef TARGET_SH4
05390248 2397void cpu_loop(CPUSH4State *env)
fdf9b3e8
FB		 2398{
2399 int trapnr, ret;
c227f099 2400 target_siginfo_t info;
3b46e624 2401
fdf9b3e8
FB		 2402 while (1) {
2403 trapnr = cpu_sh4_exec (env);
3b46e624 2404
fdf9b3e8
FB		 2405 switch (trapnr) {
2406 case 0x160:
0b6d3ae0 2407 env->pc += 2;
5fafdf24
TS		 2408 ret = do_syscall(env,
2409 env->gregs[3],
2410 env->gregs[4],
2411 env->gregs[5],
2412 env->gregs[6],
2413 env->gregs[7],
2414 env->gregs[0],
5945cfcb
PM		 2415 env->gregs[1],
2416 0, 0);
9c2a9ea1 2417 env->gregs[0] = ret;
fdf9b3e8 2418 break;
c3b5bc8a
TS		 2419 case EXCP_INTERRUPT:
2420 /* just indicate that signals should be handled asap */
2421 break;
355fb23d
PB		 2422 case EXCP_DEBUG:
2423 {
2424 int sig;
2425
2426 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2427 if (sig)
2428 {
2429 info.si_signo = sig;
2430 info.si_errno = 0;
2431 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2432 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 2433 }
2434 }
2435 break;
c3b5bc8a
TS		 2436 case 0xa0:
2437 case 0xc0:
2438 info.si_signo = SIGSEGV;
2439 info.si_errno = 0;
2440 info.si_code = TARGET_SEGV_MAPERR;
2441 info._sifields._sigfault._addr = env->tea;
624f7979 2442 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 2443 break;
2444
fdf9b3e8
FB		 2445 default:
2446 printf ("Unhandled trap: 0x%x\n", trapnr);
2447 cpu_dump_state(env, stderr, fprintf, 0);
2448 exit (1);
2449 }
2450 process_pending_signals (env);
2451 }
2452}
2453#endif
2454
48733d19 2455#ifdef TARGET_CRIS
05390248 2456void cpu_loop(CPUCRISState *env)
48733d19
TS		 2457{
2458 int trapnr, ret;
c227f099 2459 target_siginfo_t info;
48733d19
TS		 2460
2461 while (1) {
2462 trapnr = cpu_cris_exec (env);
2463 switch (trapnr) {
2464 case 0xaa:
2465 {
2466 info.si_signo = SIGSEGV;
2467 info.si_errno = 0;
2468 /* XXX: check env->error_code */
2469 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2470 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 2471 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2472 }
2473 break;
b6d3abda
EI		 2474 case EXCP_INTERRUPT:
2475 /* just indicate that signals should be handled asap */
2476 break;
48733d19
TS		 2477 case EXCP_BREAK:
2478 ret = do_syscall(env,
2479 env->regs[9],
2480 env->regs[10],
2481 env->regs[11],
2482 env->regs[12],
2483 env->regs[13],
2484 env->pregs[7],
5945cfcb
PM		 2485 env->pregs[11],
2486 0, 0);
48733d19 2487 env->regs[10] = ret;
48733d19
TS		 2488 break;
2489 case EXCP_DEBUG:
2490 {
2491 int sig;
2492
2493 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2494 if (sig)
2495 {
2496 info.si_signo = sig;
2497 info.si_errno = 0;
2498 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2499 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2500 }
2501 }
2502 break;
2503 default:
2504 printf ("Unhandled trap: 0x%x\n", trapnr);
2505 cpu_dump_state(env, stderr, fprintf, 0);
2506 exit (1);
2507 }
2508 process_pending_signals (env);
2509 }
2510}
2511#endif
2512
b779e29e 2513#ifdef TARGET_MICROBLAZE
05390248 2514void cpu_loop(CPUMBState *env)
b779e29e
EI		 2515{
2516 int trapnr, ret;
c227f099 2517 target_siginfo_t info;
b779e29e
EI		 2518
2519 while (1) {
2520 trapnr = cpu_mb_exec (env);
2521 switch (trapnr) {
2522 case 0xaa:
2523 {
2524 info.si_signo = SIGSEGV;
2525 info.si_errno = 0;
2526 /* XXX: check env->error_code */
2527 info.si_code = TARGET_SEGV_MAPERR;
2528 info._sifields._sigfault._addr = 0;
2529 queue_signal(env, info.si_signo, &info);
2530 }
2531 break;
2532 case EXCP_INTERRUPT:
2533 /* just indicate that signals should be handled asap */
2534 break;
2535 case EXCP_BREAK:
2536 /* Return address is 4 bytes after the call. */
2537 env->regs[14] += 4;
2538 ret = do_syscall(env,
2539 env->regs[12],
2540 env->regs[5],
2541 env->regs[6],
2542 env->regs[7],
2543 env->regs[8],
2544 env->regs[9],
5945cfcb
PM		 2545 env->regs[10],
2546 0, 0);
b779e29e
EI		 2547 env->regs[3] = ret;
2548 env->sregs[SR_PC] = env->regs[14];
2549 break;
b76da7e3
EI		 2550 case EXCP_HW_EXCP:
2551 env->regs[17] = env->sregs[SR_PC] + 4;
2552 if (env->iflags & D_FLAG) {
2553 env->sregs[SR_ESR] |= 1 << 12;
2554 env->sregs[SR_PC] -= 4;
b4916d7b 2555 /* FIXME: if branch was immed, replay the imm as well. */
b76da7e3
EI		 2556 }
2557
2558 env->iflags &= ~(IMM_FLAG | D_FLAG);
2559
2560 switch (env->sregs[SR_ESR] & 31) {
22a78d64
EI		 2561 case ESR_EC_DIVZERO:
2562 info.si_signo = SIGFPE;
2563 info.si_errno = 0;
2564 info.si_code = TARGET_FPE_FLTDIV;
2565 info._sifields._sigfault._addr = 0;
2566 queue_signal(env, info.si_signo, &info);
2567 break;
b76da7e3
EI		 2568 case ESR_EC_FPU:
2569 info.si_signo = SIGFPE;
2570 info.si_errno = 0;
2571 if (env->sregs[SR_FSR] & FSR_IO) {
2572 info.si_code = TARGET_FPE_FLTINV;
2573 }
2574 if (env->sregs[SR_FSR] & FSR_DZ) {
2575 info.si_code = TARGET_FPE_FLTDIV;
2576 }
2577 info._sifields._sigfault._addr = 0;
2578 queue_signal(env, info.si_signo, &info);
2579 break;
2580 default:
2581 printf ("Unhandled hw-exception: 0x%x\n",
2e42d52d 2582 env->sregs[SR_ESR] & ESR_EC_MASK);
b76da7e3
EI		 2583 cpu_dump_state(env, stderr, fprintf, 0);
2584 exit (1);
2585 break;
2586 }
2587 break;
b779e29e
EI		 2588 case EXCP_DEBUG:
2589 {
2590 int sig;
2591
2592 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2593 if (sig)
2594 {
2595 info.si_signo = sig;
2596 info.si_errno = 0;
2597 info.si_code = TARGET_TRAP_BRKPT;
2598 queue_signal(env, info.si_signo, &info);
2599 }
2600 }
2601 break;
2602 default:
2603 printf ("Unhandled trap: 0x%x\n", trapnr);
2604 cpu_dump_state(env, stderr, fprintf, 0);
2605 exit (1);
2606 }
2607 process_pending_signals (env);
2608 }
2609}
2610#endif
2611
e6e5906b
PB		 2612#ifdef TARGET_M68K
2613
2614void cpu_loop(CPUM68KState *env)
2615{
2616 int trapnr;
2617 unsigned int n;
c227f099 2618 target_siginfo_t info;
e6e5906b 2619 TaskState *ts = env->opaque;
3b46e624 2620
e6e5906b
PB		 2621 for(;;) {
2622 trapnr = cpu_m68k_exec(env);
2623 switch(trapnr) {
2624 case EXCP_ILLEGAL:
2625 {
2626 if (ts->sim_syscalls) {
2627 uint16_t nr;
2628 nr = lduw(env->pc + 2);
2629 env->pc += 4;
2630 do_m68k_simcall(env, nr);
2631 } else {
2632 goto do_sigill;
2633 }
2634 }
2635 break;
a87295e8 2636 case EXCP_HALT_INSN:
e6e5906b 2637 /* Semihosing syscall. */
a87295e8 2638 env->pc += 4;
e6e5906b
PB		 2639 do_m68k_semihosting(env, env->dregs[0]);
2640 break;
2641 case EXCP_LINEA:
2642 case EXCP_LINEF:
2643 case EXCP_UNSUPPORTED:
2644 do_sigill:
2645 info.si_signo = SIGILL;
2646 info.si_errno = 0;
2647 info.si_code = TARGET_ILL_ILLOPN;
2648 info._sifields._sigfault._addr = env->pc;
624f7979 2649 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2650 break;
2651 case EXCP_TRAP0:
2652 {
2653 ts->sim_syscalls = 0;
2654 n = env->dregs[0];
2655 env->pc += 2;
5fafdf24
TS		 2656 env->dregs[0] = do_syscall(env,
2657 n,
e6e5906b
PB		 2658 env->dregs[1],
2659 env->dregs[2],
2660 env->dregs[3],
2661 env->dregs[4],
2662 env->dregs[5],
5945cfcb
PM		 2663 env->aregs[0],
2664 0, 0);
e6e5906b
PB		 2665 }
2666 break;
2667 case EXCP_INTERRUPT:
2668 /* just indicate that signals should be handled asap */
2669 break;
2670 case EXCP_ACCESS:
2671 {
2672 info.si_signo = SIGSEGV;
2673 info.si_errno = 0;
2674 /* XXX: check env->error_code */
2675 info.si_code = TARGET_SEGV_MAPERR;
2676 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2677 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2678 }
2679 break;
2680 case EXCP_DEBUG:
2681 {
2682 int sig;
2683
2684 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2685 if (sig)
2686 {
2687 info.si_signo = sig;
2688 info.si_errno = 0;
2689 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2690 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2691 }
2692 }
2693 break;
2694 default:
5fafdf24 2695 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2696 trapnr);
2697 cpu_dump_state(env, stderr, fprintf, 0);
2698 abort();
2699 }
2700 process_pending_signals(env);
2701 }
2702}
2703#endif /* TARGET_M68K */
2704
7a3148a9 2705#ifdef TARGET_ALPHA
6910b8f6
RH		 2706static void do_store_exclusive(CPUAlphaState *env, int reg, int quad)
2707{
2708 target_ulong addr, val, tmp;
2709 target_siginfo_t info;
2710 int ret = 0;
2711
2712 addr = env->lock_addr;
2713 tmp = env->lock_st_addr;
2714 env->lock_addr = -1;
2715 env->lock_st_addr = 0;
2716
2717 start_exclusive();
2718 mmap_lock();
2719
2720 if (addr == tmp) {
2721 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
2722 goto do_sigsegv;
2723 }
2724
2725 if (val == env->lock_value) {
2726 tmp = env->ir[reg];
2727 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
2728 goto do_sigsegv;
2729 }
2730 ret = 1;
2731 }
2732 }
2733 env->ir[reg] = ret;
2734 env->pc += 4;
2735
2736 mmap_unlock();
2737 end_exclusive();
2738 return;
2739
2740 do_sigsegv:
2741 mmap_unlock();
2742 end_exclusive();
2743
2744 info.si_signo = TARGET_SIGSEGV;
2745 info.si_errno = 0;
2746 info.si_code = TARGET_SEGV_MAPERR;
2747 info._sifields._sigfault._addr = addr;
2748 queue_signal(env, TARGET_SIGSEGV, &info);
2749}
2750
05390248 2751void cpu_loop(CPUAlphaState *env)
7a3148a9 2752{
e96efcfc 2753 int trapnr;
c227f099 2754 target_siginfo_t info;
6049f4f8 2755 abi_long sysret;
3b46e624 2756
7a3148a9
JM		 2757 while (1) {
2758 trapnr = cpu_alpha_exec (env);
3b46e624 2759
ac316ca4
RH		 2760 /* All of the traps imply a transition through PALcode, which
2761 implies an REI instruction has been executed. Which means
2762 that the intr_flag should be cleared. */
2763 env->intr_flag = 0;
2764
7a3148a9
JM		 2765 switch (trapnr) {
2766 case EXCP_RESET:
2767 fprintf(stderr, "Reset requested. Exit\n");
2768 exit(1);
2769 break;
2770 case EXCP_MCHK:
2771 fprintf(stderr, "Machine check exception. Exit\n");
2772 exit(1);
2773 break;
07b6c13b
RH		 2774 case EXCP_SMP_INTERRUPT:
2775 case EXCP_CLK_INTERRUPT:
2776 case EXCP_DEV_INTERRUPT:
5fafdf24 2777 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2778 exit(1);
2779 break;
07b6c13b 2780 case EXCP_MMFAULT:
6910b8f6 2781 env->lock_addr = -1;
6049f4f8
RH		 2782 info.si_signo = TARGET_SIGSEGV;
2783 info.si_errno = 0;
129d8aa5 2784 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
0be1d07c 2785 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
129d8aa5 2786 info._sifields._sigfault._addr = env->trap_arg0;
6049f4f8 2787 queue_signal(env, info.si_signo, &info);
7a3148a9 2788 break;
7a3148a9 2789 case EXCP_UNALIGN:
6910b8f6 2790 env->lock_addr = -1;
6049f4f8
RH		 2791 info.si_signo = TARGET_SIGBUS;
2792 info.si_errno = 0;
2793 info.si_code = TARGET_BUS_ADRALN;
129d8aa5 2794 info._sifields._sigfault._addr = env->trap_arg0;
6049f4f8 2795 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2796 break;
2797 case EXCP_OPCDEC:
6049f4f8 2798 do_sigill:
6910b8f6 2799 env->lock_addr = -1;
6049f4f8
RH		 2800 info.si_signo = TARGET_SIGILL;
2801 info.si_errno = 0;
2802 info.si_code = TARGET_ILL_ILLOPC;
2803 info._sifields._sigfault._addr = env->pc;
2804 queue_signal(env, info.si_signo, &info);
7a3148a9 2805 break;
07b6c13b
RH		 2806 case EXCP_ARITH:
2807 env->lock_addr = -1;
2808 info.si_signo = TARGET_SIGFPE;
2809 info.si_errno = 0;
2810 info.si_code = TARGET_FPE_FLTINV;
2811 info._sifields._sigfault._addr = env->pc;
2812 queue_signal(env, info.si_signo, &info);
2813 break;
7a3148a9 2814 case EXCP_FEN:
6049f4f8 2815 /* No-op. Linux simply re-enables the FPU. */
7a3148a9 2816 break;
07b6c13b 2817 case EXCP_CALL_PAL:
6910b8f6 2818 env->lock_addr = -1;
07b6c13b 2819 switch (env->error_code) {
6049f4f8
RH		 2820 case 0x80:
2821 /* BPT */
2822 info.si_signo = TARGET_SIGTRAP;
2823 info.si_errno = 0;
2824 info.si_code = TARGET_TRAP_BRKPT;
2825 info._sifields._sigfault._addr = env->pc;
2826 queue_signal(env, info.si_signo, &info);
2827 break;
2828 case 0x81:
2829 /* BUGCHK */
2830 info.si_signo = TARGET_SIGTRAP;
2831 info.si_errno = 0;
2832 info.si_code = 0;
2833 info._sifields._sigfault._addr = env->pc;
2834 queue_signal(env, info.si_signo, &info);
2835 break;
2836 case 0x83:
2837 /* CALLSYS */
2838 trapnr = env->ir[IR_V0];
2839 sysret = do_syscall(env, trapnr,
2840 env->ir[IR_A0], env->ir[IR_A1],
2841 env->ir[IR_A2], env->ir[IR_A3],
5945cfcb
PM		 2842 env->ir[IR_A4], env->ir[IR_A5],
2843 0, 0);
a5b3b13b
RH		 2844 if (trapnr == TARGET_NR_sigreturn
2845 || trapnr == TARGET_NR_rt_sigreturn) {
2846 break;
2847 }
2848 /* Syscall writes 0 to V0 to bypass error check, similar
0e141977
RH		 2849 to how this is handled internal to Linux kernel.
2850 (Ab)use trapnr temporarily as boolean indicating error. */
2851 trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
2852 env->ir[IR_V0] = (trapnr ? -sysret : sysret);
2853 env->ir[IR_A3] = trapnr;
6049f4f8
RH		 2854 break;
2855 case 0x86:
2856 /* IMB */
2857 /* ??? We can probably elide the code using page_unprotect
2858 that is checking for self-modifying code. Instead we
2859 could simply call tb_flush here. Until we work out the
2860 changes required to turn off the extra write protection,
2861 this can be a no-op. */
2862 break;
2863 case 0x9E:
2864 /* RDUNIQUE */
2865 /* Handled in the translator for usermode. */
2866 abort();
2867 case 0x9F:
2868 /* WRUNIQUE */
2869 /* Handled in the translator for usermode. */
2870 abort();
2871 case 0xAA:
2872 /* GENTRAP */
2873 info.si_signo = TARGET_SIGFPE;
2874 switch (env->ir[IR_A0]) {
2875 case TARGET_GEN_INTOVF:
2876 info.si_code = TARGET_FPE_INTOVF;
2877 break;
2878 case TARGET_GEN_INTDIV:
2879 info.si_code = TARGET_FPE_INTDIV;
2880 break;
2881 case TARGET_GEN_FLTOVF:
2882 info.si_code = TARGET_FPE_FLTOVF;
2883 break;
2884 case TARGET_GEN_FLTUND:
2885 info.si_code = TARGET_FPE_FLTUND;
2886 break;
2887 case TARGET_GEN_FLTINV:
2888 info.si_code = TARGET_FPE_FLTINV;
2889 break;
2890 case TARGET_GEN_FLTINE:
2891 info.si_code = TARGET_FPE_FLTRES;
2892 break;
2893 case TARGET_GEN_ROPRAND:
2894 info.si_code = 0;
2895 break;
2896 default:
2897 info.si_signo = TARGET_SIGTRAP;
2898 info.si_code = 0;
2899 break;
2900 }
2901 info.si_errno = 0;
2902 info._sifields._sigfault._addr = env->pc;
2903 queue_signal(env, info.si_signo, &info);
2904 break;
2905 default:
2906 goto do_sigill;
2907 }
7a3148a9 2908 break;
7a3148a9 2909 case EXCP_DEBUG:
6049f4f8
RH		 2910 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2911 if (info.si_signo) {
6910b8f6 2912 env->lock_addr = -1;
6049f4f8
RH		 2913 info.si_errno = 0;
2914 info.si_code = TARGET_TRAP_BRKPT;
2915 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2916 }
2917 break;
6910b8f6
RH		 2918 case EXCP_STL_C:
2919 case EXCP_STQ_C:
2920 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
2921 break;
d0f20495
RH		 2922 case EXCP_INTERRUPT:
2923 /* Just indicate that signals should be handled asap. */
2924 break;
7a3148a9
JM		 2925 default:
2926 printf ("Unhandled trap: 0x%x\n", trapnr);
2927 cpu_dump_state(env, stderr, fprintf, 0);
2928 exit (1);
2929 }
2930 process_pending_signals (env);
2931 }
2932}
2933#endif /* TARGET_ALPHA */
2934
a4c075f1
UH		 2935#ifdef TARGET_S390X
2936void cpu_loop(CPUS390XState *env)
2937{
2938 int trapnr;
2939 target_siginfo_t info;
2940
2941 while (1) {
2942 trapnr = cpu_s390x_exec (env);
2943
2944 switch (trapnr) {
2945 case EXCP_INTERRUPT:
2946 /* just indicate that signals should be handled asap */
2947 break;
2948 case EXCP_DEBUG:
2949 {
2950 int sig;
2951
2952 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2953 if (sig) {
2954 info.si_signo = sig;
2955 info.si_errno = 0;
2956 info.si_code = TARGET_TRAP_BRKPT;
2957 queue_signal(env, info.si_signo, &info);
2958 }
2959 }
2960 break;
2961 case EXCP_SVC:
2962 {
2963 int n = env->int_svc_code;
2964 if (!n) {
2965 /* syscalls > 255 */
2966 n = env->regs[1];
2967 }
2968 env->psw.addr += env->int_svc_ilc;
2969 env->regs[2] = do_syscall(env, n,
2970 env->regs[2],
2971 env->regs[3],
2972 env->regs[4],
2973 env->regs[5],
2974 env->regs[6],
5945cfcb
PM		 2975 env->regs[7],
2976 0, 0);
a4c075f1
UH		 2977 }
2978 break;
2979 case EXCP_ADDR:
2980 {
2981 info.si_signo = SIGSEGV;
2982 info.si_errno = 0;
2983 /* XXX: check env->error_code */
2984 info.si_code = TARGET_SEGV_MAPERR;
2985 info._sifields._sigfault._addr = env->__excp_addr;
2986 queue_signal(env, info.si_signo, &info);
2987 }
2988 break;
2989 case EXCP_SPEC:
2990 {
2991 fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4));
2992 info.si_signo = SIGILL;
2993 info.si_errno = 0;
2994 info.si_code = TARGET_ILL_ILLOPC;
2995 info._sifields._sigfault._addr = env->__excp_addr;
2996 queue_signal(env, info.si_signo, &info);
2997 }
2998 break;
2999 default:
3000 printf ("Unhandled trap: 0x%x\n", trapnr);
3001 cpu_dump_state(env, stderr, fprintf, 0);
3002 exit (1);
3003 }
3004 process_pending_signals (env);
3005 }
3006}
3007
3008#endif /* TARGET_S390X */
3009
9349b4f9 3010THREAD CPUArchState *thread_env;
59faf6d6 3011
edf8e2af
MW		 3012void task_settid(TaskState *ts)
3013{
3014 if (ts->ts_tid == 0) {
2f7bb878 3015#ifdef CONFIG_USE_NPTL
edf8e2af
MW		 3016 ts->ts_tid = (pid_t)syscall(SYS_gettid);
3017#else
3018 /* when no threads are used, tid becomes pid */
3019 ts->ts_tid = getpid();
3020#endif
3021 }
3022}
3023
3024void stop_all_tasks(void)
3025{
3026 /*
3027 * We trust that when using NPTL, start_exclusive()
3028 * handles thread stopping correctly.
3029 */
3030 start_exclusive();
3031}
3032
c3a92833 3033/* Assumes contents are already zeroed. */
624f7979
PB		 3034void init_task_state(TaskState *ts)
3035{
3036 int i;
3037
624f7979
PB		 3038 ts->used = 1;
3039 ts->first_free = ts->sigqueue_table;
3040 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
3041 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
3042 }
3043 ts->sigqueue_table[i].next = NULL;
3044}
fc9c5412
JS		 3045
3046static void handle_arg_help(const char *arg)
3047{
3048 usage();
3049}
3050
3051static void handle_arg_log(const char *arg)
3052{
3053 int mask;
3054 const CPULogItem *item;
3055
3056 mask = cpu_str_to_log_mask(arg);
3057 if (!mask) {
3058 printf("Log items (comma separated):\n");
3059 for (item = cpu_log_items; item->mask != 0; item++) {
3060 printf("%-10s %s\n", item->name, item->help);
3061 }
3062 exit(1);
3063 }
3064 cpu_set_log(mask);
3065}
3066
50171d42 3067static void handle_arg_log_filename(const char *arg)
3068{
3069 cpu_set_log_filename(arg);
3070}
3071
fc9c5412
JS		 3072static void handle_arg_set_env(const char *arg)
3073{
3074 char *r, *p, *token;
3075 r = p = strdup(arg);
3076 while ((token = strsep(&p, ",")) != NULL) {
3077 if (envlist_setenv(envlist, token) != 0) {
3078 usage();
3079 }
3080 }
3081 free(r);
3082}
3083
3084static void handle_arg_unset_env(const char *arg)
3085{
3086 char *r, *p, *token;
3087 r = p = strdup(arg);
3088 while ((token = strsep(&p, ",")) != NULL) {
3089 if (envlist_unsetenv(envlist, token) != 0) {
3090 usage();
3091 }
3092 }
3093 free(r);
3094}
3095
3096static void handle_arg_argv0(const char *arg)
3097{
3098 argv0 = strdup(arg);
3099}
3100
3101static void handle_arg_stack_size(const char *arg)
3102{
3103 char *p;
3104 guest_stack_size = strtoul(arg, &p, 0);
3105 if (guest_stack_size == 0) {
3106 usage();
3107 }
3108
3109 if (*p == 'M') {
3110 guest_stack_size *= 1024 * 1024;
3111 } else if (*p == 'k' || *p == 'K') {
3112 guest_stack_size *= 1024;
3113 }
3114}
3115
3116static void handle_arg_ld_prefix(const char *arg)
3117{
3118 interp_prefix = strdup(arg);
3119}
3120
3121static void handle_arg_pagesize(const char *arg)
3122{
3123 qemu_host_page_size = atoi(arg);
3124 if (qemu_host_page_size == 0 ||
3125 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
3126 fprintf(stderr, "page size must be a power of two\n");
3127 exit(1);
3128 }
3129}
3130
3131static void handle_arg_gdb(const char *arg)
3132{
3133 gdbstub_port = atoi(arg);
3134}
3135
3136static void handle_arg_uname(const char *arg)
3137{
3138 qemu_uname_release = strdup(arg);
3139}
3140
3141static void handle_arg_cpu(const char *arg)
3142{
3143 cpu_model = strdup(arg);
c8057f95 3144 if (cpu_model == NULL || is_help_option(cpu_model)) {
fc9c5412
JS		 3145 /* XXX: implement xxx_cpu_list for targets that still miss it */
3146#if defined(cpu_list_id)
3147 cpu_list_id(stdout, &fprintf, "");
3148#elif defined(cpu_list)
3149 cpu_list(stdout, &fprintf); /* deprecated */
3150#endif
3151 exit(1);
3152 }
3153}
3154
3155#if defined(CONFIG_USE_GUEST_BASE)
3156static void handle_arg_guest_base(const char *arg)
3157{
3158 guest_base = strtol(arg, NULL, 0);
3159 have_guest_base = 1;
3160}
3161
3162static void handle_arg_reserved_va(const char *arg)
3163{
3164 char *p;
3165 int shift = 0;
3166 reserved_va = strtoul(arg, &p, 0);
3167 switch (*p) {
3168 case 'k':
3169 case 'K':
3170 shift = 10;
3171 break;
3172 case 'M':
3173 shift = 20;
3174 break;
3175 case 'G':
3176 shift = 30;
3177 break;
3178 }
3179 if (shift) {
3180 unsigned long unshifted = reserved_va;
3181 p++;
3182 reserved_va <<= shift;
3183 if (((reserved_va >> shift) != unshifted)
3184#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3185 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3186#endif
3187 ) {
3188 fprintf(stderr, "Reserved virtual address too big\n");
3189 exit(1);
3190 }
3191 }
3192 if (*p) {
3193 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
3194 exit(1);
3195 }
3196}
3197#endif
3198
3199static void handle_arg_singlestep(const char *arg)
3200{
3201 singlestep = 1;
3202}
3203
3204static void handle_arg_strace(const char *arg)
3205{
3206 do_strace = 1;
3207}
3208
3209static void handle_arg_version(const char *arg)
3210{
3211 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION
3212 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
1386d4c0 3213 exit(0);
fc9c5412
JS		 3214}
3215
3216struct qemu_argument {
3217 const char *argv;
3218 const char *env;
3219 bool has_arg;
3220 void (*handle_opt)(const char *arg);
3221 const char *example;
3222 const char *help;
3223};
3224
42644cee 3225static const struct qemu_argument arg_table[] = {
fc9c5412
JS		 3226 {"h", "", false, handle_arg_help,
3227 "", "print this help"},
3228 {"g", "QEMU_GDB", true, handle_arg_gdb,
3229 "port", "wait gdb connection to 'port'"},
3230 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
3231 "path", "set the elf interpreter prefix to 'path'"},
3232 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
3233 "size", "set the stack size to 'size' bytes"},
3234 {"cpu", "QEMU_CPU", true, handle_arg_cpu,
c8057f95 3235 "model", "select CPU (-cpu help for list)"},
fc9c5412
JS		 3236 {"E", "QEMU_SET_ENV", true, handle_arg_set_env,
3237 "var=value", "sets targets environment variable (see below)"},
3238 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
3239 "var", "unsets targets environment variable (see below)"},
3240 {"0", "QEMU_ARGV0", true, handle_arg_argv0,
3241 "argv0", "forces target process argv[0] to be 'argv0'"},
3242 {"r", "QEMU_UNAME", true, handle_arg_uname,
3243 "uname", "set qemu uname release string to 'uname'"},
3244#if defined(CONFIG_USE_GUEST_BASE)
3245 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
3246 "address", "set guest_base address to 'address'"},
3247 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
3248 "size", "reserve 'size' bytes for guest virtual address space"},
3249#endif
3250 {"d", "QEMU_LOG", true, handle_arg_log,
3251 "options", "activate log"},
50171d42 3252 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
3253 "logfile", "override default logfile location"},
fc9c5412
JS		 3254 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
3255 "pagesize", "set the host page size to 'pagesize'"},
3256 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
3257 "", "run in singlestep mode"},
3258 {"strace", "QEMU_STRACE", false, handle_arg_strace,
3259 "", "log system calls"},
3260 {"version", "QEMU_VERSION", false, handle_arg_version,
1386d4c0 3261 "", "display version information and exit"},
fc9c5412
JS		 3262 {NULL, NULL, false, NULL, NULL, NULL}
3263};
3264
3265static void usage(void)
3266{
42644cee 3267 const struct qemu_argument *arginfo;
fc9c5412
JS		 3268 int maxarglen;
3269 int maxenvlen;
3270
3271 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
3272 "Linux CPU emulator (compiled for " TARGET_ARCH " emulation)\n"
3273 "\n"
3274 "Options and associated environment variables:\n"
3275 "\n");
3276
3277 maxarglen = maxenvlen = 0;
3278
3279 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3280 if (strlen(arginfo->env) > maxenvlen) {
3281 maxenvlen = strlen(arginfo->env);
3282 }
3283 if (strlen(arginfo->argv) > maxarglen) {
3284 maxarglen = strlen(arginfo->argv);
3285 }
3286 }
3287
3288 printf("%-*s%-*sDescription\n", maxarglen+3, "Argument",
3289 maxenvlen+1, "Env-variable");
3290
3291 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3292 if (arginfo->has_arg) {
3293 printf("-%s %-*s %-*s %s\n", arginfo->argv,
3294 (int)(maxarglen-strlen(arginfo->argv)), arginfo->example,
3295 maxenvlen, arginfo->env, arginfo->help);
3296 } else {
3297 printf("-%-*s %-*s %s\n", maxarglen+1, arginfo->argv,
3298 maxenvlen, arginfo->env,
3299 arginfo->help);
3300 }
3301 }
3302
3303 printf("\n"
3304 "Defaults:\n"
3305 "QEMU_LD_PREFIX = %s\n"
3306 "QEMU_STACK_SIZE = %ld byte\n"
3307 "QEMU_LOG = %s\n",
3308 interp_prefix,
3309 guest_stack_size,
3310 DEBUG_LOGFILE);
3311
3312 printf("\n"
3313 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3314 "QEMU_UNSET_ENV environment variables to set and unset\n"
3315 "environment variables for the target process.\n"
3316 "It is possible to provide several variables by separating them\n"
3317 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3318 "provide the -E and -U options multiple times.\n"
3319 "The following lines are equivalent:\n"
3320 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3321 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3322 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3323 "Note that if you provide several changes to a single variable\n"
3324 "the last change will stay in effect.\n");
3325
3326 exit(1);
3327}
3328
3329static int parse_args(int argc, char **argv)
3330{
3331 const char *r;
3332 int optind;
42644cee 3333 const struct qemu_argument *arginfo;
fc9c5412
JS		 3334
3335 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3336 if (arginfo->env == NULL) {
3337 continue;
3338 }
3339
3340 r = getenv(arginfo->env);
3341 if (r != NULL) {
3342 arginfo->handle_opt(r);
3343 }
3344 }
3345
3346 optind = 1;
3347 for (;;) {
3348 if (optind >= argc) {
3349 break;
3350 }
3351 r = argv[optind];
3352 if (r[0] != '-') {
3353 break;
3354 }
3355 optind++;
3356 r++;
3357 if (!strcmp(r, "-")) {
3358 break;
3359 }
3360
3361 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3362 if (!strcmp(r, arginfo->argv)) {
fc9c5412 3363 if (arginfo->has_arg) {
1386d4c0
PM		 3364 if (optind >= argc) {
3365 usage();
3366 }
3367 arginfo->handle_opt(argv[optind]);
fc9c5412 3368 optind++;
1386d4c0
PM		 3369 } else {
3370 arginfo->handle_opt(NULL);
fc9c5412 3371 }
fc9c5412
JS		 3372 break;
3373 }
3374 }
3375
3376 /* no option matched the current argv */
3377 if (arginfo->handle_opt == NULL) {
3378 usage();
3379 }
3380 }
3381
3382 if (optind >= argc) {
3383 usage();
3384 }
3385
3386 filename = argv[optind];
3387 exec_path = argv[optind];
3388
3389 return optind;
3390}
3391
902b3d5c 3392int main(int argc, char **argv, char **envp)
31e31b8a 3393{
c235d738 3394 const char *log_file = DEBUG_LOGFILE;
01ffc75b 3395 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 3396 struct image_info info1, *info = &info1;
edf8e2af 3397 struct linux_binprm bprm;
48e15fc2 3398 TaskState *ts;
9349b4f9 3399 CPUArchState *env;
586314f2 3400 int optind;
04a6dfeb 3401 char **target_environ, **wrk;
7d8cec95
AJ		 3402 char **target_argv;
3403 int target_argc;
7d8cec95 3404 int i;
fd4d81dd 3405 int ret;
b12b6a18 3406
ce008c1f
AF		 3407 module_call_init(MODULE_INIT_QOM);
3408
902b3d5c 3409 qemu_cache_utils_init(envp);
3410
04a6dfeb
AJ		 3411 if ((envlist = envlist_create()) == NULL) {
3412 (void) fprintf(stderr, "Unable to allocate envlist\n");
3413 exit(1);
3414 }
3415
3416 /* add current environment into the list */
3417 for (wrk = environ; *wrk != NULL; wrk++) {
3418 (void) envlist_setenv(envlist, *wrk);
3419 }
3420
703e0e89
RH		 3421 /* Read the stack limit from the kernel. If it's "unlimited",
3422 then we can do little else besides use the default. */
3423 {
3424 struct rlimit lim;
3425 if (getrlimit(RLIMIT_STACK, &lim) == 0
81bbe906 3426 && lim.rlim_cur != RLIM_INFINITY
3427 && lim.rlim_cur == (target_long)lim.rlim_cur) {
703e0e89
RH		 3428 guest_stack_size = lim.rlim_cur;
3429 }
3430 }
3431
b1f9be31 3432 cpu_model = NULL;
b5ec5ce0 3433#if defined(cpudef_setup)
3434 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3435#endif
3436
c235d738
MF		 3437 /* init debug */
3438 cpu_set_log_filename(log_file);
fc9c5412 3439 optind = parse_args(argc, argv);
586314f2 3440
31e31b8a 3441 /* Zero out regs */
01ffc75b 3442 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 3443
3444 /* Zero out image_info */
3445 memset(info, 0, sizeof(struct image_info));
3446
edf8e2af
MW		 3447 memset(&bprm, 0, sizeof (bprm));
3448
74cd30b8
FB		 3449 /* Scan interp_prefix dir for replacement files. */
3450 init_paths(interp_prefix);
3451
46027c07 3452 if (cpu_model == NULL) {
aaed909a 3453#if defined(TARGET_I386)
46027c07
FB		 3454#ifdef TARGET_X86_64
3455 cpu_model = "qemu64";
3456#else
3457 cpu_model = "qemu32";
3458#endif
aaed909a 3459#elif defined(TARGET_ARM)
088ab16c 3460 cpu_model = "any";
d2fbca94
GX		 3461#elif defined(TARGET_UNICORE32)
3462 cpu_model = "any";
aaed909a
FB		 3463#elif defined(TARGET_M68K)
3464 cpu_model = "any";
3465#elif defined(TARGET_SPARC)
3466#ifdef TARGET_SPARC64
3467 cpu_model = "TI UltraSparc II";
3468#else
3469 cpu_model = "Fujitsu MB86904";
46027c07 3470#endif
aaed909a
FB		 3471#elif defined(TARGET_MIPS)
3472#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3473 cpu_model = "20Kc";
3474#else
3475 cpu_model = "24Kf";
3476#endif
d962783e
JL		 3477#elif defined TARGET_OPENRISC
3478 cpu_model = "or1200";
aaed909a 3479#elif defined(TARGET_PPC)
7ded4f52 3480#ifdef TARGET_PPC64
f7177937 3481 cpu_model = "970fx";
7ded4f52 3482#else
aaed909a 3483 cpu_model = "750";
7ded4f52 3484#endif
aaed909a
FB		 3485#else
3486 cpu_model = "any";
3487#endif
3488 }
d5ab9713
JK		 3489 tcg_exec_init(0);
3490 cpu_exec_init_all();
83fb7adf
FB		 3491 /* NOTE: we need to init the CPU at this stage to get
3492 qemu_host_page_size */
aaed909a
FB		 3493 env = cpu_init(cpu_model);
3494 if (!env) {
3495 fprintf(stderr, "Unable to find CPU definition\n");
3496 exit(1);
3497 }
b55a37c9 3498#if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
ff18b762 3499 cpu_reset(ENV_GET_CPU(env));
b55a37c9
BS		 3500#endif
3501
d5975363 3502 thread_env = env;
3b46e624 3503
b6741956
FB		 3504 if (getenv("QEMU_STRACE")) {
3505 do_strace = 1;
b92c47c1
TS		 3506 }
3507
04a6dfeb
AJ		 3508 target_environ = envlist_to_environ(envlist, NULL);
3509 envlist_free(envlist);
b12b6a18 3510
379f6698
PB		 3511#if defined(CONFIG_USE_GUEST_BASE)
3512 /*
3513 * Now that page sizes are configured in cpu_init() we can do
3514 * proper page alignment for guest_base.
3515 */
3516 guest_base = HOST_PAGE_ALIGN(guest_base);
68a1c816 3517
806d1021
MI		 3518 if (reserved_va || have_guest_base) {
3519 guest_base = init_guest_space(guest_base, reserved_va, 0,
3520 have_guest_base);
3521 if (guest_base == (unsigned long)-1) {
68a1c816
PB		 3522 fprintf(stderr, "Unable to reserve guest address space\n");
3523 exit(1);
3524 }
97cc7560 3525
806d1021
MI		 3526 if (reserved_va) {
3527 mmap_next_start = reserved_va;
97cc7560
DDAG		 3528 }
3529 }
14f24e14 3530#endif /* CONFIG_USE_GUEST_BASE */
379f6698
PB		 3531
3532 /*
3533 * Read in mmap_min_addr kernel parameter. This value is used
3534 * When loading the ELF image to determine whether guest_base
14f24e14 3535 * is needed. It is also used in mmap_find_vma.
379f6698 3536 */
14f24e14 3537 {
379f6698
PB		 3538 FILE *fp;
3539
3540 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
3541 unsigned long tmp;
3542 if (fscanf(fp, "%lu", &tmp) == 1) {
3543 mmap_min_addr = tmp;
3544 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
3545 }
3546 fclose(fp);
3547 }
3548 }
379f6698 3549
7d8cec95
AJ		 3550 /*
3551 * Prepare copy of argv vector for target.
3552 */
3553 target_argc = argc - optind;
3554 target_argv = calloc(target_argc + 1, sizeof (char *));
3555 if (target_argv == NULL) {
3556 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
3557 exit(1);
3558 }
3559
3560 /*
3561 * If argv0 is specified (using '-0' switch) we replace
3562 * argv[0] pointer with the given one.
3563 */
3564 i = 0;
3565 if (argv0 != NULL) {
3566 target_argv[i++] = strdup(argv0);
3567 }
3568 for (; i < target_argc; i++) {
3569 target_argv[i] = strdup(argv[optind + i]);
3570 }
3571 target_argv[target_argc] = NULL;
3572
7267c094 3573 ts = g_malloc0 (sizeof(TaskState));
edf8e2af
MW		 3574 init_task_state(ts);
3575 /* build Task State */
3576 ts->info = info;
3577 ts->bprm = &bprm;
3578 env->opaque = ts;
3579 task_settid(ts);
3580
fd4d81dd
AP		 3581 ret = loader_exec(filename, target_argv, target_environ, regs,
3582 info, &bprm);
3583 if (ret != 0) {
3584 printf("Error %d while loading %s\n", ret, filename);
b12b6a18
TS		 3585 _exit(1);
3586 }
3587
3588 for (wrk = target_environ; *wrk; wrk++) {
3589 free(*wrk);
31e31b8a 3590 }
3b46e624 3591
b12b6a18
TS		 3592 free(target_environ);
3593
2e77eac6 3594 if (qemu_log_enabled()) {
379f6698
PB		 3595#if defined(CONFIG_USE_GUEST_BASE)
3596 qemu_log("guest_base 0x%lx\n", guest_base);
3597#endif
2e77eac6
BS		 3598 log_page_dump();
3599
3600 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
3601 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
3602 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
3603 info->start_code);
3604 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
3605 info->start_data);
3606 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
3607 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
3608 info->start_stack);
3609 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
3610 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
3611 }
31e31b8a 3612
53a5960a 3613 target_set_brk(info->brk);
31e31b8a 3614 syscall_init();
66fb9763 3615 signal_init();
31e31b8a 3616
9002ec79
RH		 3617#if defined(CONFIG_USE_GUEST_BASE)
3618 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3619 generating the prologue until now so that the prologue can take
3620 the real value of GUEST_BASE into account. */
3621 tcg_prologue_init(&tcg_ctx);
3622#endif
3623
b346ff46 3624#if defined(TARGET_I386)
2e255c6b
FB		 3625 cpu_x86_set_cpl(env, 3);
3626
3802ce26 3627 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 3628 env->hflags |= HF_PE_MASK;
3629 if (env->cpuid_features & CPUID_SSE) {
3630 env->cr[4] |= CR4_OSFXSR_MASK;
3631 env->hflags |= HF_OSFXSR_MASK;
3632 }
d2fd1af7 3633#ifndef TARGET_ABI32
4dbc422b
FB		 3634 /* enable 64 bit mode if possible */
3635 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
3636 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
3637 exit(1);
3638 }
d2fd1af7 3639 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 3640 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 3641 env->hflags |= HF_LMA_MASK;
3642#endif
1bde465e 3643
415e561f
FB		 3644 /* flags setup : we activate the IRQs by default as in user mode */
3645 env->eflags |= IF_MASK;
3b46e624 3646
6dbad63e 3647 /* linux register setup */
d2fd1af7 3648#ifndef TARGET_ABI32
84409ddb
JM		 3649 env->regs[R_EAX] = regs->rax;
3650 env->regs[R_EBX] = regs->rbx;
3651 env->regs[R_ECX] = regs->rcx;
3652 env->regs[R_EDX] = regs->rdx;
3653 env->regs[R_ESI] = regs->rsi;
3654 env->regs[R_EDI] = regs->rdi;
3655 env->regs[R_EBP] = regs->rbp;
3656 env->regs[R_ESP] = regs->rsp;
3657 env->eip = regs->rip;
3658#else
0ecfa993
FB		 3659 env->regs[R_EAX] = regs->eax;
3660 env->regs[R_EBX] = regs->ebx;
3661 env->regs[R_ECX] = regs->ecx;
3662 env->regs[R_EDX] = regs->edx;
3663 env->regs[R_ESI] = regs->esi;
3664 env->regs[R_EDI] = regs->edi;
3665 env->regs[R_EBP] = regs->ebp;
3666 env->regs[R_ESP] = regs->esp;
dab2ed99 3667 env->eip = regs->eip;
84409ddb 3668#endif
31e31b8a 3669
f4beb510 3670 /* linux interrupt setup */
e441570f
AZ		 3671#ifndef TARGET_ABI32
3672 env->idt.limit = 511;
3673#else
3674 env->idt.limit = 255;
3675#endif
3676 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
3677 PROT_READ|PROT_WRITE,
3678 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3679 idt_table = g2h(env->idt.base);
f4beb510
FB		 3680 set_idt(0, 0);
3681 set_idt(1, 0);
3682 set_idt(2, 0);
3683 set_idt(3, 3);
3684 set_idt(4, 3);
ec95da6c 3685 set_idt(5, 0);
f4beb510
FB		 3686 set_idt(6, 0);
3687 set_idt(7, 0);
3688 set_idt(8, 0);
3689 set_idt(9, 0);
3690 set_idt(10, 0);
3691 set_idt(11, 0);
3692 set_idt(12, 0);
3693 set_idt(13, 0);
3694 set_idt(14, 0);
3695 set_idt(15, 0);
3696 set_idt(16, 0);
3697 set_idt(17, 0);
3698 set_idt(18, 0);
3699 set_idt(19, 0);
3700 set_idt(0x80, 3);
3701
6dbad63e 3702 /* linux segment setup */
8d18e893
FB		 3703 {
3704 uint64_t *gdt_table;
e441570f
AZ		 3705 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
3706 PROT_READ|PROT_WRITE,
3707 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 3708 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 3709 gdt_table = g2h(env->gdt.base);
d2fd1af7 3710#ifdef TARGET_ABI32
8d18e893
FB		 3711 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3712 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3713 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 3714#else
3715 /* 64 bit code segment */
3716 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3717 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3718 DESC_L_MASK |
3719 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3720#endif
8d18e893
FB		 3721 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
3722 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3723 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
3724 }
6dbad63e 3725 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 3726 cpu_x86_load_seg(env, R_SS, __USER_DS);
3727#ifdef TARGET_ABI32
6dbad63e
FB		 3728 cpu_x86_load_seg(env, R_DS, __USER_DS);
3729 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 3730 cpu_x86_load_seg(env, R_FS, __USER_DS);
3731 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 3732 /* This hack makes Wine work... */
3733 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 3734#else
3735 cpu_x86_load_seg(env, R_DS, 0);
3736 cpu_x86_load_seg(env, R_ES, 0);
3737 cpu_x86_load_seg(env, R_FS, 0);
3738 cpu_x86_load_seg(env, R_GS, 0);
3739#endif
b346ff46
FB		 3740#elif defined(TARGET_ARM)
3741 {
3742 int i;
b5ff1b31 3743 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 3744 for(i = 0; i < 16; i++) {
3745 env->regs[i] = regs->uregs[i];
3746 }
d8fd2954
PB		 3747 /* Enable BE8. */
3748 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
3749 && (info->elf_flags & EF_ARM_BE8)) {
3750 env->bswap_code = 1;
3751 }
b346ff46 3752 }
d2fbca94
GX		 3753#elif defined(TARGET_UNICORE32)
3754 {
3755 int i;
3756 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
3757 for (i = 0; i < 32; i++) {
3758 env->regs[i] = regs->uregs[i];
3759 }
3760 }
93ac68bc 3761#elif defined(TARGET_SPARC)
060366c5
FB		 3762 {
3763 int i;
3764 env->pc = regs->pc;
3765 env->npc = regs->npc;
3766 env->y = regs->y;
3767 for(i = 0; i < 8; i++)
3768 env->gregs[i] = regs->u_regs[i];
3769 for(i = 0; i < 8; i++)
3770 env->regwptr[i] = regs->u_regs[i + 8];
3771 }
67867308
FB		 3772#elif defined(TARGET_PPC)
3773 {
3774 int i;
3fc6c082 3775
0411a972
JM		 3776#if defined(TARGET_PPC64)
3777#if defined(TARGET_ABI32)
3778 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 3779#else
0411a972
JM		 3780 env->msr |= (target_ulong)1 << MSR_SF;
3781#endif
84409ddb 3782#endif
67867308
FB		 3783 env->nip = regs->nip;
3784 for(i = 0; i < 32; i++) {
3785 env->gpr[i] = regs->gpr[i];
3786 }
3787 }
e6e5906b
PB		 3788#elif defined(TARGET_M68K)
3789 {
e6e5906b
PB		 3790 env->pc = regs->pc;
3791 env->dregs[0] = regs->d0;
3792 env->dregs[1] = regs->d1;
3793 env->dregs[2] = regs->d2;
3794 env->dregs[3] = regs->d3;
3795 env->dregs[4] = regs->d4;
3796 env->dregs[5] = regs->d5;
3797 env->dregs[6] = regs->d6;
3798 env->dregs[7] = regs->d7;
3799 env->aregs[0] = regs->a0;
3800 env->aregs[1] = regs->a1;
3801 env->aregs[2] = regs->a2;
3802 env->aregs[3] = regs->a3;
3803 env->aregs[4] = regs->a4;
3804 env->aregs[5] = regs->a5;
3805 env->aregs[6] = regs->a6;
3806 env->aregs[7] = regs->usp;
3807 env->sr = regs->sr;
3808 ts->sim_syscalls = 1;
3809 }
b779e29e
EI		 3810#elif defined(TARGET_MICROBLAZE)
3811 {
3812 env->regs[0] = regs->r0;
3813 env->regs[1] = regs->r1;
3814 env->regs[2] = regs->r2;
3815 env->regs[3] = regs->r3;
3816 env->regs[4] = regs->r4;
3817 env->regs[5] = regs->r5;
3818 env->regs[6] = regs->r6;
3819 env->regs[7] = regs->r7;
3820 env->regs[8] = regs->r8;
3821 env->regs[9] = regs->r9;
3822 env->regs[10] = regs->r10;
3823 env->regs[11] = regs->r11;
3824 env->regs[12] = regs->r12;
3825 env->regs[13] = regs->r13;
3826 env->regs[14] = regs->r14;
3827 env->regs[15] = regs->r15;
3828 env->regs[16] = regs->r16;
3829 env->regs[17] = regs->r17;
3830 env->regs[18] = regs->r18;
3831 env->regs[19] = regs->r19;
3832 env->regs[20] = regs->r20;
3833 env->regs[21] = regs->r21;
3834 env->regs[22] = regs->r22;
3835 env->regs[23] = regs->r23;
3836 env->regs[24] = regs->r24;
3837 env->regs[25] = regs->r25;
3838 env->regs[26] = regs->r26;
3839 env->regs[27] = regs->r27;
3840 env->regs[28] = regs->r28;
3841 env->regs[29] = regs->r29;
3842 env->regs[30] = regs->r30;
3843 env->regs[31] = regs->r31;
3844 env->sregs[SR_PC] = regs->pc;
3845 }
048f6b4d
FB		 3846#elif defined(TARGET_MIPS)
3847 {
3848 int i;
3849
3850 for(i = 0; i < 32; i++) {
b5dc7732 3851 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 3852 }
0fddbbf2
NF		 3853 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
3854 if (regs->cp0_epc & 1) {
3855 env->hflags |= MIPS_HFLAG_M16;
3856 }
048f6b4d 3857 }
d962783e
JL		 3858#elif defined(TARGET_OPENRISC)
3859 {
3860 int i;
3861
3862 for (i = 0; i < 32; i++) {
3863 env->gpr[i] = regs->gpr[i];
3864 }
3865
3866 env->sr = regs->sr;
3867 env->pc = regs->pc;
3868 }
fdf9b3e8
FB		 3869#elif defined(TARGET_SH4)
3870 {
3871 int i;
3872
3873 for(i = 0; i < 16; i++) {
3874 env->gregs[i] = regs->regs[i];
3875 }
3876 env->pc = regs->pc;
3877 }
7a3148a9
JM		 3878#elif defined(TARGET_ALPHA)
3879 {
3880 int i;
3881
3882 for(i = 0; i < 28; i++) {
992f48a0 3883 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9 3884 }
dad081ee 3885 env->ir[IR_SP] = regs->usp;
7a3148a9 3886 env->pc = regs->pc;
7a3148a9 3887 }
48733d19
TS		 3888#elif defined(TARGET_CRIS)
3889 {
3890 env->regs[0] = regs->r0;
3891 env->regs[1] = regs->r1;
3892 env->regs[2] = regs->r2;
3893 env->regs[3] = regs->r3;
3894 env->regs[4] = regs->r4;
3895 env->regs[5] = regs->r5;
3896 env->regs[6] = regs->r6;
3897 env->regs[7] = regs->r7;
3898 env->regs[8] = regs->r8;
3899 env->regs[9] = regs->r9;
3900 env->regs[10] = regs->r10;
3901 env->regs[11] = regs->r11;
3902 env->regs[12] = regs->r12;
3903 env->regs[13] = regs->r13;
3904 env->regs[14] = info->start_stack;
3905 env->regs[15] = regs->acr;
3906 env->pc = regs->erp;
3907 }
a4c075f1
UH		 3908#elif defined(TARGET_S390X)
3909 {
3910 int i;
3911 for (i = 0; i < 16; i++) {
3912 env->regs[i] = regs->gprs[i];
3913 }
3914 env->psw.mask = regs->psw.mask;
3915 env->psw.addr = regs->psw.addr;
3916 }
b346ff46
FB		 3917#else
3918#error unsupported target CPU
3919#endif
31e31b8a 3920
d2fbca94 3921#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
a87295e8
PB		 3922 ts->stack_base = info->start_stack;
3923 ts->heap_base = info->brk;
3924 /* This will be filled in on the first SYS_HEAPINFO call. */
3925 ts->heap_limit = 0;
3926#endif
3927
74c33bed 3928 if (gdbstub_port) {
ff7a981a
PM		 3929 if (gdbserver_start(gdbstub_port) < 0) {
3930 fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
3931 gdbstub_port);
3932 exit(1);
3933 }
1fddef4b
FB		 3934 gdb_handlesig(env, 0);
3935 }
1b6b029e
FB		 3936 cpu_loop(env);
3937 /* never exits */
31e31b8a
FB		 3938 return 0;
3939}
Qemu copy for testing