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x86_64 fixes
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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
31e31b8a
FB		 4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20#include <stdlib.h>
21#include <stdio.h>
22#include <stdarg.h>
04369ff2 23#include <string.h>
31e31b8a 24#include <errno.h>
0ecfa993 25#include <unistd.h>
31e31b8a 26
3ef693a0 27#include "qemu.h"
31e31b8a 28
3ef693a0 29#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 30
74cd30b8 31static const char *interp_prefix = CONFIG_QEMU_PREFIX;
c5937220 32const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 33
3a4739d6 34#if defined(__i386__) && !defined(CONFIG_STATIC)
f801f97e
FB		 35/* Force usage of an ELF interpreter even if it is an ELF shared
36 object ! */
37const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
4304763b 38#endif
74cd30b8 39
93ac68bc 40/* for recent libc, we add these dummy symbols which are not declared
74cd30b8 41 when generating a linked object (bug in ld ?) */
fbf59244 42#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46027c07
FB		 43asm(".globl __preinit_array_start\n"
44 ".globl __preinit_array_end\n"
45 ".globl __init_array_start\n"
46 ".globl __init_array_end\n"
47 ".globl __fini_array_start\n"
48 ".globl __fini_array_end\n"
49 ".section \".rodata\"\n"
50 "__preinit_array_start:\n"
51 "__preinit_array_end:\n"
52 "__init_array_start:\n"
53 "__init_array_end:\n"
54 "__fini_array_start:\n"
55 "__fini_array_end:\n"
56 ".long 0\n");
74cd30b8
FB		 57#endif
58
9de5e440
FB		 59/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
60 we allocate a bigger stack. Need a better solution, for example
61 by remapping the process stack directly at the right place */
62unsigned long x86_stack_size = 512 * 1024;
31e31b8a
FB		 63
64void gemu_log(const char *fmt, ...)
65{
66 va_list ap;
67
68 va_start(ap, fmt);
69 vfprintf(stderr, fmt, ap);
70 va_end(ap);
71}
72
61190b14 73void cpu_outb(CPUState *env, int addr, int val)
367e86e8
FB		 74{
75 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
76}
77
61190b14 78void cpu_outw(CPUState *env, int addr, int val)
367e86e8
FB		 79{
80 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
81}
82
61190b14 83void cpu_outl(CPUState *env, int addr, int val)
367e86e8
FB		 84{
85 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
86}
87
61190b14 88int cpu_inb(CPUState *env, int addr)
367e86e8
FB		 89{
90 fprintf(stderr, "inb: port=0x%04x\n", addr);
91 return 0;
92}
93
61190b14 94int cpu_inw(CPUState *env, int addr)
367e86e8
FB		 95{
96 fprintf(stderr, "inw: port=0x%04x\n", addr);
97 return 0;
98}
99
61190b14 100int cpu_inl(CPUState *env, int addr)
367e86e8
FB		 101{
102 fprintf(stderr, "inl: port=0x%04x\n", addr);
103 return 0;
104}
105
a541f297 106int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 107{
108 return -1;
109}
110
28ab0e2e
FB		 111/* timers for rdtsc */
112
1dce7c3c 113#if 0
28ab0e2e
FB		 114
115static uint64_t emu_time;
116
117int64_t cpu_get_real_ticks(void)
118{
119 return emu_time++;
120}
121
122#endif
123
a541f297
FB		 124#ifdef TARGET_I386
125/***********************************************************/
126/* CPUX86 core interface */
127
02a1602e
FB		 128void cpu_smm_update(CPUState *env)
129{
130}
131
28ab0e2e
FB		 132uint64_t cpu_get_tsc(CPUX86State *env)
133{
134 return cpu_get_real_ticks();
135}
136
5fafdf24 137static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 138 int flags)
6dbad63e 139{
f4beb510 140 unsigned int e1, e2;
53a5960a 141 uint32_t *p;
6dbad63e
FB		 142 e1 = (addr << 16) | (limit & 0xffff);
143 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 144 e2 |= flags;
53a5960a
PB		 145 p = ptr;
146 p[0] = tswapl(e1);
147 p[1] = tswapl(e2);
f4beb510
FB		 148}
149
d2fd1af7
FB		 150#if TARGET_X86_64
151uint64_t idt_table[512];
152
153static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
154 uint64_t addr, unsigned int sel)
f4beb510 155{
4dbc422b 156 uint32_t *p, e1, e2;
f4beb510
FB		 157 e1 = (addr & 0xffff) | (sel << 16);
158 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 159 p = ptr;
4dbc422b
FB		 160 p[0] = tswap32(e1);
161 p[1] = tswap32(e2);
162 p[2] = tswap32(addr >> 32);
163 p[3] = 0;
6dbad63e 164}
d2fd1af7
FB		 165/* only dpl matters as we do only user space emulation */
166static void set_idt(int n, unsigned int dpl)
167{
168 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
169}
170#else
f4beb510
FB		 171uint64_t idt_table[256];
172
d2fd1af7
FB		 173static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
174 uint32_t addr, unsigned int sel)
175{
4dbc422b 176 uint32_t *p, e1, e2;
d2fd1af7
FB		 177 e1 = (addr & 0xffff) | (sel << 16);
178 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
179 p = ptr;
4dbc422b
FB		 180 p[0] = tswap32(e1);
181 p[1] = tswap32(e2);
d2fd1af7
FB		 182}
183
f4beb510
FB		 184/* only dpl matters as we do only user space emulation */
185static void set_idt(int n, unsigned int dpl)
186{
187 set_gate(idt_table + n, 0, dpl, 0, 0);
188}
d2fd1af7 189#endif
31e31b8a 190
89e957e7 191void cpu_loop(CPUX86State *env)
1b6b029e 192{
bc8a22cc 193 int trapnr;
992f48a0 194 abi_ulong pc;
9de5e440 195 target_siginfo_t info;
851e67a1 196
1b6b029e 197 for(;;) {
bc8a22cc 198 trapnr = cpu_x86_exec(env);
bc8a22cc 199 switch(trapnr) {
f4beb510 200 case 0x80:
d2fd1af7 201 /* linux syscall from int $0x80 */
5fafdf24
TS		 202 env->regs[R_EAX] = do_syscall(env,
203 env->regs[R_EAX],
f4beb510
FB		 204 env->regs[R_EBX],
205 env->regs[R_ECX],
206 env->regs[R_EDX],
207 env->regs[R_ESI],
208 env->regs[R_EDI],
209 env->regs[R_EBP]);
210 break;
d2fd1af7
FB		 211#ifndef TARGET_ABI32
212 case EXCP_SYSCALL:
213 /* linux syscall from syscall intruction */
214 env->regs[R_EAX] = do_syscall(env,
215 env->regs[R_EAX],
216 env->regs[R_EDI],
217 env->regs[R_ESI],
218 env->regs[R_EDX],
219 env->regs[10],
220 env->regs[8],
221 env->regs[9]);
222 env->eip = env->exception_next_eip;
223 break;
224#endif
f4beb510
FB		 225 case EXCP0B_NOSEG:
226 case EXCP0C_STACK:
227 info.si_signo = SIGBUS;
228 info.si_errno = 0;
229 info.si_code = TARGET_SI_KERNEL;
230 info._sifields._sigfault._addr = 0;
231 queue_signal(info.si_signo, &info);
232 break;
1b6b029e 233 case EXCP0D_GPF:
d2fd1af7 234 /* XXX: potential problem if ABI32 */
84409ddb 235#ifndef TARGET_X86_64
851e67a1 236 if (env->eflags & VM_MASK) {
89e957e7 237 handle_vm86_fault(env);
84409ddb
JM		 238 } else
239#endif
240 {
f4beb510
FB		 241 info.si_signo = SIGSEGV;
242 info.si_errno = 0;
243 info.si_code = TARGET_SI_KERNEL;
244 info._sifields._sigfault._addr = 0;
245 queue_signal(info.si_signo, &info);
1b6b029e
FB		 246 }
247 break;
b689bc57
FB		 248 case EXCP0E_PAGE:
249 info.si_signo = SIGSEGV;
250 info.si_errno = 0;
251 if (!(env->error_code & 1))
252 info.si_code = TARGET_SEGV_MAPERR;
253 else
254 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 255 info._sifields._sigfault._addr = env->cr[2];
b689bc57
FB		 256 queue_signal(info.si_signo, &info);
257 break;
9de5e440 258 case EXCP00_DIVZ:
84409ddb 259#ifndef TARGET_X86_64
bc8a22cc 260 if (env->eflags & VM_MASK) {
447db213 261 handle_vm86_trap(env, trapnr);
84409ddb
JM		 262 } else
263#endif
264 {
bc8a22cc
FB		 265 /* division by zero */
266 info.si_signo = SIGFPE;
267 info.si_errno = 0;
268 info.si_code = TARGET_FPE_INTDIV;
269 info._sifields._sigfault._addr = env->eip;
270 queue_signal(info.si_signo, &info);
271 }
9de5e440 272 break;
447db213
FB		 273 case EXCP01_SSTP:
274 case EXCP03_INT3:
84409ddb 275#ifndef TARGET_X86_64
447db213
FB		 276 if (env->eflags & VM_MASK) {
277 handle_vm86_trap(env, trapnr);
84409ddb
JM		 278 } else
279#endif
280 {
447db213
FB		 281 info.si_signo = SIGTRAP;
282 info.si_errno = 0;
283 if (trapnr == EXCP01_SSTP) {
284 info.si_code = TARGET_TRAP_BRKPT;
285 info._sifields._sigfault._addr = env->eip;
286 } else {
287 info.si_code = TARGET_SI_KERNEL;
288 info._sifields._sigfault._addr = 0;
289 }
290 queue_signal(info.si_signo, &info);
291 }
292 break;
9de5e440
FB		 293 case EXCP04_INTO:
294 case EXCP05_BOUND:
84409ddb 295#ifndef TARGET_X86_64
bc8a22cc 296 if (env->eflags & VM_MASK) {
447db213 297 handle_vm86_trap(env, trapnr);
84409ddb
JM		 298 } else
299#endif
300 {
bc8a22cc
FB		 301 info.si_signo = SIGSEGV;
302 info.si_errno = 0;
b689bc57 303 info.si_code = TARGET_SI_KERNEL;
bc8a22cc
FB		 304 info._sifields._sigfault._addr = 0;
305 queue_signal(info.si_signo, &info);
306 }
9de5e440
FB		 307 break;
308 case EXCP06_ILLOP:
309 info.si_signo = SIGILL;
310 info.si_errno = 0;
311 info.si_code = TARGET_ILL_ILLOPN;
312 info._sifields._sigfault._addr = env->eip;
313 queue_signal(info.si_signo, &info);
314 break;
315 case EXCP_INTERRUPT:
316 /* just indicate that signals should be handled asap */
317 break;
1fddef4b
FB		 318 case EXCP_DEBUG:
319 {
320 int sig;
321
322 sig = gdb_handlesig (env, TARGET_SIGTRAP);
323 if (sig)
324 {
325 info.si_signo = sig;
326 info.si_errno = 0;
327 info.si_code = TARGET_TRAP_BRKPT;
328 queue_signal(info.si_signo, &info);
329 }
330 }
331 break;
1b6b029e 332 default:
970a87a6 333 pc = env->segs[R_CS].base + env->eip;
5fafdf24 334 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 335 (long)pc, trapnr);
1b6b029e
FB		 336 abort();
337 }
66fb9763 338 process_pending_signals(env);
1b6b029e
FB		 339 }
340}
b346ff46
FB		 341#endif
342
343#ifdef TARGET_ARM
344
6f1f31c0 345/* XXX: find a better solution */
992f48a0 346extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
6f1f31c0 347
992f48a0 348static void arm_cache_flush(abi_ulong start, abi_ulong last)
6f1f31c0 349{
992f48a0 350 abi_ulong addr, last1;
6f1f31c0
FB		 351
352 if (last < start)
353 return;
354 addr = start;
355 for(;;) {
356 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
357 if (last1 > last)
358 last1 = last;
359 tb_invalidate_page_range(addr, last1 + 1);
360 if (last1 == last)
361 break;
362 addr = last1 + 1;
363 }
364}
365
b346ff46
FB		 366void cpu_loop(CPUARMState *env)
367{
368 int trapnr;
369 unsigned int n, insn;
370 target_siginfo_t info;
b5ff1b31 371 uint32_t addr;
3b46e624 372
b346ff46
FB		 373 for(;;) {
374 trapnr = cpu_arm_exec(env);
375 switch(trapnr) {
376 case EXCP_UDEF:
c6981055
FB		 377 {
378 TaskState *ts = env->opaque;
379 uint32_t opcode;
380
381 /* we handle the FPU emulation here, as Linux */
382 /* we get the opcode */
53a5960a 383 opcode = tget32(env->regs[15]);
3b46e624 384
19b045de 385 if (EmulateAll(opcode, &ts->fpa, env) == 0) {
c6981055
FB		 386 info.si_signo = SIGILL;
387 info.si_errno = 0;
388 info.si_code = TARGET_ILL_ILLOPN;
389 info._sifields._sigfault._addr = env->regs[15];
390 queue_signal(info.si_signo, &info);
391 } else {
392 /* increment PC */
393 env->regs[15] += 4;
394 }
395 }
b346ff46
FB		 396 break;
397 case EXCP_SWI:
06c949e6 398 case EXCP_BKPT:
b346ff46 399 {
ce4defa0 400 env->eabi = 1;
b346ff46 401 /* system call */
06c949e6
PB		 402 if (trapnr == EXCP_BKPT) {
403 if (env->thumb) {
53a5960a 404 insn = tget16(env->regs[15]);
06c949e6
PB		 405 n = insn & 0xff;
406 env->regs[15] += 2;
407 } else {
53a5960a 408 insn = tget32(env->regs[15]);
06c949e6
PB		 409 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
410 env->regs[15] += 4;
411 }
192c7bd9 412 } else {
06c949e6 413 if (env->thumb) {
53a5960a 414 insn = tget16(env->regs[15] - 2);
06c949e6
PB		 415 n = insn & 0xff;
416 } else {
53a5960a 417 insn = tget32(env->regs[15] - 4);
06c949e6
PB		 418 n = insn & 0xffffff;
419 }
192c7bd9
FB		 420 }
421
6f1f31c0
FB		 422 if (n == ARM_NR_cacheflush) {
423 arm_cache_flush(env->regs[0], env->regs[1]);
a4f81979
FB		 424 } else if (n == ARM_NR_semihosting
425 || n == ARM_NR_thumb_semihosting) {
426 env->regs[0] = do_arm_semihosting (env);
ce4defa0 427 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 428 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 429 /* linux syscall */
ce4defa0 430 if (env->thumb || n == 0) {
192c7bd9
FB		 431 n = env->regs[7];
432 } else {
433 n -= ARM_SYSCALL_BASE;
ce4defa0 434 env->eabi = 0;
192c7bd9 435 }
5fafdf24
TS		 436 env->regs[0] = do_syscall(env,
437 n,
b346ff46
FB		 438 env->regs[0],
439 env->regs[1],
440 env->regs[2],
441 env->regs[3],
442 env->regs[4],
e1a2849c 443 env->regs[5]);
b346ff46
FB		 444 } else {
445 goto error;
446 }
447 }
448 break;
43fff238
FB		 449 case EXCP_INTERRUPT:
450 /* just indicate that signals should be handled asap */
451 break;
68016c62 452 case EXCP_PREFETCH_ABORT:
b5ff1b31
FB		 453 addr = env->cp15.c6_data;
454 goto do_segv;
68016c62 455 case EXCP_DATA_ABORT:
b5ff1b31
FB		 456 addr = env->cp15.c6_insn;
457 goto do_segv;
458 do_segv:
68016c62
FB		 459 {
460 info.si_signo = SIGSEGV;
461 info.si_errno = 0;
462 /* XXX: check env->error_code */
463 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 464 info._sifields._sigfault._addr = addr;
68016c62
FB		 465 queue_signal(info.si_signo, &info);
466 }
467 break;
1fddef4b
FB		 468 case EXCP_DEBUG:
469 {
470 int sig;
471
472 sig = gdb_handlesig (env, TARGET_SIGTRAP);
473 if (sig)
474 {
475 info.si_signo = sig;
476 info.si_errno = 0;
477 info.si_code = TARGET_TRAP_BRKPT;
478 queue_signal(info.si_signo, &info);
479 }
480 }
481 break;
b346ff46
FB		 482 default:
483 error:
5fafdf24 484 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 485 trapnr);
7fe48483 486 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 487 abort();
488 }
489 process_pending_signals(env);
490 }
491}
492
493#endif
1b6b029e 494
93ac68bc
FB		 495#ifdef TARGET_SPARC
496
060366c5
FB		 497//#define DEBUG_WIN
498
2623cbaf
FB		 499/* WARNING: dealing with register windows _is_ complicated. More info
500 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 501static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
502{
503 index = (index + cwp * 16) & (16 * NWINDOWS - 1);
504 /* wrap handling : if cwp is on the last window, then we use the
505 registers 'after' the end */
506 if (index < 8 && env->cwp == (NWINDOWS - 1))
507 index += (16 * NWINDOWS);
508 return index;
509}
510
2623cbaf
FB		 511/* save the register window 'cwp1' */
512static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 513{
2623cbaf 514 unsigned int i;
992f48a0 515 abi_ulong sp_ptr;
3b46e624 516
53a5960a 517 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
060366c5 518#if defined(DEBUG_WIN)
5fafdf24 519 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
060366c5
FB		 520 (int)sp_ptr, cwp1);
521#endif
2623cbaf 522 for(i = 0; i < 16; i++) {
53a5960a 523 tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
992f48a0 524 sp_ptr += sizeof(abi_ulong);
2623cbaf 525 }
060366c5
FB		 526}
527
528static void save_window(CPUSPARCState *env)
529{
5ef54116 530#ifndef TARGET_SPARC64
2623cbaf
FB		 531 unsigned int new_wim;
532 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
533 ((1LL << NWINDOWS) - 1);
534 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
535 env->wim = new_wim;
5ef54116
FB		 536#else
537 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
538 env->cansave++;
539 env->canrestore--;
540#endif
060366c5
FB		 541}
542
543static void restore_window(CPUSPARCState *env)
544{
545 unsigned int new_wim, i, cwp1;
992f48a0 546 abi_ulong sp_ptr;
3b46e624 547
060366c5
FB		 548 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
549 ((1LL << NWINDOWS) - 1);
3b46e624 550
060366c5
FB		 551 /* restore the invalid window */
552 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
53a5960a 553 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
060366c5 554#if defined(DEBUG_WIN)
5fafdf24 555 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
060366c5
FB		 556 (int)sp_ptr, cwp1);
557#endif
2623cbaf 558 for(i = 0; i < 16; i++) {
53a5960a 559 env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
992f48a0 560 sp_ptr += sizeof(abi_ulong);
2623cbaf 561 }
060366c5 562 env->wim = new_wim;
5ef54116
FB		 563#ifdef TARGET_SPARC64
564 env->canrestore++;
565 if (env->cleanwin < NWINDOWS - 1)
566 env->cleanwin++;
567 env->cansave--;
568#endif
060366c5
FB		 569}
570
571static void flush_windows(CPUSPARCState *env)
572{
573 int offset, cwp1;
2623cbaf
FB		 574
575 offset = 1;
060366c5
FB		 576 for(;;) {
577 /* if restore would invoke restore_window(), then we can stop */
2623cbaf 578 cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
060366c5
FB		 579 if (env->wim & (1 << cwp1))
580 break;
2623cbaf 581 save_window_offset(env, cwp1);
060366c5
FB		 582 offset++;
583 }
2623cbaf
FB		 584 /* set wim so that restore will reload the registers */
585 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
586 env->wim = 1 << cwp1;
587#if defined(DEBUG_WIN)
588 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 589#endif
2623cbaf 590}
060366c5 591
93ac68bc
FB		 592void cpu_loop (CPUSPARCState *env)
593{
060366c5 594 int trapnr, ret;
61ff6f58 595 target_siginfo_t info;
3b46e624 596
060366c5
FB		 597 while (1) {
598 trapnr = cpu_sparc_exec (env);
3b46e624 599
060366c5 600 switch (trapnr) {
5ef54116 601#ifndef TARGET_SPARC64
5fafdf24 602 case 0x88:
060366c5 603 case 0x90:
5ef54116 604#else
cb33da57 605 case 0x110:
5ef54116
FB		 606 case 0x16d:
607#endif
060366c5 608 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 609 env->regwptr[0], env->regwptr[1],
610 env->regwptr[2], env->regwptr[3],
060366c5
FB		 611 env->regwptr[4], env->regwptr[5]);
612 if ((unsigned int)ret >= (unsigned int)(-515)) {
992f48a0 613#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 614 env->xcc |= PSR_CARRY;
615#else
060366c5 616 env->psr |= PSR_CARRY;
27908725 617#endif
060366c5
FB		 618 ret = -ret;
619 } else {
992f48a0 620#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 621 env->xcc &= ~PSR_CARRY;
622#else
060366c5 623 env->psr &= ~PSR_CARRY;
27908725 624#endif
060366c5
FB		 625 }
626 env->regwptr[0] = ret;
627 /* next instruction */
628 env->pc = env->npc;
629 env->npc = env->npc + 4;
630 break;
631 case 0x83: /* flush windows */
992f48a0
BS		 632#ifdef TARGET_ABI32
633 case 0x103:
634#endif
2623cbaf 635 flush_windows(env);
060366c5
FB		 636 /* next instruction */
637 env->pc = env->npc;
638 env->npc = env->npc + 4;
639 break;
3475187d 640#ifndef TARGET_SPARC64
060366c5
FB		 641 case TT_WIN_OVF: /* window overflow */
642 save_window(env);
643 break;
644 case TT_WIN_UNF: /* window underflow */
645 restore_window(env);
646 break;
61ff6f58
FB		 647 case TT_TFAULT:
648 case TT_DFAULT:
649 {
650 info.si_signo = SIGSEGV;
651 info.si_errno = 0;
652 /* XXX: check env->error_code */
653 info.si_code = TARGET_SEGV_MAPERR;
654 info._sifields._sigfault._addr = env->mmuregs[4];
655 queue_signal(info.si_signo, &info);
656 }
657 break;
3475187d 658#else
5ef54116
FB		 659 case TT_SPILL: /* window overflow */
660 save_window(env);
661 break;
662 case TT_FILL: /* window underflow */
663 restore_window(env);
664 break;
7f84a729
BS		 665 case TT_TFAULT:
666 case TT_DFAULT:
667 {
668 info.si_signo = SIGSEGV;
669 info.si_errno = 0;
670 /* XXX: check env->error_code */
671 info.si_code = TARGET_SEGV_MAPERR;
672 if (trapnr == TT_DFAULT)
673 info._sifields._sigfault._addr = env->dmmuregs[4];
674 else
675 info._sifields._sigfault._addr = env->tpc[env->tl];
676 queue_signal(info.si_signo, &info);
677 }
678 break;
27524dc3 679#ifndef TARGET_ABI32
5bfb56b2
BS		 680 case 0x16e:
681 flush_windows(env);
682 sparc64_get_context(env);
683 break;
684 case 0x16f:
685 flush_windows(env);
686 sparc64_set_context(env);
687 break;
27524dc3 688#endif
3475187d 689#endif
48dc41eb
FB		 690 case EXCP_INTERRUPT:
691 /* just indicate that signals should be handled asap */
692 break;
1fddef4b
FB		 693 case EXCP_DEBUG:
694 {
695 int sig;
696
697 sig = gdb_handlesig (env, TARGET_SIGTRAP);
698 if (sig)
699 {
700 info.si_signo = sig;
701 info.si_errno = 0;
702 info.si_code = TARGET_TRAP_BRKPT;
703 queue_signal(info.si_signo, &info);
704 }
705 }
706 break;
060366c5
FB		 707 default:
708 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 709 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 710 exit (1);
711 }
712 process_pending_signals (env);
713 }
93ac68bc
FB		 714}
715
716#endif
717
67867308 718#ifdef TARGET_PPC
9fddaa0c
FB		 719static inline uint64_t cpu_ppc_get_tb (CPUState *env)
720{
721 /* TO FIX */
722 return 0;
723}
3b46e624 724
9fddaa0c
FB		 725uint32_t cpu_ppc_load_tbl (CPUState *env)
726{
727 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
728}
3b46e624 729
9fddaa0c
FB		 730uint32_t cpu_ppc_load_tbu (CPUState *env)
731{
732 return cpu_ppc_get_tb(env) >> 32;
733}
3b46e624 734
a062e36c 735uint32_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 736{
a062e36c 737 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
9fddaa0c 738}
5fafdf24 739
a062e36c 740uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 741{
a062e36c 742 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 743}
76a66253 744
76a66253
JM		 745uint32_t cpu_ppc601_load_rtcu (CPUState *env)
746__attribute__ (( alias ("cpu_ppc_load_tbu") ));
747
76a66253 748uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 749{
76a66253 750 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 751}
76a66253 752
a750fc0b
JM		 753/* XXX: to be fixed */
754int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
755{
756 return -1;
757}
758
759int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
760{
761 return -1;
762}
763
e1833e1f
JM		 764#define EXCP_DUMP(env, fmt, args...) \
765do { \
766 fprintf(stderr, fmt , ##args); \
767 cpu_dump_state(env, stderr, fprintf, 0); \
768 if (loglevel != 0) { \
769 fprintf(logfile, fmt , ##args); \
770 cpu_dump_state(env, logfile, fprintf, 0); \
771 } \
772} while (0)
773
67867308
FB		 774void cpu_loop(CPUPPCState *env)
775{
67867308 776 target_siginfo_t info;
61190b14
FB		 777 int trapnr;
778 uint32_t ret;
3b46e624 779
67867308
FB		 780 for(;;) {
781 trapnr = cpu_ppc_exec(env);
782 switch(trapnr) {
e1833e1f
JM		 783 case POWERPC_EXCP_NONE:
784 /* Just go on */
67867308 785 break;
e1833e1f
JM		 786 case POWERPC_EXCP_CRITICAL: /* Critical input */
787 cpu_abort(env, "Critical interrupt while in user mode. "
788 "Aborting\n");
61190b14 789 break;
e1833e1f
JM		 790 case POWERPC_EXCP_MCHECK: /* Machine check exception */
791 cpu_abort(env, "Machine check exception while in user mode. "
792 "Aborting\n");
793 break;
794 case POWERPC_EXCP_DSI: /* Data storage exception */
795 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
796 env->spr[SPR_DAR]);
797 /* XXX: check this. Seems bugged */
2be0071f
FB		 798 switch (env->error_code & 0xFF000000) {
799 case 0x40000000:
61190b14
FB		 800 info.si_signo = TARGET_SIGSEGV;
801 info.si_errno = 0;
802 info.si_code = TARGET_SEGV_MAPERR;
803 break;
2be0071f 804 case 0x04000000:
61190b14
FB		 805 info.si_signo = TARGET_SIGILL;
806 info.si_errno = 0;
807 info.si_code = TARGET_ILL_ILLADR;
808 break;
2be0071f 809 case 0x08000000:
61190b14
FB		 810 info.si_signo = TARGET_SIGSEGV;
811 info.si_errno = 0;
812 info.si_code = TARGET_SEGV_ACCERR;
813 break;
61190b14
FB		 814 default:
815 /* Let's send a regular segfault... */
e1833e1f
JM		 816 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
817 env->error_code);
61190b14
FB		 818 info.si_signo = TARGET_SIGSEGV;
819 info.si_errno = 0;
820 info.si_code = TARGET_SEGV_MAPERR;
821 break;
822 }
67867308
FB		 823 info._sifields._sigfault._addr = env->nip;
824 queue_signal(info.si_signo, &info);
825 break;
e1833e1f
JM		 826 case POWERPC_EXCP_ISI: /* Instruction storage exception */
827 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
f10c315f 828 env->spr[SPR_SRR0]);
e1833e1f 829 /* XXX: check this */
2be0071f
FB		 830 switch (env->error_code & 0xFF000000) {
831 case 0x40000000:
61190b14 832 info.si_signo = TARGET_SIGSEGV;
67867308 833 info.si_errno = 0;
61190b14
FB		 834 info.si_code = TARGET_SEGV_MAPERR;
835 break;
2be0071f
FB		 836 case 0x10000000:
837 case 0x08000000:
61190b14
FB		 838 info.si_signo = TARGET_SIGSEGV;
839 info.si_errno = 0;
840 info.si_code = TARGET_SEGV_ACCERR;
841 break;
842 default:
843 /* Let's send a regular segfault... */
e1833e1f
JM		 844 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
845 env->error_code);
61190b14
FB		 846 info.si_signo = TARGET_SIGSEGV;
847 info.si_errno = 0;
848 info.si_code = TARGET_SEGV_MAPERR;
849 break;
850 }
851 info._sifields._sigfault._addr = env->nip - 4;
67867308
FB		 852 queue_signal(info.si_signo, &info);
853 break;
e1833e1f
JM		 854 case POWERPC_EXCP_EXTERNAL: /* External input */
855 cpu_abort(env, "External interrupt while in user mode. "
856 "Aborting\n");
857 break;
858 case POWERPC_EXCP_ALIGN: /* Alignment exception */
859 EXCP_DUMP(env, "Unaligned memory access\n");
860 /* XXX: check this */
61190b14 861 info.si_signo = TARGET_SIGBUS;
67867308 862 info.si_errno = 0;
61190b14
FB		 863 info.si_code = TARGET_BUS_ADRALN;
864 info._sifields._sigfault._addr = env->nip - 4;
67867308
FB		 865 queue_signal(info.si_signo, &info);
866 break;
e1833e1f
JM		 867 case POWERPC_EXCP_PROGRAM: /* Program exception */
868 /* XXX: check this */
61190b14 869 switch (env->error_code & ~0xF) {
e1833e1f
JM		 870 case POWERPC_EXCP_FP:
871 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 872 info.si_signo = TARGET_SIGFPE;
873 info.si_errno = 0;
874 switch (env->error_code & 0xF) {
e1833e1f 875 case POWERPC_EXCP_FP_OX:
61190b14
FB		 876 info.si_code = TARGET_FPE_FLTOVF;
877 break;
e1833e1f 878 case POWERPC_EXCP_FP_UX:
61190b14
FB		 879 info.si_code = TARGET_FPE_FLTUND;
880 break;
e1833e1f
JM		 881 case POWERPC_EXCP_FP_ZX:
882 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 883 info.si_code = TARGET_FPE_FLTDIV;
884 break;
e1833e1f 885 case POWERPC_EXCP_FP_XX:
61190b14
FB		 886 info.si_code = TARGET_FPE_FLTRES;
887 break;
e1833e1f 888 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 889 info.si_code = TARGET_FPE_FLTINV;
890 break;
7c58044c 891 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 892 case POWERPC_EXCP_FP_VXISI:
893 case POWERPC_EXCP_FP_VXIDI:
894 case POWERPC_EXCP_FP_VXIMZ:
895 case POWERPC_EXCP_FP_VXVC:
896 case POWERPC_EXCP_FP_VXSQRT:
897 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 898 info.si_code = TARGET_FPE_FLTSUB;
899 break;
900 default:
e1833e1f
JM		 901 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
902 env->error_code);
903 break;
61190b14 904 }
e1833e1f
JM		 905 break;
906 case POWERPC_EXCP_INVAL:
907 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 908 info.si_signo = TARGET_SIGILL;
909 info.si_errno = 0;
910 switch (env->error_code & 0xF) {
e1833e1f 911 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 912 info.si_code = TARGET_ILL_ILLOPC;
913 break;
e1833e1f 914 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 915 info.si_code = TARGET_ILL_ILLOPN;
61190b14 916 break;
e1833e1f 917 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 918 info.si_code = TARGET_ILL_PRVREG;
919 break;
e1833e1f 920 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 921 info.si_code = TARGET_ILL_COPROC;
922 break;
923 default:
e1833e1f
JM		 924 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
925 env->error_code & 0xF);
61190b14
FB		 926 info.si_code = TARGET_ILL_ILLADR;
927 break;
928 }
929 break;
e1833e1f
JM		 930 case POWERPC_EXCP_PRIV:
931 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 932 info.si_signo = TARGET_SIGILL;
933 info.si_errno = 0;
934 switch (env->error_code & 0xF) {
e1833e1f 935 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 936 info.si_code = TARGET_ILL_PRVOPC;
937 break;
e1833e1f 938 case POWERPC_EXCP_PRIV_REG:
61190b14 939 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 940 break;
61190b14 941 default:
e1833e1f
JM		 942 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
943 env->error_code & 0xF);
61190b14
FB		 944 info.si_code = TARGET_ILL_PRVOPC;
945 break;
946 }
947 break;
e1833e1f
JM		 948 case POWERPC_EXCP_TRAP:
949 cpu_abort(env, "Tried to call a TRAP\n");
950 break;
61190b14
FB		 951 default:
952 /* Should not happen ! */
e1833e1f
JM		 953 cpu_abort(env, "Unknown program exception (%02x)\n",
954 env->error_code);
955 break;
61190b14
FB		 956 }
957 info._sifields._sigfault._addr = env->nip - 4;
67867308
FB		 958 queue_signal(info.si_signo, &info);
959 break;
e1833e1f
JM		 960 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
961 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 962 info.si_signo = TARGET_SIGILL;
67867308 963 info.si_errno = 0;
61190b14
FB		 964 info.si_code = TARGET_ILL_COPROC;
965 info._sifields._sigfault._addr = env->nip - 4;
67867308
FB		 966 queue_signal(info.si_signo, &info);
967 break;
e1833e1f
JM		 968 case POWERPC_EXCP_SYSCALL: /* System call exception */
969 cpu_abort(env, "Syscall exception while in user mode. "
970 "Aborting\n");
61190b14 971 break;
e1833e1f
JM		 972 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
973 EXCP_DUMP(env, "No APU instruction allowed\n");
974 info.si_signo = TARGET_SIGILL;
975 info.si_errno = 0;
976 info.si_code = TARGET_ILL_COPROC;
977 info._sifields._sigfault._addr = env->nip - 4;
978 queue_signal(info.si_signo, &info);
61190b14 979 break;
e1833e1f
JM		 980 case POWERPC_EXCP_DECR: /* Decrementer exception */
981 cpu_abort(env, "Decrementer interrupt while in user mode. "
982 "Aborting\n");
61190b14 983 break;
e1833e1f
JM		 984 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
985 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
986 "Aborting\n");
987 break;
988 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
989 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
990 "Aborting\n");
991 break;
992 case POWERPC_EXCP_DTLB: /* Data TLB error */
993 cpu_abort(env, "Data TLB exception while in user mode. "
994 "Aborting\n");
995 break;
996 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
997 cpu_abort(env, "Instruction TLB exception while in user mode. "
998 "Aborting\n");
999 break;
1000 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1001 /* XXX: check this */
1fddef4b
FB		 1002 {
1003 int sig;
1004
e1833e1f
JM		 1005 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1006 if (sig) {
1fddef4b
FB		 1007 info.si_signo = sig;
1008 info.si_errno = 0;
1009 info.si_code = TARGET_TRAP_BRKPT;
1010 queue_signal(info.si_signo, &info);
1011 }
1012 }
1013 break;
e1833e1f
JM		 1014 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1015 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1016 info.si_signo = TARGET_SIGILL;
1017 info.si_errno = 0;
1018 info.si_code = TARGET_ILL_COPROC;
1019 info._sifields._sigfault._addr = env->nip - 4;
1020 queue_signal(info.si_signo, &info);
1021 break;
1022 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1023 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1024 break;
1025 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1026 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1027 break;
1028 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1029 cpu_abort(env, "Performance monitor exception not handled\n");
1030 break;
1031 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1032 cpu_abort(env, "Doorbell interrupt while in user mode. "
1033 "Aborting\n");
1034 break;
1035 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1036 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1037 "Aborting\n");
1038 break;
1039 case POWERPC_EXCP_RESET: /* System reset exception */
1040 cpu_abort(env, "Reset interrupt while in user mode. "
1041 "Aborting\n");
1042 break;
e85e7c6e 1043#if defined(TARGET_PPC64) && !defined(TARGET_ABI32) /* PowerPC 64 */
e1833e1f
JM		 1044 case POWERPC_EXCP_DSEG: /* Data segment exception */
1045 cpu_abort(env, "Data segment exception while in user mode. "
1046 "Aborting\n");
1047 break;
1048 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1049 cpu_abort(env, "Instruction segment exception "
1050 "while in user mode. Aborting\n");
1051 break;
e85e7c6e
JM		 1052#endif /* defined(TARGET_PPC64) && !defined(TARGET_ABI32) */
1053#if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
1054 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1055 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1056 cpu_abort(env, "Hypervisor decrementer interrupt "
1057 "while in user mode. Aborting\n");
1058 break;
e85e7c6e 1059#endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */
e1833e1f
JM		 1060 case POWERPC_EXCP_TRACE: /* Trace exception */
1061 /* Nothing to do:
1062 * we use this exception to emulate step-by-step execution mode.
1063 */
1064 break;
e85e7c6e
JM		 1065#if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
1066 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1067 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1068 cpu_abort(env, "Hypervisor data storage exception "
1069 "while in user mode. Aborting\n");
1070 break;
1071 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1072 cpu_abort(env, "Hypervisor instruction storage exception "
1073 "while in user mode. Aborting\n");
1074 break;
1075 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1076 cpu_abort(env, "Hypervisor data segment exception "
1077 "while in user mode. Aborting\n");
1078 break;
1079 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1080 cpu_abort(env, "Hypervisor instruction segment exception "
1081 "while in user mode. Aborting\n");
1082 break;
e85e7c6e 1083#endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */
e1833e1f
JM		 1084 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1085 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1086 info.si_signo = TARGET_SIGILL;
1087 info.si_errno = 0;
1088 info.si_code = TARGET_ILL_COPROC;
1089 info._sifields._sigfault._addr = env->nip - 4;
1090 queue_signal(info.si_signo, &info);
1091 break;
1092 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1093 cpu_abort(env, "Programable interval timer interrupt "
1094 "while in user mode. Aborting\n");
1095 break;
1096 case POWERPC_EXCP_IO: /* IO error exception */
1097 cpu_abort(env, "IO error exception while in user mode. "
1098 "Aborting\n");
1099 break;
1100 case POWERPC_EXCP_RUNM: /* Run mode exception */
1101 cpu_abort(env, "Run mode exception while in user mode. "
1102 "Aborting\n");
1103 break;
1104 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1105 cpu_abort(env, "Emulation trap exception not handled\n");
1106 break;
1107 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1108 cpu_abort(env, "Instruction fetch TLB exception "
1109 "while in user-mode. Aborting");
1110 break;
1111 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1112 cpu_abort(env, "Data load TLB exception while in user-mode. "
1113 "Aborting");
1114 break;
1115 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1116 cpu_abort(env, "Data store TLB exception while in user-mode. "
1117 "Aborting");
1118 break;
1119 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1120 cpu_abort(env, "Floating-point assist exception not handled\n");
1121 break;
1122 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1123 cpu_abort(env, "Instruction address breakpoint exception "
1124 "not handled\n");
1125 break;
1126 case POWERPC_EXCP_SMI: /* System management interrupt */
1127 cpu_abort(env, "System management interrupt while in user mode. "
1128 "Aborting\n");
1129 break;
1130 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1131 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1132 "Aborting\n");
1133 break;
1134 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1135 cpu_abort(env, "Performance monitor exception not handled\n");
1136 break;
1137 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1138 cpu_abort(env, "Vector assist exception not handled\n");
1139 break;
1140 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1141 cpu_abort(env, "Soft patch exception not handled\n");
1142 break;
1143 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1144 cpu_abort(env, "Maintenance exception while in user mode. "
1145 "Aborting\n");
1146 break;
1147 case POWERPC_EXCP_STOP: /* stop translation */
1148 /* We did invalidate the instruction cache. Go on */
1149 break;
1150 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1151 /* We just stopped because of a branch. Go on */
1152 break;
1153 case POWERPC_EXCP_SYSCALL_USER:
1154 /* system call in user-mode emulation */
1155 /* WARNING:
1156 * PPC ABI uses overflow flag in cr0 to signal an error
1157 * in syscalls.
1158 */
1159#if 0
1160 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1161 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1162#endif
1163 env->crf[0] &= ~0x1;
1164 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1165 env->gpr[5], env->gpr[6], env->gpr[7],
1166 env->gpr[8]);
1167 if (ret > (uint32_t)(-515)) {
1168 env->crf[0] |= 0x1;
1169 ret = -ret;
61190b14 1170 }
e1833e1f
JM		 1171 env->gpr[3] = ret;
1172#if 0
1173 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1174#endif
1175 break;
56ba31ff
JM		 1176 case EXCP_INTERRUPT:
1177 /* just indicate that signals should be handled asap */
1178 break;
e1833e1f
JM		 1179 default:
1180 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1181 break;
67867308
FB		 1182 }
1183 process_pending_signals(env);
1184 }
1185}
1186#endif
1187
048f6b4d
FB		 1188#ifdef TARGET_MIPS
1189
1190#define MIPS_SYS(name, args) args,
1191
1192static const uint8_t mips_syscall_args[] = {
1193 MIPS_SYS(sys_syscall , 0) /* 4000 */
1194 MIPS_SYS(sys_exit , 1)
1195 MIPS_SYS(sys_fork , 0)
1196 MIPS_SYS(sys_read , 3)
1197 MIPS_SYS(sys_write , 3)
1198 MIPS_SYS(sys_open , 3) /* 4005 */
1199 MIPS_SYS(sys_close , 1)
1200 MIPS_SYS(sys_waitpid , 3)
1201 MIPS_SYS(sys_creat , 2)
1202 MIPS_SYS(sys_link , 2)
1203 MIPS_SYS(sys_unlink , 1) /* 4010 */
1204 MIPS_SYS(sys_execve , 0)
1205 MIPS_SYS(sys_chdir , 1)
1206 MIPS_SYS(sys_time , 1)
1207 MIPS_SYS(sys_mknod , 3)
1208 MIPS_SYS(sys_chmod , 2) /* 4015 */
1209 MIPS_SYS(sys_lchown , 3)
1210 MIPS_SYS(sys_ni_syscall , 0)
1211 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1212 MIPS_SYS(sys_lseek , 3)
1213 MIPS_SYS(sys_getpid , 0) /* 4020 */
1214 MIPS_SYS(sys_mount , 5)
1215 MIPS_SYS(sys_oldumount , 1)
1216 MIPS_SYS(sys_setuid , 1)
1217 MIPS_SYS(sys_getuid , 0)
1218 MIPS_SYS(sys_stime , 1) /* 4025 */
1219 MIPS_SYS(sys_ptrace , 4)
1220 MIPS_SYS(sys_alarm , 1)
1221 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1222 MIPS_SYS(sys_pause , 0)
1223 MIPS_SYS(sys_utime , 2) /* 4030 */
1224 MIPS_SYS(sys_ni_syscall , 0)
1225 MIPS_SYS(sys_ni_syscall , 0)
1226 MIPS_SYS(sys_access , 2)
1227 MIPS_SYS(sys_nice , 1)
1228 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1229 MIPS_SYS(sys_sync , 0)
1230 MIPS_SYS(sys_kill , 2)
1231 MIPS_SYS(sys_rename , 2)
1232 MIPS_SYS(sys_mkdir , 2)
1233 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1234 MIPS_SYS(sys_dup , 1)
1235 MIPS_SYS(sys_pipe , 0)
1236 MIPS_SYS(sys_times , 1)
1237 MIPS_SYS(sys_ni_syscall , 0)
1238 MIPS_SYS(sys_brk , 1) /* 4045 */
1239 MIPS_SYS(sys_setgid , 1)
1240 MIPS_SYS(sys_getgid , 0)
1241 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1242 MIPS_SYS(sys_geteuid , 0)
1243 MIPS_SYS(sys_getegid , 0) /* 4050 */
1244 MIPS_SYS(sys_acct , 0)
1245 MIPS_SYS(sys_umount , 2)
1246 MIPS_SYS(sys_ni_syscall , 0)
1247 MIPS_SYS(sys_ioctl , 3)
1248 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1249 MIPS_SYS(sys_ni_syscall , 2)
1250 MIPS_SYS(sys_setpgid , 2)
1251 MIPS_SYS(sys_ni_syscall , 0)
1252 MIPS_SYS(sys_olduname , 1)
1253 MIPS_SYS(sys_umask , 1) /* 4060 */
1254 MIPS_SYS(sys_chroot , 1)
1255 MIPS_SYS(sys_ustat , 2)
1256 MIPS_SYS(sys_dup2 , 2)
1257 MIPS_SYS(sys_getppid , 0)
1258 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1259 MIPS_SYS(sys_setsid , 0)
1260 MIPS_SYS(sys_sigaction , 3)
1261 MIPS_SYS(sys_sgetmask , 0)
1262 MIPS_SYS(sys_ssetmask , 1)
1263 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1264 MIPS_SYS(sys_setregid , 2)
1265 MIPS_SYS(sys_sigsuspend , 0)
1266 MIPS_SYS(sys_sigpending , 1)
1267 MIPS_SYS(sys_sethostname , 2)
1268 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1269 MIPS_SYS(sys_getrlimit , 2)
1270 MIPS_SYS(sys_getrusage , 2)
1271 MIPS_SYS(sys_gettimeofday, 2)
1272 MIPS_SYS(sys_settimeofday, 2)
1273 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1274 MIPS_SYS(sys_setgroups , 2)
1275 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1276 MIPS_SYS(sys_symlink , 2)
1277 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1278 MIPS_SYS(sys_readlink , 3) /* 4085 */
1279 MIPS_SYS(sys_uselib , 1)
1280 MIPS_SYS(sys_swapon , 2)
1281 MIPS_SYS(sys_reboot , 3)
1282 MIPS_SYS(old_readdir , 3)
1283 MIPS_SYS(old_mmap , 6) /* 4090 */
1284 MIPS_SYS(sys_munmap , 2)
1285 MIPS_SYS(sys_truncate , 2)
1286 MIPS_SYS(sys_ftruncate , 2)
1287 MIPS_SYS(sys_fchmod , 2)
1288 MIPS_SYS(sys_fchown , 3) /* 4095 */
1289 MIPS_SYS(sys_getpriority , 2)
1290 MIPS_SYS(sys_setpriority , 3)
1291 MIPS_SYS(sys_ni_syscall , 0)
1292 MIPS_SYS(sys_statfs , 2)
1293 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1294 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1295 MIPS_SYS(sys_socketcall , 2)
1296 MIPS_SYS(sys_syslog , 3)
1297 MIPS_SYS(sys_setitimer , 3)
1298 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1299 MIPS_SYS(sys_newstat , 2)
1300 MIPS_SYS(sys_newlstat , 2)
1301 MIPS_SYS(sys_newfstat , 2)
1302 MIPS_SYS(sys_uname , 1)
1303 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1304 MIPS_SYS(sys_vhangup , 0)
1305 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1306 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1307 MIPS_SYS(sys_wait4 , 4)
1308 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1309 MIPS_SYS(sys_sysinfo , 1)
1310 MIPS_SYS(sys_ipc , 6)
1311 MIPS_SYS(sys_fsync , 1)
1312 MIPS_SYS(sys_sigreturn , 0)
1313 MIPS_SYS(sys_clone , 0) /* 4120 */
1314 MIPS_SYS(sys_setdomainname, 2)
1315 MIPS_SYS(sys_newuname , 1)
1316 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1317 MIPS_SYS(sys_adjtimex , 1)
1318 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1319 MIPS_SYS(sys_sigprocmask , 3)
1320 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1321 MIPS_SYS(sys_init_module , 5)
1322 MIPS_SYS(sys_delete_module, 1)
1323 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1324 MIPS_SYS(sys_quotactl , 0)
1325 MIPS_SYS(sys_getpgid , 1)
1326 MIPS_SYS(sys_fchdir , 1)
1327 MIPS_SYS(sys_bdflush , 2)
1328 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1329 MIPS_SYS(sys_personality , 1)
1330 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1331 MIPS_SYS(sys_setfsuid , 1)
1332 MIPS_SYS(sys_setfsgid , 1)
1333 MIPS_SYS(sys_llseek , 5) /* 4140 */
1334 MIPS_SYS(sys_getdents , 3)
1335 MIPS_SYS(sys_select , 5)
1336 MIPS_SYS(sys_flock , 2)
1337 MIPS_SYS(sys_msync , 3)
1338 MIPS_SYS(sys_readv , 3) /* 4145 */
1339 MIPS_SYS(sys_writev , 3)
1340 MIPS_SYS(sys_cacheflush , 3)
1341 MIPS_SYS(sys_cachectl , 3)
1342 MIPS_SYS(sys_sysmips , 4)
1343 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1344 MIPS_SYS(sys_getsid , 1)
1345 MIPS_SYS(sys_fdatasync , 0)
1346 MIPS_SYS(sys_sysctl , 1)
1347 MIPS_SYS(sys_mlock , 2)
1348 MIPS_SYS(sys_munlock , 2) /* 4155 */
1349 MIPS_SYS(sys_mlockall , 1)
1350 MIPS_SYS(sys_munlockall , 0)
1351 MIPS_SYS(sys_sched_setparam, 2)
1352 MIPS_SYS(sys_sched_getparam, 2)
1353 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1354 MIPS_SYS(sys_sched_getscheduler, 1)
1355 MIPS_SYS(sys_sched_yield , 0)
1356 MIPS_SYS(sys_sched_get_priority_max, 1)
1357 MIPS_SYS(sys_sched_get_priority_min, 1)
1358 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1359 MIPS_SYS(sys_nanosleep, 2)
1360 MIPS_SYS(sys_mremap , 4)
1361 MIPS_SYS(sys_accept , 3)
1362 MIPS_SYS(sys_bind , 3)
1363 MIPS_SYS(sys_connect , 3) /* 4170 */
1364 MIPS_SYS(sys_getpeername , 3)
1365 MIPS_SYS(sys_getsockname , 3)
1366 MIPS_SYS(sys_getsockopt , 5)
1367 MIPS_SYS(sys_listen , 2)
1368 MIPS_SYS(sys_recv , 4) /* 4175 */
1369 MIPS_SYS(sys_recvfrom , 6)
1370 MIPS_SYS(sys_recvmsg , 3)
1371 MIPS_SYS(sys_send , 4)
1372 MIPS_SYS(sys_sendmsg , 3)
1373 MIPS_SYS(sys_sendto , 6) /* 4180 */
1374 MIPS_SYS(sys_setsockopt , 5)
1375 MIPS_SYS(sys_shutdown , 2)
1376 MIPS_SYS(sys_socket , 3)
1377 MIPS_SYS(sys_socketpair , 4)
1378 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1379 MIPS_SYS(sys_getresuid , 3)
1380 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1381 MIPS_SYS(sys_poll , 3)
1382 MIPS_SYS(sys_nfsservctl , 3)
1383 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1384 MIPS_SYS(sys_getresgid , 3)
1385 MIPS_SYS(sys_prctl , 5)
1386 MIPS_SYS(sys_rt_sigreturn, 0)
1387 MIPS_SYS(sys_rt_sigaction, 4)
1388 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1389 MIPS_SYS(sys_rt_sigpending, 2)
1390 MIPS_SYS(sys_rt_sigtimedwait, 4)
1391 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1392 MIPS_SYS(sys_rt_sigsuspend, 0)
1393 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1394 MIPS_SYS(sys_pwrite64 , 6)
1395 MIPS_SYS(sys_chown , 3)
1396 MIPS_SYS(sys_getcwd , 2)
1397 MIPS_SYS(sys_capget , 2)
1398 MIPS_SYS(sys_capset , 2) /* 4205 */
1399 MIPS_SYS(sys_sigaltstack , 0)
1400 MIPS_SYS(sys_sendfile , 4)
1401 MIPS_SYS(sys_ni_syscall , 0)
1402 MIPS_SYS(sys_ni_syscall , 0)
1403 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1404 MIPS_SYS(sys_truncate64 , 4)
1405 MIPS_SYS(sys_ftruncate64 , 4)
1406 MIPS_SYS(sys_stat64 , 2)
1407 MIPS_SYS(sys_lstat64 , 2)
1408 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1409 MIPS_SYS(sys_pivot_root , 2)
1410 MIPS_SYS(sys_mincore , 3)
1411 MIPS_SYS(sys_madvise , 3)
1412 MIPS_SYS(sys_getdents64 , 3)
1413 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1414 MIPS_SYS(sys_ni_syscall , 0)
1415 MIPS_SYS(sys_gettid , 0)
1416 MIPS_SYS(sys_readahead , 5)
1417 MIPS_SYS(sys_setxattr , 5)
1418 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1419 MIPS_SYS(sys_fsetxattr , 5)
1420 MIPS_SYS(sys_getxattr , 4)
1421 MIPS_SYS(sys_lgetxattr , 4)
1422 MIPS_SYS(sys_fgetxattr , 4)
1423 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1424 MIPS_SYS(sys_llistxattr , 3)
1425 MIPS_SYS(sys_flistxattr , 3)
1426 MIPS_SYS(sys_removexattr , 2)
1427 MIPS_SYS(sys_lremovexattr, 2)
1428 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1429 MIPS_SYS(sys_tkill , 2)
1430 MIPS_SYS(sys_sendfile64 , 5)
1431 MIPS_SYS(sys_futex , 2)
1432 MIPS_SYS(sys_sched_setaffinity, 3)
1433 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1434 MIPS_SYS(sys_io_setup , 2)
1435 MIPS_SYS(sys_io_destroy , 1)
1436 MIPS_SYS(sys_io_getevents, 5)
1437 MIPS_SYS(sys_io_submit , 3)
1438 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1439 MIPS_SYS(sys_exit_group , 1)
1440 MIPS_SYS(sys_lookup_dcookie, 3)
1441 MIPS_SYS(sys_epoll_create, 1)
1442 MIPS_SYS(sys_epoll_ctl , 4)
1443 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1444 MIPS_SYS(sys_remap_file_pages, 5)
1445 MIPS_SYS(sys_set_tid_address, 1)
1446 MIPS_SYS(sys_restart_syscall, 0)
1447 MIPS_SYS(sys_fadvise64_64, 7)
1448 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1449 MIPS_SYS(sys_fstatfs64 , 2)
1450 MIPS_SYS(sys_timer_create, 3)
1451 MIPS_SYS(sys_timer_settime, 4)
1452 MIPS_SYS(sys_timer_gettime, 2)
1453 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1454 MIPS_SYS(sys_timer_delete, 1)
1455 MIPS_SYS(sys_clock_settime, 2)
1456 MIPS_SYS(sys_clock_gettime, 2)
1457 MIPS_SYS(sys_clock_getres, 2)
1458 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1459 MIPS_SYS(sys_tgkill , 3)
1460 MIPS_SYS(sys_utimes , 2)
1461 MIPS_SYS(sys_mbind , 4)
1462 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1463 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1464 MIPS_SYS(sys_mq_open , 4)
1465 MIPS_SYS(sys_mq_unlink , 1)
1466 MIPS_SYS(sys_mq_timedsend, 5)
1467 MIPS_SYS(sys_mq_timedreceive, 5)
1468 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1469 MIPS_SYS(sys_mq_getsetattr, 3)
1470 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1471 MIPS_SYS(sys_waitid , 4)
1472 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1473 MIPS_SYS(sys_add_key , 5)
388bb21a 1474 MIPS_SYS(sys_request_key, 4)
048f6b4d 1475 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 1476 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 1477 MIPS_SYS(sys_inotify_init, 0)
1478 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1479 MIPS_SYS(sys_inotify_rm_watch, 2)
1480 MIPS_SYS(sys_migrate_pages, 4)
1481 MIPS_SYS(sys_openat, 4)
1482 MIPS_SYS(sys_mkdirat, 3)
1483 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1484 MIPS_SYS(sys_fchownat, 5)
1485 MIPS_SYS(sys_futimesat, 3)
1486 MIPS_SYS(sys_fstatat64, 4)
1487 MIPS_SYS(sys_unlinkat, 3)
1488 MIPS_SYS(sys_renameat, 4) /* 4295 */
1489 MIPS_SYS(sys_linkat, 5)
1490 MIPS_SYS(sys_symlinkat, 3)
1491 MIPS_SYS(sys_readlinkat, 4)
1492 MIPS_SYS(sys_fchmodat, 3)
1493 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1494 MIPS_SYS(sys_pselect6, 6)
1495 MIPS_SYS(sys_ppoll, 5)
1496 MIPS_SYS(sys_unshare, 1)
1497 MIPS_SYS(sys_splice, 4)
1498 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1499 MIPS_SYS(sys_tee, 4)
1500 MIPS_SYS(sys_vmsplice, 4)
1501 MIPS_SYS(sys_move_pages, 6)
1502 MIPS_SYS(sys_set_robust_list, 2)
1503 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1504 MIPS_SYS(sys_kexec_load, 4)
1505 MIPS_SYS(sys_getcpu, 3)
1506 MIPS_SYS(sys_epoll_pwait, 6)
1507 MIPS_SYS(sys_ioprio_set, 3)
1508 MIPS_SYS(sys_ioprio_get, 2)
048f6b4d
FB		 1509};
1510
1511#undef MIPS_SYS
1512
1513void cpu_loop(CPUMIPSState *env)
1514{
1515 target_siginfo_t info;
388bb21a 1516 int trapnr, ret;
048f6b4d 1517 unsigned int syscall_num;
048f6b4d
FB		 1518
1519 for(;;) {
1520 trapnr = cpu_mips_exec(env);
1521 switch(trapnr) {
1522 case EXCP_SYSCALL:
ead9360e
TS		 1523 syscall_num = env->gpr[2][env->current_tc] - 4000;
1524 env->PC[env->current_tc] += 4;
388bb21a
TS		 1525 if (syscall_num >= sizeof(mips_syscall_args)) {
1526 ret = -ENOSYS;
1527 } else {
1528 int nb_args;
992f48a0
BS		 1529 abi_ulong sp_reg;
1530 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 1531
1532 nb_args = mips_syscall_args[syscall_num];
ead9360e 1533 sp_reg = env->gpr[29][env->current_tc];
388bb21a
TS		 1534 switch (nb_args) {
1535 /* these arguments are taken from the stack */
1536 case 8: arg8 = tgetl(sp_reg + 28);
1537 case 7: arg7 = tgetl(sp_reg + 24);
1538 case 6: arg6 = tgetl(sp_reg + 20);
1539 case 5: arg5 = tgetl(sp_reg + 16);
1540 default:
1541 break;
048f6b4d 1542 }
ead9360e
TS		 1543 ret = do_syscall(env, env->gpr[2][env->current_tc],
1544 env->gpr[4][env->current_tc],
1545 env->gpr[5][env->current_tc],
1546 env->gpr[6][env->current_tc],
1547 env->gpr[7][env->current_tc],
388bb21a
TS		 1548 arg5, arg6/*, arg7, arg8*/);
1549 }
1550 if ((unsigned int)ret >= (unsigned int)(-1133)) {
ead9360e 1551 env->gpr[7][env->current_tc] = 1; /* error flag */
388bb21a
TS		 1552 ret = -ret;
1553 } else {
ead9360e 1554 env->gpr[7][env->current_tc] = 0; /* error flag */
048f6b4d 1555 }
ead9360e 1556 env->gpr[2][env->current_tc] = ret;
048f6b4d 1557 break;
ca7c2b1b
TS		 1558 case EXCP_TLBL:
1559 case EXCP_TLBS:
6900e84b 1560 case EXCP_CpU:
048f6b4d 1561 case EXCP_RI:
bc1ad2de
FB		 1562 info.si_signo = TARGET_SIGILL;
1563 info.si_errno = 0;
1564 info.si_code = 0;
1565 queue_signal(info.si_signo, &info);
048f6b4d 1566 break;
106ec879
FB		 1567 case EXCP_INTERRUPT:
1568 /* just indicate that signals should be handled asap */
1569 break;
d08b2a28
PB		 1570 case EXCP_DEBUG:
1571 {
1572 int sig;
1573
1574 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1575 if (sig)
1576 {
1577 info.si_signo = sig;
1578 info.si_errno = 0;
1579 info.si_code = TARGET_TRAP_BRKPT;
1580 queue_signal(info.si_signo, &info);
1581 }
1582 }
1583 break;
048f6b4d
FB		 1584 default:
1585 // error:
5fafdf24 1586 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 1587 trapnr);
1588 cpu_dump_state(env, stderr, fprintf, 0);
1589 abort();
1590 }
1591 process_pending_signals(env);
1592 }
1593}
1594#endif
1595
fdf9b3e8
FB		 1596#ifdef TARGET_SH4
1597void cpu_loop (CPUState *env)
1598{
1599 int trapnr, ret;
355fb23d 1600 target_siginfo_t info;
3b46e624 1601
fdf9b3e8
FB		 1602 while (1) {
1603 trapnr = cpu_sh4_exec (env);
3b46e624 1604
fdf9b3e8
FB		 1605 switch (trapnr) {
1606 case 0x160:
5fafdf24
TS		 1607 ret = do_syscall(env,
1608 env->gregs[3],
1609 env->gregs[4],
1610 env->gregs[5],
1611 env->gregs[6],
1612 env->gregs[7],
1613 env->gregs[0],
fdf9b3e8 1614 0);
9c2a9ea1 1615 env->gregs[0] = ret;
fdf9b3e8
FB		 1616 env->pc += 2;
1617 break;
355fb23d
PB		 1618 case EXCP_DEBUG:
1619 {
1620 int sig;
1621
1622 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1623 if (sig)
1624 {
1625 info.si_signo = sig;
1626 info.si_errno = 0;
1627 info.si_code = TARGET_TRAP_BRKPT;
1628 queue_signal(info.si_signo, &info);
1629 }
1630 }
1631 break;
fdf9b3e8
FB		 1632 default:
1633 printf ("Unhandled trap: 0x%x\n", trapnr);
1634 cpu_dump_state(env, stderr, fprintf, 0);
1635 exit (1);
1636 }
1637 process_pending_signals (env);
1638 }
1639}
1640#endif
1641
48733d19
TS		 1642#ifdef TARGET_CRIS
1643void cpu_loop (CPUState *env)
1644{
1645 int trapnr, ret;
1646 target_siginfo_t info;
1647
1648 while (1) {
1649 trapnr = cpu_cris_exec (env);
1650 switch (trapnr) {
1651 case 0xaa:
1652 {
1653 info.si_signo = SIGSEGV;
1654 info.si_errno = 0;
1655 /* XXX: check env->error_code */
1656 info.si_code = TARGET_SEGV_MAPERR;
1657 info._sifields._sigfault._addr = env->debug1;
1658 queue_signal(info.si_signo, &info);
1659 }
1660 break;
1661 case EXCP_BREAK:
1662 ret = do_syscall(env,
1663 env->regs[9],
1664 env->regs[10],
1665 env->regs[11],
1666 env->regs[12],
1667 env->regs[13],
1668 env->pregs[7],
1669 env->pregs[11]);
1670 env->regs[10] = ret;
1671 env->pc += 2;
1672 break;
1673 case EXCP_DEBUG:
1674 {
1675 int sig;
1676
1677 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1678 if (sig)
1679 {
1680 info.si_signo = sig;
1681 info.si_errno = 0;
1682 info.si_code = TARGET_TRAP_BRKPT;
1683 queue_signal(info.si_signo, &info);
1684 }
1685 }
1686 break;
1687 default:
1688 printf ("Unhandled trap: 0x%x\n", trapnr);
1689 cpu_dump_state(env, stderr, fprintf, 0);
1690 exit (1);
1691 }
1692 process_pending_signals (env);
1693 }
1694}
1695#endif
1696
e6e5906b
PB		 1697#ifdef TARGET_M68K
1698
1699void cpu_loop(CPUM68KState *env)
1700{
1701 int trapnr;
1702 unsigned int n;
1703 target_siginfo_t info;
1704 TaskState *ts = env->opaque;
3b46e624 1705
e6e5906b
PB		 1706 for(;;) {
1707 trapnr = cpu_m68k_exec(env);
1708 switch(trapnr) {
1709 case EXCP_ILLEGAL:
1710 {
1711 if (ts->sim_syscalls) {
1712 uint16_t nr;
1713 nr = lduw(env->pc + 2);
1714 env->pc += 4;
1715 do_m68k_simcall(env, nr);
1716 } else {
1717 goto do_sigill;
1718 }
1719 }
1720 break;
a87295e8 1721 case EXCP_HALT_INSN:
e6e5906b 1722 /* Semihosing syscall. */
a87295e8 1723 env->pc += 4;
e6e5906b
PB		 1724 do_m68k_semihosting(env, env->dregs[0]);
1725 break;
1726 case EXCP_LINEA:
1727 case EXCP_LINEF:
1728 case EXCP_UNSUPPORTED:
1729 do_sigill:
1730 info.si_signo = SIGILL;
1731 info.si_errno = 0;
1732 info.si_code = TARGET_ILL_ILLOPN;
1733 info._sifields._sigfault._addr = env->pc;
1734 queue_signal(info.si_signo, &info);
1735 break;
1736 case EXCP_TRAP0:
1737 {
1738 ts->sim_syscalls = 0;
1739 n = env->dregs[0];
1740 env->pc += 2;
5fafdf24
TS		 1741 env->dregs[0] = do_syscall(env,
1742 n,
e6e5906b
PB		 1743 env->dregs[1],
1744 env->dregs[2],
1745 env->dregs[3],
1746 env->dregs[4],
1747 env->dregs[5],
1748 env->dregs[6]);
1749 }
1750 break;
1751 case EXCP_INTERRUPT:
1752 /* just indicate that signals should be handled asap */
1753 break;
1754 case EXCP_ACCESS:
1755 {
1756 info.si_signo = SIGSEGV;
1757 info.si_errno = 0;
1758 /* XXX: check env->error_code */
1759 info.si_code = TARGET_SEGV_MAPERR;
1760 info._sifields._sigfault._addr = env->mmu.ar;
1761 queue_signal(info.si_signo, &info);
1762 }
1763 break;
1764 case EXCP_DEBUG:
1765 {
1766 int sig;
1767
1768 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1769 if (sig)
1770 {
1771 info.si_signo = sig;
1772 info.si_errno = 0;
1773 info.si_code = TARGET_TRAP_BRKPT;
1774 queue_signal(info.si_signo, &info);
1775 }
1776 }
1777 break;
1778 default:
5fafdf24 1779 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 1780 trapnr);
1781 cpu_dump_state(env, stderr, fprintf, 0);
1782 abort();
1783 }
1784 process_pending_signals(env);
1785 }
1786}
1787#endif /* TARGET_M68K */
1788
7a3148a9
JM		 1789#ifdef TARGET_ALPHA
1790void cpu_loop (CPUState *env)
1791{
e96efcfc 1792 int trapnr;
7a3148a9 1793 target_siginfo_t info;
3b46e624 1794
7a3148a9
JM		 1795 while (1) {
1796 trapnr = cpu_alpha_exec (env);
3b46e624 1797
7a3148a9
JM		 1798 switch (trapnr) {
1799 case EXCP_RESET:
1800 fprintf(stderr, "Reset requested. Exit\n");
1801 exit(1);
1802 break;
1803 case EXCP_MCHK:
1804 fprintf(stderr, "Machine check exception. Exit\n");
1805 exit(1);
1806 break;
1807 case EXCP_ARITH:
1808 fprintf(stderr, "Arithmetic trap.\n");
1809 exit(1);
1810 break;
1811 case EXCP_HW_INTERRUPT:
5fafdf24 1812 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 1813 exit(1);
1814 break;
1815 case EXCP_DFAULT:
1816 fprintf(stderr, "MMU data fault\n");
1817 exit(1);
1818 break;
1819 case EXCP_DTB_MISS_PAL:
1820 fprintf(stderr, "MMU data TLB miss in PALcode\n");
1821 exit(1);
1822 break;
1823 case EXCP_ITB_MISS:
1824 fprintf(stderr, "MMU instruction TLB miss\n");
1825 exit(1);
1826 break;
1827 case EXCP_ITB_ACV:
1828 fprintf(stderr, "MMU instruction access violation\n");
1829 exit(1);
1830 break;
1831 case EXCP_DTB_MISS_NATIVE:
1832 fprintf(stderr, "MMU data TLB miss\n");
1833 exit(1);
1834 break;
1835 case EXCP_UNALIGN:
1836 fprintf(stderr, "Unaligned access\n");
1837 exit(1);
1838 break;
1839 case EXCP_OPCDEC:
1840 fprintf(stderr, "Invalid instruction\n");
1841 exit(1);
1842 break;
1843 case EXCP_FEN:
1844 fprintf(stderr, "Floating-point not allowed\n");
1845 exit(1);
1846 break;
1847 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
1848 fprintf(stderr, "Call to PALcode\n");
1849 call_pal(env, (trapnr >> 6) | 0x80);
1850 break;
1851 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
7f75ffd3 1852 fprintf(stderr, "Privileged call to PALcode\n");
7a3148a9
JM		 1853 exit(1);
1854 break;
1855 case EXCP_DEBUG:
1856 {
1857 int sig;
1858
1859 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1860 if (sig)
1861 {
1862 info.si_signo = sig;
1863 info.si_errno = 0;
1864 info.si_code = TARGET_TRAP_BRKPT;
1865 queue_signal(info.si_signo, &info);
1866 }
1867 }
1868 break;
1869 default:
1870 printf ("Unhandled trap: 0x%x\n", trapnr);
1871 cpu_dump_state(env, stderr, fprintf, 0);
1872 exit (1);
1873 }
1874 process_pending_signals (env);
1875 }
1876}
1877#endif /* TARGET_ALPHA */
1878
31e31b8a
FB		 1879void usage(void)
1880{
84f2e8ef 1881 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n"
b1f9be31 1882 "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n"
b346ff46 1883 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 1884 "\n"
b12b6a18
TS		 1885 "-h print this help\n"
1886 "-g port wait gdb connection to port\n"
1887 "-L path set the elf interpreter prefix (default=%s)\n"
1888 "-s size set the stack size in bytes (default=%ld)\n"
1889 "-cpu model select CPU (-cpu ? for list)\n"
1890 "-drop-ld-preload drop LD_PRELOAD for target process\n"
54936004
FB		 1891 "\n"
1892 "debug options:\n"
6f1f31c0 1893 "-d options activate log (logfile=%s)\n"
b6741956
FB		 1894 "-p pagesize set the host page size to 'pagesize'\n"
1895 "-strace log system calls\n",
b346ff46 1896 TARGET_ARCH,
5fafdf24 1897 interp_prefix,
54936004
FB		 1898 x86_stack_size,
1899 DEBUG_LOGFILE);
74cd30b8 1900 _exit(1);
31e31b8a
FB		 1901}
1902
9de5e440 1903/* XXX: currently only used for async signals (see signal.c) */
b346ff46 1904CPUState *global_env;
59faf6d6 1905
851e67a1
FB		 1906/* used to free thread contexts */
1907TaskState *first_task_state;
9de5e440 1908
31e31b8a
FB		 1909int main(int argc, char **argv)
1910{
1911 const char *filename;
b1f9be31 1912 const char *cpu_model;
01ffc75b 1913 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 1914 struct image_info info1, *info = &info1;
851e67a1 1915 TaskState ts1, *ts = &ts1;
b346ff46 1916 CPUState *env;
586314f2 1917 int optind;
d691f669 1918 const char *r;
74c33bed 1919 int gdbstub_port = 0;
b12b6a18
TS		 1920 int drop_ld_preload = 0, environ_count = 0;
1921 char **target_environ, **wrk, **dst;
1922
31e31b8a
FB		 1923 if (argc <= 1)
1924 usage();
f801f97e 1925
cc38b844
FB		 1926 /* init debug */
1927 cpu_set_log_filename(DEBUG_LOGFILE);
1928
b1f9be31 1929 cpu_model = NULL;
586314f2 1930 optind = 1;
d691f669
FB		 1931 for(;;) {
1932 if (optind >= argc)
1933 break;
1934 r = argv[optind];
1935 if (r[0] != '-')
1936 break;
586314f2 1937 optind++;
d691f669
FB		 1938 r++;
1939 if (!strcmp(r, "-")) {
1940 break;
1941 } else if (!strcmp(r, "d")) {
e19e89a5
FB		 1942 int mask;
1943 CPULogItem *item;
6f1f31c0
FB		 1944
1945 if (optind >= argc)
1946 break;
3b46e624 1947
6f1f31c0
FB		 1948 r = argv[optind++];
1949 mask = cpu_str_to_log_mask(r);
e19e89a5
FB		 1950 if (!mask) {
1951 printf("Log items (comma separated):\n");
1952 for(item = cpu_log_items; item->mask != 0; item++) {
1953 printf("%-10s %s\n", item->name, item->help);
1954 }
1955 exit(1);
1956 }
1957 cpu_set_log(mask);
d691f669
FB		 1958 } else if (!strcmp(r, "s")) {
1959 r = argv[optind++];
1960 x86_stack_size = strtol(r, (char **)&r, 0);
1961 if (x86_stack_size <= 0)
1962 usage();
1963 if (*r == 'M')
1964 x86_stack_size *= 1024 * 1024;
1965 else if (*r == 'k' || *r == 'K')
1966 x86_stack_size *= 1024;
1967 } else if (!strcmp(r, "L")) {
1968 interp_prefix = argv[optind++];
54936004 1969 } else if (!strcmp(r, "p")) {
83fb7adf
FB		 1970 qemu_host_page_size = atoi(argv[optind++]);
1971 if (qemu_host_page_size == 0 ||
1972 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 1973 fprintf(stderr, "page size must be a power of two\n");
1974 exit(1);
1975 }
1fddef4b 1976 } else if (!strcmp(r, "g")) {
74c33bed 1977 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 1978 } else if (!strcmp(r, "r")) {
1979 qemu_uname_release = argv[optind++];
b1f9be31
JM		 1980 } else if (!strcmp(r, "cpu")) {
1981 cpu_model = argv[optind++];
1982 if (strcmp(cpu_model, "?") == 0) {
c732abe2
JM		 1983/* XXX: implement xxx_cpu_list for targets that still miss it */
1984#if defined(cpu_list)
1985 cpu_list(stdout, &fprintf);
b1f9be31 1986#endif
cff4cbed 1987 _exit(1);
b1f9be31 1988 }
b12b6a18
TS		 1989 } else if (!strcmp(r, "drop-ld-preload")) {
1990 drop_ld_preload = 1;
b6741956
FB		 1991 } else if (!strcmp(r, "strace")) {
1992 do_strace = 1;
5fafdf24 1993 } else
c6981055 1994 {
d691f669
FB		 1995 usage();
1996 }
586314f2 1997 }
d691f669
FB		 1998 if (optind >= argc)
1999 usage();
586314f2
FB		 2000 filename = argv[optind];
2001
31e31b8a 2002 /* Zero out regs */
01ffc75b 2003 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 2004
2005 /* Zero out image_info */
2006 memset(info, 0, sizeof(struct image_info));
2007
74cd30b8
FB		 2008 /* Scan interp_prefix dir for replacement files. */
2009 init_paths(interp_prefix);
2010
46027c07 2011 if (cpu_model == NULL) {
aaed909a 2012#if defined(TARGET_I386)
46027c07
FB		 2013#ifdef TARGET_X86_64
2014 cpu_model = "qemu64";
2015#else
2016 cpu_model = "qemu32";
2017#endif
aaed909a
FB		 2018#elif defined(TARGET_ARM)
2019 cpu_model = "arm926";
2020#elif defined(TARGET_M68K)
2021 cpu_model = "any";
2022#elif defined(TARGET_SPARC)
2023#ifdef TARGET_SPARC64
2024 cpu_model = "TI UltraSparc II";
2025#else
2026 cpu_model = "Fujitsu MB86904";
46027c07 2027#endif
aaed909a
FB		 2028#elif defined(TARGET_MIPS)
2029#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2030 cpu_model = "20Kc";
2031#else
2032 cpu_model = "24Kf";
2033#endif
2034#elif defined(TARGET_PPC)
2035 cpu_model = "750";
2036#else
2037 cpu_model = "any";
2038#endif
2039 }
83fb7adf
FB		 2040 /* NOTE: we need to init the CPU at this stage to get
2041 qemu_host_page_size */
aaed909a
FB		 2042 env = cpu_init(cpu_model);
2043 if (!env) {
2044 fprintf(stderr, "Unable to find CPU definition\n");
2045 exit(1);
2046 }
15338fd7 2047 global_env = env;
3b46e624 2048
b6741956
FB		 2049 if (getenv("QEMU_STRACE")) {
2050 do_strace = 1;
b92c47c1
TS		 2051 }
2052
b12b6a18
TS		 2053 wrk = environ;
2054 while (*(wrk++))
2055 environ_count++;
2056
2057 target_environ = malloc((environ_count + 1) * sizeof(char *));
2058 if (!target_environ)
2059 abort();
2060 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2061 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2062 continue;
2063 *(dst++) = strdup(*wrk);
2064 }
403f14ef 2065 *dst = NULL; /* NULL terminate target_environ */
b12b6a18
TS		 2066
2067 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2068 printf("Error loading %s\n", filename);
2069 _exit(1);
2070 }
2071
2072 for (wrk = target_environ; *wrk; wrk++) {
2073 free(*wrk);
31e31b8a 2074 }
3b46e624 2075
b12b6a18
TS		 2076 free(target_environ);
2077
4b74fe1f 2078 if (loglevel) {
54936004 2079 page_dump(logfile);
3b46e624 2080
8a4ed7ef
FB		 2081 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2082 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2083 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
3d177870 2084 info->start_code);
8a4ed7ef 2085 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
3d177870 2086 info->start_data);
8a4ed7ef
FB		 2087 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2088 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
3d177870 2089 info->start_stack);
8a4ed7ef
FB		 2090 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2091 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
4b74fe1f 2092 }
31e31b8a 2093
53a5960a 2094 target_set_brk(info->brk);
31e31b8a 2095 syscall_init();
66fb9763 2096 signal_init();
31e31b8a 2097
851e67a1
FB		 2098 /* build Task State */
2099 memset(ts, 0, sizeof(TaskState));
2100 env->opaque = ts;
2101 ts->used = 1;
978efd6a 2102 ts->info = info;
59faf6d6 2103 env->user_mode_only = 1;
3b46e624 2104
b346ff46 2105#if defined(TARGET_I386)
2e255c6b
FB		 2106 cpu_x86_set_cpl(env, 3);
2107
3802ce26 2108 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 2109 env->hflags |= HF_PE_MASK;
2110 if (env->cpuid_features & CPUID_SSE) {
2111 env->cr[4] |= CR4_OSFXSR_MASK;
2112 env->hflags |= HF_OSFXSR_MASK;
2113 }
d2fd1af7 2114#ifndef TARGET_ABI32
4dbc422b
FB		 2115 /* enable 64 bit mode if possible */
2116 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2117 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2118 exit(1);
2119 }
d2fd1af7 2120 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 2121 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 2122 env->hflags |= HF_LMA_MASK;
2123#endif
1bde465e 2124
415e561f
FB		 2125 /* flags setup : we activate the IRQs by default as in user mode */
2126 env->eflags |= IF_MASK;
3b46e624 2127
6dbad63e 2128 /* linux register setup */
d2fd1af7 2129#ifndef TARGET_ABI32
84409ddb
JM		 2130 env->regs[R_EAX] = regs->rax;
2131 env->regs[R_EBX] = regs->rbx;
2132 env->regs[R_ECX] = regs->rcx;
2133 env->regs[R_EDX] = regs->rdx;
2134 env->regs[R_ESI] = regs->rsi;
2135 env->regs[R_EDI] = regs->rdi;
2136 env->regs[R_EBP] = regs->rbp;
2137 env->regs[R_ESP] = regs->rsp;
2138 env->eip = regs->rip;
2139#else
0ecfa993
FB		 2140 env->regs[R_EAX] = regs->eax;
2141 env->regs[R_EBX] = regs->ebx;
2142 env->regs[R_ECX] = regs->ecx;
2143 env->regs[R_EDX] = regs->edx;
2144 env->regs[R_ESI] = regs->esi;
2145 env->regs[R_EDI] = regs->edi;
2146 env->regs[R_EBP] = regs->ebp;
2147 env->regs[R_ESP] = regs->esp;
dab2ed99 2148 env->eip = regs->eip;
84409ddb 2149#endif
31e31b8a 2150
f4beb510 2151 /* linux interrupt setup */
53a5960a 2152 env->idt.base = h2g(idt_table);
f4beb510
FB		 2153 env->idt.limit = sizeof(idt_table) - 1;
2154 set_idt(0, 0);
2155 set_idt(1, 0);
2156 set_idt(2, 0);
2157 set_idt(3, 3);
2158 set_idt(4, 3);
2159 set_idt(5, 3);
2160 set_idt(6, 0);
2161 set_idt(7, 0);
2162 set_idt(8, 0);
2163 set_idt(9, 0);
2164 set_idt(10, 0);
2165 set_idt(11, 0);
2166 set_idt(12, 0);
2167 set_idt(13, 0);
2168 set_idt(14, 0);
2169 set_idt(15, 0);
2170 set_idt(16, 0);
2171 set_idt(17, 0);
2172 set_idt(18, 0);
2173 set_idt(19, 0);
2174 set_idt(0x80, 3);
2175
6dbad63e 2176 /* linux segment setup */
8d18e893
FB		 2177 {
2178 uint64_t *gdt_table;
2179 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
d2fd1af7 2180 env->gdt.base = h2g((unsigned long)gdt_table);
8d18e893 2181 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
d2fd1af7 2182#ifdef TARGET_ABI32
8d18e893
FB		 2183 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2184 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2185 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 2186#else
2187 /* 64 bit code segment */
2188 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2189 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2190 DESC_L_MASK |
2191 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2192#endif
8d18e893
FB		 2193 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2194 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2195 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2196 }
6dbad63e 2197 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 2198 cpu_x86_load_seg(env, R_SS, __USER_DS);
2199#ifdef TARGET_ABI32
6dbad63e
FB		 2200 cpu_x86_load_seg(env, R_DS, __USER_DS);
2201 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 2202 cpu_x86_load_seg(env, R_FS, __USER_DS);
2203 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 2204 /* This hack makes Wine work... */
2205 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 2206#else
2207 cpu_x86_load_seg(env, R_DS, 0);
2208 cpu_x86_load_seg(env, R_ES, 0);
2209 cpu_x86_load_seg(env, R_FS, 0);
2210 cpu_x86_load_seg(env, R_GS, 0);
2211#endif
b346ff46
FB		 2212#elif defined(TARGET_ARM)
2213 {
2214 int i;
b5ff1b31 2215 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 2216 for(i = 0; i < 16; i++) {
2217 env->regs[i] = regs->uregs[i];
2218 }
b346ff46 2219 }
93ac68bc 2220#elif defined(TARGET_SPARC)
060366c5
FB		 2221 {
2222 int i;
2223 env->pc = regs->pc;
2224 env->npc = regs->npc;
2225 env->y = regs->y;
2226 for(i = 0; i < 8; i++)
2227 env->gregs[i] = regs->u_regs[i];
2228 for(i = 0; i < 8; i++)
2229 env->regwptr[i] = regs->u_regs[i + 8];
2230 }
67867308
FB		 2231#elif defined(TARGET_PPC)
2232 {
2233 int i;
3fc6c082 2234
0411a972
JM		 2235#if defined(TARGET_PPC64)
2236#if defined(TARGET_ABI32)
2237 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 2238#else
0411a972
JM		 2239 env->msr |= (target_ulong)1 << MSR_SF;
2240#endif
84409ddb 2241#endif
67867308
FB		 2242 env->nip = regs->nip;
2243 for(i = 0; i < 32; i++) {
2244 env->gpr[i] = regs->gpr[i];
2245 }
2246 }
e6e5906b
PB		 2247#elif defined(TARGET_M68K)
2248 {
e6e5906b
PB		 2249 env->pc = regs->pc;
2250 env->dregs[0] = regs->d0;
2251 env->dregs[1] = regs->d1;
2252 env->dregs[2] = regs->d2;
2253 env->dregs[3] = regs->d3;
2254 env->dregs[4] = regs->d4;
2255 env->dregs[5] = regs->d5;
2256 env->dregs[6] = regs->d6;
2257 env->dregs[7] = regs->d7;
2258 env->aregs[0] = regs->a0;
2259 env->aregs[1] = regs->a1;
2260 env->aregs[2] = regs->a2;
2261 env->aregs[3] = regs->a3;
2262 env->aregs[4] = regs->a4;
2263 env->aregs[5] = regs->a5;
2264 env->aregs[6] = regs->a6;
2265 env->aregs[7] = regs->usp;
2266 env->sr = regs->sr;
2267 ts->sim_syscalls = 1;
2268 }
048f6b4d
FB		 2269#elif defined(TARGET_MIPS)
2270 {
2271 int i;
2272
2273 for(i = 0; i < 32; i++) {
ead9360e 2274 env->gpr[i][env->current_tc] = regs->regs[i];
048f6b4d 2275 }
ead9360e 2276 env->PC[env->current_tc] = regs->cp0_epc;
048f6b4d 2277 }
fdf9b3e8
FB		 2278#elif defined(TARGET_SH4)
2279 {
2280 int i;
2281
2282 for(i = 0; i < 16; i++) {
2283 env->gregs[i] = regs->regs[i];
2284 }
2285 env->pc = regs->pc;
2286 }
7a3148a9
JM		 2287#elif defined(TARGET_ALPHA)
2288 {
2289 int i;
2290
2291 for(i = 0; i < 28; i++) {
992f48a0 2292 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9
JM		 2293 }
2294 env->ipr[IPR_USP] = regs->usp;
2295 env->ir[30] = regs->usp;
2296 env->pc = regs->pc;
2297 env->unique = regs->unique;
2298 }
48733d19
TS		 2299#elif defined(TARGET_CRIS)
2300 {
2301 env->regs[0] = regs->r0;
2302 env->regs[1] = regs->r1;
2303 env->regs[2] = regs->r2;
2304 env->regs[3] = regs->r3;
2305 env->regs[4] = regs->r4;
2306 env->regs[5] = regs->r5;
2307 env->regs[6] = regs->r6;
2308 env->regs[7] = regs->r7;
2309 env->regs[8] = regs->r8;
2310 env->regs[9] = regs->r9;
2311 env->regs[10] = regs->r10;
2312 env->regs[11] = regs->r11;
2313 env->regs[12] = regs->r12;
2314 env->regs[13] = regs->r13;
2315 env->regs[14] = info->start_stack;
2316 env->regs[15] = regs->acr;
2317 env->pc = regs->erp;
2318 }
b346ff46
FB		 2319#else
2320#error unsupported target CPU
2321#endif
31e31b8a 2322
a87295e8
PB		 2323#if defined(TARGET_ARM) || defined(TARGET_M68K)
2324 ts->stack_base = info->start_stack;
2325 ts->heap_base = info->brk;
2326 /* This will be filled in on the first SYS_HEAPINFO call. */
2327 ts->heap_limit = 0;
2328#endif
2329
74c33bed
FB		 2330 if (gdbstub_port) {
2331 gdbserver_start (gdbstub_port);
1fddef4b
FB		 2332 gdb_handlesig(env, 0);
2333 }
1b6b029e
FB		 2334 cpu_loop(env);
2335 /* never exits */
31e31b8a
FB		 2336 return 0;
2337}
Qemu copy for testing