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microblaze: Make boot_info static.
[qemu.git] / linux-user / main.c
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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a
FB		 18 */
19#include <stdlib.h>
20#include <stdio.h>
21#include <stdarg.h>
04369ff2 22#include <string.h>
31e31b8a 23#include <errno.h>
0ecfa993 24#include <unistd.h>
e441570f 25#include <sys/mman.h>
edf8e2af 26#include <sys/syscall.h>
31e31b8a 27
3ef693a0 28#include "qemu.h"
ca10f867 29#include "qemu-common.h"
902b3d5c 30#include "cache-utils.h"
d5975363
PB		 31/* For tb_lock */
32#include "exec-all.h"
31e31b8a 33
04a6dfeb
AJ		 34
35#include "envlist.h"
36
3ef693a0 37#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 38
d088d664
AJ		 39char *exec_path;
40
1b530a6d 41int singlestep;
379f6698
PB		 42#if defined(CONFIG_USE_GUEST_BASE)
43unsigned long mmap_min_addr;
44unsigned long guest_base;
45int have_guest_base;
46#endif
1b530a6d 47
74cd30b8 48static const char *interp_prefix = CONFIG_QEMU_PREFIX;
c5937220 49const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 50
9de5e440
FB		 51/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
52 we allocate a bigger stack. Need a better solution, for example
53 by remapping the process stack directly at the right place */
54unsigned long x86_stack_size = 512 * 1024;
31e31b8a
FB		 55
56void gemu_log(const char *fmt, ...)
57{
58 va_list ap;
59
60 va_start(ap, fmt);
61 vfprintf(stderr, fmt, ap);
62 va_end(ap);
63}
64
8fcd3692 65#if defined(TARGET_I386)
a541f297 66int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 67{
68 return -1;
69}
8fcd3692 70#endif
92ccca6a 71
28ab0e2e
FB		 72/* timers for rdtsc */
73
1dce7c3c 74#if 0
28ab0e2e
FB		 75
76static uint64_t emu_time;
77
78int64_t cpu_get_real_ticks(void)
79{
80 return emu_time++;
81}
82
83#endif
84
2f7bb878 85#if defined(CONFIG_USE_NPTL)
d5975363
PB		 86/***********************************************************/
87/* Helper routines for implementing atomic operations. */
88
89/* To implement exclusive operations we force all cpus to syncronise.
90 We don't require a full sync, only that no cpus are executing guest code.
91 The alternative is to map target atomic ops onto host equivalents,
92 which requires quite a lot of per host/target work. */
c2764719 93static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 94static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
95static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
96static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
97static int pending_cpus;
98
99/* Make sure everything is in a consistent state for calling fork(). */
100void fork_start(void)
101{
102 mmap_fork_start();
103 pthread_mutex_lock(&tb_lock);
104 pthread_mutex_lock(&exclusive_lock);
105}
106
107void fork_end(int child)
108{
109 if (child) {
110 /* Child processes created by fork() only have a single thread.
111 Discard information about the parent threads. */
112 first_cpu = thread_env;
113 thread_env->next_cpu = NULL;
114 pending_cpus = 0;
115 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 116 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 117 pthread_cond_init(&exclusive_cond, NULL);
118 pthread_cond_init(&exclusive_resume, NULL);
119 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 120 gdbserver_fork(thread_env);
d5975363
PB		 121 } else {
122 pthread_mutex_unlock(&exclusive_lock);
123 pthread_mutex_unlock(&tb_lock);
124 }
125 mmap_fork_end(child);
126}
127
128/* Wait for pending exclusive operations to complete. The exclusive lock
129 must be held. */
130static inline void exclusive_idle(void)
131{
132 while (pending_cpus) {
133 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
134 }
135}
136
137/* Start an exclusive operation.
138 Must only be called from outside cpu_arm_exec. */
139static inline void start_exclusive(void)
140{
141 CPUState *other;
142 pthread_mutex_lock(&exclusive_lock);
143 exclusive_idle();
144
145 pending_cpus = 1;
146 /* Make all other cpus stop executing. */
147 for (other = first_cpu; other; other = other->next_cpu) {
148 if (other->running) {
149 pending_cpus++;
3098dba0 150 cpu_exit(other);
d5975363
PB		 151 }
152 }
153 if (pending_cpus > 1) {
154 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
155 }
156}
157
158/* Finish an exclusive operation. */
159static inline void end_exclusive(void)
160{
161 pending_cpus = 0;
162 pthread_cond_broadcast(&exclusive_resume);
163 pthread_mutex_unlock(&exclusive_lock);
164}
165
166/* Wait for exclusive ops to finish, and begin cpu execution. */
167static inline void cpu_exec_start(CPUState *env)
168{
169 pthread_mutex_lock(&exclusive_lock);
170 exclusive_idle();
171 env->running = 1;
172 pthread_mutex_unlock(&exclusive_lock);
173}
174
175/* Mark cpu as not executing, and release pending exclusive ops. */
176static inline void cpu_exec_end(CPUState *env)
177{
178 pthread_mutex_lock(&exclusive_lock);
179 env->running = 0;
180 if (pending_cpus > 1) {
181 pending_cpus--;
182 if (pending_cpus == 1) {
183 pthread_cond_signal(&exclusive_cond);
184 }
185 }
186 exclusive_idle();
187 pthread_mutex_unlock(&exclusive_lock);
188}
c2764719
PB		 189
190void cpu_list_lock(void)
191{
192 pthread_mutex_lock(&cpu_list_mutex);
193}
194
195void cpu_list_unlock(void)
196{
197 pthread_mutex_unlock(&cpu_list_mutex);
198}
2f7bb878 199#else /* if !CONFIG_USE_NPTL */
d5975363
PB		 200/* These are no-ops because we are not threadsafe. */
201static inline void cpu_exec_start(CPUState *env)
202{
203}
204
205static inline void cpu_exec_end(CPUState *env)
206{
207}
208
209static inline void start_exclusive(void)
210{
211}
212
213static inline void end_exclusive(void)
214{
215}
216
217void fork_start(void)
218{
219}
220
221void fork_end(int child)
222{
2b1319c8
AJ		 223 if (child) {
224 gdbserver_fork(thread_env);
225 }
d5975363 226}
c2764719
PB		 227
228void cpu_list_lock(void)
229{
230}
231
232void cpu_list_unlock(void)
233{
234}
d5975363
PB		 235#endif
236
237
a541f297
FB		 238#ifdef TARGET_I386
239/***********************************************************/
240/* CPUX86 core interface */
241
02a1602e
FB		 242void cpu_smm_update(CPUState *env)
243{
244}
245
28ab0e2e
FB		 246uint64_t cpu_get_tsc(CPUX86State *env)
247{
248 return cpu_get_real_ticks();
249}
250
5fafdf24 251static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 252 int flags)
6dbad63e 253{
f4beb510 254 unsigned int e1, e2;
53a5960a 255 uint32_t *p;
6dbad63e
FB		 256 e1 = (addr << 16) | (limit & 0xffff);
257 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 258 e2 |= flags;
53a5960a 259 p = ptr;
d538e8f5 260 p[0] = tswap32(e1);
261 p[1] = tswap32(e2);
f4beb510
FB		 262}
263
e441570f 264static uint64_t *idt_table;
eb38c52c 265#ifdef TARGET_X86_64
d2fd1af7
FB		 266static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
267 uint64_t addr, unsigned int sel)
f4beb510 268{
4dbc422b 269 uint32_t *p, e1, e2;
f4beb510
FB		 270 e1 = (addr & 0xffff) | (sel << 16);
271 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 272 p = ptr;
4dbc422b
FB		 273 p[0] = tswap32(e1);
274 p[1] = tswap32(e2);
275 p[2] = tswap32(addr >> 32);
276 p[3] = 0;
6dbad63e 277}
d2fd1af7
FB		 278/* only dpl matters as we do only user space emulation */
279static void set_idt(int n, unsigned int dpl)
280{
281 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
282}
283#else
d2fd1af7
FB		 284static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
285 uint32_t addr, unsigned int sel)
286{
4dbc422b 287 uint32_t *p, e1, e2;
d2fd1af7
FB		 288 e1 = (addr & 0xffff) | (sel << 16);
289 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
290 p = ptr;
4dbc422b
FB		 291 p[0] = tswap32(e1);
292 p[1] = tswap32(e2);
d2fd1af7
FB		 293}
294
f4beb510
FB		 295/* only dpl matters as we do only user space emulation */
296static void set_idt(int n, unsigned int dpl)
297{
298 set_gate(idt_table + n, 0, dpl, 0, 0);
299}
d2fd1af7 300#endif
31e31b8a 301
89e957e7 302void cpu_loop(CPUX86State *env)
1b6b029e 303{
bc8a22cc 304 int trapnr;
992f48a0 305 abi_ulong pc;
c227f099 306 target_siginfo_t info;
851e67a1 307
1b6b029e 308 for(;;) {
bc8a22cc 309 trapnr = cpu_x86_exec(env);
bc8a22cc 310 switch(trapnr) {
f4beb510 311 case 0x80:
d2fd1af7 312 /* linux syscall from int $0x80 */
5fafdf24
TS		 313 env->regs[R_EAX] = do_syscall(env,
314 env->regs[R_EAX],
f4beb510
FB		 315 env->regs[R_EBX],
316 env->regs[R_ECX],
317 env->regs[R_EDX],
318 env->regs[R_ESI],
319 env->regs[R_EDI],
320 env->regs[R_EBP]);
321 break;
d2fd1af7
FB		 322#ifndef TARGET_ABI32
323 case EXCP_SYSCALL:
324 /* linux syscall from syscall intruction */
325 env->regs[R_EAX] = do_syscall(env,
326 env->regs[R_EAX],
327 env->regs[R_EDI],
328 env->regs[R_ESI],
329 env->regs[R_EDX],
330 env->regs[10],
331 env->regs[8],
332 env->regs[9]);
333 env->eip = env->exception_next_eip;
334 break;
335#endif
f4beb510
FB		 336 case EXCP0B_NOSEG:
337 case EXCP0C_STACK:
338 info.si_signo = SIGBUS;
339 info.si_errno = 0;
340 info.si_code = TARGET_SI_KERNEL;
341 info._sifields._sigfault._addr = 0;
624f7979 342 queue_signal(env, info.si_signo, &info);
f4beb510 343 break;
1b6b029e 344 case EXCP0D_GPF:
d2fd1af7 345 /* XXX: potential problem if ABI32 */
84409ddb 346#ifndef TARGET_X86_64
851e67a1 347 if (env->eflags & VM_MASK) {
89e957e7 348 handle_vm86_fault(env);
84409ddb
JM		 349 } else
350#endif
351 {
f4beb510
FB		 352 info.si_signo = SIGSEGV;
353 info.si_errno = 0;
354 info.si_code = TARGET_SI_KERNEL;
355 info._sifields._sigfault._addr = 0;
624f7979 356 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 357 }
358 break;
b689bc57
FB		 359 case EXCP0E_PAGE:
360 info.si_signo = SIGSEGV;
361 info.si_errno = 0;
362 if (!(env->error_code & 1))
363 info.si_code = TARGET_SEGV_MAPERR;
364 else
365 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 366 info._sifields._sigfault._addr = env->cr[2];
624f7979 367 queue_signal(env, info.si_signo, &info);
b689bc57 368 break;
9de5e440 369 case EXCP00_DIVZ:
84409ddb 370#ifndef TARGET_X86_64
bc8a22cc 371 if (env->eflags & VM_MASK) {
447db213 372 handle_vm86_trap(env, trapnr);
84409ddb
JM		 373 } else
374#endif
375 {
bc8a22cc
FB		 376 /* division by zero */
377 info.si_signo = SIGFPE;
378 info.si_errno = 0;
379 info.si_code = TARGET_FPE_INTDIV;
380 info._sifields._sigfault._addr = env->eip;
624f7979 381 queue_signal(env, info.si_signo, &info);
bc8a22cc 382 }
9de5e440 383 break;
01df040b 384 case EXCP01_DB:
447db213 385 case EXCP03_INT3:
84409ddb 386#ifndef TARGET_X86_64
447db213
FB		 387 if (env->eflags & VM_MASK) {
388 handle_vm86_trap(env, trapnr);
84409ddb
JM		 389 } else
390#endif
391 {
447db213
FB		 392 info.si_signo = SIGTRAP;
393 info.si_errno = 0;
01df040b 394 if (trapnr == EXCP01_DB) {
447db213
FB		 395 info.si_code = TARGET_TRAP_BRKPT;
396 info._sifields._sigfault._addr = env->eip;
397 } else {
398 info.si_code = TARGET_SI_KERNEL;
399 info._sifields._sigfault._addr = 0;
400 }
624f7979 401 queue_signal(env, info.si_signo, &info);
447db213
FB		 402 }
403 break;
9de5e440
FB		 404 case EXCP04_INTO:
405 case EXCP05_BOUND:
84409ddb 406#ifndef TARGET_X86_64
bc8a22cc 407 if (env->eflags & VM_MASK) {
447db213 408 handle_vm86_trap(env, trapnr);
84409ddb
JM		 409 } else
410#endif
411 {
bc8a22cc
FB		 412 info.si_signo = SIGSEGV;
413 info.si_errno = 0;
b689bc57 414 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 415 info._sifields._sigfault._addr = 0;
624f7979 416 queue_signal(env, info.si_signo, &info);
bc8a22cc 417 }
9de5e440
FB		 418 break;
419 case EXCP06_ILLOP:
420 info.si_signo = SIGILL;
421 info.si_errno = 0;
422 info.si_code = TARGET_ILL_ILLOPN;
423 info._sifields._sigfault._addr = env->eip;
624f7979 424 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 425 break;
426 case EXCP_INTERRUPT:
427 /* just indicate that signals should be handled asap */
428 break;
1fddef4b
FB		 429 case EXCP_DEBUG:
430 {
431 int sig;
432
433 sig = gdb_handlesig (env, TARGET_SIGTRAP);
434 if (sig)
435 {
436 info.si_signo = sig;
437 info.si_errno = 0;
438 info.si_code = TARGET_TRAP_BRKPT;
624f7979 439 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 440 }
441 }
442 break;
1b6b029e 443 default:
970a87a6 444 pc = env->segs[R_CS].base + env->eip;
5fafdf24 445 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 446 (long)pc, trapnr);
1b6b029e
FB		 447 abort();
448 }
66fb9763 449 process_pending_signals(env);
1b6b029e
FB		 450 }
451}
b346ff46
FB		 452#endif
453
454#ifdef TARGET_ARM
455
992f48a0 456static void arm_cache_flush(abi_ulong start, abi_ulong last)
6f1f31c0 457{
992f48a0 458 abi_ulong addr, last1;
6f1f31c0
FB		 459
460 if (last < start)
461 return;
462 addr = start;
463 for(;;) {
464 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
465 if (last1 > last)
466 last1 = last;
467 tb_invalidate_page_range(addr, last1 + 1);
468 if (last1 == last)
469 break;
470 addr = last1 + 1;
471 }
472}
473
fbb4a2e3
PB		 474/* Handle a jump to the kernel code page. */
475static int
476do_kernel_trap(CPUARMState *env)
477{
478 uint32_t addr;
479 uint32_t cpsr;
480 uint32_t val;
481
482 switch (env->regs[15]) {
483 case 0xffff0fa0: /* __kernel_memory_barrier */
484 /* ??? No-op. Will need to do better for SMP. */
485 break;
486 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 487 /* XXX: This only works between threads, not between processes.
488 It's probably possible to implement this with native host
489 operations. However things like ldrex/strex are much harder so
490 there's not much point trying. */
491 start_exclusive();
fbb4a2e3
PB		 492 cpsr = cpsr_read(env);
493 addr = env->regs[2];
494 /* FIXME: This should SEGV if the access fails. */
495 if (get_user_u32(val, addr))
496 val = ~env->regs[0];
497 if (val == env->regs[0]) {
498 val = env->regs[1];
499 /* FIXME: Check for segfaults. */
500 put_user_u32(val, addr);
501 env->regs[0] = 0;
502 cpsr |= CPSR_C;
503 } else {
504 env->regs[0] = -1;
505 cpsr &= ~CPSR_C;
506 }
507 cpsr_write(env, cpsr, CPSR_C);
d5975363 508 end_exclusive();
fbb4a2e3
PB		 509 break;
510 case 0xffff0fe0: /* __kernel_get_tls */
511 env->regs[0] = env->cp15.c13_tls2;
512 break;
513 default:
514 return 1;
515 }
516 /* Jump back to the caller. */
517 addr = env->regs[14];
518 if (addr & 1) {
519 env->thumb = 1;
520 addr &= ~1;
521 }
522 env->regs[15] = addr;
523
524 return 0;
525}
526
426f5abc
PB		 527static int do_strex(CPUARMState *env)
528{
529 uint32_t val;
530 int size;
531 int rc = 1;
532 int segv = 0;
533 uint32_t addr;
534 start_exclusive();
535 addr = env->exclusive_addr;
536 if (addr != env->exclusive_test) {
537 goto fail;
538 }
539 size = env->exclusive_info & 0xf;
540 switch (size) {
541 case 0:
542 segv = get_user_u8(val, addr);
543 break;
544 case 1:
545 segv = get_user_u16(val, addr);
546 break;
547 case 2:
548 case 3:
549 segv = get_user_u32(val, addr);
550 break;
551 }
552 if (segv) {
553 env->cp15.c6_data = addr;
554 goto done;
555 }
556 if (val != env->exclusive_val) {
557 goto fail;
558 }
559 if (size == 3) {
560 segv = get_user_u32(val, addr + 4);
561 if (segv) {
562 env->cp15.c6_data = addr + 4;
563 goto done;
564 }
565 if (val != env->exclusive_high) {
566 goto fail;
567 }
568 }
569 val = env->regs[(env->exclusive_info >> 8) & 0xf];
570 switch (size) {
571 case 0:
572 segv = put_user_u8(val, addr);
573 break;
574 case 1:
575 segv = put_user_u16(val, addr);
576 break;
577 case 2:
578 case 3:
579 segv = put_user_u32(val, addr);
580 break;
581 }
582 if (segv) {
583 env->cp15.c6_data = addr;
584 goto done;
585 }
586 if (size == 3) {
587 val = env->regs[(env->exclusive_info >> 12) & 0xf];
588 segv = put_user_u32(val, addr);
589 if (segv) {
590 env->cp15.c6_data = addr + 4;
591 goto done;
592 }
593 }
594 rc = 0;
595fail:
596 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
597done:
598 end_exclusive();
599 return segv;
600}
601
b346ff46
FB		 602void cpu_loop(CPUARMState *env)
603{
604 int trapnr;
605 unsigned int n, insn;
c227f099 606 target_siginfo_t info;
b5ff1b31 607 uint32_t addr;
3b46e624 608
b346ff46 609 for(;;) {
d5975363 610 cpu_exec_start(env);
b346ff46 611 trapnr = cpu_arm_exec(env);
d5975363 612 cpu_exec_end(env);
b346ff46
FB		 613 switch(trapnr) {
614 case EXCP_UDEF:
c6981055
FB		 615 {
616 TaskState *ts = env->opaque;
617 uint32_t opcode;
6d9a42be 618 int rc;
c6981055
FB		 619
620 /* we handle the FPU emulation here, as Linux */
621 /* we get the opcode */
2f619698
FB		 622 /* FIXME - what to do if get_user() fails? */
623 get_user_u32(opcode, env->regs[15]);
3b46e624 624
6d9a42be
AJ		 625 rc = EmulateAll(opcode, &ts->fpa, env);
626 if (rc == 0) { /* illegal instruction */
c6981055
FB		 627 info.si_signo = SIGILL;
628 info.si_errno = 0;
629 info.si_code = TARGET_ILL_ILLOPN;
630 info._sifields._sigfault._addr = env->regs[15];
624f7979 631 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 632 } else if (rc < 0) { /* FP exception */
633 int arm_fpe=0;
634
635 /* translate softfloat flags to FPSR flags */
636 if (-rc & float_flag_invalid)
637 arm_fpe |= BIT_IOC;
638 if (-rc & float_flag_divbyzero)
639 arm_fpe |= BIT_DZC;
640 if (-rc & float_flag_overflow)
641 arm_fpe |= BIT_OFC;
642 if (-rc & float_flag_underflow)
643 arm_fpe |= BIT_UFC;
644 if (-rc & float_flag_inexact)
645 arm_fpe |= BIT_IXC;
646
647 FPSR fpsr = ts->fpa.fpsr;
648 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
649
650 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
651 info.si_signo = SIGFPE;
652 info.si_errno = 0;
653
654 /* ordered by priority, least first */
655 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
656 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
657 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
658 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
659 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
660
661 info._sifields._sigfault._addr = env->regs[15];
624f7979 662 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 663 } else {
664 env->regs[15] += 4;
665 }
666
667 /* accumulate unenabled exceptions */
668 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
669 fpsr |= BIT_IXC;
670 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
671 fpsr |= BIT_UFC;
672 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
673 fpsr |= BIT_OFC;
674 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
675 fpsr |= BIT_DZC;
676 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
677 fpsr |= BIT_IOC;
678 ts->fpa.fpsr=fpsr;
679 } else { /* everything OK */
c6981055
FB		 680 /* increment PC */
681 env->regs[15] += 4;
682 }
683 }
b346ff46
FB		 684 break;
685 case EXCP_SWI:
06c949e6 686 case EXCP_BKPT:
b346ff46 687 {
ce4defa0 688 env->eabi = 1;
b346ff46 689 /* system call */
06c949e6
PB		 690 if (trapnr == EXCP_BKPT) {
691 if (env->thumb) {
2f619698
FB		 692 /* FIXME - what to do if get_user() fails? */
693 get_user_u16(insn, env->regs[15]);
06c949e6
PB		 694 n = insn & 0xff;
695 env->regs[15] += 2;
696 } else {
2f619698
FB		 697 /* FIXME - what to do if get_user() fails? */
698 get_user_u32(insn, env->regs[15]);
06c949e6
PB		 699 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
700 env->regs[15] += 4;
701 }
192c7bd9 702 } else {
06c949e6 703 if (env->thumb) {
2f619698
FB		 704 /* FIXME - what to do if get_user() fails? */
705 get_user_u16(insn, env->regs[15] - 2);
06c949e6
PB		 706 n = insn & 0xff;
707 } else {
2f619698
FB		 708 /* FIXME - what to do if get_user() fails? */
709 get_user_u32(insn, env->regs[15] - 4);
06c949e6
PB		 710 n = insn & 0xffffff;
711 }
192c7bd9
FB		 712 }
713
6f1f31c0
FB		 714 if (n == ARM_NR_cacheflush) {
715 arm_cache_flush(env->regs[0], env->regs[1]);
a4f81979
FB		 716 } else if (n == ARM_NR_semihosting
717 || n == ARM_NR_thumb_semihosting) {
718 env->regs[0] = do_arm_semihosting (env);
ce4defa0 719 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 720 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 721 /* linux syscall */
ce4defa0 722 if (env->thumb || n == 0) {
192c7bd9
FB		 723 n = env->regs[7];
724 } else {
725 n -= ARM_SYSCALL_BASE;
ce4defa0 726 env->eabi = 0;
192c7bd9 727 }
fbb4a2e3
PB		 728 if ( n > ARM_NR_BASE) {
729 switch (n) {
730 case ARM_NR_cacheflush:
731 arm_cache_flush(env->regs[0], env->regs[1]);
732 break;
733 case ARM_NR_set_tls:
734 cpu_set_tls(env, env->regs[0]);
735 env->regs[0] = 0;
736 break;
737 default:
738 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
739 n);
740 env->regs[0] = -TARGET_ENOSYS;
741 break;
742 }
743 } else {
744 env->regs[0] = do_syscall(env,
745 n,
746 env->regs[0],
747 env->regs[1],
748 env->regs[2],
749 env->regs[3],
750 env->regs[4],
751 env->regs[5]);
752 }
b346ff46
FB		 753 } else {
754 goto error;
755 }
756 }
757 break;
43fff238
FB		 758 case EXCP_INTERRUPT:
759 /* just indicate that signals should be handled asap */
760 break;
68016c62 761 case EXCP_PREFETCH_ABORT:
eae473c1 762 addr = env->cp15.c6_insn;
b5ff1b31 763 goto do_segv;
68016c62 764 case EXCP_DATA_ABORT:
eae473c1 765 addr = env->cp15.c6_data;
b5ff1b31
FB		 766 goto do_segv;
767 do_segv:
68016c62
FB		 768 {
769 info.si_signo = SIGSEGV;
770 info.si_errno = 0;
771 /* XXX: check env->error_code */
772 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 773 info._sifields._sigfault._addr = addr;
624f7979 774 queue_signal(env, info.si_signo, &info);
68016c62
FB		 775 }
776 break;
1fddef4b
FB		 777 case EXCP_DEBUG:
778 {
779 int sig;
780
781 sig = gdb_handlesig (env, TARGET_SIGTRAP);
782 if (sig)
783 {
784 info.si_signo = sig;
785 info.si_errno = 0;
786 info.si_code = TARGET_TRAP_BRKPT;
624f7979 787 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 788 }
789 }
790 break;
fbb4a2e3
PB		 791 case EXCP_KERNEL_TRAP:
792 if (do_kernel_trap(env))
793 goto error;
794 break;
426f5abc
PB		 795 case EXCP_STREX:
796 if (do_strex(env)) {
797 addr = env->cp15.c6_data;
798 goto do_segv;
799 }
e9273455 800 break;
b346ff46
FB		 801 default:
802 error:
5fafdf24 803 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 804 trapnr);
7fe48483 805 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 806 abort();
807 }
808 process_pending_signals(env);
809 }
810}
811
812#endif
1b6b029e 813
93ac68bc 814#ifdef TARGET_SPARC
ed23fbd9 815#define SPARC64_STACK_BIAS 2047
93ac68bc 816
060366c5
FB		 817//#define DEBUG_WIN
818
2623cbaf
FB		 819/* WARNING: dealing with register windows _is_ complicated. More info
820 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 821static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
822{
1a14026e 823 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 824 /* wrap handling : if cwp is on the last window, then we use the
825 registers 'after' the end */
1a14026e
BS		 826 if (index < 8 && env->cwp == env->nwindows - 1)
827 index += 16 * env->nwindows;
060366c5
FB		 828 return index;
829}
830
2623cbaf
FB		 831/* save the register window 'cwp1' */
832static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 833{
2623cbaf 834 unsigned int i;
992f48a0 835 abi_ulong sp_ptr;
3b46e624 836
53a5960a 837 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 838#ifdef TARGET_SPARC64
839 if (sp_ptr & 3)
840 sp_ptr += SPARC64_STACK_BIAS;
841#endif
060366c5 842#if defined(DEBUG_WIN)
2daf0284
BS		 843 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
844 sp_ptr, cwp1);
060366c5 845#endif
2623cbaf 846 for(i = 0; i < 16; i++) {
2f619698
FB		 847 /* FIXME - what to do if put_user() fails? */
848 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 849 sp_ptr += sizeof(abi_ulong);
2623cbaf 850 }
060366c5
FB		 851}
852
853static void save_window(CPUSPARCState *env)
854{
5ef54116 855#ifndef TARGET_SPARC64
2623cbaf 856 unsigned int new_wim;
1a14026e
BS		 857 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
858 ((1LL << env->nwindows) - 1);
859 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 860 env->wim = new_wim;
5ef54116 861#else
1a14026e 862 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 863 env->cansave++;
864 env->canrestore--;
865#endif
060366c5
FB		 866}
867
868static void restore_window(CPUSPARCState *env)
869{
eda52953
BS		 870#ifndef TARGET_SPARC64
871 unsigned int new_wim;
872#endif
873 unsigned int i, cwp1;
992f48a0 874 abi_ulong sp_ptr;
3b46e624 875
eda52953 876#ifndef TARGET_SPARC64
1a14026e
BS		 877 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
878 ((1LL << env->nwindows) - 1);
eda52953 879#endif
3b46e624 880
060366c5 881 /* restore the invalid window */
1a14026e 882 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 883 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 884#ifdef TARGET_SPARC64
885 if (sp_ptr & 3)
886 sp_ptr += SPARC64_STACK_BIAS;
887#endif
060366c5 888#if defined(DEBUG_WIN)
2daf0284
BS		 889 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
890 sp_ptr, cwp1);
060366c5 891#endif
2623cbaf 892 for(i = 0; i < 16; i++) {
2f619698
FB		 893 /* FIXME - what to do if get_user() fails? */
894 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 895 sp_ptr += sizeof(abi_ulong);
2623cbaf 896 }
5ef54116
FB		 897#ifdef TARGET_SPARC64
898 env->canrestore++;
1a14026e
BS		 899 if (env->cleanwin < env->nwindows - 1)
900 env->cleanwin++;
5ef54116 901 env->cansave--;
eda52953
BS		 902#else
903 env->wim = new_wim;
5ef54116 904#endif
060366c5
FB		 905}
906
907static void flush_windows(CPUSPARCState *env)
908{
909 int offset, cwp1;
2623cbaf
FB		 910
911 offset = 1;
060366c5
FB		 912 for(;;) {
913 /* if restore would invoke restore_window(), then we can stop */
1a14026e 914 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 915#ifndef TARGET_SPARC64
060366c5
FB		 916 if (env->wim & (1 << cwp1))
917 break;
eda52953
BS		 918#else
919 if (env->canrestore == 0)
920 break;
921 env->cansave++;
922 env->canrestore--;
923#endif
2623cbaf 924 save_window_offset(env, cwp1);
060366c5
FB		 925 offset++;
926 }
1a14026e 927 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 928#ifndef TARGET_SPARC64
929 /* set wim so that restore will reload the registers */
2623cbaf 930 env->wim = 1 << cwp1;
eda52953 931#endif
2623cbaf
FB		 932#if defined(DEBUG_WIN)
933 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 934#endif
2623cbaf 935}
060366c5 936
93ac68bc
FB		 937void cpu_loop (CPUSPARCState *env)
938{
060366c5 939 int trapnr, ret;
c227f099 940 target_siginfo_t info;
3b46e624 941
060366c5
FB		 942 while (1) {
943 trapnr = cpu_sparc_exec (env);
3b46e624 944
060366c5 945 switch (trapnr) {
5ef54116 946#ifndef TARGET_SPARC64
5fafdf24 947 case 0x88:
060366c5 948 case 0x90:
5ef54116 949#else
cb33da57 950 case 0x110:
5ef54116
FB		 951 case 0x16d:
952#endif
060366c5 953 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 954 env->regwptr[0], env->regwptr[1],
955 env->regwptr[2], env->regwptr[3],
060366c5
FB		 956 env->regwptr[4], env->regwptr[5]);
957 if ((unsigned int)ret >= (unsigned int)(-515)) {
992f48a0 958#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 959 env->xcc |= PSR_CARRY;
960#else
060366c5 961 env->psr |= PSR_CARRY;
27908725 962#endif
060366c5
FB		 963 ret = -ret;
964 } else {
992f48a0 965#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 966 env->xcc &= ~PSR_CARRY;
967#else
060366c5 968 env->psr &= ~PSR_CARRY;
27908725 969#endif
060366c5
FB		 970 }
971 env->regwptr[0] = ret;
972 /* next instruction */
973 env->pc = env->npc;
974 env->npc = env->npc + 4;
975 break;
976 case 0x83: /* flush windows */
992f48a0
BS		 977#ifdef TARGET_ABI32
978 case 0x103:
979#endif
2623cbaf 980 flush_windows(env);
060366c5
FB		 981 /* next instruction */
982 env->pc = env->npc;
983 env->npc = env->npc + 4;
984 break;
3475187d 985#ifndef TARGET_SPARC64
060366c5
FB		 986 case TT_WIN_OVF: /* window overflow */
987 save_window(env);
988 break;
989 case TT_WIN_UNF: /* window underflow */
990 restore_window(env);
991 break;
61ff6f58
FB		 992 case TT_TFAULT:
993 case TT_DFAULT:
994 {
995 info.si_signo = SIGSEGV;
996 info.si_errno = 0;
997 /* XXX: check env->error_code */
998 info.si_code = TARGET_SEGV_MAPERR;
999 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 1000 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 1001 }
1002 break;
3475187d 1003#else
5ef54116
FB		 1004 case TT_SPILL: /* window overflow */
1005 save_window(env);
1006 break;
1007 case TT_FILL: /* window underflow */
1008 restore_window(env);
1009 break;
7f84a729
BS		 1010 case TT_TFAULT:
1011 case TT_DFAULT:
1012 {
1013 info.si_signo = SIGSEGV;
1014 info.si_errno = 0;
1015 /* XXX: check env->error_code */
1016 info.si_code = TARGET_SEGV_MAPERR;
1017 if (trapnr == TT_DFAULT)
1018 info._sifields._sigfault._addr = env->dmmuregs[4];
1019 else
8194f35a 1020 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
624f7979 1021 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 1022 }
1023 break;
27524dc3 1024#ifndef TARGET_ABI32
5bfb56b2
BS		 1025 case 0x16e:
1026 flush_windows(env);
1027 sparc64_get_context(env);
1028 break;
1029 case 0x16f:
1030 flush_windows(env);
1031 sparc64_set_context(env);
1032 break;
27524dc3 1033#endif
3475187d 1034#endif
48dc41eb
FB		 1035 case EXCP_INTERRUPT:
1036 /* just indicate that signals should be handled asap */
1037 break;
1fddef4b
FB		 1038 case EXCP_DEBUG:
1039 {
1040 int sig;
1041
1042 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1043 if (sig)
1044 {
1045 info.si_signo = sig;
1046 info.si_errno = 0;
1047 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1048 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 1049 }
1050 }
1051 break;
060366c5
FB		 1052 default:
1053 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 1054 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 1055 exit (1);
1056 }
1057 process_pending_signals (env);
1058 }
93ac68bc
FB		 1059}
1060
1061#endif
1062
67867308 1063#ifdef TARGET_PPC
9fddaa0c
FB		 1064static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1065{
1066 /* TO FIX */
1067 return 0;
1068}
3b46e624 1069
9fddaa0c
FB		 1070uint32_t cpu_ppc_load_tbl (CPUState *env)
1071{
1072 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1073}
3b46e624 1074
9fddaa0c
FB		 1075uint32_t cpu_ppc_load_tbu (CPUState *env)
1076{
1077 return cpu_ppc_get_tb(env) >> 32;
1078}
3b46e624 1079
a062e36c 1080uint32_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 1081{
a062e36c 1082 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
9fddaa0c 1083}
5fafdf24 1084
a062e36c 1085uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 1086{
a062e36c 1087 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1088}
76a66253 1089
76a66253
JM		 1090uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1091__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1092
76a66253 1093uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 1094{
76a66253 1095 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1096}
76a66253 1097
a750fc0b 1098/* XXX: to be fixed */
c227f099 1099int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
a750fc0b
JM		 1100{
1101 return -1;
1102}
1103
c227f099 1104int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
a750fc0b
JM		 1105{
1106 return -1;
1107}
1108
001faf32
BS		 1109#define EXCP_DUMP(env, fmt, ...) \
1110do { \
1111 fprintf(stderr, fmt , ## __VA_ARGS__); \
1112 cpu_dump_state(env, stderr, fprintf, 0); \
1113 qemu_log(fmt, ## __VA_ARGS__); \
430c7ec7 1114 if (logfile) \
1115 log_cpu_state(env, 0); \
e1833e1f
JM		 1116} while (0)
1117
56f066bb
NF		 1118static int do_store_exclusive(CPUPPCState *env)
1119{
1120 target_ulong addr;
1121 target_ulong page_addr;
1122 target_ulong val;
1123 int flags;
1124 int segv = 0;
1125
1126 addr = env->reserve_ea;
1127 page_addr = addr & TARGET_PAGE_MASK;
1128 start_exclusive();
1129 mmap_lock();
1130 flags = page_get_flags(page_addr);
1131 if ((flags & PAGE_READ) == 0) {
1132 segv = 1;
1133 } else {
1134 int reg = env->reserve_info & 0x1f;
1135 int size = (env->reserve_info >> 5) & 0xf;
1136 int stored = 0;
1137
1138 if (addr == env->reserve_addr) {
1139 switch (size) {
1140 case 1: segv = get_user_u8(val, addr); break;
1141 case 2: segv = get_user_u16(val, addr); break;
1142 case 4: segv = get_user_u32(val, addr); break;
1143#if defined(TARGET_PPC64)
1144 case 8: segv = get_user_u64(val, addr); break;
1145#endif
1146 default: abort();
1147 }
1148 if (!segv && val == env->reserve_val) {
1149 val = env->gpr[reg];
1150 switch (size) {
1151 case 1: segv = put_user_u8(val, addr); break;
1152 case 2: segv = put_user_u16(val, addr); break;
1153 case 4: segv = put_user_u32(val, addr); break;
1154#if defined(TARGET_PPC64)
1155 case 8: segv = put_user_u64(val, addr); break;
1156#endif
1157 default: abort();
1158 }
1159 if (!segv) {
1160 stored = 1;
1161 }
1162 }
1163 }
1164 env->crf[0] = (stored << 1) | xer_so;
1165 env->reserve_addr = (target_ulong)-1;
1166 }
1167 if (!segv) {
1168 env->nip += 4;
1169 }
1170 mmap_unlock();
1171 end_exclusive();
1172 return segv;
1173}
1174
67867308
FB		 1175void cpu_loop(CPUPPCState *env)
1176{
c227f099 1177 target_siginfo_t info;
61190b14
FB		 1178 int trapnr;
1179 uint32_t ret;
3b46e624 1180
67867308 1181 for(;;) {
56f066bb 1182 cpu_exec_start(env);
67867308 1183 trapnr = cpu_ppc_exec(env);
56f066bb 1184 cpu_exec_end(env);
67867308 1185 switch(trapnr) {
e1833e1f
JM		 1186 case POWERPC_EXCP_NONE:
1187 /* Just go on */
67867308 1188 break;
e1833e1f
JM		 1189 case POWERPC_EXCP_CRITICAL: /* Critical input */
1190 cpu_abort(env, "Critical interrupt while in user mode. "
1191 "Aborting\n");
61190b14 1192 break;
e1833e1f
JM		 1193 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1194 cpu_abort(env, "Machine check exception while in user mode. "
1195 "Aborting\n");
1196 break;
1197 case POWERPC_EXCP_DSI: /* Data storage exception */
90e189ec 1198 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
e1833e1f
JM		 1199 env->spr[SPR_DAR]);
1200 /* XXX: check this. Seems bugged */
2be0071f
FB		 1201 switch (env->error_code & 0xFF000000) {
1202 case 0x40000000:
61190b14
FB		 1203 info.si_signo = TARGET_SIGSEGV;
1204 info.si_errno = 0;
1205 info.si_code = TARGET_SEGV_MAPERR;
1206 break;
2be0071f 1207 case 0x04000000:
61190b14
FB		 1208 info.si_signo = TARGET_SIGILL;
1209 info.si_errno = 0;
1210 info.si_code = TARGET_ILL_ILLADR;
1211 break;
2be0071f 1212 case 0x08000000:
61190b14
FB		 1213 info.si_signo = TARGET_SIGSEGV;
1214 info.si_errno = 0;
1215 info.si_code = TARGET_SEGV_ACCERR;
1216 break;
61190b14
FB		 1217 default:
1218 /* Let's send a regular segfault... */
e1833e1f
JM		 1219 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1220 env->error_code);
61190b14
FB		 1221 info.si_signo = TARGET_SIGSEGV;
1222 info.si_errno = 0;
1223 info.si_code = TARGET_SEGV_MAPERR;
1224 break;
1225 }
67867308 1226 info._sifields._sigfault._addr = env->nip;
624f7979 1227 queue_signal(env, info.si_signo, &info);
67867308 1228 break;
e1833e1f 1229 case POWERPC_EXCP_ISI: /* Instruction storage exception */
90e189ec
BS		 1230 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1231 "\n", env->spr[SPR_SRR0]);
e1833e1f 1232 /* XXX: check this */
2be0071f
FB		 1233 switch (env->error_code & 0xFF000000) {
1234 case 0x40000000:
61190b14 1235 info.si_signo = TARGET_SIGSEGV;
67867308 1236 info.si_errno = 0;
61190b14
FB		 1237 info.si_code = TARGET_SEGV_MAPERR;
1238 break;
2be0071f
FB		 1239 case 0x10000000:
1240 case 0x08000000:
61190b14
FB		 1241 info.si_signo = TARGET_SIGSEGV;
1242 info.si_errno = 0;
1243 info.si_code = TARGET_SEGV_ACCERR;
1244 break;
1245 default:
1246 /* Let's send a regular segfault... */
e1833e1f
JM		 1247 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1248 env->error_code);
61190b14
FB		 1249 info.si_signo = TARGET_SIGSEGV;
1250 info.si_errno = 0;
1251 info.si_code = TARGET_SEGV_MAPERR;
1252 break;
1253 }
1254 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1255 queue_signal(env, info.si_signo, &info);
67867308 1256 break;
e1833e1f
JM		 1257 case POWERPC_EXCP_EXTERNAL: /* External input */
1258 cpu_abort(env, "External interrupt while in user mode. "
1259 "Aborting\n");
1260 break;
1261 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1262 EXCP_DUMP(env, "Unaligned memory access\n");
1263 /* XXX: check this */
61190b14 1264 info.si_signo = TARGET_SIGBUS;
67867308 1265 info.si_errno = 0;
61190b14
FB		 1266 info.si_code = TARGET_BUS_ADRALN;
1267 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1268 queue_signal(env, info.si_signo, &info);
67867308 1269 break;
e1833e1f
JM		 1270 case POWERPC_EXCP_PROGRAM: /* Program exception */
1271 /* XXX: check this */
61190b14 1272 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1273 case POWERPC_EXCP_FP:
1274 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1275 info.si_signo = TARGET_SIGFPE;
1276 info.si_errno = 0;
1277 switch (env->error_code & 0xF) {
e1833e1f 1278 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1279 info.si_code = TARGET_FPE_FLTOVF;
1280 break;
e1833e1f 1281 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1282 info.si_code = TARGET_FPE_FLTUND;
1283 break;
e1833e1f
JM		 1284 case POWERPC_EXCP_FP_ZX:
1285 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1286 info.si_code = TARGET_FPE_FLTDIV;
1287 break;
e1833e1f 1288 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1289 info.si_code = TARGET_FPE_FLTRES;
1290 break;
e1833e1f 1291 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1292 info.si_code = TARGET_FPE_FLTINV;
1293 break;
7c58044c 1294 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1295 case POWERPC_EXCP_FP_VXISI:
1296 case POWERPC_EXCP_FP_VXIDI:
1297 case POWERPC_EXCP_FP_VXIMZ:
1298 case POWERPC_EXCP_FP_VXVC:
1299 case POWERPC_EXCP_FP_VXSQRT:
1300 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1301 info.si_code = TARGET_FPE_FLTSUB;
1302 break;
1303 default:
e1833e1f
JM		 1304 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1305 env->error_code);
1306 break;
61190b14 1307 }
e1833e1f
JM		 1308 break;
1309 case POWERPC_EXCP_INVAL:
1310 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1311 info.si_signo = TARGET_SIGILL;
1312 info.si_errno = 0;
1313 switch (env->error_code & 0xF) {
e1833e1f 1314 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1315 info.si_code = TARGET_ILL_ILLOPC;
1316 break;
e1833e1f 1317 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1318 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1319 break;
e1833e1f 1320 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1321 info.si_code = TARGET_ILL_PRVREG;
1322 break;
e1833e1f 1323 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1324 info.si_code = TARGET_ILL_COPROC;
1325 break;
1326 default:
e1833e1f
JM		 1327 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1328 env->error_code & 0xF);
61190b14
FB		 1329 info.si_code = TARGET_ILL_ILLADR;
1330 break;
1331 }
1332 break;
e1833e1f
JM		 1333 case POWERPC_EXCP_PRIV:
1334 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1335 info.si_signo = TARGET_SIGILL;
1336 info.si_errno = 0;
1337 switch (env->error_code & 0xF) {
e1833e1f 1338 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1339 info.si_code = TARGET_ILL_PRVOPC;
1340 break;
e1833e1f 1341 case POWERPC_EXCP_PRIV_REG:
61190b14 1342 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1343 break;
61190b14 1344 default:
e1833e1f
JM		 1345 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1346 env->error_code & 0xF);
61190b14
FB		 1347 info.si_code = TARGET_ILL_PRVOPC;
1348 break;
1349 }
1350 break;
e1833e1f
JM		 1351 case POWERPC_EXCP_TRAP:
1352 cpu_abort(env, "Tried to call a TRAP\n");
1353 break;
61190b14
FB		 1354 default:
1355 /* Should not happen ! */
e1833e1f
JM		 1356 cpu_abort(env, "Unknown program exception (%02x)\n",
1357 env->error_code);
1358 break;
61190b14
FB		 1359 }
1360 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1361 queue_signal(env, info.si_signo, &info);
67867308 1362 break;
e1833e1f
JM		 1363 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1364 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1365 info.si_signo = TARGET_SIGILL;
67867308 1366 info.si_errno = 0;
61190b14
FB		 1367 info.si_code = TARGET_ILL_COPROC;
1368 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1369 queue_signal(env, info.si_signo, &info);
67867308 1370 break;
e1833e1f
JM		 1371 case POWERPC_EXCP_SYSCALL: /* System call exception */
1372 cpu_abort(env, "Syscall exception while in user mode. "
1373 "Aborting\n");
61190b14 1374 break;
e1833e1f
JM		 1375 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1376 EXCP_DUMP(env, "No APU instruction allowed\n");
1377 info.si_signo = TARGET_SIGILL;
1378 info.si_errno = 0;
1379 info.si_code = TARGET_ILL_COPROC;
1380 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1381 queue_signal(env, info.si_signo, &info);
61190b14 1382 break;
e1833e1f
JM		 1383 case POWERPC_EXCP_DECR: /* Decrementer exception */
1384 cpu_abort(env, "Decrementer interrupt while in user mode. "
1385 "Aborting\n");
61190b14 1386 break;
e1833e1f
JM		 1387 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1388 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1389 "Aborting\n");
1390 break;
1391 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1392 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1393 "Aborting\n");
1394 break;
1395 case POWERPC_EXCP_DTLB: /* Data TLB error */
1396 cpu_abort(env, "Data TLB exception while in user mode. "
1397 "Aborting\n");
1398 break;
1399 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1400 cpu_abort(env, "Instruction TLB exception while in user mode. "
1401 "Aborting\n");
1402 break;
e1833e1f
JM		 1403 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1404 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1405 info.si_signo = TARGET_SIGILL;
1406 info.si_errno = 0;
1407 info.si_code = TARGET_ILL_COPROC;
1408 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1409 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1410 break;
1411 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1412 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1413 break;
1414 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1415 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1416 break;
1417 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1418 cpu_abort(env, "Performance monitor exception not handled\n");
1419 break;
1420 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1421 cpu_abort(env, "Doorbell interrupt while in user mode. "
1422 "Aborting\n");
1423 break;
1424 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1425 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1426 "Aborting\n");
1427 break;
1428 case POWERPC_EXCP_RESET: /* System reset exception */
1429 cpu_abort(env, "Reset interrupt while in user mode. "
1430 "Aborting\n");
1431 break;
e1833e1f
JM		 1432 case POWERPC_EXCP_DSEG: /* Data segment exception */
1433 cpu_abort(env, "Data segment exception while in user mode. "
1434 "Aborting\n");
1435 break;
1436 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1437 cpu_abort(env, "Instruction segment exception "
1438 "while in user mode. Aborting\n");
1439 break;
e85e7c6e 1440 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1441 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1442 cpu_abort(env, "Hypervisor decrementer interrupt "
1443 "while in user mode. Aborting\n");
1444 break;
e1833e1f
JM		 1445 case POWERPC_EXCP_TRACE: /* Trace exception */
1446 /* Nothing to do:
1447 * we use this exception to emulate step-by-step execution mode.
1448 */
1449 break;
e85e7c6e 1450 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1451 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1452 cpu_abort(env, "Hypervisor data storage exception "
1453 "while in user mode. Aborting\n");
1454 break;
1455 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1456 cpu_abort(env, "Hypervisor instruction storage exception "
1457 "while in user mode. Aborting\n");
1458 break;
1459 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1460 cpu_abort(env, "Hypervisor data segment exception "
1461 "while in user mode. Aborting\n");
1462 break;
1463 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1464 cpu_abort(env, "Hypervisor instruction segment exception "
1465 "while in user mode. Aborting\n");
1466 break;
e1833e1f
JM		 1467 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1468 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1469 info.si_signo = TARGET_SIGILL;
1470 info.si_errno = 0;
1471 info.si_code = TARGET_ILL_COPROC;
1472 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1473 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1474 break;
1475 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1476 cpu_abort(env, "Programable interval timer interrupt "
1477 "while in user mode. Aborting\n");
1478 break;
1479 case POWERPC_EXCP_IO: /* IO error exception */
1480 cpu_abort(env, "IO error exception while in user mode. "
1481 "Aborting\n");
1482 break;
1483 case POWERPC_EXCP_RUNM: /* Run mode exception */
1484 cpu_abort(env, "Run mode exception while in user mode. "
1485 "Aborting\n");
1486 break;
1487 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1488 cpu_abort(env, "Emulation trap exception not handled\n");
1489 break;
1490 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1491 cpu_abort(env, "Instruction fetch TLB exception "
1492 "while in user-mode. Aborting");
1493 break;
1494 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1495 cpu_abort(env, "Data load TLB exception while in user-mode. "
1496 "Aborting");
1497 break;
1498 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1499 cpu_abort(env, "Data store TLB exception while in user-mode. "
1500 "Aborting");
1501 break;
1502 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1503 cpu_abort(env, "Floating-point assist exception not handled\n");
1504 break;
1505 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1506 cpu_abort(env, "Instruction address breakpoint exception "
1507 "not handled\n");
1508 break;
1509 case POWERPC_EXCP_SMI: /* System management interrupt */
1510 cpu_abort(env, "System management interrupt while in user mode. "
1511 "Aborting\n");
1512 break;
1513 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1514 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1515 "Aborting\n");
1516 break;
1517 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1518 cpu_abort(env, "Performance monitor exception not handled\n");
1519 break;
1520 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1521 cpu_abort(env, "Vector assist exception not handled\n");
1522 break;
1523 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1524 cpu_abort(env, "Soft patch exception not handled\n");
1525 break;
1526 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1527 cpu_abort(env, "Maintenance exception while in user mode. "
1528 "Aborting\n");
1529 break;
1530 case POWERPC_EXCP_STOP: /* stop translation */
1531 /* We did invalidate the instruction cache. Go on */
1532 break;
1533 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1534 /* We just stopped because of a branch. Go on */
1535 break;
1536 case POWERPC_EXCP_SYSCALL_USER:
1537 /* system call in user-mode emulation */
1538 /* WARNING:
1539 * PPC ABI uses overflow flag in cr0 to signal an error
1540 * in syscalls.
1541 */
1542#if 0
1543 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1544 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1545#endif
1546 env->crf[0] &= ~0x1;
1547 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1548 env->gpr[5], env->gpr[6], env->gpr[7],
1549 env->gpr[8]);
bcd4933a
NF		 1550 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1551 /* Returning from a successful sigreturn syscall.
1552 Avoid corrupting register state. */
1553 break;
1554 }
e1833e1f
JM		 1555 if (ret > (uint32_t)(-515)) {
1556 env->crf[0] |= 0x1;
1557 ret = -ret;
61190b14 1558 }
e1833e1f
JM		 1559 env->gpr[3] = ret;
1560#if 0
1561 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1562#endif
1563 break;
56f066bb
NF		 1564 case POWERPC_EXCP_STCX:
1565 if (do_store_exclusive(env)) {
1566 info.si_signo = TARGET_SIGSEGV;
1567 info.si_errno = 0;
1568 info.si_code = TARGET_SEGV_MAPERR;
1569 info._sifields._sigfault._addr = env->nip;
1570 queue_signal(env, info.si_signo, &info);
1571 }
1572 break;
71f75756
AJ		 1573 case EXCP_DEBUG:
1574 {
1575 int sig;
1576
1577 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1578 if (sig) {
1579 info.si_signo = sig;
1580 info.si_errno = 0;
1581 info.si_code = TARGET_TRAP_BRKPT;
1582 queue_signal(env, info.si_signo, &info);
1583 }
1584 }
1585 break;
56ba31ff
JM		 1586 case EXCP_INTERRUPT:
1587 /* just indicate that signals should be handled asap */
1588 break;
e1833e1f
JM		 1589 default:
1590 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1591 break;
67867308
FB		 1592 }
1593 process_pending_signals(env);
1594 }
1595}
1596#endif
1597
048f6b4d
FB		 1598#ifdef TARGET_MIPS
1599
1600#define MIPS_SYS(name, args) args,
1601
1602static const uint8_t mips_syscall_args[] = {
1603 MIPS_SYS(sys_syscall , 0) /* 4000 */
1604 MIPS_SYS(sys_exit , 1)
1605 MIPS_SYS(sys_fork , 0)
1606 MIPS_SYS(sys_read , 3)
1607 MIPS_SYS(sys_write , 3)
1608 MIPS_SYS(sys_open , 3) /* 4005 */
1609 MIPS_SYS(sys_close , 1)
1610 MIPS_SYS(sys_waitpid , 3)
1611 MIPS_SYS(sys_creat , 2)
1612 MIPS_SYS(sys_link , 2)
1613 MIPS_SYS(sys_unlink , 1) /* 4010 */
1614 MIPS_SYS(sys_execve , 0)
1615 MIPS_SYS(sys_chdir , 1)
1616 MIPS_SYS(sys_time , 1)
1617 MIPS_SYS(sys_mknod , 3)
1618 MIPS_SYS(sys_chmod , 2) /* 4015 */
1619 MIPS_SYS(sys_lchown , 3)
1620 MIPS_SYS(sys_ni_syscall , 0)
1621 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1622 MIPS_SYS(sys_lseek , 3)
1623 MIPS_SYS(sys_getpid , 0) /* 4020 */
1624 MIPS_SYS(sys_mount , 5)
1625 MIPS_SYS(sys_oldumount , 1)
1626 MIPS_SYS(sys_setuid , 1)
1627 MIPS_SYS(sys_getuid , 0)
1628 MIPS_SYS(sys_stime , 1) /* 4025 */
1629 MIPS_SYS(sys_ptrace , 4)
1630 MIPS_SYS(sys_alarm , 1)
1631 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1632 MIPS_SYS(sys_pause , 0)
1633 MIPS_SYS(sys_utime , 2) /* 4030 */
1634 MIPS_SYS(sys_ni_syscall , 0)
1635 MIPS_SYS(sys_ni_syscall , 0)
1636 MIPS_SYS(sys_access , 2)
1637 MIPS_SYS(sys_nice , 1)
1638 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1639 MIPS_SYS(sys_sync , 0)
1640 MIPS_SYS(sys_kill , 2)
1641 MIPS_SYS(sys_rename , 2)
1642 MIPS_SYS(sys_mkdir , 2)
1643 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1644 MIPS_SYS(sys_dup , 1)
1645 MIPS_SYS(sys_pipe , 0)
1646 MIPS_SYS(sys_times , 1)
1647 MIPS_SYS(sys_ni_syscall , 0)
1648 MIPS_SYS(sys_brk , 1) /* 4045 */
1649 MIPS_SYS(sys_setgid , 1)
1650 MIPS_SYS(sys_getgid , 0)
1651 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1652 MIPS_SYS(sys_geteuid , 0)
1653 MIPS_SYS(sys_getegid , 0) /* 4050 */
1654 MIPS_SYS(sys_acct , 0)
1655 MIPS_SYS(sys_umount , 2)
1656 MIPS_SYS(sys_ni_syscall , 0)
1657 MIPS_SYS(sys_ioctl , 3)
1658 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1659 MIPS_SYS(sys_ni_syscall , 2)
1660 MIPS_SYS(sys_setpgid , 2)
1661 MIPS_SYS(sys_ni_syscall , 0)
1662 MIPS_SYS(sys_olduname , 1)
1663 MIPS_SYS(sys_umask , 1) /* 4060 */
1664 MIPS_SYS(sys_chroot , 1)
1665 MIPS_SYS(sys_ustat , 2)
1666 MIPS_SYS(sys_dup2 , 2)
1667 MIPS_SYS(sys_getppid , 0)
1668 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1669 MIPS_SYS(sys_setsid , 0)
1670 MIPS_SYS(sys_sigaction , 3)
1671 MIPS_SYS(sys_sgetmask , 0)
1672 MIPS_SYS(sys_ssetmask , 1)
1673 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1674 MIPS_SYS(sys_setregid , 2)
1675 MIPS_SYS(sys_sigsuspend , 0)
1676 MIPS_SYS(sys_sigpending , 1)
1677 MIPS_SYS(sys_sethostname , 2)
1678 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1679 MIPS_SYS(sys_getrlimit , 2)
1680 MIPS_SYS(sys_getrusage , 2)
1681 MIPS_SYS(sys_gettimeofday, 2)
1682 MIPS_SYS(sys_settimeofday, 2)
1683 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1684 MIPS_SYS(sys_setgroups , 2)
1685 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1686 MIPS_SYS(sys_symlink , 2)
1687 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1688 MIPS_SYS(sys_readlink , 3) /* 4085 */
1689 MIPS_SYS(sys_uselib , 1)
1690 MIPS_SYS(sys_swapon , 2)
1691 MIPS_SYS(sys_reboot , 3)
1692 MIPS_SYS(old_readdir , 3)
1693 MIPS_SYS(old_mmap , 6) /* 4090 */
1694 MIPS_SYS(sys_munmap , 2)
1695 MIPS_SYS(sys_truncate , 2)
1696 MIPS_SYS(sys_ftruncate , 2)
1697 MIPS_SYS(sys_fchmod , 2)
1698 MIPS_SYS(sys_fchown , 3) /* 4095 */
1699 MIPS_SYS(sys_getpriority , 2)
1700 MIPS_SYS(sys_setpriority , 3)
1701 MIPS_SYS(sys_ni_syscall , 0)
1702 MIPS_SYS(sys_statfs , 2)
1703 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1704 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1705 MIPS_SYS(sys_socketcall , 2)
1706 MIPS_SYS(sys_syslog , 3)
1707 MIPS_SYS(sys_setitimer , 3)
1708 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1709 MIPS_SYS(sys_newstat , 2)
1710 MIPS_SYS(sys_newlstat , 2)
1711 MIPS_SYS(sys_newfstat , 2)
1712 MIPS_SYS(sys_uname , 1)
1713 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1714 MIPS_SYS(sys_vhangup , 0)
1715 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1716 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1717 MIPS_SYS(sys_wait4 , 4)
1718 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1719 MIPS_SYS(sys_sysinfo , 1)
1720 MIPS_SYS(sys_ipc , 6)
1721 MIPS_SYS(sys_fsync , 1)
1722 MIPS_SYS(sys_sigreturn , 0)
18113962 1723 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1724 MIPS_SYS(sys_setdomainname, 2)
1725 MIPS_SYS(sys_newuname , 1)
1726 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1727 MIPS_SYS(sys_adjtimex , 1)
1728 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1729 MIPS_SYS(sys_sigprocmask , 3)
1730 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1731 MIPS_SYS(sys_init_module , 5)
1732 MIPS_SYS(sys_delete_module, 1)
1733 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1734 MIPS_SYS(sys_quotactl , 0)
1735 MIPS_SYS(sys_getpgid , 1)
1736 MIPS_SYS(sys_fchdir , 1)
1737 MIPS_SYS(sys_bdflush , 2)
1738 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1739 MIPS_SYS(sys_personality , 1)
1740 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1741 MIPS_SYS(sys_setfsuid , 1)
1742 MIPS_SYS(sys_setfsgid , 1)
1743 MIPS_SYS(sys_llseek , 5) /* 4140 */
1744 MIPS_SYS(sys_getdents , 3)
1745 MIPS_SYS(sys_select , 5)
1746 MIPS_SYS(sys_flock , 2)
1747 MIPS_SYS(sys_msync , 3)
1748 MIPS_SYS(sys_readv , 3) /* 4145 */
1749 MIPS_SYS(sys_writev , 3)
1750 MIPS_SYS(sys_cacheflush , 3)
1751 MIPS_SYS(sys_cachectl , 3)
1752 MIPS_SYS(sys_sysmips , 4)
1753 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1754 MIPS_SYS(sys_getsid , 1)
1755 MIPS_SYS(sys_fdatasync , 0)
1756 MIPS_SYS(sys_sysctl , 1)
1757 MIPS_SYS(sys_mlock , 2)
1758 MIPS_SYS(sys_munlock , 2) /* 4155 */
1759 MIPS_SYS(sys_mlockall , 1)
1760 MIPS_SYS(sys_munlockall , 0)
1761 MIPS_SYS(sys_sched_setparam, 2)
1762 MIPS_SYS(sys_sched_getparam, 2)
1763 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1764 MIPS_SYS(sys_sched_getscheduler, 1)
1765 MIPS_SYS(sys_sched_yield , 0)
1766 MIPS_SYS(sys_sched_get_priority_max, 1)
1767 MIPS_SYS(sys_sched_get_priority_min, 1)
1768 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1769 MIPS_SYS(sys_nanosleep, 2)
1770 MIPS_SYS(sys_mremap , 4)
1771 MIPS_SYS(sys_accept , 3)
1772 MIPS_SYS(sys_bind , 3)
1773 MIPS_SYS(sys_connect , 3) /* 4170 */
1774 MIPS_SYS(sys_getpeername , 3)
1775 MIPS_SYS(sys_getsockname , 3)
1776 MIPS_SYS(sys_getsockopt , 5)
1777 MIPS_SYS(sys_listen , 2)
1778 MIPS_SYS(sys_recv , 4) /* 4175 */
1779 MIPS_SYS(sys_recvfrom , 6)
1780 MIPS_SYS(sys_recvmsg , 3)
1781 MIPS_SYS(sys_send , 4)
1782 MIPS_SYS(sys_sendmsg , 3)
1783 MIPS_SYS(sys_sendto , 6) /* 4180 */
1784 MIPS_SYS(sys_setsockopt , 5)
1785 MIPS_SYS(sys_shutdown , 2)
1786 MIPS_SYS(sys_socket , 3)
1787 MIPS_SYS(sys_socketpair , 4)
1788 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1789 MIPS_SYS(sys_getresuid , 3)
1790 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1791 MIPS_SYS(sys_poll , 3)
1792 MIPS_SYS(sys_nfsservctl , 3)
1793 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1794 MIPS_SYS(sys_getresgid , 3)
1795 MIPS_SYS(sys_prctl , 5)
1796 MIPS_SYS(sys_rt_sigreturn, 0)
1797 MIPS_SYS(sys_rt_sigaction, 4)
1798 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1799 MIPS_SYS(sys_rt_sigpending, 2)
1800 MIPS_SYS(sys_rt_sigtimedwait, 4)
1801 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1802 MIPS_SYS(sys_rt_sigsuspend, 0)
1803 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1804 MIPS_SYS(sys_pwrite64 , 6)
1805 MIPS_SYS(sys_chown , 3)
1806 MIPS_SYS(sys_getcwd , 2)
1807 MIPS_SYS(sys_capget , 2)
1808 MIPS_SYS(sys_capset , 2) /* 4205 */
1809 MIPS_SYS(sys_sigaltstack , 0)
1810 MIPS_SYS(sys_sendfile , 4)
1811 MIPS_SYS(sys_ni_syscall , 0)
1812 MIPS_SYS(sys_ni_syscall , 0)
1813 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1814 MIPS_SYS(sys_truncate64 , 4)
1815 MIPS_SYS(sys_ftruncate64 , 4)
1816 MIPS_SYS(sys_stat64 , 2)
1817 MIPS_SYS(sys_lstat64 , 2)
1818 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1819 MIPS_SYS(sys_pivot_root , 2)
1820 MIPS_SYS(sys_mincore , 3)
1821 MIPS_SYS(sys_madvise , 3)
1822 MIPS_SYS(sys_getdents64 , 3)
1823 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1824 MIPS_SYS(sys_ni_syscall , 0)
1825 MIPS_SYS(sys_gettid , 0)
1826 MIPS_SYS(sys_readahead , 5)
1827 MIPS_SYS(sys_setxattr , 5)
1828 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1829 MIPS_SYS(sys_fsetxattr , 5)
1830 MIPS_SYS(sys_getxattr , 4)
1831 MIPS_SYS(sys_lgetxattr , 4)
1832 MIPS_SYS(sys_fgetxattr , 4)
1833 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1834 MIPS_SYS(sys_llistxattr , 3)
1835 MIPS_SYS(sys_flistxattr , 3)
1836 MIPS_SYS(sys_removexattr , 2)
1837 MIPS_SYS(sys_lremovexattr, 2)
1838 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1839 MIPS_SYS(sys_tkill , 2)
1840 MIPS_SYS(sys_sendfile64 , 5)
1841 MIPS_SYS(sys_futex , 2)
1842 MIPS_SYS(sys_sched_setaffinity, 3)
1843 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1844 MIPS_SYS(sys_io_setup , 2)
1845 MIPS_SYS(sys_io_destroy , 1)
1846 MIPS_SYS(sys_io_getevents, 5)
1847 MIPS_SYS(sys_io_submit , 3)
1848 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1849 MIPS_SYS(sys_exit_group , 1)
1850 MIPS_SYS(sys_lookup_dcookie, 3)
1851 MIPS_SYS(sys_epoll_create, 1)
1852 MIPS_SYS(sys_epoll_ctl , 4)
1853 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1854 MIPS_SYS(sys_remap_file_pages, 5)
1855 MIPS_SYS(sys_set_tid_address, 1)
1856 MIPS_SYS(sys_restart_syscall, 0)
1857 MIPS_SYS(sys_fadvise64_64, 7)
1858 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1859 MIPS_SYS(sys_fstatfs64 , 2)
1860 MIPS_SYS(sys_timer_create, 3)
1861 MIPS_SYS(sys_timer_settime, 4)
1862 MIPS_SYS(sys_timer_gettime, 2)
1863 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1864 MIPS_SYS(sys_timer_delete, 1)
1865 MIPS_SYS(sys_clock_settime, 2)
1866 MIPS_SYS(sys_clock_gettime, 2)
1867 MIPS_SYS(sys_clock_getres, 2)
1868 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1869 MIPS_SYS(sys_tgkill , 3)
1870 MIPS_SYS(sys_utimes , 2)
1871 MIPS_SYS(sys_mbind , 4)
1872 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1873 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1874 MIPS_SYS(sys_mq_open , 4)
1875 MIPS_SYS(sys_mq_unlink , 1)
1876 MIPS_SYS(sys_mq_timedsend, 5)
1877 MIPS_SYS(sys_mq_timedreceive, 5)
1878 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1879 MIPS_SYS(sys_mq_getsetattr, 3)
1880 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1881 MIPS_SYS(sys_waitid , 4)
1882 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1883 MIPS_SYS(sys_add_key , 5)
388bb21a 1884 MIPS_SYS(sys_request_key, 4)
048f6b4d 1885 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 1886 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 1887 MIPS_SYS(sys_inotify_init, 0)
1888 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1889 MIPS_SYS(sys_inotify_rm_watch, 2)
1890 MIPS_SYS(sys_migrate_pages, 4)
1891 MIPS_SYS(sys_openat, 4)
1892 MIPS_SYS(sys_mkdirat, 3)
1893 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1894 MIPS_SYS(sys_fchownat, 5)
1895 MIPS_SYS(sys_futimesat, 3)
1896 MIPS_SYS(sys_fstatat64, 4)
1897 MIPS_SYS(sys_unlinkat, 3)
1898 MIPS_SYS(sys_renameat, 4) /* 4295 */
1899 MIPS_SYS(sys_linkat, 5)
1900 MIPS_SYS(sys_symlinkat, 3)
1901 MIPS_SYS(sys_readlinkat, 4)
1902 MIPS_SYS(sys_fchmodat, 3)
1903 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1904 MIPS_SYS(sys_pselect6, 6)
1905 MIPS_SYS(sys_ppoll, 5)
1906 MIPS_SYS(sys_unshare, 1)
1907 MIPS_SYS(sys_splice, 4)
1908 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1909 MIPS_SYS(sys_tee, 4)
1910 MIPS_SYS(sys_vmsplice, 4)
1911 MIPS_SYS(sys_move_pages, 6)
1912 MIPS_SYS(sys_set_robust_list, 2)
1913 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1914 MIPS_SYS(sys_kexec_load, 4)
1915 MIPS_SYS(sys_getcpu, 3)
1916 MIPS_SYS(sys_epoll_pwait, 6)
1917 MIPS_SYS(sys_ioprio_set, 3)
1918 MIPS_SYS(sys_ioprio_get, 2)
048f6b4d
FB		 1919};
1920
1921#undef MIPS_SYS
1922
590bc601
PB		 1923static int do_store_exclusive(CPUMIPSState *env)
1924{
1925 target_ulong addr;
1926 target_ulong page_addr;
1927 target_ulong val;
1928 int flags;
1929 int segv = 0;
1930 int reg;
1931 int d;
1932
5499b6ff 1933 addr = env->lladdr;
590bc601
PB		 1934 page_addr = addr & TARGET_PAGE_MASK;
1935 start_exclusive();
1936 mmap_lock();
1937 flags = page_get_flags(page_addr);
1938 if ((flags & PAGE_READ) == 0) {
1939 segv = 1;
1940 } else {
1941 reg = env->llreg & 0x1f;
1942 d = (env->llreg & 0x20) != 0;
1943 if (d) {
1944 segv = get_user_s64(val, addr);
1945 } else {
1946 segv = get_user_s32(val, addr);
1947 }
1948 if (!segv) {
1949 if (val != env->llval) {
1950 env->active_tc.gpr[reg] = 0;
1951 } else {
1952 if (d) {
1953 segv = put_user_u64(env->llnewval, addr);
1954 } else {
1955 segv = put_user_u32(env->llnewval, addr);
1956 }
1957 if (!segv) {
1958 env->active_tc.gpr[reg] = 1;
1959 }
1960 }
1961 }
1962 }
5499b6ff 1963 env->lladdr = -1;
590bc601
PB		 1964 if (!segv) {
1965 env->active_tc.PC += 4;
1966 }
1967 mmap_unlock();
1968 end_exclusive();
1969 return segv;
1970}
1971
048f6b4d
FB		 1972void cpu_loop(CPUMIPSState *env)
1973{
c227f099 1974 target_siginfo_t info;
388bb21a 1975 int trapnr, ret;
048f6b4d 1976 unsigned int syscall_num;
048f6b4d
FB		 1977
1978 for(;;) {
590bc601 1979 cpu_exec_start(env);
048f6b4d 1980 trapnr = cpu_mips_exec(env);
590bc601 1981 cpu_exec_end(env);
048f6b4d
FB		 1982 switch(trapnr) {
1983 case EXCP_SYSCALL:
b5dc7732
TS		 1984 syscall_num = env->active_tc.gpr[2] - 4000;
1985 env->active_tc.PC += 4;
388bb21a
TS		 1986 if (syscall_num >= sizeof(mips_syscall_args)) {
1987 ret = -ENOSYS;
1988 } else {
1989 int nb_args;
992f48a0
BS		 1990 abi_ulong sp_reg;
1991 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 1992
1993 nb_args = mips_syscall_args[syscall_num];
b5dc7732 1994 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 1995 switch (nb_args) {
1996 /* these arguments are taken from the stack */
2f619698
FB		 1997 /* FIXME - what to do if get_user() fails? */
1998 case 8: get_user_ual(arg8, sp_reg + 28);
1999 case 7: get_user_ual(arg7, sp_reg + 24);
2000 case 6: get_user_ual(arg6, sp_reg + 20);
2001 case 5: get_user_ual(arg5, sp_reg + 16);
388bb21a
TS		 2002 default:
2003 break;
048f6b4d 2004 }
b5dc7732
TS		 2005 ret = do_syscall(env, env->active_tc.gpr[2],
2006 env->active_tc.gpr[4],
2007 env->active_tc.gpr[5],
2008 env->active_tc.gpr[6],
2009 env->active_tc.gpr[7],
388bb21a
TS		 2010 arg5, arg6/*, arg7, arg8*/);
2011 }
0b1bcb00
PB		 2012 if (ret == -TARGET_QEMU_ESIGRETURN) {
2013 /* Returning from a successful sigreturn syscall.
2014 Avoid clobbering register state. */
2015 break;
2016 }
388bb21a 2017 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 2018 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 2019 ret = -ret;
2020 } else {
b5dc7732 2021 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 2022 }
b5dc7732 2023 env->active_tc.gpr[2] = ret;
048f6b4d 2024 break;
ca7c2b1b
TS		 2025 case EXCP_TLBL:
2026 case EXCP_TLBS:
e4474235
PB		 2027 info.si_signo = TARGET_SIGSEGV;
2028 info.si_errno = 0;
2029 /* XXX: check env->error_code */
2030 info.si_code = TARGET_SEGV_MAPERR;
2031 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2032 queue_signal(env, info.si_signo, &info);
2033 break;
6900e84b 2034 case EXCP_CpU:
048f6b4d 2035 case EXCP_RI:
bc1ad2de
FB		 2036 info.si_signo = TARGET_SIGILL;
2037 info.si_errno = 0;
2038 info.si_code = 0;
624f7979 2039 queue_signal(env, info.si_signo, &info);
048f6b4d 2040 break;
106ec879
FB		 2041 case EXCP_INTERRUPT:
2042 /* just indicate that signals should be handled asap */
2043 break;
d08b2a28
PB		 2044 case EXCP_DEBUG:
2045 {
2046 int sig;
2047
2048 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2049 if (sig)
2050 {
2051 info.si_signo = sig;
2052 info.si_errno = 0;
2053 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2054 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 2055 }
2056 }
2057 break;
590bc601
PB		 2058 case EXCP_SC:
2059 if (do_store_exclusive(env)) {
2060 info.si_signo = TARGET_SIGSEGV;
2061 info.si_errno = 0;
2062 info.si_code = TARGET_SEGV_MAPERR;
2063 info._sifields._sigfault._addr = env->active_tc.PC;
2064 queue_signal(env, info.si_signo, &info);
2065 }
2066 break;
048f6b4d
FB		 2067 default:
2068 // error:
5fafdf24 2069 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 2070 trapnr);
2071 cpu_dump_state(env, stderr, fprintf, 0);
2072 abort();
2073 }
2074 process_pending_signals(env);
2075 }
2076}
2077#endif
2078
fdf9b3e8
FB		 2079#ifdef TARGET_SH4
2080void cpu_loop (CPUState *env)
2081{
2082 int trapnr, ret;
c227f099 2083 target_siginfo_t info;
3b46e624 2084
fdf9b3e8
FB		 2085 while (1) {
2086 trapnr = cpu_sh4_exec (env);
3b46e624 2087
fdf9b3e8
FB		 2088 switch (trapnr) {
2089 case 0x160:
0b6d3ae0 2090 env->pc += 2;
5fafdf24
TS		 2091 ret = do_syscall(env,
2092 env->gregs[3],
2093 env->gregs[4],
2094 env->gregs[5],
2095 env->gregs[6],
2096 env->gregs[7],
2097 env->gregs[0],
fca743f3 2098 env->gregs[1]);
9c2a9ea1 2099 env->gregs[0] = ret;
fdf9b3e8 2100 break;
c3b5bc8a
TS		 2101 case EXCP_INTERRUPT:
2102 /* just indicate that signals should be handled asap */
2103 break;
355fb23d
PB		 2104 case EXCP_DEBUG:
2105 {
2106 int sig;
2107
2108 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2109 if (sig)
2110 {
2111 info.si_signo = sig;
2112 info.si_errno = 0;
2113 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2114 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 2115 }
2116 }
2117 break;
c3b5bc8a
TS		 2118 case 0xa0:
2119 case 0xc0:
2120 info.si_signo = SIGSEGV;
2121 info.si_errno = 0;
2122 info.si_code = TARGET_SEGV_MAPERR;
2123 info._sifields._sigfault._addr = env->tea;
624f7979 2124 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 2125 break;
2126
fdf9b3e8
FB		 2127 default:
2128 printf ("Unhandled trap: 0x%x\n", trapnr);
2129 cpu_dump_state(env, stderr, fprintf, 0);
2130 exit (1);
2131 }
2132 process_pending_signals (env);
2133 }
2134}
2135#endif
2136
48733d19
TS		 2137#ifdef TARGET_CRIS
2138void cpu_loop (CPUState *env)
2139{
2140 int trapnr, ret;
c227f099 2141 target_siginfo_t info;
48733d19
TS		 2142
2143 while (1) {
2144 trapnr = cpu_cris_exec (env);
2145 switch (trapnr) {
2146 case 0xaa:
2147 {
2148 info.si_signo = SIGSEGV;
2149 info.si_errno = 0;
2150 /* XXX: check env->error_code */
2151 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2152 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 2153 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2154 }
2155 break;
b6d3abda
EI		 2156 case EXCP_INTERRUPT:
2157 /* just indicate that signals should be handled asap */
2158 break;
48733d19
TS		 2159 case EXCP_BREAK:
2160 ret = do_syscall(env,
2161 env->regs[9],
2162 env->regs[10],
2163 env->regs[11],
2164 env->regs[12],
2165 env->regs[13],
2166 env->pregs[7],
2167 env->pregs[11]);
2168 env->regs[10] = ret;
48733d19
TS		 2169 break;
2170 case EXCP_DEBUG:
2171 {
2172 int sig;
2173
2174 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2175 if (sig)
2176 {
2177 info.si_signo = sig;
2178 info.si_errno = 0;
2179 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2180 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2181 }
2182 }
2183 break;
2184 default:
2185 printf ("Unhandled trap: 0x%x\n", trapnr);
2186 cpu_dump_state(env, stderr, fprintf, 0);
2187 exit (1);
2188 }
2189 process_pending_signals (env);
2190 }
2191}
2192#endif
2193
b779e29e
EI		 2194#ifdef TARGET_MICROBLAZE
2195void cpu_loop (CPUState *env)
2196{
2197 int trapnr, ret;
c227f099 2198 target_siginfo_t info;
b779e29e
EI		 2199
2200 while (1) {
2201 trapnr = cpu_mb_exec (env);
2202 switch (trapnr) {
2203 case 0xaa:
2204 {
2205 info.si_signo = SIGSEGV;
2206 info.si_errno = 0;
2207 /* XXX: check env->error_code */
2208 info.si_code = TARGET_SEGV_MAPERR;
2209 info._sifields._sigfault._addr = 0;
2210 queue_signal(env, info.si_signo, &info);
2211 }
2212 break;
2213 case EXCP_INTERRUPT:
2214 /* just indicate that signals should be handled asap */
2215 break;
2216 case EXCP_BREAK:
2217 /* Return address is 4 bytes after the call. */
2218 env->regs[14] += 4;
2219 ret = do_syscall(env,
2220 env->regs[12],
2221 env->regs[5],
2222 env->regs[6],
2223 env->regs[7],
2224 env->regs[8],
2225 env->regs[9],
2226 env->regs[10]);
2227 env->regs[3] = ret;
2228 env->sregs[SR_PC] = env->regs[14];
2229 break;
2230 case EXCP_DEBUG:
2231 {
2232 int sig;
2233
2234 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2235 if (sig)
2236 {
2237 info.si_signo = sig;
2238 info.si_errno = 0;
2239 info.si_code = TARGET_TRAP_BRKPT;
2240 queue_signal(env, info.si_signo, &info);
2241 }
2242 }
2243 break;
2244 default:
2245 printf ("Unhandled trap: 0x%x\n", trapnr);
2246 cpu_dump_state(env, stderr, fprintf, 0);
2247 exit (1);
2248 }
2249 process_pending_signals (env);
2250 }
2251}
2252#endif
2253
e6e5906b
PB		 2254#ifdef TARGET_M68K
2255
2256void cpu_loop(CPUM68KState *env)
2257{
2258 int trapnr;
2259 unsigned int n;
c227f099 2260 target_siginfo_t info;
e6e5906b 2261 TaskState *ts = env->opaque;
3b46e624 2262
e6e5906b
PB		 2263 for(;;) {
2264 trapnr = cpu_m68k_exec(env);
2265 switch(trapnr) {
2266 case EXCP_ILLEGAL:
2267 {
2268 if (ts->sim_syscalls) {
2269 uint16_t nr;
2270 nr = lduw(env->pc + 2);
2271 env->pc += 4;
2272 do_m68k_simcall(env, nr);
2273 } else {
2274 goto do_sigill;
2275 }
2276 }
2277 break;
a87295e8 2278 case EXCP_HALT_INSN:
e6e5906b 2279 /* Semihosing syscall. */
a87295e8 2280 env->pc += 4;
e6e5906b
PB		 2281 do_m68k_semihosting(env, env->dregs[0]);
2282 break;
2283 case EXCP_LINEA:
2284 case EXCP_LINEF:
2285 case EXCP_UNSUPPORTED:
2286 do_sigill:
2287 info.si_signo = SIGILL;
2288 info.si_errno = 0;
2289 info.si_code = TARGET_ILL_ILLOPN;
2290 info._sifields._sigfault._addr = env->pc;
624f7979 2291 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2292 break;
2293 case EXCP_TRAP0:
2294 {
2295 ts->sim_syscalls = 0;
2296 n = env->dregs[0];
2297 env->pc += 2;
5fafdf24
TS		 2298 env->dregs[0] = do_syscall(env,
2299 n,
e6e5906b
PB		 2300 env->dregs[1],
2301 env->dregs[2],
2302 env->dregs[3],
2303 env->dregs[4],
2304 env->dregs[5],
bb7ec043 2305 env->aregs[0]);
e6e5906b
PB		 2306 }
2307 break;
2308 case EXCP_INTERRUPT:
2309 /* just indicate that signals should be handled asap */
2310 break;
2311 case EXCP_ACCESS:
2312 {
2313 info.si_signo = SIGSEGV;
2314 info.si_errno = 0;
2315 /* XXX: check env->error_code */
2316 info.si_code = TARGET_SEGV_MAPERR;
2317 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2318 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2319 }
2320 break;
2321 case EXCP_DEBUG:
2322 {
2323 int sig;
2324
2325 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2326 if (sig)
2327 {
2328 info.si_signo = sig;
2329 info.si_errno = 0;
2330 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2331 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2332 }
2333 }
2334 break;
2335 default:
5fafdf24 2336 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2337 trapnr);
2338 cpu_dump_state(env, stderr, fprintf, 0);
2339 abort();
2340 }
2341 process_pending_signals(env);
2342 }
2343}
2344#endif /* TARGET_M68K */
2345
7a3148a9
JM		 2346#ifdef TARGET_ALPHA
2347void cpu_loop (CPUState *env)
2348{
e96efcfc 2349 int trapnr;
c227f099 2350 target_siginfo_t info;
3b46e624 2351
7a3148a9
JM		 2352 while (1) {
2353 trapnr = cpu_alpha_exec (env);
3b46e624 2354
7a3148a9
JM		 2355 switch (trapnr) {
2356 case EXCP_RESET:
2357 fprintf(stderr, "Reset requested. Exit\n");
2358 exit(1);
2359 break;
2360 case EXCP_MCHK:
2361 fprintf(stderr, "Machine check exception. Exit\n");
2362 exit(1);
2363 break;
2364 case EXCP_ARITH:
2365 fprintf(stderr, "Arithmetic trap.\n");
2366 exit(1);
2367 break;
2368 case EXCP_HW_INTERRUPT:
5fafdf24 2369 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2370 exit(1);
2371 break;
2372 case EXCP_DFAULT:
2373 fprintf(stderr, "MMU data fault\n");
2374 exit(1);
2375 break;
2376 case EXCP_DTB_MISS_PAL:
2377 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2378 exit(1);
2379 break;
2380 case EXCP_ITB_MISS:
2381 fprintf(stderr, "MMU instruction TLB miss\n");
2382 exit(1);
2383 break;
2384 case EXCP_ITB_ACV:
2385 fprintf(stderr, "MMU instruction access violation\n");
2386 exit(1);
2387 break;
2388 case EXCP_DTB_MISS_NATIVE:
2389 fprintf(stderr, "MMU data TLB miss\n");
2390 exit(1);
2391 break;
2392 case EXCP_UNALIGN:
2393 fprintf(stderr, "Unaligned access\n");
2394 exit(1);
2395 break;
2396 case EXCP_OPCDEC:
2397 fprintf(stderr, "Invalid instruction\n");
2398 exit(1);
2399 break;
2400 case EXCP_FEN:
2401 fprintf(stderr, "Floating-point not allowed\n");
2402 exit(1);
2403 break;
2404 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
7a3148a9
JM		 2405 call_pal(env, (trapnr >> 6) | 0x80);
2406 break;
2407 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
7f75ffd3 2408 fprintf(stderr, "Privileged call to PALcode\n");
7a3148a9
JM		 2409 exit(1);
2410 break;
2411 case EXCP_DEBUG:
2412 {
2413 int sig;
2414
2415 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2416 if (sig)
2417 {
2418 info.si_signo = sig;
2419 info.si_errno = 0;
2420 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2421 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2422 }
2423 }
2424 break;
2425 default:
2426 printf ("Unhandled trap: 0x%x\n", trapnr);
2427 cpu_dump_state(env, stderr, fprintf, 0);
2428 exit (1);
2429 }
2430 process_pending_signals (env);
2431 }
2432}
2433#endif /* TARGET_ALPHA */
2434
8fcd3692 2435static void usage(void)
31e31b8a 2436{
4a19f1ec 2437 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
68d0f70e 2438 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
b346ff46 2439 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 2440 "\n"
68d0f70e 2441 "Standard options:\n"
b12b6a18
TS		 2442 "-h print this help\n"
2443 "-g port wait gdb connection to port\n"
2444 "-L path set the elf interpreter prefix (default=%s)\n"
2445 "-s size set the stack size in bytes (default=%ld)\n"
2446 "-cpu model select CPU (-cpu ? for list)\n"
2447 "-drop-ld-preload drop LD_PRELOAD for target process\n"
04a6dfeb
AJ		 2448 "-E var=value sets/modifies targets environment variable(s)\n"
2449 "-U var unsets targets environment variable(s)\n"
7d8cec95 2450 "-0 argv0 forces target process argv[0] to be argv0\n"
379f6698
PB		 2451#if defined(CONFIG_USE_GUEST_BASE)
2452 "-B address set guest_base address to address\n"
2453#endif
54936004 2454 "\n"
68d0f70e 2455 "Debug options:\n"
6f1f31c0 2456 "-d options activate log (logfile=%s)\n"
b6741956 2457 "-p pagesize set the host page size to 'pagesize'\n"
1b530a6d 2458 "-singlestep always run in singlestep mode\n"
b01bcae6
AZ		 2459 "-strace log system calls\n"
2460 "\n"
68d0f70e 2461 "Environment variables:\n"
b01bcae6
AZ		 2462 "QEMU_STRACE Print system calls and arguments similar to the\n"
2463 " 'strace' program. Enable by setting to any value.\n"
04a6dfeb
AJ		 2464 "You can use -E and -U options to set/unset environment variables\n"
2465 "for target process. It is possible to provide several variables\n"
2466 "by repeating the option. For example:\n"
2467 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2468 "Note that if you provide several changes to single variable\n"
2469 "last change will stay in effect.\n"
b01bcae6 2470 ,
b346ff46 2471 TARGET_ARCH,
5fafdf24 2472 interp_prefix,
54936004
FB		 2473 x86_stack_size,
2474 DEBUG_LOGFILE);
2d18e637 2475 exit(1);
31e31b8a
FB		 2476}
2477
d5975363 2478THREAD CPUState *thread_env;
59faf6d6 2479
edf8e2af
MW		 2480void task_settid(TaskState *ts)
2481{
2482 if (ts->ts_tid == 0) {
2f7bb878 2483#ifdef CONFIG_USE_NPTL
edf8e2af
MW		 2484 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2485#else
2486 /* when no threads are used, tid becomes pid */
2487 ts->ts_tid = getpid();
2488#endif
2489 }
2490}
2491
2492void stop_all_tasks(void)
2493{
2494 /*
2495 * We trust that when using NPTL, start_exclusive()
2496 * handles thread stopping correctly.
2497 */
2498 start_exclusive();
2499}
2500
c3a92833 2501/* Assumes contents are already zeroed. */
624f7979
PB		 2502void init_task_state(TaskState *ts)
2503{
2504 int i;
2505
624f7979
PB		 2506 ts->used = 1;
2507 ts->first_free = ts->sigqueue_table;
2508 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2509 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2510 }
2511 ts->sigqueue_table[i].next = NULL;
2512}
2513
902b3d5c 2514int main(int argc, char **argv, char **envp)
31e31b8a
FB		 2515{
2516 const char *filename;
b1f9be31 2517 const char *cpu_model;
01ffc75b 2518 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 2519 struct image_info info1, *info = &info1;
edf8e2af 2520 struct linux_binprm bprm;
851e67a1 2521 TaskState ts1, *ts = &ts1;
b346ff46 2522 CPUState *env;
586314f2 2523 int optind;
d691f669 2524 const char *r;
74c33bed 2525 int gdbstub_port = 0;
04a6dfeb 2526 char **target_environ, **wrk;
7d8cec95
AJ		 2527 char **target_argv;
2528 int target_argc;
04a6dfeb 2529 envlist_t *envlist = NULL;
7d8cec95
AJ		 2530 const char *argv0 = NULL;
2531 int i;
fd4d81dd 2532 int ret;
b12b6a18 2533
31e31b8a 2534 if (argc <= 1)
44de1b33 2535 usage();
f801f97e 2536
902b3d5c 2537 qemu_cache_utils_init(envp);
2538
cc38b844
FB		 2539 /* init debug */
2540 cpu_set_log_filename(DEBUG_LOGFILE);
2541
04a6dfeb
AJ		 2542 if ((envlist = envlist_create()) == NULL) {
2543 (void) fprintf(stderr, "Unable to allocate envlist\n");
2544 exit(1);
2545 }
2546
2547 /* add current environment into the list */
2548 for (wrk = environ; *wrk != NULL; wrk++) {
2549 (void) envlist_setenv(envlist, *wrk);
2550 }
2551
b1f9be31 2552 cpu_model = NULL;
586314f2 2553 optind = 1;
d691f669
FB		 2554 for(;;) {
2555 if (optind >= argc)
2556 break;
2557 r = argv[optind];
2558 if (r[0] != '-')
2559 break;
586314f2 2560 optind++;
d691f669
FB		 2561 r++;
2562 if (!strcmp(r, "-")) {
2563 break;
2564 } else if (!strcmp(r, "d")) {
e19e89a5 2565 int mask;
c7cd6a37 2566 const CPULogItem *item;
6f1f31c0
FB		 2567
2568 if (optind >= argc)
2569 break;
3b46e624 2570
6f1f31c0
FB		 2571 r = argv[optind++];
2572 mask = cpu_str_to_log_mask(r);
e19e89a5
FB		 2573 if (!mask) {
2574 printf("Log items (comma separated):\n");
2575 for(item = cpu_log_items; item->mask != 0; item++) {
2576 printf("%-10s %s\n", item->name, item->help);
2577 }
2578 exit(1);
2579 }
2580 cpu_set_log(mask);
04a6dfeb
AJ		 2581 } else if (!strcmp(r, "E")) {
2582 r = argv[optind++];
2583 if (envlist_setenv(envlist, r) != 0)
2584 usage();
2585 } else if (!strcmp(r, "U")) {
2586 r = argv[optind++];
2587 if (envlist_unsetenv(envlist, r) != 0)
2588 usage();
7d8cec95
AJ		 2589 } else if (!strcmp(r, "0")) {
2590 r = argv[optind++];
2591 argv0 = r;
d691f669 2592 } else if (!strcmp(r, "s")) {
491150db
AJ		 2593 if (optind >= argc)
2594 break;
d691f669
FB		 2595 r = argv[optind++];
2596 x86_stack_size = strtol(r, (char **)&r, 0);
2597 if (x86_stack_size <= 0)
44de1b33 2598 usage();
d691f669
FB		 2599 if (*r == 'M')
2600 x86_stack_size *= 1024 * 1024;
2601 else if (*r == 'k' || *r == 'K')
2602 x86_stack_size *= 1024;
2603 } else if (!strcmp(r, "L")) {
2604 interp_prefix = argv[optind++];
54936004 2605 } else if (!strcmp(r, "p")) {
491150db
AJ		 2606 if (optind >= argc)
2607 break;
83fb7adf
FB		 2608 qemu_host_page_size = atoi(argv[optind++]);
2609 if (qemu_host_page_size == 0 ||
2610 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 2611 fprintf(stderr, "page size must be a power of two\n");
2612 exit(1);
2613 }
1fddef4b 2614 } else if (!strcmp(r, "g")) {
491150db
AJ		 2615 if (optind >= argc)
2616 break;
74c33bed 2617 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 2618 } else if (!strcmp(r, "r")) {
2619 qemu_uname_release = argv[optind++];
b1f9be31
JM		 2620 } else if (!strcmp(r, "cpu")) {
2621 cpu_model = argv[optind++];
491150db 2622 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
c732abe2
JM		 2623/* XXX: implement xxx_cpu_list for targets that still miss it */
2624#if defined(cpu_list)
2625 cpu_list(stdout, &fprintf);
b1f9be31 2626#endif
2d18e637 2627 exit(1);
b1f9be31 2628 }
379f6698
PB		 2629#if defined(CONFIG_USE_GUEST_BASE)
2630 } else if (!strcmp(r, "B")) {
2631 guest_base = strtol(argv[optind++], NULL, 0);
2632 have_guest_base = 1;
2633#endif
b12b6a18 2634 } else if (!strcmp(r, "drop-ld-preload")) {
04a6dfeb 2635 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
1b530a6d
AJ		 2636 } else if (!strcmp(r, "singlestep")) {
2637 singlestep = 1;
b6741956
FB		 2638 } else if (!strcmp(r, "strace")) {
2639 do_strace = 1;
5fafdf24 2640 } else
c6981055 2641 {
d691f669
FB		 2642 usage();
2643 }
586314f2 2644 }
d691f669
FB		 2645 if (optind >= argc)
2646 usage();
586314f2 2647 filename = argv[optind];
d088d664 2648 exec_path = argv[optind];
586314f2 2649
31e31b8a 2650 /* Zero out regs */
01ffc75b 2651 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 2652
2653 /* Zero out image_info */
2654 memset(info, 0, sizeof(struct image_info));
2655
edf8e2af
MW		 2656 memset(&bprm, 0, sizeof (bprm));
2657
74cd30b8
FB		 2658 /* Scan interp_prefix dir for replacement files. */
2659 init_paths(interp_prefix);
2660
46027c07 2661 if (cpu_model == NULL) {
aaed909a 2662#if defined(TARGET_I386)
46027c07
FB		 2663#ifdef TARGET_X86_64
2664 cpu_model = "qemu64";
2665#else
2666 cpu_model = "qemu32";
2667#endif
aaed909a 2668#elif defined(TARGET_ARM)
088ab16c 2669 cpu_model = "any";
aaed909a
FB		 2670#elif defined(TARGET_M68K)
2671 cpu_model = "any";
2672#elif defined(TARGET_SPARC)
2673#ifdef TARGET_SPARC64
2674 cpu_model = "TI UltraSparc II";
2675#else
2676 cpu_model = "Fujitsu MB86904";
46027c07 2677#endif
aaed909a
FB		 2678#elif defined(TARGET_MIPS)
2679#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2680 cpu_model = "20Kc";
2681#else
2682 cpu_model = "24Kf";
2683#endif
2684#elif defined(TARGET_PPC)
7ded4f52
FB		 2685#ifdef TARGET_PPC64
2686 cpu_model = "970";
2687#else
aaed909a 2688 cpu_model = "750";
7ded4f52 2689#endif
aaed909a
FB		 2690#else
2691 cpu_model = "any";
2692#endif
2693 }
26a5f13b 2694 cpu_exec_init_all(0);
83fb7adf
FB		 2695 /* NOTE: we need to init the CPU at this stage to get
2696 qemu_host_page_size */
aaed909a
FB		 2697 env = cpu_init(cpu_model);
2698 if (!env) {
2699 fprintf(stderr, "Unable to find CPU definition\n");
2700 exit(1);
2701 }
b55a37c9
BS		 2702#if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
2703 cpu_reset(env);
2704#endif
2705
d5975363 2706 thread_env = env;
3b46e624 2707
b6741956
FB		 2708 if (getenv("QEMU_STRACE")) {
2709 do_strace = 1;
b92c47c1
TS		 2710 }
2711
04a6dfeb
AJ		 2712 target_environ = envlist_to_environ(envlist, NULL);
2713 envlist_free(envlist);
b12b6a18 2714
379f6698
PB		 2715#if defined(CONFIG_USE_GUEST_BASE)
2716 /*
2717 * Now that page sizes are configured in cpu_init() we can do
2718 * proper page alignment for guest_base.
2719 */
2720 guest_base = HOST_PAGE_ALIGN(guest_base);
2721
2722 /*
2723 * Read in mmap_min_addr kernel parameter. This value is used
2724 * When loading the ELF image to determine whether guest_base
2725 * is needed.
2726 *
2727 * When user has explicitly set the quest base, we skip this
2728 * test.
2729 */
2730 if (!have_guest_base) {
2731 FILE *fp;
2732
2733 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
2734 unsigned long tmp;
2735 if (fscanf(fp, "%lu", &tmp) == 1) {
2736 mmap_min_addr = tmp;
2737 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
2738 }
2739 fclose(fp);
2740 }
2741 }
2742#endif /* CONFIG_USE_GUEST_BASE */
2743
7d8cec95
AJ		 2744 /*
2745 * Prepare copy of argv vector for target.
2746 */
2747 target_argc = argc - optind;
2748 target_argv = calloc(target_argc + 1, sizeof (char *));
2749 if (target_argv == NULL) {
2750 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2751 exit(1);
2752 }
2753
2754 /*
2755 * If argv0 is specified (using '-0' switch) we replace
2756 * argv[0] pointer with the given one.
2757 */
2758 i = 0;
2759 if (argv0 != NULL) {
2760 target_argv[i++] = strdup(argv0);
2761 }
2762 for (; i < target_argc; i++) {
2763 target_argv[i] = strdup(argv[optind + i]);
2764 }
2765 target_argv[target_argc] = NULL;
2766
edf8e2af
MW		 2767 memset(ts, 0, sizeof(TaskState));
2768 init_task_state(ts);
2769 /* build Task State */
2770 ts->info = info;
2771 ts->bprm = &bprm;
2772 env->opaque = ts;
2773 task_settid(ts);
2774
fd4d81dd
AP		 2775 ret = loader_exec(filename, target_argv, target_environ, regs,
2776 info, &bprm);
2777 if (ret != 0) {
2778 printf("Error %d while loading %s\n", ret, filename);
b12b6a18
TS		 2779 _exit(1);
2780 }
2781
7d8cec95
AJ		 2782 for (i = 0; i < target_argc; i++) {
2783 free(target_argv[i]);
2784 }
2785 free(target_argv);
2786
b12b6a18
TS		 2787 for (wrk = target_environ; *wrk; wrk++) {
2788 free(*wrk);
31e31b8a 2789 }
3b46e624 2790
b12b6a18
TS		 2791 free(target_environ);
2792
2e77eac6 2793 if (qemu_log_enabled()) {
379f6698
PB		 2794#if defined(CONFIG_USE_GUEST_BASE)
2795 qemu_log("guest_base 0x%lx\n", guest_base);
2796#endif
2e77eac6
BS		 2797 log_page_dump();
2798
2799 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2800 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2801 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2802 info->start_code);
2803 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2804 info->start_data);
2805 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2806 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2807 info->start_stack);
2808 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2809 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2810 }
31e31b8a 2811
53a5960a 2812 target_set_brk(info->brk);
31e31b8a 2813 syscall_init();
66fb9763 2814 signal_init();
31e31b8a 2815
b346ff46 2816#if defined(TARGET_I386)
2e255c6b
FB		 2817 cpu_x86_set_cpl(env, 3);
2818
3802ce26 2819 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 2820 env->hflags |= HF_PE_MASK;
2821 if (env->cpuid_features & CPUID_SSE) {
2822 env->cr[4] |= CR4_OSFXSR_MASK;
2823 env->hflags |= HF_OSFXSR_MASK;
2824 }
d2fd1af7 2825#ifndef TARGET_ABI32
4dbc422b
FB		 2826 /* enable 64 bit mode if possible */
2827 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2828 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2829 exit(1);
2830 }
d2fd1af7 2831 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 2832 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 2833 env->hflags |= HF_LMA_MASK;
2834#endif
1bde465e 2835
415e561f
FB		 2836 /* flags setup : we activate the IRQs by default as in user mode */
2837 env->eflags |= IF_MASK;
3b46e624 2838
6dbad63e 2839 /* linux register setup */
d2fd1af7 2840#ifndef TARGET_ABI32
84409ddb
JM		 2841 env->regs[R_EAX] = regs->rax;
2842 env->regs[R_EBX] = regs->rbx;
2843 env->regs[R_ECX] = regs->rcx;
2844 env->regs[R_EDX] = regs->rdx;
2845 env->regs[R_ESI] = regs->rsi;
2846 env->regs[R_EDI] = regs->rdi;
2847 env->regs[R_EBP] = regs->rbp;
2848 env->regs[R_ESP] = regs->rsp;
2849 env->eip = regs->rip;
2850#else
0ecfa993
FB		 2851 env->regs[R_EAX] = regs->eax;
2852 env->regs[R_EBX] = regs->ebx;
2853 env->regs[R_ECX] = regs->ecx;
2854 env->regs[R_EDX] = regs->edx;
2855 env->regs[R_ESI] = regs->esi;
2856 env->regs[R_EDI] = regs->edi;
2857 env->regs[R_EBP] = regs->ebp;
2858 env->regs[R_ESP] = regs->esp;
dab2ed99 2859 env->eip = regs->eip;
84409ddb 2860#endif
31e31b8a 2861
f4beb510 2862 /* linux interrupt setup */
e441570f
AZ		 2863#ifndef TARGET_ABI32
2864 env->idt.limit = 511;
2865#else
2866 env->idt.limit = 255;
2867#endif
2868 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2869 PROT_READ|PROT_WRITE,
2870 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2871 idt_table = g2h(env->idt.base);
f4beb510
FB		 2872 set_idt(0, 0);
2873 set_idt(1, 0);
2874 set_idt(2, 0);
2875 set_idt(3, 3);
2876 set_idt(4, 3);
ec95da6c 2877 set_idt(5, 0);
f4beb510
FB		 2878 set_idt(6, 0);
2879 set_idt(7, 0);
2880 set_idt(8, 0);
2881 set_idt(9, 0);
2882 set_idt(10, 0);
2883 set_idt(11, 0);
2884 set_idt(12, 0);
2885 set_idt(13, 0);
2886 set_idt(14, 0);
2887 set_idt(15, 0);
2888 set_idt(16, 0);
2889 set_idt(17, 0);
2890 set_idt(18, 0);
2891 set_idt(19, 0);
2892 set_idt(0x80, 3);
2893
6dbad63e 2894 /* linux segment setup */
8d18e893
FB		 2895 {
2896 uint64_t *gdt_table;
e441570f
AZ		 2897 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2898 PROT_READ|PROT_WRITE,
2899 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 2900 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 2901 gdt_table = g2h(env->gdt.base);
d2fd1af7 2902#ifdef TARGET_ABI32
8d18e893
FB		 2903 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2904 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2905 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 2906#else
2907 /* 64 bit code segment */
2908 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2909 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2910 DESC_L_MASK |
2911 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2912#endif
8d18e893
FB		 2913 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2914 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2915 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2916 }
6dbad63e 2917 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 2918 cpu_x86_load_seg(env, R_SS, __USER_DS);
2919#ifdef TARGET_ABI32
6dbad63e
FB		 2920 cpu_x86_load_seg(env, R_DS, __USER_DS);
2921 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 2922 cpu_x86_load_seg(env, R_FS, __USER_DS);
2923 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 2924 /* This hack makes Wine work... */
2925 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 2926#else
2927 cpu_x86_load_seg(env, R_DS, 0);
2928 cpu_x86_load_seg(env, R_ES, 0);
2929 cpu_x86_load_seg(env, R_FS, 0);
2930 cpu_x86_load_seg(env, R_GS, 0);
2931#endif
b346ff46
FB		 2932#elif defined(TARGET_ARM)
2933 {
2934 int i;
b5ff1b31 2935 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 2936 for(i = 0; i < 16; i++) {
2937 env->regs[i] = regs->uregs[i];
2938 }
b346ff46 2939 }
93ac68bc 2940#elif defined(TARGET_SPARC)
060366c5
FB		 2941 {
2942 int i;
2943 env->pc = regs->pc;
2944 env->npc = regs->npc;
2945 env->y = regs->y;
2946 for(i = 0; i < 8; i++)
2947 env->gregs[i] = regs->u_regs[i];
2948 for(i = 0; i < 8; i++)
2949 env->regwptr[i] = regs->u_regs[i + 8];
2950 }
67867308
FB		 2951#elif defined(TARGET_PPC)
2952 {
2953 int i;
3fc6c082 2954
0411a972
JM		 2955#if defined(TARGET_PPC64)
2956#if defined(TARGET_ABI32)
2957 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 2958#else
0411a972
JM		 2959 env->msr |= (target_ulong)1 << MSR_SF;
2960#endif
84409ddb 2961#endif
67867308
FB		 2962 env->nip = regs->nip;
2963 for(i = 0; i < 32; i++) {
2964 env->gpr[i] = regs->gpr[i];
2965 }
2966 }
e6e5906b
PB		 2967#elif defined(TARGET_M68K)
2968 {
e6e5906b
PB		 2969 env->pc = regs->pc;
2970 env->dregs[0] = regs->d0;
2971 env->dregs[1] = regs->d1;
2972 env->dregs[2] = regs->d2;
2973 env->dregs[3] = regs->d3;
2974 env->dregs[4] = regs->d4;
2975 env->dregs[5] = regs->d5;
2976 env->dregs[6] = regs->d6;
2977 env->dregs[7] = regs->d7;
2978 env->aregs[0] = regs->a0;
2979 env->aregs[1] = regs->a1;
2980 env->aregs[2] = regs->a2;
2981 env->aregs[3] = regs->a3;
2982 env->aregs[4] = regs->a4;
2983 env->aregs[5] = regs->a5;
2984 env->aregs[6] = regs->a6;
2985 env->aregs[7] = regs->usp;
2986 env->sr = regs->sr;
2987 ts->sim_syscalls = 1;
2988 }
b779e29e
EI		 2989#elif defined(TARGET_MICROBLAZE)
2990 {
2991 env->regs[0] = regs->r0;
2992 env->regs[1] = regs->r1;
2993 env->regs[2] = regs->r2;
2994 env->regs[3] = regs->r3;
2995 env->regs[4] = regs->r4;
2996 env->regs[5] = regs->r5;
2997 env->regs[6] = regs->r6;
2998 env->regs[7] = regs->r7;
2999 env->regs[8] = regs->r8;
3000 env->regs[9] = regs->r9;
3001 env->regs[10] = regs->r10;
3002 env->regs[11] = regs->r11;
3003 env->regs[12] = regs->r12;
3004 env->regs[13] = regs->r13;
3005 env->regs[14] = regs->r14;
3006 env->regs[15] = regs->r15;
3007 env->regs[16] = regs->r16;
3008 env->regs[17] = regs->r17;
3009 env->regs[18] = regs->r18;
3010 env->regs[19] = regs->r19;
3011 env->regs[20] = regs->r20;
3012 env->regs[21] = regs->r21;
3013 env->regs[22] = regs->r22;
3014 env->regs[23] = regs->r23;
3015 env->regs[24] = regs->r24;
3016 env->regs[25] = regs->r25;
3017 env->regs[26] = regs->r26;
3018 env->regs[27] = regs->r27;
3019 env->regs[28] = regs->r28;
3020 env->regs[29] = regs->r29;
3021 env->regs[30] = regs->r30;
3022 env->regs[31] = regs->r31;
3023 env->sregs[SR_PC] = regs->pc;
3024 }
048f6b4d
FB		 3025#elif defined(TARGET_MIPS)
3026 {
3027 int i;
3028
3029 for(i = 0; i < 32; i++) {
b5dc7732 3030 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 3031 }
b5dc7732 3032 env->active_tc.PC = regs->cp0_epc;
048f6b4d 3033 }
fdf9b3e8
FB		 3034#elif defined(TARGET_SH4)
3035 {
3036 int i;
3037
3038 for(i = 0; i < 16; i++) {
3039 env->gregs[i] = regs->regs[i];
3040 }
3041 env->pc = regs->pc;
3042 }
7a3148a9
JM		 3043#elif defined(TARGET_ALPHA)
3044 {
3045 int i;
3046
3047 for(i = 0; i < 28; i++) {
992f48a0 3048 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9
JM		 3049 }
3050 env->ipr[IPR_USP] = regs->usp;
3051 env->ir[30] = regs->usp;
3052 env->pc = regs->pc;
3053 env->unique = regs->unique;
3054 }
48733d19
TS		 3055#elif defined(TARGET_CRIS)
3056 {
3057 env->regs[0] = regs->r0;
3058 env->regs[1] = regs->r1;
3059 env->regs[2] = regs->r2;
3060 env->regs[3] = regs->r3;
3061 env->regs[4] = regs->r4;
3062 env->regs[5] = regs->r5;
3063 env->regs[6] = regs->r6;
3064 env->regs[7] = regs->r7;
3065 env->regs[8] = regs->r8;
3066 env->regs[9] = regs->r9;
3067 env->regs[10] = regs->r10;
3068 env->regs[11] = regs->r11;
3069 env->regs[12] = regs->r12;
3070 env->regs[13] = regs->r13;
3071 env->regs[14] = info->start_stack;
3072 env->regs[15] = regs->acr;
3073 env->pc = regs->erp;
3074 }
b346ff46
FB		 3075#else
3076#error unsupported target CPU
3077#endif
31e31b8a 3078
a87295e8
PB		 3079#if defined(TARGET_ARM) || defined(TARGET_M68K)
3080 ts->stack_base = info->start_stack;
3081 ts->heap_base = info->brk;
3082 /* This will be filled in on the first SYS_HEAPINFO call. */
3083 ts->heap_limit = 0;
3084#endif
3085
74c33bed
FB		 3086 if (gdbstub_port) {
3087 gdbserver_start (gdbstub_port);
1fddef4b
FB		 3088 gdb_handlesig(env, 0);
3089 }
1b6b029e
FB		 3090 cpu_loop(env);
3091 /* never exits */
31e31b8a
FB		 3092 return 0;
3093}
Qemu copy for testing