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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a
FB		 18 */
19#include <stdlib.h>
20#include <stdio.h>
21#include <stdarg.h>
04369ff2 22#include <string.h>
31e31b8a 23#include <errno.h>
0ecfa993 24#include <unistd.h>
e441570f 25#include <sys/mman.h>
edf8e2af 26#include <sys/syscall.h>
703e0e89 27#include <sys/resource.h>
31e31b8a 28
3ef693a0 29#include "qemu.h"
ca10f867 30#include "qemu-common.h"
902b3d5c 31#include "cache-utils.h"
d5975363
PB		 32/* For tb_lock */
33#include "exec-all.h"
31e31b8a 34
29e922b6 35#include "qemu-timer.h"
04a6dfeb
AJ		 36#include "envlist.h"
37
3ef693a0 38#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 39
d088d664
AJ		 40char *exec_path;
41
1b530a6d 42int singlestep;
379f6698 43unsigned long mmap_min_addr;
14f24e14 44#if defined(CONFIG_USE_GUEST_BASE)
379f6698
PB		 45unsigned long guest_base;
46int have_guest_base;
47#endif
1b530a6d 48
74cd30b8 49static const char *interp_prefix = CONFIG_QEMU_PREFIX;
c5937220 50const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 51
9de5e440
FB		 52/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
53 we allocate a bigger stack. Need a better solution, for example
54 by remapping the process stack directly at the right place */
703e0e89 55unsigned long guest_stack_size = 8 * 1024 * 1024UL;
31e31b8a
FB		 56
57void gemu_log(const char *fmt, ...)
58{
59 va_list ap;
60
61 va_start(ap, fmt);
62 vfprintf(stderr, fmt, ap);
63 va_end(ap);
64}
65
8fcd3692 66#if defined(TARGET_I386)
a541f297 67int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 68{
69 return -1;
70}
8fcd3692 71#endif
92ccca6a 72
28ab0e2e
FB		 73/* timers for rdtsc */
74
1dce7c3c 75#if 0
28ab0e2e
FB		 76
77static uint64_t emu_time;
78
79int64_t cpu_get_real_ticks(void)
80{
81 return emu_time++;
82}
83
84#endif
85
2f7bb878 86#if defined(CONFIG_USE_NPTL)
d5975363
PB		 87/***********************************************************/
88/* Helper routines for implementing atomic operations. */
89
90/* To implement exclusive operations we force all cpus to syncronise.
91 We don't require a full sync, only that no cpus are executing guest code.
92 The alternative is to map target atomic ops onto host equivalents,
93 which requires quite a lot of per host/target work. */
c2764719 94static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 95static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
96static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
97static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
98static int pending_cpus;
99
100/* Make sure everything is in a consistent state for calling fork(). */
101void fork_start(void)
102{
d5975363
PB		 103 pthread_mutex_lock(&tb_lock);
104 pthread_mutex_lock(&exclusive_lock);
d032d1b4 105 mmap_fork_start();
d5975363
PB		 106}
107
108void fork_end(int child)
109{
d032d1b4 110 mmap_fork_end(child);
d5975363
PB		 111 if (child) {
112 /* Child processes created by fork() only have a single thread.
113 Discard information about the parent threads. */
114 first_cpu = thread_env;
115 thread_env->next_cpu = NULL;
116 pending_cpus = 0;
117 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 118 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 119 pthread_cond_init(&exclusive_cond, NULL);
120 pthread_cond_init(&exclusive_resume, NULL);
121 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 122 gdbserver_fork(thread_env);
d5975363
PB		 123 } else {
124 pthread_mutex_unlock(&exclusive_lock);
125 pthread_mutex_unlock(&tb_lock);
126 }
d5975363
PB		 127}
128
129/* Wait for pending exclusive operations to complete. The exclusive lock
130 must be held. */
131static inline void exclusive_idle(void)
132{
133 while (pending_cpus) {
134 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
135 }
136}
137
138/* Start an exclusive operation.
139 Must only be called from outside cpu_arm_exec. */
140static inline void start_exclusive(void)
141{
142 CPUState *other;
143 pthread_mutex_lock(&exclusive_lock);
144 exclusive_idle();
145
146 pending_cpus = 1;
147 /* Make all other cpus stop executing. */
148 for (other = first_cpu; other; other = other->next_cpu) {
149 if (other->running) {
150 pending_cpus++;
3098dba0 151 cpu_exit(other);
d5975363
PB		 152 }
153 }
154 if (pending_cpus > 1) {
155 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
156 }
157}
158
159/* Finish an exclusive operation. */
160static inline void end_exclusive(void)
161{
162 pending_cpus = 0;
163 pthread_cond_broadcast(&exclusive_resume);
164 pthread_mutex_unlock(&exclusive_lock);
165}
166
167/* Wait for exclusive ops to finish, and begin cpu execution. */
168static inline void cpu_exec_start(CPUState *env)
169{
170 pthread_mutex_lock(&exclusive_lock);
171 exclusive_idle();
172 env->running = 1;
173 pthread_mutex_unlock(&exclusive_lock);
174}
175
176/* Mark cpu as not executing, and release pending exclusive ops. */
177static inline void cpu_exec_end(CPUState *env)
178{
179 pthread_mutex_lock(&exclusive_lock);
180 env->running = 0;
181 if (pending_cpus > 1) {
182 pending_cpus--;
183 if (pending_cpus == 1) {
184 pthread_cond_signal(&exclusive_cond);
185 }
186 }
187 exclusive_idle();
188 pthread_mutex_unlock(&exclusive_lock);
189}
c2764719
PB		 190
191void cpu_list_lock(void)
192{
193 pthread_mutex_lock(&cpu_list_mutex);
194}
195
196void cpu_list_unlock(void)
197{
198 pthread_mutex_unlock(&cpu_list_mutex);
199}
2f7bb878 200#else /* if !CONFIG_USE_NPTL */
d5975363
PB		 201/* These are no-ops because we are not threadsafe. */
202static inline void cpu_exec_start(CPUState *env)
203{
204}
205
206static inline void cpu_exec_end(CPUState *env)
207{
208}
209
210static inline void start_exclusive(void)
211{
212}
213
214static inline void end_exclusive(void)
215{
216}
217
218void fork_start(void)
219{
220}
221
222void fork_end(int child)
223{
2b1319c8
AJ		 224 if (child) {
225 gdbserver_fork(thread_env);
226 }
d5975363 227}
c2764719
PB		 228
229void cpu_list_lock(void)
230{
231}
232
233void cpu_list_unlock(void)
234{
235}
d5975363
PB		 236#endif
237
238
a541f297
FB		 239#ifdef TARGET_I386
240/***********************************************************/
241/* CPUX86 core interface */
242
02a1602e
FB		 243void cpu_smm_update(CPUState *env)
244{
245}
246
28ab0e2e
FB		 247uint64_t cpu_get_tsc(CPUX86State *env)
248{
249 return cpu_get_real_ticks();
250}
251
5fafdf24 252static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 253 int flags)
6dbad63e 254{
f4beb510 255 unsigned int e1, e2;
53a5960a 256 uint32_t *p;
6dbad63e
FB		 257 e1 = (addr << 16) | (limit & 0xffff);
258 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 259 e2 |= flags;
53a5960a 260 p = ptr;
d538e8f5 261 p[0] = tswap32(e1);
262 p[1] = tswap32(e2);
f4beb510
FB		 263}
264
e441570f 265static uint64_t *idt_table;
eb38c52c 266#ifdef TARGET_X86_64
d2fd1af7
FB		 267static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
268 uint64_t addr, unsigned int sel)
f4beb510 269{
4dbc422b 270 uint32_t *p, e1, e2;
f4beb510
FB		 271 e1 = (addr & 0xffff) | (sel << 16);
272 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 273 p = ptr;
4dbc422b
FB		 274 p[0] = tswap32(e1);
275 p[1] = tswap32(e2);
276 p[2] = tswap32(addr >> 32);
277 p[3] = 0;
6dbad63e 278}
d2fd1af7
FB		 279/* only dpl matters as we do only user space emulation */
280static void set_idt(int n, unsigned int dpl)
281{
282 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
283}
284#else
d2fd1af7
FB		 285static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
286 uint32_t addr, unsigned int sel)
287{
4dbc422b 288 uint32_t *p, e1, e2;
d2fd1af7
FB		 289 e1 = (addr & 0xffff) | (sel << 16);
290 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
291 p = ptr;
4dbc422b
FB		 292 p[0] = tswap32(e1);
293 p[1] = tswap32(e2);
d2fd1af7
FB		 294}
295
f4beb510
FB		 296/* only dpl matters as we do only user space emulation */
297static void set_idt(int n, unsigned int dpl)
298{
299 set_gate(idt_table + n, 0, dpl, 0, 0);
300}
d2fd1af7 301#endif
31e31b8a 302
89e957e7 303void cpu_loop(CPUX86State *env)
1b6b029e 304{
bc8a22cc 305 int trapnr;
992f48a0 306 abi_ulong pc;
c227f099 307 target_siginfo_t info;
851e67a1 308
1b6b029e 309 for(;;) {
bc8a22cc 310 trapnr = cpu_x86_exec(env);
bc8a22cc 311 switch(trapnr) {
f4beb510 312 case 0x80:
d2fd1af7 313 /* linux syscall from int $0x80 */
5fafdf24
TS		 314 env->regs[R_EAX] = do_syscall(env,
315 env->regs[R_EAX],
f4beb510
FB		 316 env->regs[R_EBX],
317 env->regs[R_ECX],
318 env->regs[R_EDX],
319 env->regs[R_ESI],
320 env->regs[R_EDI],
321 env->regs[R_EBP]);
322 break;
d2fd1af7
FB		 323#ifndef TARGET_ABI32
324 case EXCP_SYSCALL:
325 /* linux syscall from syscall intruction */
326 env->regs[R_EAX] = do_syscall(env,
327 env->regs[R_EAX],
328 env->regs[R_EDI],
329 env->regs[R_ESI],
330 env->regs[R_EDX],
331 env->regs[10],
332 env->regs[8],
333 env->regs[9]);
334 env->eip = env->exception_next_eip;
335 break;
336#endif
f4beb510
FB		 337 case EXCP0B_NOSEG:
338 case EXCP0C_STACK:
339 info.si_signo = SIGBUS;
340 info.si_errno = 0;
341 info.si_code = TARGET_SI_KERNEL;
342 info._sifields._sigfault._addr = 0;
624f7979 343 queue_signal(env, info.si_signo, &info);
f4beb510 344 break;
1b6b029e 345 case EXCP0D_GPF:
d2fd1af7 346 /* XXX: potential problem if ABI32 */
84409ddb 347#ifndef TARGET_X86_64
851e67a1 348 if (env->eflags & VM_MASK) {
89e957e7 349 handle_vm86_fault(env);
84409ddb
JM		 350 } else
351#endif
352 {
f4beb510
FB		 353 info.si_signo = SIGSEGV;
354 info.si_errno = 0;
355 info.si_code = TARGET_SI_KERNEL;
356 info._sifields._sigfault._addr = 0;
624f7979 357 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 358 }
359 break;
b689bc57
FB		 360 case EXCP0E_PAGE:
361 info.si_signo = SIGSEGV;
362 info.si_errno = 0;
363 if (!(env->error_code & 1))
364 info.si_code = TARGET_SEGV_MAPERR;
365 else
366 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 367 info._sifields._sigfault._addr = env->cr[2];
624f7979 368 queue_signal(env, info.si_signo, &info);
b689bc57 369 break;
9de5e440 370 case EXCP00_DIVZ:
84409ddb 371#ifndef TARGET_X86_64
bc8a22cc 372 if (env->eflags & VM_MASK) {
447db213 373 handle_vm86_trap(env, trapnr);
84409ddb
JM		 374 } else
375#endif
376 {
bc8a22cc
FB		 377 /* division by zero */
378 info.si_signo = SIGFPE;
379 info.si_errno = 0;
380 info.si_code = TARGET_FPE_INTDIV;
381 info._sifields._sigfault._addr = env->eip;
624f7979 382 queue_signal(env, info.si_signo, &info);
bc8a22cc 383 }
9de5e440 384 break;
01df040b 385 case EXCP01_DB:
447db213 386 case EXCP03_INT3:
84409ddb 387#ifndef TARGET_X86_64
447db213
FB		 388 if (env->eflags & VM_MASK) {
389 handle_vm86_trap(env, trapnr);
84409ddb
JM		 390 } else
391#endif
392 {
447db213
FB		 393 info.si_signo = SIGTRAP;
394 info.si_errno = 0;
01df040b 395 if (trapnr == EXCP01_DB) {
447db213
FB		 396 info.si_code = TARGET_TRAP_BRKPT;
397 info._sifields._sigfault._addr = env->eip;
398 } else {
399 info.si_code = TARGET_SI_KERNEL;
400 info._sifields._sigfault._addr = 0;
401 }
624f7979 402 queue_signal(env, info.si_signo, &info);
447db213
FB		 403 }
404 break;
9de5e440
FB		 405 case EXCP04_INTO:
406 case EXCP05_BOUND:
84409ddb 407#ifndef TARGET_X86_64
bc8a22cc 408 if (env->eflags & VM_MASK) {
447db213 409 handle_vm86_trap(env, trapnr);
84409ddb
JM		 410 } else
411#endif
412 {
bc8a22cc
FB		 413 info.si_signo = SIGSEGV;
414 info.si_errno = 0;
b689bc57 415 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 416 info._sifields._sigfault._addr = 0;
624f7979 417 queue_signal(env, info.si_signo, &info);
bc8a22cc 418 }
9de5e440
FB		 419 break;
420 case EXCP06_ILLOP:
421 info.si_signo = SIGILL;
422 info.si_errno = 0;
423 info.si_code = TARGET_ILL_ILLOPN;
424 info._sifields._sigfault._addr = env->eip;
624f7979 425 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 426 break;
427 case EXCP_INTERRUPT:
428 /* just indicate that signals should be handled asap */
429 break;
1fddef4b
FB		 430 case EXCP_DEBUG:
431 {
432 int sig;
433
434 sig = gdb_handlesig (env, TARGET_SIGTRAP);
435 if (sig)
436 {
437 info.si_signo = sig;
438 info.si_errno = 0;
439 info.si_code = TARGET_TRAP_BRKPT;
624f7979 440 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 441 }
442 }
443 break;
1b6b029e 444 default:
970a87a6 445 pc = env->segs[R_CS].base + env->eip;
5fafdf24 446 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 447 (long)pc, trapnr);
1b6b029e
FB		 448 abort();
449 }
66fb9763 450 process_pending_signals(env);
1b6b029e
FB		 451 }
452}
b346ff46
FB		 453#endif
454
455#ifdef TARGET_ARM
456
992f48a0 457static void arm_cache_flush(abi_ulong start, abi_ulong last)
6f1f31c0 458{
992f48a0 459 abi_ulong addr, last1;
6f1f31c0
FB		 460
461 if (last < start)
462 return;
463 addr = start;
464 for(;;) {
465 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
466 if (last1 > last)
467 last1 = last;
468 tb_invalidate_page_range(addr, last1 + 1);
469 if (last1 == last)
470 break;
471 addr = last1 + 1;
472 }
473}
474
fbb4a2e3
PB		 475/* Handle a jump to the kernel code page. */
476static int
477do_kernel_trap(CPUARMState *env)
478{
479 uint32_t addr;
480 uint32_t cpsr;
481 uint32_t val;
482
483 switch (env->regs[15]) {
484 case 0xffff0fa0: /* __kernel_memory_barrier */
485 /* ??? No-op. Will need to do better for SMP. */
486 break;
487 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 488 /* XXX: This only works between threads, not between processes.
489 It's probably possible to implement this with native host
490 operations. However things like ldrex/strex are much harder so
491 there's not much point trying. */
492 start_exclusive();
fbb4a2e3
PB		 493 cpsr = cpsr_read(env);
494 addr = env->regs[2];
495 /* FIXME: This should SEGV if the access fails. */
496 if (get_user_u32(val, addr))
497 val = ~env->regs[0];
498 if (val == env->regs[0]) {
499 val = env->regs[1];
500 /* FIXME: Check for segfaults. */
501 put_user_u32(val, addr);
502 env->regs[0] = 0;
503 cpsr |= CPSR_C;
504 } else {
505 env->regs[0] = -1;
506 cpsr &= ~CPSR_C;
507 }
508 cpsr_write(env, cpsr, CPSR_C);
d5975363 509 end_exclusive();
fbb4a2e3
PB		 510 break;
511 case 0xffff0fe0: /* __kernel_get_tls */
512 env->regs[0] = env->cp15.c13_tls2;
513 break;
514 default:
515 return 1;
516 }
517 /* Jump back to the caller. */
518 addr = env->regs[14];
519 if (addr & 1) {
520 env->thumb = 1;
521 addr &= ~1;
522 }
523 env->regs[15] = addr;
524
525 return 0;
526}
527
426f5abc
PB		 528static int do_strex(CPUARMState *env)
529{
530 uint32_t val;
531 int size;
532 int rc = 1;
533 int segv = 0;
534 uint32_t addr;
535 start_exclusive();
536 addr = env->exclusive_addr;
537 if (addr != env->exclusive_test) {
538 goto fail;
539 }
540 size = env->exclusive_info & 0xf;
541 switch (size) {
542 case 0:
543 segv = get_user_u8(val, addr);
544 break;
545 case 1:
546 segv = get_user_u16(val, addr);
547 break;
548 case 2:
549 case 3:
550 segv = get_user_u32(val, addr);
551 break;
f7001a3b
AJ		 552 default:
553 abort();
426f5abc
PB		 554 }
555 if (segv) {
556 env->cp15.c6_data = addr;
557 goto done;
558 }
559 if (val != env->exclusive_val) {
560 goto fail;
561 }
562 if (size == 3) {
563 segv = get_user_u32(val, addr + 4);
564 if (segv) {
565 env->cp15.c6_data = addr + 4;
566 goto done;
567 }
568 if (val != env->exclusive_high) {
569 goto fail;
570 }
571 }
572 val = env->regs[(env->exclusive_info >> 8) & 0xf];
573 switch (size) {
574 case 0:
575 segv = put_user_u8(val, addr);
576 break;
577 case 1:
578 segv = put_user_u16(val, addr);
579 break;
580 case 2:
581 case 3:
582 segv = put_user_u32(val, addr);
583 break;
584 }
585 if (segv) {
586 env->cp15.c6_data = addr;
587 goto done;
588 }
589 if (size == 3) {
590 val = env->regs[(env->exclusive_info >> 12) & 0xf];
591 segv = put_user_u32(val, addr);
592 if (segv) {
593 env->cp15.c6_data = addr + 4;
594 goto done;
595 }
596 }
597 rc = 0;
598fail:
725b8a69 599 env->regs[15] += 4;
426f5abc
PB		 600 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
601done:
602 end_exclusive();
603 return segv;
604}
605
b346ff46
FB		 606void cpu_loop(CPUARMState *env)
607{
608 int trapnr;
609 unsigned int n, insn;
c227f099 610 target_siginfo_t info;
b5ff1b31 611 uint32_t addr;
3b46e624 612
b346ff46 613 for(;;) {
d5975363 614 cpu_exec_start(env);
b346ff46 615 trapnr = cpu_arm_exec(env);
d5975363 616 cpu_exec_end(env);
b346ff46
FB		 617 switch(trapnr) {
618 case EXCP_UDEF:
c6981055
FB		 619 {
620 TaskState *ts = env->opaque;
621 uint32_t opcode;
6d9a42be 622 int rc;
c6981055
FB		 623
624 /* we handle the FPU emulation here, as Linux */
625 /* we get the opcode */
2f619698
FB		 626 /* FIXME - what to do if get_user() fails? */
627 get_user_u32(opcode, env->regs[15]);
3b46e624 628
6d9a42be
AJ		 629 rc = EmulateAll(opcode, &ts->fpa, env);
630 if (rc == 0) { /* illegal instruction */
c6981055
FB		 631 info.si_signo = SIGILL;
632 info.si_errno = 0;
633 info.si_code = TARGET_ILL_ILLOPN;
634 info._sifields._sigfault._addr = env->regs[15];
624f7979 635 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 636 } else if (rc < 0) { /* FP exception */
637 int arm_fpe=0;
638
639 /* translate softfloat flags to FPSR flags */
640 if (-rc & float_flag_invalid)
641 arm_fpe |= BIT_IOC;
642 if (-rc & float_flag_divbyzero)
643 arm_fpe |= BIT_DZC;
644 if (-rc & float_flag_overflow)
645 arm_fpe |= BIT_OFC;
646 if (-rc & float_flag_underflow)
647 arm_fpe |= BIT_UFC;
648 if (-rc & float_flag_inexact)
649 arm_fpe |= BIT_IXC;
650
651 FPSR fpsr = ts->fpa.fpsr;
652 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
653
654 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
655 info.si_signo = SIGFPE;
656 info.si_errno = 0;
657
658 /* ordered by priority, least first */
659 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
660 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
661 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
662 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
663 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
664
665 info._sifields._sigfault._addr = env->regs[15];
624f7979 666 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 667 } else {
668 env->regs[15] += 4;
669 }
670
671 /* accumulate unenabled exceptions */
672 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
673 fpsr |= BIT_IXC;
674 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
675 fpsr |= BIT_UFC;
676 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
677 fpsr |= BIT_OFC;
678 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
679 fpsr |= BIT_DZC;
680 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
681 fpsr |= BIT_IOC;
682 ts->fpa.fpsr=fpsr;
683 } else { /* everything OK */
c6981055
FB		 684 /* increment PC */
685 env->regs[15] += 4;
686 }
687 }
b346ff46
FB		 688 break;
689 case EXCP_SWI:
06c949e6 690 case EXCP_BKPT:
b346ff46 691 {
ce4defa0 692 env->eabi = 1;
b346ff46 693 /* system call */
06c949e6
PB		 694 if (trapnr == EXCP_BKPT) {
695 if (env->thumb) {
2f619698
FB		 696 /* FIXME - what to do if get_user() fails? */
697 get_user_u16(insn, env->regs[15]);
06c949e6
PB		 698 n = insn & 0xff;
699 env->regs[15] += 2;
700 } else {
2f619698
FB		 701 /* FIXME - what to do if get_user() fails? */
702 get_user_u32(insn, env->regs[15]);
06c949e6
PB		 703 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
704 env->regs[15] += 4;
705 }
192c7bd9 706 } else {
06c949e6 707 if (env->thumb) {
2f619698
FB		 708 /* FIXME - what to do if get_user() fails? */
709 get_user_u16(insn, env->regs[15] - 2);
06c949e6
PB		 710 n = insn & 0xff;
711 } else {
2f619698
FB		 712 /* FIXME - what to do if get_user() fails? */
713 get_user_u32(insn, env->regs[15] - 4);
06c949e6
PB		 714 n = insn & 0xffffff;
715 }
192c7bd9
FB		 716 }
717
6f1f31c0
FB		 718 if (n == ARM_NR_cacheflush) {
719 arm_cache_flush(env->regs[0], env->regs[1]);
a4f81979
FB		 720 } else if (n == ARM_NR_semihosting
721 || n == ARM_NR_thumb_semihosting) {
722 env->regs[0] = do_arm_semihosting (env);
ce4defa0 723 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 724 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 725 /* linux syscall */
ce4defa0 726 if (env->thumb || n == 0) {
192c7bd9
FB		 727 n = env->regs[7];
728 } else {
729 n -= ARM_SYSCALL_BASE;
ce4defa0 730 env->eabi = 0;
192c7bd9 731 }
fbb4a2e3
PB		 732 if ( n > ARM_NR_BASE) {
733 switch (n) {
734 case ARM_NR_cacheflush:
735 arm_cache_flush(env->regs[0], env->regs[1]);
736 break;
737 case ARM_NR_set_tls:
738 cpu_set_tls(env, env->regs[0]);
739 env->regs[0] = 0;
740 break;
741 default:
742 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
743 n);
744 env->regs[0] = -TARGET_ENOSYS;
745 break;
746 }
747 } else {
748 env->regs[0] = do_syscall(env,
749 n,
750 env->regs[0],
751 env->regs[1],
752 env->regs[2],
753 env->regs[3],
754 env->regs[4],
755 env->regs[5]);
756 }
b346ff46
FB		 757 } else {
758 goto error;
759 }
760 }
761 break;
43fff238
FB		 762 case EXCP_INTERRUPT:
763 /* just indicate that signals should be handled asap */
764 break;
68016c62 765 case EXCP_PREFETCH_ABORT:
eae473c1 766 addr = env->cp15.c6_insn;
b5ff1b31 767 goto do_segv;
68016c62 768 case EXCP_DATA_ABORT:
eae473c1 769 addr = env->cp15.c6_data;
b5ff1b31
FB		 770 goto do_segv;
771 do_segv:
68016c62
FB		 772 {
773 info.si_signo = SIGSEGV;
774 info.si_errno = 0;
775 /* XXX: check env->error_code */
776 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 777 info._sifields._sigfault._addr = addr;
624f7979 778 queue_signal(env, info.si_signo, &info);
68016c62
FB		 779 }
780 break;
1fddef4b
FB		 781 case EXCP_DEBUG:
782 {
783 int sig;
784
785 sig = gdb_handlesig (env, TARGET_SIGTRAP);
786 if (sig)
787 {
788 info.si_signo = sig;
789 info.si_errno = 0;
790 info.si_code = TARGET_TRAP_BRKPT;
624f7979 791 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 792 }
793 }
794 break;
fbb4a2e3
PB		 795 case EXCP_KERNEL_TRAP:
796 if (do_kernel_trap(env))
797 goto error;
798 break;
426f5abc
PB		 799 case EXCP_STREX:
800 if (do_strex(env)) {
801 addr = env->cp15.c6_data;
802 goto do_segv;
803 }
e9273455 804 break;
b346ff46
FB		 805 default:
806 error:
5fafdf24 807 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 808 trapnr);
7fe48483 809 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 810 abort();
811 }
812 process_pending_signals(env);
813 }
814}
815
816#endif
1b6b029e 817
93ac68bc 818#ifdef TARGET_SPARC
ed23fbd9 819#define SPARC64_STACK_BIAS 2047
93ac68bc 820
060366c5
FB		 821//#define DEBUG_WIN
822
2623cbaf
FB		 823/* WARNING: dealing with register windows _is_ complicated. More info
824 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 825static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
826{
1a14026e 827 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 828 /* wrap handling : if cwp is on the last window, then we use the
829 registers 'after' the end */
1a14026e
BS		 830 if (index < 8 && env->cwp == env->nwindows - 1)
831 index += 16 * env->nwindows;
060366c5
FB		 832 return index;
833}
834
2623cbaf
FB		 835/* save the register window 'cwp1' */
836static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 837{
2623cbaf 838 unsigned int i;
992f48a0 839 abi_ulong sp_ptr;
3b46e624 840
53a5960a 841 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 842#ifdef TARGET_SPARC64
843 if (sp_ptr & 3)
844 sp_ptr += SPARC64_STACK_BIAS;
845#endif
060366c5 846#if defined(DEBUG_WIN)
2daf0284
BS		 847 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
848 sp_ptr, cwp1);
060366c5 849#endif
2623cbaf 850 for(i = 0; i < 16; i++) {
2f619698
FB		 851 /* FIXME - what to do if put_user() fails? */
852 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 853 sp_ptr += sizeof(abi_ulong);
2623cbaf 854 }
060366c5
FB		 855}
856
857static void save_window(CPUSPARCState *env)
858{
5ef54116 859#ifndef TARGET_SPARC64
2623cbaf 860 unsigned int new_wim;
1a14026e
BS		 861 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
862 ((1LL << env->nwindows) - 1);
863 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 864 env->wim = new_wim;
5ef54116 865#else
1a14026e 866 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 867 env->cansave++;
868 env->canrestore--;
869#endif
060366c5
FB		 870}
871
872static void restore_window(CPUSPARCState *env)
873{
eda52953
BS		 874#ifndef TARGET_SPARC64
875 unsigned int new_wim;
876#endif
877 unsigned int i, cwp1;
992f48a0 878 abi_ulong sp_ptr;
3b46e624 879
eda52953 880#ifndef TARGET_SPARC64
1a14026e
BS		 881 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
882 ((1LL << env->nwindows) - 1);
eda52953 883#endif
3b46e624 884
060366c5 885 /* restore the invalid window */
1a14026e 886 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 887 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 888#ifdef TARGET_SPARC64
889 if (sp_ptr & 3)
890 sp_ptr += SPARC64_STACK_BIAS;
891#endif
060366c5 892#if defined(DEBUG_WIN)
2daf0284
BS		 893 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
894 sp_ptr, cwp1);
060366c5 895#endif
2623cbaf 896 for(i = 0; i < 16; i++) {
2f619698
FB		 897 /* FIXME - what to do if get_user() fails? */
898 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 899 sp_ptr += sizeof(abi_ulong);
2623cbaf 900 }
5ef54116
FB		 901#ifdef TARGET_SPARC64
902 env->canrestore++;
1a14026e
BS		 903 if (env->cleanwin < env->nwindows - 1)
904 env->cleanwin++;
5ef54116 905 env->cansave--;
eda52953
BS		 906#else
907 env->wim = new_wim;
5ef54116 908#endif
060366c5
FB		 909}
910
911static void flush_windows(CPUSPARCState *env)
912{
913 int offset, cwp1;
2623cbaf
FB		 914
915 offset = 1;
060366c5
FB		 916 for(;;) {
917 /* if restore would invoke restore_window(), then we can stop */
1a14026e 918 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 919#ifndef TARGET_SPARC64
060366c5
FB		 920 if (env->wim & (1 << cwp1))
921 break;
eda52953
BS		 922#else
923 if (env->canrestore == 0)
924 break;
925 env->cansave++;
926 env->canrestore--;
927#endif
2623cbaf 928 save_window_offset(env, cwp1);
060366c5
FB		 929 offset++;
930 }
1a14026e 931 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 932#ifndef TARGET_SPARC64
933 /* set wim so that restore will reload the registers */
2623cbaf 934 env->wim = 1 << cwp1;
eda52953 935#endif
2623cbaf
FB		 936#if defined(DEBUG_WIN)
937 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 938#endif
2623cbaf 939}
060366c5 940
93ac68bc
FB		 941void cpu_loop (CPUSPARCState *env)
942{
060366c5 943 int trapnr, ret;
c227f099 944 target_siginfo_t info;
3b46e624 945
060366c5
FB		 946 while (1) {
947 trapnr = cpu_sparc_exec (env);
3b46e624 948
060366c5 949 switch (trapnr) {
5ef54116 950#ifndef TARGET_SPARC64
5fafdf24 951 case 0x88:
060366c5 952 case 0x90:
5ef54116 953#else
cb33da57 954 case 0x110:
5ef54116
FB		 955 case 0x16d:
956#endif
060366c5 957 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 958 env->regwptr[0], env->regwptr[1],
959 env->regwptr[2], env->regwptr[3],
060366c5
FB		 960 env->regwptr[4], env->regwptr[5]);
961 if ((unsigned int)ret >= (unsigned int)(-515)) {
992f48a0 962#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 963 env->xcc |= PSR_CARRY;
964#else
060366c5 965 env->psr |= PSR_CARRY;
27908725 966#endif
060366c5
FB		 967 ret = -ret;
968 } else {
992f48a0 969#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 970 env->xcc &= ~PSR_CARRY;
971#else
060366c5 972 env->psr &= ~PSR_CARRY;
27908725 973#endif
060366c5
FB		 974 }
975 env->regwptr[0] = ret;
976 /* next instruction */
977 env->pc = env->npc;
978 env->npc = env->npc + 4;
979 break;
980 case 0x83: /* flush windows */
992f48a0
BS		 981#ifdef TARGET_ABI32
982 case 0x103:
983#endif
2623cbaf 984 flush_windows(env);
060366c5
FB		 985 /* next instruction */
986 env->pc = env->npc;
987 env->npc = env->npc + 4;
988 break;
3475187d 989#ifndef TARGET_SPARC64
060366c5
FB		 990 case TT_WIN_OVF: /* window overflow */
991 save_window(env);
992 break;
993 case TT_WIN_UNF: /* window underflow */
994 restore_window(env);
995 break;
61ff6f58
FB		 996 case TT_TFAULT:
997 case TT_DFAULT:
998 {
999 info.si_signo = SIGSEGV;
1000 info.si_errno = 0;
1001 /* XXX: check env->error_code */
1002 info.si_code = TARGET_SEGV_MAPERR;
1003 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 1004 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 1005 }
1006 break;
3475187d 1007#else
5ef54116
FB		 1008 case TT_SPILL: /* window overflow */
1009 save_window(env);
1010 break;
1011 case TT_FILL: /* window underflow */
1012 restore_window(env);
1013 break;
7f84a729
BS		 1014 case TT_TFAULT:
1015 case TT_DFAULT:
1016 {
1017 info.si_signo = SIGSEGV;
1018 info.si_errno = 0;
1019 /* XXX: check env->error_code */
1020 info.si_code = TARGET_SEGV_MAPERR;
1021 if (trapnr == TT_DFAULT)
1022 info._sifields._sigfault._addr = env->dmmuregs[4];
1023 else
8194f35a 1024 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
624f7979 1025 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 1026 }
1027 break;
27524dc3 1028#ifndef TARGET_ABI32
5bfb56b2
BS		 1029 case 0x16e:
1030 flush_windows(env);
1031 sparc64_get_context(env);
1032 break;
1033 case 0x16f:
1034 flush_windows(env);
1035 sparc64_set_context(env);
1036 break;
27524dc3 1037#endif
3475187d 1038#endif
48dc41eb
FB		 1039 case EXCP_INTERRUPT:
1040 /* just indicate that signals should be handled asap */
1041 break;
1fddef4b
FB		 1042 case EXCP_DEBUG:
1043 {
1044 int sig;
1045
1046 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1047 if (sig)
1048 {
1049 info.si_signo = sig;
1050 info.si_errno = 0;
1051 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1052 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 1053 }
1054 }
1055 break;
060366c5
FB		 1056 default:
1057 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 1058 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 1059 exit (1);
1060 }
1061 process_pending_signals (env);
1062 }
93ac68bc
FB		 1063}
1064
1065#endif
1066
67867308 1067#ifdef TARGET_PPC
9fddaa0c
FB		 1068static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1069{
1070 /* TO FIX */
1071 return 0;
1072}
3b46e624 1073
e3ea6529 1074uint64_t cpu_ppc_load_tbl (CPUState *env)
9fddaa0c 1075{
e3ea6529 1076 return cpu_ppc_get_tb(env);
9fddaa0c 1077}
3b46e624 1078
9fddaa0c
FB		 1079uint32_t cpu_ppc_load_tbu (CPUState *env)
1080{
1081 return cpu_ppc_get_tb(env) >> 32;
1082}
3b46e624 1083
b711de95 1084uint64_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 1085{
b711de95 1086 return cpu_ppc_get_tb(env);
9fddaa0c 1087}
5fafdf24 1088
a062e36c 1089uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 1090{
a062e36c 1091 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1092}
76a66253 1093
76a66253
JM		 1094uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1095__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1096
76a66253 1097uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 1098{
76a66253 1099 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1100}
76a66253 1101
a750fc0b 1102/* XXX: to be fixed */
73b01960 1103int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
a750fc0b
JM		 1104{
1105 return -1;
1106}
1107
73b01960 1108int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
a750fc0b
JM		 1109{
1110 return -1;
1111}
1112
001faf32
BS		 1113#define EXCP_DUMP(env, fmt, ...) \
1114do { \
1115 fprintf(stderr, fmt , ## __VA_ARGS__); \
1116 cpu_dump_state(env, stderr, fprintf, 0); \
1117 qemu_log(fmt, ## __VA_ARGS__); \
430c7ec7 1118 if (logfile) \
1119 log_cpu_state(env, 0); \
e1833e1f
JM		 1120} while (0)
1121
56f066bb
NF		 1122static int do_store_exclusive(CPUPPCState *env)
1123{
1124 target_ulong addr;
1125 target_ulong page_addr;
1126 target_ulong val;
1127 int flags;
1128 int segv = 0;
1129
1130 addr = env->reserve_ea;
1131 page_addr = addr & TARGET_PAGE_MASK;
1132 start_exclusive();
1133 mmap_lock();
1134 flags = page_get_flags(page_addr);
1135 if ((flags & PAGE_READ) == 0) {
1136 segv = 1;
1137 } else {
1138 int reg = env->reserve_info & 0x1f;
1139 int size = (env->reserve_info >> 5) & 0xf;
1140 int stored = 0;
1141
1142 if (addr == env->reserve_addr) {
1143 switch (size) {
1144 case 1: segv = get_user_u8(val, addr); break;
1145 case 2: segv = get_user_u16(val, addr); break;
1146 case 4: segv = get_user_u32(val, addr); break;
1147#if defined(TARGET_PPC64)
1148 case 8: segv = get_user_u64(val, addr); break;
1149#endif
1150 default: abort();
1151 }
1152 if (!segv && val == env->reserve_val) {
1153 val = env->gpr[reg];
1154 switch (size) {
1155 case 1: segv = put_user_u8(val, addr); break;
1156 case 2: segv = put_user_u16(val, addr); break;
1157 case 4: segv = put_user_u32(val, addr); break;
1158#if defined(TARGET_PPC64)
1159 case 8: segv = put_user_u64(val, addr); break;
1160#endif
1161 default: abort();
1162 }
1163 if (!segv) {
1164 stored = 1;
1165 }
1166 }
1167 }
1168 env->crf[0] = (stored << 1) | xer_so;
1169 env->reserve_addr = (target_ulong)-1;
1170 }
1171 if (!segv) {
1172 env->nip += 4;
1173 }
1174 mmap_unlock();
1175 end_exclusive();
1176 return segv;
1177}
1178
67867308
FB		 1179void cpu_loop(CPUPPCState *env)
1180{
c227f099 1181 target_siginfo_t info;
61190b14
FB		 1182 int trapnr;
1183 uint32_t ret;
3b46e624 1184
67867308 1185 for(;;) {
56f066bb 1186 cpu_exec_start(env);
67867308 1187 trapnr = cpu_ppc_exec(env);
56f066bb 1188 cpu_exec_end(env);
67867308 1189 switch(trapnr) {
e1833e1f
JM		 1190 case POWERPC_EXCP_NONE:
1191 /* Just go on */
67867308 1192 break;
e1833e1f
JM		 1193 case POWERPC_EXCP_CRITICAL: /* Critical input */
1194 cpu_abort(env, "Critical interrupt while in user mode. "
1195 "Aborting\n");
61190b14 1196 break;
e1833e1f
JM		 1197 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1198 cpu_abort(env, "Machine check exception while in user mode. "
1199 "Aborting\n");
1200 break;
1201 case POWERPC_EXCP_DSI: /* Data storage exception */
90e189ec 1202 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
e1833e1f
JM		 1203 env->spr[SPR_DAR]);
1204 /* XXX: check this. Seems bugged */
2be0071f
FB		 1205 switch (env->error_code & 0xFF000000) {
1206 case 0x40000000:
61190b14
FB		 1207 info.si_signo = TARGET_SIGSEGV;
1208 info.si_errno = 0;
1209 info.si_code = TARGET_SEGV_MAPERR;
1210 break;
2be0071f 1211 case 0x04000000:
61190b14
FB		 1212 info.si_signo = TARGET_SIGILL;
1213 info.si_errno = 0;
1214 info.si_code = TARGET_ILL_ILLADR;
1215 break;
2be0071f 1216 case 0x08000000:
61190b14
FB		 1217 info.si_signo = TARGET_SIGSEGV;
1218 info.si_errno = 0;
1219 info.si_code = TARGET_SEGV_ACCERR;
1220 break;
61190b14
FB		 1221 default:
1222 /* Let's send a regular segfault... */
e1833e1f
JM		 1223 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1224 env->error_code);
61190b14
FB		 1225 info.si_signo = TARGET_SIGSEGV;
1226 info.si_errno = 0;
1227 info.si_code = TARGET_SEGV_MAPERR;
1228 break;
1229 }
67867308 1230 info._sifields._sigfault._addr = env->nip;
624f7979 1231 queue_signal(env, info.si_signo, &info);
67867308 1232 break;
e1833e1f 1233 case POWERPC_EXCP_ISI: /* Instruction storage exception */
90e189ec
BS		 1234 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1235 "\n", env->spr[SPR_SRR0]);
e1833e1f 1236 /* XXX: check this */
2be0071f
FB		 1237 switch (env->error_code & 0xFF000000) {
1238 case 0x40000000:
61190b14 1239 info.si_signo = TARGET_SIGSEGV;
67867308 1240 info.si_errno = 0;
61190b14
FB		 1241 info.si_code = TARGET_SEGV_MAPERR;
1242 break;
2be0071f
FB		 1243 case 0x10000000:
1244 case 0x08000000:
61190b14
FB		 1245 info.si_signo = TARGET_SIGSEGV;
1246 info.si_errno = 0;
1247 info.si_code = TARGET_SEGV_ACCERR;
1248 break;
1249 default:
1250 /* Let's send a regular segfault... */
e1833e1f
JM		 1251 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1252 env->error_code);
61190b14
FB		 1253 info.si_signo = TARGET_SIGSEGV;
1254 info.si_errno = 0;
1255 info.si_code = TARGET_SEGV_MAPERR;
1256 break;
1257 }
1258 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1259 queue_signal(env, info.si_signo, &info);
67867308 1260 break;
e1833e1f
JM		 1261 case POWERPC_EXCP_EXTERNAL: /* External input */
1262 cpu_abort(env, "External interrupt while in user mode. "
1263 "Aborting\n");
1264 break;
1265 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1266 EXCP_DUMP(env, "Unaligned memory access\n");
1267 /* XXX: check this */
61190b14 1268 info.si_signo = TARGET_SIGBUS;
67867308 1269 info.si_errno = 0;
61190b14
FB		 1270 info.si_code = TARGET_BUS_ADRALN;
1271 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1272 queue_signal(env, info.si_signo, &info);
67867308 1273 break;
e1833e1f
JM		 1274 case POWERPC_EXCP_PROGRAM: /* Program exception */
1275 /* XXX: check this */
61190b14 1276 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1277 case POWERPC_EXCP_FP:
1278 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1279 info.si_signo = TARGET_SIGFPE;
1280 info.si_errno = 0;
1281 switch (env->error_code & 0xF) {
e1833e1f 1282 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1283 info.si_code = TARGET_FPE_FLTOVF;
1284 break;
e1833e1f 1285 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1286 info.si_code = TARGET_FPE_FLTUND;
1287 break;
e1833e1f
JM		 1288 case POWERPC_EXCP_FP_ZX:
1289 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1290 info.si_code = TARGET_FPE_FLTDIV;
1291 break;
e1833e1f 1292 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1293 info.si_code = TARGET_FPE_FLTRES;
1294 break;
e1833e1f 1295 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1296 info.si_code = TARGET_FPE_FLTINV;
1297 break;
7c58044c 1298 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1299 case POWERPC_EXCP_FP_VXISI:
1300 case POWERPC_EXCP_FP_VXIDI:
1301 case POWERPC_EXCP_FP_VXIMZ:
1302 case POWERPC_EXCP_FP_VXVC:
1303 case POWERPC_EXCP_FP_VXSQRT:
1304 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1305 info.si_code = TARGET_FPE_FLTSUB;
1306 break;
1307 default:
e1833e1f
JM		 1308 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1309 env->error_code);
1310 break;
61190b14 1311 }
e1833e1f
JM		 1312 break;
1313 case POWERPC_EXCP_INVAL:
1314 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1315 info.si_signo = TARGET_SIGILL;
1316 info.si_errno = 0;
1317 switch (env->error_code & 0xF) {
e1833e1f 1318 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1319 info.si_code = TARGET_ILL_ILLOPC;
1320 break;
e1833e1f 1321 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1322 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1323 break;
e1833e1f 1324 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1325 info.si_code = TARGET_ILL_PRVREG;
1326 break;
e1833e1f 1327 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1328 info.si_code = TARGET_ILL_COPROC;
1329 break;
1330 default:
e1833e1f
JM		 1331 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1332 env->error_code & 0xF);
61190b14
FB		 1333 info.si_code = TARGET_ILL_ILLADR;
1334 break;
1335 }
1336 break;
e1833e1f
JM		 1337 case POWERPC_EXCP_PRIV:
1338 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1339 info.si_signo = TARGET_SIGILL;
1340 info.si_errno = 0;
1341 switch (env->error_code & 0xF) {
e1833e1f 1342 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1343 info.si_code = TARGET_ILL_PRVOPC;
1344 break;
e1833e1f 1345 case POWERPC_EXCP_PRIV_REG:
61190b14 1346 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1347 break;
61190b14 1348 default:
e1833e1f
JM		 1349 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1350 env->error_code & 0xF);
61190b14
FB		 1351 info.si_code = TARGET_ILL_PRVOPC;
1352 break;
1353 }
1354 break;
e1833e1f
JM		 1355 case POWERPC_EXCP_TRAP:
1356 cpu_abort(env, "Tried to call a TRAP\n");
1357 break;
61190b14
FB		 1358 default:
1359 /* Should not happen ! */
e1833e1f
JM		 1360 cpu_abort(env, "Unknown program exception (%02x)\n",
1361 env->error_code);
1362 break;
61190b14
FB		 1363 }
1364 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1365 queue_signal(env, info.si_signo, &info);
67867308 1366 break;
e1833e1f
JM		 1367 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1368 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1369 info.si_signo = TARGET_SIGILL;
67867308 1370 info.si_errno = 0;
61190b14
FB		 1371 info.si_code = TARGET_ILL_COPROC;
1372 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1373 queue_signal(env, info.si_signo, &info);
67867308 1374 break;
e1833e1f
JM		 1375 case POWERPC_EXCP_SYSCALL: /* System call exception */
1376 cpu_abort(env, "Syscall exception while in user mode. "
1377 "Aborting\n");
61190b14 1378 break;
e1833e1f
JM		 1379 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1380 EXCP_DUMP(env, "No APU instruction allowed\n");
1381 info.si_signo = TARGET_SIGILL;
1382 info.si_errno = 0;
1383 info.si_code = TARGET_ILL_COPROC;
1384 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1385 queue_signal(env, info.si_signo, &info);
61190b14 1386 break;
e1833e1f
JM		 1387 case POWERPC_EXCP_DECR: /* Decrementer exception */
1388 cpu_abort(env, "Decrementer interrupt while in user mode. "
1389 "Aborting\n");
61190b14 1390 break;
e1833e1f
JM		 1391 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1392 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1393 "Aborting\n");
1394 break;
1395 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1396 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1397 "Aborting\n");
1398 break;
1399 case POWERPC_EXCP_DTLB: /* Data TLB error */
1400 cpu_abort(env, "Data TLB exception while in user mode. "
1401 "Aborting\n");
1402 break;
1403 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1404 cpu_abort(env, "Instruction TLB exception while in user mode. "
1405 "Aborting\n");
1406 break;
e1833e1f
JM		 1407 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1408 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1409 info.si_signo = TARGET_SIGILL;
1410 info.si_errno = 0;
1411 info.si_code = TARGET_ILL_COPROC;
1412 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1413 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1414 break;
1415 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1416 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1417 break;
1418 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1419 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1420 break;
1421 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1422 cpu_abort(env, "Performance monitor exception not handled\n");
1423 break;
1424 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1425 cpu_abort(env, "Doorbell interrupt while in user mode. "
1426 "Aborting\n");
1427 break;
1428 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1429 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1430 "Aborting\n");
1431 break;
1432 case POWERPC_EXCP_RESET: /* System reset exception */
1433 cpu_abort(env, "Reset interrupt while in user mode. "
1434 "Aborting\n");
1435 break;
e1833e1f
JM		 1436 case POWERPC_EXCP_DSEG: /* Data segment exception */
1437 cpu_abort(env, "Data segment exception while in user mode. "
1438 "Aborting\n");
1439 break;
1440 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1441 cpu_abort(env, "Instruction segment exception "
1442 "while in user mode. Aborting\n");
1443 break;
e85e7c6e 1444 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1445 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1446 cpu_abort(env, "Hypervisor decrementer interrupt "
1447 "while in user mode. Aborting\n");
1448 break;
e1833e1f
JM		 1449 case POWERPC_EXCP_TRACE: /* Trace exception */
1450 /* Nothing to do:
1451 * we use this exception to emulate step-by-step execution mode.
1452 */
1453 break;
e85e7c6e 1454 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1455 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1456 cpu_abort(env, "Hypervisor data storage exception "
1457 "while in user mode. Aborting\n");
1458 break;
1459 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1460 cpu_abort(env, "Hypervisor instruction storage exception "
1461 "while in user mode. Aborting\n");
1462 break;
1463 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1464 cpu_abort(env, "Hypervisor data segment exception "
1465 "while in user mode. Aborting\n");
1466 break;
1467 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1468 cpu_abort(env, "Hypervisor instruction segment exception "
1469 "while in user mode. Aborting\n");
1470 break;
e1833e1f
JM		 1471 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1472 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1473 info.si_signo = TARGET_SIGILL;
1474 info.si_errno = 0;
1475 info.si_code = TARGET_ILL_COPROC;
1476 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1477 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1478 break;
1479 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1480 cpu_abort(env, "Programable interval timer interrupt "
1481 "while in user mode. Aborting\n");
1482 break;
1483 case POWERPC_EXCP_IO: /* IO error exception */
1484 cpu_abort(env, "IO error exception while in user mode. "
1485 "Aborting\n");
1486 break;
1487 case POWERPC_EXCP_RUNM: /* Run mode exception */
1488 cpu_abort(env, "Run mode exception while in user mode. "
1489 "Aborting\n");
1490 break;
1491 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1492 cpu_abort(env, "Emulation trap exception not handled\n");
1493 break;
1494 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1495 cpu_abort(env, "Instruction fetch TLB exception "
1496 "while in user-mode. Aborting");
1497 break;
1498 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1499 cpu_abort(env, "Data load TLB exception while in user-mode. "
1500 "Aborting");
1501 break;
1502 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1503 cpu_abort(env, "Data store TLB exception while in user-mode. "
1504 "Aborting");
1505 break;
1506 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1507 cpu_abort(env, "Floating-point assist exception not handled\n");
1508 break;
1509 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1510 cpu_abort(env, "Instruction address breakpoint exception "
1511 "not handled\n");
1512 break;
1513 case POWERPC_EXCP_SMI: /* System management interrupt */
1514 cpu_abort(env, "System management interrupt while in user mode. "
1515 "Aborting\n");
1516 break;
1517 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1518 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1519 "Aborting\n");
1520 break;
1521 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1522 cpu_abort(env, "Performance monitor exception not handled\n");
1523 break;
1524 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1525 cpu_abort(env, "Vector assist exception not handled\n");
1526 break;
1527 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1528 cpu_abort(env, "Soft patch exception not handled\n");
1529 break;
1530 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1531 cpu_abort(env, "Maintenance exception while in user mode. "
1532 "Aborting\n");
1533 break;
1534 case POWERPC_EXCP_STOP: /* stop translation */
1535 /* We did invalidate the instruction cache. Go on */
1536 break;
1537 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1538 /* We just stopped because of a branch. Go on */
1539 break;
1540 case POWERPC_EXCP_SYSCALL_USER:
1541 /* system call in user-mode emulation */
1542 /* WARNING:
1543 * PPC ABI uses overflow flag in cr0 to signal an error
1544 * in syscalls.
1545 */
1546#if 0
1547 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1548 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1549#endif
1550 env->crf[0] &= ~0x1;
1551 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1552 env->gpr[5], env->gpr[6], env->gpr[7],
1553 env->gpr[8]);
bcd4933a
NF		 1554 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1555 /* Returning from a successful sigreturn syscall.
1556 Avoid corrupting register state. */
1557 break;
1558 }
e1833e1f
JM		 1559 if (ret > (uint32_t)(-515)) {
1560 env->crf[0] |= 0x1;
1561 ret = -ret;
61190b14 1562 }
e1833e1f
JM		 1563 env->gpr[3] = ret;
1564#if 0
1565 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1566#endif
1567 break;
56f066bb
NF		 1568 case POWERPC_EXCP_STCX:
1569 if (do_store_exclusive(env)) {
1570 info.si_signo = TARGET_SIGSEGV;
1571 info.si_errno = 0;
1572 info.si_code = TARGET_SEGV_MAPERR;
1573 info._sifields._sigfault._addr = env->nip;
1574 queue_signal(env, info.si_signo, &info);
1575 }
1576 break;
71f75756
AJ		 1577 case EXCP_DEBUG:
1578 {
1579 int sig;
1580
1581 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1582 if (sig) {
1583 info.si_signo = sig;
1584 info.si_errno = 0;
1585 info.si_code = TARGET_TRAP_BRKPT;
1586 queue_signal(env, info.si_signo, &info);
1587 }
1588 }
1589 break;
56ba31ff
JM		 1590 case EXCP_INTERRUPT:
1591 /* just indicate that signals should be handled asap */
1592 break;
e1833e1f
JM		 1593 default:
1594 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1595 break;
67867308
FB		 1596 }
1597 process_pending_signals(env);
1598 }
1599}
1600#endif
1601
048f6b4d
FB		 1602#ifdef TARGET_MIPS
1603
1604#define MIPS_SYS(name, args) args,
1605
1606static const uint8_t mips_syscall_args[] = {
1607 MIPS_SYS(sys_syscall , 0) /* 4000 */
1608 MIPS_SYS(sys_exit , 1)
1609 MIPS_SYS(sys_fork , 0)
1610 MIPS_SYS(sys_read , 3)
1611 MIPS_SYS(sys_write , 3)
1612 MIPS_SYS(sys_open , 3) /* 4005 */
1613 MIPS_SYS(sys_close , 1)
1614 MIPS_SYS(sys_waitpid , 3)
1615 MIPS_SYS(sys_creat , 2)
1616 MIPS_SYS(sys_link , 2)
1617 MIPS_SYS(sys_unlink , 1) /* 4010 */
1618 MIPS_SYS(sys_execve , 0)
1619 MIPS_SYS(sys_chdir , 1)
1620 MIPS_SYS(sys_time , 1)
1621 MIPS_SYS(sys_mknod , 3)
1622 MIPS_SYS(sys_chmod , 2) /* 4015 */
1623 MIPS_SYS(sys_lchown , 3)
1624 MIPS_SYS(sys_ni_syscall , 0)
1625 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1626 MIPS_SYS(sys_lseek , 3)
1627 MIPS_SYS(sys_getpid , 0) /* 4020 */
1628 MIPS_SYS(sys_mount , 5)
1629 MIPS_SYS(sys_oldumount , 1)
1630 MIPS_SYS(sys_setuid , 1)
1631 MIPS_SYS(sys_getuid , 0)
1632 MIPS_SYS(sys_stime , 1) /* 4025 */
1633 MIPS_SYS(sys_ptrace , 4)
1634 MIPS_SYS(sys_alarm , 1)
1635 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1636 MIPS_SYS(sys_pause , 0)
1637 MIPS_SYS(sys_utime , 2) /* 4030 */
1638 MIPS_SYS(sys_ni_syscall , 0)
1639 MIPS_SYS(sys_ni_syscall , 0)
1640 MIPS_SYS(sys_access , 2)
1641 MIPS_SYS(sys_nice , 1)
1642 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1643 MIPS_SYS(sys_sync , 0)
1644 MIPS_SYS(sys_kill , 2)
1645 MIPS_SYS(sys_rename , 2)
1646 MIPS_SYS(sys_mkdir , 2)
1647 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1648 MIPS_SYS(sys_dup , 1)
1649 MIPS_SYS(sys_pipe , 0)
1650 MIPS_SYS(sys_times , 1)
1651 MIPS_SYS(sys_ni_syscall , 0)
1652 MIPS_SYS(sys_brk , 1) /* 4045 */
1653 MIPS_SYS(sys_setgid , 1)
1654 MIPS_SYS(sys_getgid , 0)
1655 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1656 MIPS_SYS(sys_geteuid , 0)
1657 MIPS_SYS(sys_getegid , 0) /* 4050 */
1658 MIPS_SYS(sys_acct , 0)
1659 MIPS_SYS(sys_umount , 2)
1660 MIPS_SYS(sys_ni_syscall , 0)
1661 MIPS_SYS(sys_ioctl , 3)
1662 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1663 MIPS_SYS(sys_ni_syscall , 2)
1664 MIPS_SYS(sys_setpgid , 2)
1665 MIPS_SYS(sys_ni_syscall , 0)
1666 MIPS_SYS(sys_olduname , 1)
1667 MIPS_SYS(sys_umask , 1) /* 4060 */
1668 MIPS_SYS(sys_chroot , 1)
1669 MIPS_SYS(sys_ustat , 2)
1670 MIPS_SYS(sys_dup2 , 2)
1671 MIPS_SYS(sys_getppid , 0)
1672 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1673 MIPS_SYS(sys_setsid , 0)
1674 MIPS_SYS(sys_sigaction , 3)
1675 MIPS_SYS(sys_sgetmask , 0)
1676 MIPS_SYS(sys_ssetmask , 1)
1677 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1678 MIPS_SYS(sys_setregid , 2)
1679 MIPS_SYS(sys_sigsuspend , 0)
1680 MIPS_SYS(sys_sigpending , 1)
1681 MIPS_SYS(sys_sethostname , 2)
1682 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1683 MIPS_SYS(sys_getrlimit , 2)
1684 MIPS_SYS(sys_getrusage , 2)
1685 MIPS_SYS(sys_gettimeofday, 2)
1686 MIPS_SYS(sys_settimeofday, 2)
1687 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1688 MIPS_SYS(sys_setgroups , 2)
1689 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1690 MIPS_SYS(sys_symlink , 2)
1691 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1692 MIPS_SYS(sys_readlink , 3) /* 4085 */
1693 MIPS_SYS(sys_uselib , 1)
1694 MIPS_SYS(sys_swapon , 2)
1695 MIPS_SYS(sys_reboot , 3)
1696 MIPS_SYS(old_readdir , 3)
1697 MIPS_SYS(old_mmap , 6) /* 4090 */
1698 MIPS_SYS(sys_munmap , 2)
1699 MIPS_SYS(sys_truncate , 2)
1700 MIPS_SYS(sys_ftruncate , 2)
1701 MIPS_SYS(sys_fchmod , 2)
1702 MIPS_SYS(sys_fchown , 3) /* 4095 */
1703 MIPS_SYS(sys_getpriority , 2)
1704 MIPS_SYS(sys_setpriority , 3)
1705 MIPS_SYS(sys_ni_syscall , 0)
1706 MIPS_SYS(sys_statfs , 2)
1707 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1708 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1709 MIPS_SYS(sys_socketcall , 2)
1710 MIPS_SYS(sys_syslog , 3)
1711 MIPS_SYS(sys_setitimer , 3)
1712 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1713 MIPS_SYS(sys_newstat , 2)
1714 MIPS_SYS(sys_newlstat , 2)
1715 MIPS_SYS(sys_newfstat , 2)
1716 MIPS_SYS(sys_uname , 1)
1717 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1718 MIPS_SYS(sys_vhangup , 0)
1719 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1720 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1721 MIPS_SYS(sys_wait4 , 4)
1722 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1723 MIPS_SYS(sys_sysinfo , 1)
1724 MIPS_SYS(sys_ipc , 6)
1725 MIPS_SYS(sys_fsync , 1)
1726 MIPS_SYS(sys_sigreturn , 0)
18113962 1727 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1728 MIPS_SYS(sys_setdomainname, 2)
1729 MIPS_SYS(sys_newuname , 1)
1730 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1731 MIPS_SYS(sys_adjtimex , 1)
1732 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1733 MIPS_SYS(sys_sigprocmask , 3)
1734 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1735 MIPS_SYS(sys_init_module , 5)
1736 MIPS_SYS(sys_delete_module, 1)
1737 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1738 MIPS_SYS(sys_quotactl , 0)
1739 MIPS_SYS(sys_getpgid , 1)
1740 MIPS_SYS(sys_fchdir , 1)
1741 MIPS_SYS(sys_bdflush , 2)
1742 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1743 MIPS_SYS(sys_personality , 1)
1744 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1745 MIPS_SYS(sys_setfsuid , 1)
1746 MIPS_SYS(sys_setfsgid , 1)
1747 MIPS_SYS(sys_llseek , 5) /* 4140 */
1748 MIPS_SYS(sys_getdents , 3)
1749 MIPS_SYS(sys_select , 5)
1750 MIPS_SYS(sys_flock , 2)
1751 MIPS_SYS(sys_msync , 3)
1752 MIPS_SYS(sys_readv , 3) /* 4145 */
1753 MIPS_SYS(sys_writev , 3)
1754 MIPS_SYS(sys_cacheflush , 3)
1755 MIPS_SYS(sys_cachectl , 3)
1756 MIPS_SYS(sys_sysmips , 4)
1757 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1758 MIPS_SYS(sys_getsid , 1)
1759 MIPS_SYS(sys_fdatasync , 0)
1760 MIPS_SYS(sys_sysctl , 1)
1761 MIPS_SYS(sys_mlock , 2)
1762 MIPS_SYS(sys_munlock , 2) /* 4155 */
1763 MIPS_SYS(sys_mlockall , 1)
1764 MIPS_SYS(sys_munlockall , 0)
1765 MIPS_SYS(sys_sched_setparam, 2)
1766 MIPS_SYS(sys_sched_getparam, 2)
1767 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1768 MIPS_SYS(sys_sched_getscheduler, 1)
1769 MIPS_SYS(sys_sched_yield , 0)
1770 MIPS_SYS(sys_sched_get_priority_max, 1)
1771 MIPS_SYS(sys_sched_get_priority_min, 1)
1772 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1773 MIPS_SYS(sys_nanosleep, 2)
1774 MIPS_SYS(sys_mremap , 4)
1775 MIPS_SYS(sys_accept , 3)
1776 MIPS_SYS(sys_bind , 3)
1777 MIPS_SYS(sys_connect , 3) /* 4170 */
1778 MIPS_SYS(sys_getpeername , 3)
1779 MIPS_SYS(sys_getsockname , 3)
1780 MIPS_SYS(sys_getsockopt , 5)
1781 MIPS_SYS(sys_listen , 2)
1782 MIPS_SYS(sys_recv , 4) /* 4175 */
1783 MIPS_SYS(sys_recvfrom , 6)
1784 MIPS_SYS(sys_recvmsg , 3)
1785 MIPS_SYS(sys_send , 4)
1786 MIPS_SYS(sys_sendmsg , 3)
1787 MIPS_SYS(sys_sendto , 6) /* 4180 */
1788 MIPS_SYS(sys_setsockopt , 5)
1789 MIPS_SYS(sys_shutdown , 2)
1790 MIPS_SYS(sys_socket , 3)
1791 MIPS_SYS(sys_socketpair , 4)
1792 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1793 MIPS_SYS(sys_getresuid , 3)
1794 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1795 MIPS_SYS(sys_poll , 3)
1796 MIPS_SYS(sys_nfsservctl , 3)
1797 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1798 MIPS_SYS(sys_getresgid , 3)
1799 MIPS_SYS(sys_prctl , 5)
1800 MIPS_SYS(sys_rt_sigreturn, 0)
1801 MIPS_SYS(sys_rt_sigaction, 4)
1802 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1803 MIPS_SYS(sys_rt_sigpending, 2)
1804 MIPS_SYS(sys_rt_sigtimedwait, 4)
1805 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1806 MIPS_SYS(sys_rt_sigsuspend, 0)
1807 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1808 MIPS_SYS(sys_pwrite64 , 6)
1809 MIPS_SYS(sys_chown , 3)
1810 MIPS_SYS(sys_getcwd , 2)
1811 MIPS_SYS(sys_capget , 2)
1812 MIPS_SYS(sys_capset , 2) /* 4205 */
1813 MIPS_SYS(sys_sigaltstack , 0)
1814 MIPS_SYS(sys_sendfile , 4)
1815 MIPS_SYS(sys_ni_syscall , 0)
1816 MIPS_SYS(sys_ni_syscall , 0)
1817 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1818 MIPS_SYS(sys_truncate64 , 4)
1819 MIPS_SYS(sys_ftruncate64 , 4)
1820 MIPS_SYS(sys_stat64 , 2)
1821 MIPS_SYS(sys_lstat64 , 2)
1822 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1823 MIPS_SYS(sys_pivot_root , 2)
1824 MIPS_SYS(sys_mincore , 3)
1825 MIPS_SYS(sys_madvise , 3)
1826 MIPS_SYS(sys_getdents64 , 3)
1827 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1828 MIPS_SYS(sys_ni_syscall , 0)
1829 MIPS_SYS(sys_gettid , 0)
1830 MIPS_SYS(sys_readahead , 5)
1831 MIPS_SYS(sys_setxattr , 5)
1832 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1833 MIPS_SYS(sys_fsetxattr , 5)
1834 MIPS_SYS(sys_getxattr , 4)
1835 MIPS_SYS(sys_lgetxattr , 4)
1836 MIPS_SYS(sys_fgetxattr , 4)
1837 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1838 MIPS_SYS(sys_llistxattr , 3)
1839 MIPS_SYS(sys_flistxattr , 3)
1840 MIPS_SYS(sys_removexattr , 2)
1841 MIPS_SYS(sys_lremovexattr, 2)
1842 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1843 MIPS_SYS(sys_tkill , 2)
1844 MIPS_SYS(sys_sendfile64 , 5)
1845 MIPS_SYS(sys_futex , 2)
1846 MIPS_SYS(sys_sched_setaffinity, 3)
1847 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1848 MIPS_SYS(sys_io_setup , 2)
1849 MIPS_SYS(sys_io_destroy , 1)
1850 MIPS_SYS(sys_io_getevents, 5)
1851 MIPS_SYS(sys_io_submit , 3)
1852 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1853 MIPS_SYS(sys_exit_group , 1)
1854 MIPS_SYS(sys_lookup_dcookie, 3)
1855 MIPS_SYS(sys_epoll_create, 1)
1856 MIPS_SYS(sys_epoll_ctl , 4)
1857 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1858 MIPS_SYS(sys_remap_file_pages, 5)
1859 MIPS_SYS(sys_set_tid_address, 1)
1860 MIPS_SYS(sys_restart_syscall, 0)
1861 MIPS_SYS(sys_fadvise64_64, 7)
1862 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1863 MIPS_SYS(sys_fstatfs64 , 2)
1864 MIPS_SYS(sys_timer_create, 3)
1865 MIPS_SYS(sys_timer_settime, 4)
1866 MIPS_SYS(sys_timer_gettime, 2)
1867 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1868 MIPS_SYS(sys_timer_delete, 1)
1869 MIPS_SYS(sys_clock_settime, 2)
1870 MIPS_SYS(sys_clock_gettime, 2)
1871 MIPS_SYS(sys_clock_getres, 2)
1872 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1873 MIPS_SYS(sys_tgkill , 3)
1874 MIPS_SYS(sys_utimes , 2)
1875 MIPS_SYS(sys_mbind , 4)
1876 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1877 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1878 MIPS_SYS(sys_mq_open , 4)
1879 MIPS_SYS(sys_mq_unlink , 1)
1880 MIPS_SYS(sys_mq_timedsend, 5)
1881 MIPS_SYS(sys_mq_timedreceive, 5)
1882 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1883 MIPS_SYS(sys_mq_getsetattr, 3)
1884 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1885 MIPS_SYS(sys_waitid , 4)
1886 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1887 MIPS_SYS(sys_add_key , 5)
388bb21a 1888 MIPS_SYS(sys_request_key, 4)
048f6b4d 1889 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 1890 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 1891 MIPS_SYS(sys_inotify_init, 0)
1892 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1893 MIPS_SYS(sys_inotify_rm_watch, 2)
1894 MIPS_SYS(sys_migrate_pages, 4)
1895 MIPS_SYS(sys_openat, 4)
1896 MIPS_SYS(sys_mkdirat, 3)
1897 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1898 MIPS_SYS(sys_fchownat, 5)
1899 MIPS_SYS(sys_futimesat, 3)
1900 MIPS_SYS(sys_fstatat64, 4)
1901 MIPS_SYS(sys_unlinkat, 3)
1902 MIPS_SYS(sys_renameat, 4) /* 4295 */
1903 MIPS_SYS(sys_linkat, 5)
1904 MIPS_SYS(sys_symlinkat, 3)
1905 MIPS_SYS(sys_readlinkat, 4)
1906 MIPS_SYS(sys_fchmodat, 3)
1907 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1908 MIPS_SYS(sys_pselect6, 6)
1909 MIPS_SYS(sys_ppoll, 5)
1910 MIPS_SYS(sys_unshare, 1)
1911 MIPS_SYS(sys_splice, 4)
1912 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1913 MIPS_SYS(sys_tee, 4)
1914 MIPS_SYS(sys_vmsplice, 4)
1915 MIPS_SYS(sys_move_pages, 6)
1916 MIPS_SYS(sys_set_robust_list, 2)
1917 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1918 MIPS_SYS(sys_kexec_load, 4)
1919 MIPS_SYS(sys_getcpu, 3)
1920 MIPS_SYS(sys_epoll_pwait, 6)
1921 MIPS_SYS(sys_ioprio_set, 3)
1922 MIPS_SYS(sys_ioprio_get, 2)
048f6b4d
FB		 1923};
1924
1925#undef MIPS_SYS
1926
590bc601
PB		 1927static int do_store_exclusive(CPUMIPSState *env)
1928{
1929 target_ulong addr;
1930 target_ulong page_addr;
1931 target_ulong val;
1932 int flags;
1933 int segv = 0;
1934 int reg;
1935 int d;
1936
5499b6ff 1937 addr = env->lladdr;
590bc601
PB		 1938 page_addr = addr & TARGET_PAGE_MASK;
1939 start_exclusive();
1940 mmap_lock();
1941 flags = page_get_flags(page_addr);
1942 if ((flags & PAGE_READ) == 0) {
1943 segv = 1;
1944 } else {
1945 reg = env->llreg & 0x1f;
1946 d = (env->llreg & 0x20) != 0;
1947 if (d) {
1948 segv = get_user_s64(val, addr);
1949 } else {
1950 segv = get_user_s32(val, addr);
1951 }
1952 if (!segv) {
1953 if (val != env->llval) {
1954 env->active_tc.gpr[reg] = 0;
1955 } else {
1956 if (d) {
1957 segv = put_user_u64(env->llnewval, addr);
1958 } else {
1959 segv = put_user_u32(env->llnewval, addr);
1960 }
1961 if (!segv) {
1962 env->active_tc.gpr[reg] = 1;
1963 }
1964 }
1965 }
1966 }
5499b6ff 1967 env->lladdr = -1;
590bc601
PB		 1968 if (!segv) {
1969 env->active_tc.PC += 4;
1970 }
1971 mmap_unlock();
1972 end_exclusive();
1973 return segv;
1974}
1975
048f6b4d
FB		 1976void cpu_loop(CPUMIPSState *env)
1977{
c227f099 1978 target_siginfo_t info;
388bb21a 1979 int trapnr, ret;
048f6b4d 1980 unsigned int syscall_num;
048f6b4d
FB		 1981
1982 for(;;) {
590bc601 1983 cpu_exec_start(env);
048f6b4d 1984 trapnr = cpu_mips_exec(env);
590bc601 1985 cpu_exec_end(env);
048f6b4d
FB		 1986 switch(trapnr) {
1987 case EXCP_SYSCALL:
b5dc7732
TS		 1988 syscall_num = env->active_tc.gpr[2] - 4000;
1989 env->active_tc.PC += 4;
388bb21a
TS		 1990 if (syscall_num >= sizeof(mips_syscall_args)) {
1991 ret = -ENOSYS;
1992 } else {
1993 int nb_args;
992f48a0
BS		 1994 abi_ulong sp_reg;
1995 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 1996
1997 nb_args = mips_syscall_args[syscall_num];
b5dc7732 1998 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 1999 switch (nb_args) {
2000 /* these arguments are taken from the stack */
2f619698
FB		 2001 /* FIXME - what to do if get_user() fails? */
2002 case 8: get_user_ual(arg8, sp_reg + 28);
2003 case 7: get_user_ual(arg7, sp_reg + 24);
2004 case 6: get_user_ual(arg6, sp_reg + 20);
2005 case 5: get_user_ual(arg5, sp_reg + 16);
388bb21a
TS		 2006 default:
2007 break;
048f6b4d 2008 }
b5dc7732
TS		 2009 ret = do_syscall(env, env->active_tc.gpr[2],
2010 env->active_tc.gpr[4],
2011 env->active_tc.gpr[5],
2012 env->active_tc.gpr[6],
2013 env->active_tc.gpr[7],
388bb21a
TS		 2014 arg5, arg6/*, arg7, arg8*/);
2015 }
0b1bcb00
PB		 2016 if (ret == -TARGET_QEMU_ESIGRETURN) {
2017 /* Returning from a successful sigreturn syscall.
2018 Avoid clobbering register state. */
2019 break;
2020 }
388bb21a 2021 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 2022 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 2023 ret = -ret;
2024 } else {
b5dc7732 2025 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 2026 }
b5dc7732 2027 env->active_tc.gpr[2] = ret;
048f6b4d 2028 break;
ca7c2b1b
TS		 2029 case EXCP_TLBL:
2030 case EXCP_TLBS:
e4474235
PB		 2031 info.si_signo = TARGET_SIGSEGV;
2032 info.si_errno = 0;
2033 /* XXX: check env->error_code */
2034 info.si_code = TARGET_SEGV_MAPERR;
2035 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2036 queue_signal(env, info.si_signo, &info);
2037 break;
6900e84b 2038 case EXCP_CpU:
048f6b4d 2039 case EXCP_RI:
bc1ad2de
FB		 2040 info.si_signo = TARGET_SIGILL;
2041 info.si_errno = 0;
2042 info.si_code = 0;
624f7979 2043 queue_signal(env, info.si_signo, &info);
048f6b4d 2044 break;
106ec879
FB		 2045 case EXCP_INTERRUPT:
2046 /* just indicate that signals should be handled asap */
2047 break;
d08b2a28
PB		 2048 case EXCP_DEBUG:
2049 {
2050 int sig;
2051
2052 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2053 if (sig)
2054 {
2055 info.si_signo = sig;
2056 info.si_errno = 0;
2057 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2058 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 2059 }
2060 }
2061 break;
590bc601
PB		 2062 case EXCP_SC:
2063 if (do_store_exclusive(env)) {
2064 info.si_signo = TARGET_SIGSEGV;
2065 info.si_errno = 0;
2066 info.si_code = TARGET_SEGV_MAPERR;
2067 info._sifields._sigfault._addr = env->active_tc.PC;
2068 queue_signal(env, info.si_signo, &info);
2069 }
2070 break;
048f6b4d
FB		 2071 default:
2072 // error:
5fafdf24 2073 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 2074 trapnr);
2075 cpu_dump_state(env, stderr, fprintf, 0);
2076 abort();
2077 }
2078 process_pending_signals(env);
2079 }
2080}
2081#endif
2082
fdf9b3e8
FB		 2083#ifdef TARGET_SH4
2084void cpu_loop (CPUState *env)
2085{
2086 int trapnr, ret;
c227f099 2087 target_siginfo_t info;
3b46e624 2088
fdf9b3e8
FB		 2089 while (1) {
2090 trapnr = cpu_sh4_exec (env);
3b46e624 2091
fdf9b3e8
FB		 2092 switch (trapnr) {
2093 case 0x160:
0b6d3ae0 2094 env->pc += 2;
5fafdf24
TS		 2095 ret = do_syscall(env,
2096 env->gregs[3],
2097 env->gregs[4],
2098 env->gregs[5],
2099 env->gregs[6],
2100 env->gregs[7],
2101 env->gregs[0],
fca743f3 2102 env->gregs[1]);
9c2a9ea1 2103 env->gregs[0] = ret;
fdf9b3e8 2104 break;
c3b5bc8a
TS		 2105 case EXCP_INTERRUPT:
2106 /* just indicate that signals should be handled asap */
2107 break;
355fb23d
PB		 2108 case EXCP_DEBUG:
2109 {
2110 int sig;
2111
2112 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2113 if (sig)
2114 {
2115 info.si_signo = sig;
2116 info.si_errno = 0;
2117 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2118 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 2119 }
2120 }
2121 break;
c3b5bc8a
TS		 2122 case 0xa0:
2123 case 0xc0:
2124 info.si_signo = SIGSEGV;
2125 info.si_errno = 0;
2126 info.si_code = TARGET_SEGV_MAPERR;
2127 info._sifields._sigfault._addr = env->tea;
624f7979 2128 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 2129 break;
2130
fdf9b3e8
FB		 2131 default:
2132 printf ("Unhandled trap: 0x%x\n", trapnr);
2133 cpu_dump_state(env, stderr, fprintf, 0);
2134 exit (1);
2135 }
2136 process_pending_signals (env);
2137 }
2138}
2139#endif
2140
48733d19
TS		 2141#ifdef TARGET_CRIS
2142void cpu_loop (CPUState *env)
2143{
2144 int trapnr, ret;
c227f099 2145 target_siginfo_t info;
48733d19
TS		 2146
2147 while (1) {
2148 trapnr = cpu_cris_exec (env);
2149 switch (trapnr) {
2150 case 0xaa:
2151 {
2152 info.si_signo = SIGSEGV;
2153 info.si_errno = 0;
2154 /* XXX: check env->error_code */
2155 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2156 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 2157 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2158 }
2159 break;
b6d3abda
EI		 2160 case EXCP_INTERRUPT:
2161 /* just indicate that signals should be handled asap */
2162 break;
48733d19
TS		 2163 case EXCP_BREAK:
2164 ret = do_syscall(env,
2165 env->regs[9],
2166 env->regs[10],
2167 env->regs[11],
2168 env->regs[12],
2169 env->regs[13],
2170 env->pregs[7],
2171 env->pregs[11]);
2172 env->regs[10] = ret;
48733d19
TS		 2173 break;
2174 case EXCP_DEBUG:
2175 {
2176 int sig;
2177
2178 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2179 if (sig)
2180 {
2181 info.si_signo = sig;
2182 info.si_errno = 0;
2183 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2184 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2185 }
2186 }
2187 break;
2188 default:
2189 printf ("Unhandled trap: 0x%x\n", trapnr);
2190 cpu_dump_state(env, stderr, fprintf, 0);
2191 exit (1);
2192 }
2193 process_pending_signals (env);
2194 }
2195}
2196#endif
2197
b779e29e
EI		 2198#ifdef TARGET_MICROBLAZE
2199void cpu_loop (CPUState *env)
2200{
2201 int trapnr, ret;
c227f099 2202 target_siginfo_t info;
b779e29e
EI		 2203
2204 while (1) {
2205 trapnr = cpu_mb_exec (env);
2206 switch (trapnr) {
2207 case 0xaa:
2208 {
2209 info.si_signo = SIGSEGV;
2210 info.si_errno = 0;
2211 /* XXX: check env->error_code */
2212 info.si_code = TARGET_SEGV_MAPERR;
2213 info._sifields._sigfault._addr = 0;
2214 queue_signal(env, info.si_signo, &info);
2215 }
2216 break;
2217 case EXCP_INTERRUPT:
2218 /* just indicate that signals should be handled asap */
2219 break;
2220 case EXCP_BREAK:
2221 /* Return address is 4 bytes after the call. */
2222 env->regs[14] += 4;
2223 ret = do_syscall(env,
2224 env->regs[12],
2225 env->regs[5],
2226 env->regs[6],
2227 env->regs[7],
2228 env->regs[8],
2229 env->regs[9],
2230 env->regs[10]);
2231 env->regs[3] = ret;
2232 env->sregs[SR_PC] = env->regs[14];
2233 break;
2234 case EXCP_DEBUG:
2235 {
2236 int sig;
2237
2238 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2239 if (sig)
2240 {
2241 info.si_signo = sig;
2242 info.si_errno = 0;
2243 info.si_code = TARGET_TRAP_BRKPT;
2244 queue_signal(env, info.si_signo, &info);
2245 }
2246 }
2247 break;
2248 default:
2249 printf ("Unhandled trap: 0x%x\n", trapnr);
2250 cpu_dump_state(env, stderr, fprintf, 0);
2251 exit (1);
2252 }
2253 process_pending_signals (env);
2254 }
2255}
2256#endif
2257
e6e5906b
PB		 2258#ifdef TARGET_M68K
2259
2260void cpu_loop(CPUM68KState *env)
2261{
2262 int trapnr;
2263 unsigned int n;
c227f099 2264 target_siginfo_t info;
e6e5906b 2265 TaskState *ts = env->opaque;
3b46e624 2266
e6e5906b
PB		 2267 for(;;) {
2268 trapnr = cpu_m68k_exec(env);
2269 switch(trapnr) {
2270 case EXCP_ILLEGAL:
2271 {
2272 if (ts->sim_syscalls) {
2273 uint16_t nr;
2274 nr = lduw(env->pc + 2);
2275 env->pc += 4;
2276 do_m68k_simcall(env, nr);
2277 } else {
2278 goto do_sigill;
2279 }
2280 }
2281 break;
a87295e8 2282 case EXCP_HALT_INSN:
e6e5906b 2283 /* Semihosing syscall. */
a87295e8 2284 env->pc += 4;
e6e5906b
PB		 2285 do_m68k_semihosting(env, env->dregs[0]);
2286 break;
2287 case EXCP_LINEA:
2288 case EXCP_LINEF:
2289 case EXCP_UNSUPPORTED:
2290 do_sigill:
2291 info.si_signo = SIGILL;
2292 info.si_errno = 0;
2293 info.si_code = TARGET_ILL_ILLOPN;
2294 info._sifields._sigfault._addr = env->pc;
624f7979 2295 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2296 break;
2297 case EXCP_TRAP0:
2298 {
2299 ts->sim_syscalls = 0;
2300 n = env->dregs[0];
2301 env->pc += 2;
5fafdf24
TS		 2302 env->dregs[0] = do_syscall(env,
2303 n,
e6e5906b
PB		 2304 env->dregs[1],
2305 env->dregs[2],
2306 env->dregs[3],
2307 env->dregs[4],
2308 env->dregs[5],
bb7ec043 2309 env->aregs[0]);
e6e5906b
PB		 2310 }
2311 break;
2312 case EXCP_INTERRUPT:
2313 /* just indicate that signals should be handled asap */
2314 break;
2315 case EXCP_ACCESS:
2316 {
2317 info.si_signo = SIGSEGV;
2318 info.si_errno = 0;
2319 /* XXX: check env->error_code */
2320 info.si_code = TARGET_SEGV_MAPERR;
2321 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2322 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2323 }
2324 break;
2325 case EXCP_DEBUG:
2326 {
2327 int sig;
2328
2329 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2330 if (sig)
2331 {
2332 info.si_signo = sig;
2333 info.si_errno = 0;
2334 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2335 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2336 }
2337 }
2338 break;
2339 default:
5fafdf24 2340 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2341 trapnr);
2342 cpu_dump_state(env, stderr, fprintf, 0);
2343 abort();
2344 }
2345 process_pending_signals(env);
2346 }
2347}
2348#endif /* TARGET_M68K */
2349
7a3148a9
JM		 2350#ifdef TARGET_ALPHA
2351void cpu_loop (CPUState *env)
2352{
e96efcfc 2353 int trapnr;
c227f099 2354 target_siginfo_t info;
6049f4f8 2355 abi_long sysret;
3b46e624 2356
7a3148a9
JM		 2357 while (1) {
2358 trapnr = cpu_alpha_exec (env);
3b46e624 2359
7a3148a9
JM		 2360 switch (trapnr) {
2361 case EXCP_RESET:
2362 fprintf(stderr, "Reset requested. Exit\n");
2363 exit(1);
2364 break;
2365 case EXCP_MCHK:
2366 fprintf(stderr, "Machine check exception. Exit\n");
2367 exit(1);
2368 break;
2369 case EXCP_ARITH:
6049f4f8
RH		 2370 info.si_signo = TARGET_SIGFPE;
2371 info.si_errno = 0;
2372 info.si_code = TARGET_FPE_FLTINV;
2373 info._sifields._sigfault._addr = env->pc;
2374 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2375 break;
2376 case EXCP_HW_INTERRUPT:
5fafdf24 2377 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2378 exit(1);
2379 break;
2380 case EXCP_DFAULT:
6049f4f8
RH		 2381 info.si_signo = TARGET_SIGSEGV;
2382 info.si_errno = 0;
2383 info.si_code = 0; /* ??? SEGV_MAPERR vs SEGV_ACCERR. */
2384 info._sifields._sigfault._addr = env->pc;
2385 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2386 break;
2387 case EXCP_DTB_MISS_PAL:
2388 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2389 exit(1);
2390 break;
2391 case EXCP_ITB_MISS:
2392 fprintf(stderr, "MMU instruction TLB miss\n");
2393 exit(1);
2394 break;
2395 case EXCP_ITB_ACV:
2396 fprintf(stderr, "MMU instruction access violation\n");
2397 exit(1);
2398 break;
2399 case EXCP_DTB_MISS_NATIVE:
2400 fprintf(stderr, "MMU data TLB miss\n");
2401 exit(1);
2402 break;
2403 case EXCP_UNALIGN:
6049f4f8
RH		 2404 info.si_signo = TARGET_SIGBUS;
2405 info.si_errno = 0;
2406 info.si_code = TARGET_BUS_ADRALN;
2407 info._sifields._sigfault._addr = env->pc;
2408 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2409 break;
2410 case EXCP_OPCDEC:
6049f4f8
RH		 2411 do_sigill:
2412 info.si_signo = TARGET_SIGILL;
2413 info.si_errno = 0;
2414 info.si_code = TARGET_ILL_ILLOPC;
2415 info._sifields._sigfault._addr = env->pc;
2416 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2417 break;
2418 case EXCP_FEN:
6049f4f8 2419 /* No-op. Linux simply re-enables the FPU. */
7a3148a9
JM		 2420 break;
2421 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
6049f4f8
RH		 2422 switch ((trapnr >> 6) | 0x80) {
2423 case 0x80:
2424 /* BPT */
2425 info.si_signo = TARGET_SIGTRAP;
2426 info.si_errno = 0;
2427 info.si_code = TARGET_TRAP_BRKPT;
2428 info._sifields._sigfault._addr = env->pc;
2429 queue_signal(env, info.si_signo, &info);
2430 break;
2431 case 0x81:
2432 /* BUGCHK */
2433 info.si_signo = TARGET_SIGTRAP;
2434 info.si_errno = 0;
2435 info.si_code = 0;
2436 info._sifields._sigfault._addr = env->pc;
2437 queue_signal(env, info.si_signo, &info);
2438 break;
2439 case 0x83:
2440 /* CALLSYS */
2441 trapnr = env->ir[IR_V0];
2442 sysret = do_syscall(env, trapnr,
2443 env->ir[IR_A0], env->ir[IR_A1],
2444 env->ir[IR_A2], env->ir[IR_A3],
2445 env->ir[IR_A4], env->ir[IR_A5]);
2446 if (trapnr != TARGET_NR_sigreturn
2447 && trapnr != TARGET_NR_rt_sigreturn) {
2448 env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
2449 env->ir[IR_A3] = (sysret < 0);
2450 }
2451 break;
2452 case 0x86:
2453 /* IMB */
2454 /* ??? We can probably elide the code using page_unprotect
2455 that is checking for self-modifying code. Instead we
2456 could simply call tb_flush here. Until we work out the
2457 changes required to turn off the extra write protection,
2458 this can be a no-op. */
2459 break;
2460 case 0x9E:
2461 /* RDUNIQUE */
2462 /* Handled in the translator for usermode. */
2463 abort();
2464 case 0x9F:
2465 /* WRUNIQUE */
2466 /* Handled in the translator for usermode. */
2467 abort();
2468 case 0xAA:
2469 /* GENTRAP */
2470 info.si_signo = TARGET_SIGFPE;
2471 switch (env->ir[IR_A0]) {
2472 case TARGET_GEN_INTOVF:
2473 info.si_code = TARGET_FPE_INTOVF;
2474 break;
2475 case TARGET_GEN_INTDIV:
2476 info.si_code = TARGET_FPE_INTDIV;
2477 break;
2478 case TARGET_GEN_FLTOVF:
2479 info.si_code = TARGET_FPE_FLTOVF;
2480 break;
2481 case TARGET_GEN_FLTUND:
2482 info.si_code = TARGET_FPE_FLTUND;
2483 break;
2484 case TARGET_GEN_FLTINV:
2485 info.si_code = TARGET_FPE_FLTINV;
2486 break;
2487 case TARGET_GEN_FLTINE:
2488 info.si_code = TARGET_FPE_FLTRES;
2489 break;
2490 case TARGET_GEN_ROPRAND:
2491 info.si_code = 0;
2492 break;
2493 default:
2494 info.si_signo = TARGET_SIGTRAP;
2495 info.si_code = 0;
2496 break;
2497 }
2498 info.si_errno = 0;
2499 info._sifields._sigfault._addr = env->pc;
2500 queue_signal(env, info.si_signo, &info);
2501 break;
2502 default:
2503 goto do_sigill;
2504 }
7a3148a9
JM		 2505 break;
2506 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
6049f4f8 2507 goto do_sigill;
7a3148a9 2508 case EXCP_DEBUG:
6049f4f8
RH		 2509 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2510 if (info.si_signo) {
2511 info.si_errno = 0;
2512 info.si_code = TARGET_TRAP_BRKPT;
2513 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2514 }
2515 break;
2516 default:
2517 printf ("Unhandled trap: 0x%x\n", trapnr);
2518 cpu_dump_state(env, stderr, fprintf, 0);
2519 exit (1);
2520 }
2521 process_pending_signals (env);
2522 }
2523}
2524#endif /* TARGET_ALPHA */
2525
8fcd3692 2526static void usage(void)
31e31b8a 2527{
4a19f1ec 2528 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
68d0f70e 2529 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
b346ff46 2530 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 2531 "\n"
68d0f70e 2532 "Standard options:\n"
b12b6a18
TS		 2533 "-h print this help\n"
2534 "-g port wait gdb connection to port\n"
2535 "-L path set the elf interpreter prefix (default=%s)\n"
2536 "-s size set the stack size in bytes (default=%ld)\n"
2537 "-cpu model select CPU (-cpu ? for list)\n"
2538 "-drop-ld-preload drop LD_PRELOAD for target process\n"
04a6dfeb
AJ		 2539 "-E var=value sets/modifies targets environment variable(s)\n"
2540 "-U var unsets targets environment variable(s)\n"
7d8cec95 2541 "-0 argv0 forces target process argv[0] to be argv0\n"
379f6698
PB		 2542#if defined(CONFIG_USE_GUEST_BASE)
2543 "-B address set guest_base address to address\n"
2544#endif
54936004 2545 "\n"
68d0f70e 2546 "Debug options:\n"
6f1f31c0 2547 "-d options activate log (logfile=%s)\n"
b6741956 2548 "-p pagesize set the host page size to 'pagesize'\n"
1b530a6d 2549 "-singlestep always run in singlestep mode\n"
b01bcae6
AZ		 2550 "-strace log system calls\n"
2551 "\n"
68d0f70e 2552 "Environment variables:\n"
b01bcae6
AZ		 2553 "QEMU_STRACE Print system calls and arguments similar to the\n"
2554 " 'strace' program. Enable by setting to any value.\n"
04a6dfeb
AJ		 2555 "You can use -E and -U options to set/unset environment variables\n"
2556 "for target process. It is possible to provide several variables\n"
2557 "by repeating the option. For example:\n"
2558 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2559 "Note that if you provide several changes to single variable\n"
2560 "last change will stay in effect.\n"
b01bcae6 2561 ,
b346ff46 2562 TARGET_ARCH,
5fafdf24 2563 interp_prefix,
703e0e89 2564 guest_stack_size,
54936004 2565 DEBUG_LOGFILE);
2d18e637 2566 exit(1);
31e31b8a
FB		 2567}
2568
d5975363 2569THREAD CPUState *thread_env;
59faf6d6 2570
edf8e2af
MW		 2571void task_settid(TaskState *ts)
2572{
2573 if (ts->ts_tid == 0) {
2f7bb878 2574#ifdef CONFIG_USE_NPTL
edf8e2af
MW		 2575 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2576#else
2577 /* when no threads are used, tid becomes pid */
2578 ts->ts_tid = getpid();
2579#endif
2580 }
2581}
2582
2583void stop_all_tasks(void)
2584{
2585 /*
2586 * We trust that when using NPTL, start_exclusive()
2587 * handles thread stopping correctly.
2588 */
2589 start_exclusive();
2590}
2591
c3a92833 2592/* Assumes contents are already zeroed. */
624f7979
PB		 2593void init_task_state(TaskState *ts)
2594{
2595 int i;
2596
624f7979
PB		 2597 ts->used = 1;
2598 ts->first_free = ts->sigqueue_table;
2599 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2600 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2601 }
2602 ts->sigqueue_table[i].next = NULL;
2603}
2604
902b3d5c 2605int main(int argc, char **argv, char **envp)
31e31b8a
FB		 2606{
2607 const char *filename;
b1f9be31 2608 const char *cpu_model;
01ffc75b 2609 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 2610 struct image_info info1, *info = &info1;
edf8e2af 2611 struct linux_binprm bprm;
851e67a1 2612 TaskState ts1, *ts = &ts1;
b346ff46 2613 CPUState *env;
586314f2 2614 int optind;
d691f669 2615 const char *r;
74c33bed 2616 int gdbstub_port = 0;
04a6dfeb 2617 char **target_environ, **wrk;
7d8cec95
AJ		 2618 char **target_argv;
2619 int target_argc;
04a6dfeb 2620 envlist_t *envlist = NULL;
7d8cec95
AJ		 2621 const char *argv0 = NULL;
2622 int i;
fd4d81dd 2623 int ret;
b12b6a18 2624
31e31b8a 2625 if (argc <= 1)
44de1b33 2626 usage();
f801f97e 2627
902b3d5c 2628 qemu_cache_utils_init(envp);
2629
cc38b844
FB		 2630 /* init debug */
2631 cpu_set_log_filename(DEBUG_LOGFILE);
2632
04a6dfeb
AJ		 2633 if ((envlist = envlist_create()) == NULL) {
2634 (void) fprintf(stderr, "Unable to allocate envlist\n");
2635 exit(1);
2636 }
2637
2638 /* add current environment into the list */
2639 for (wrk = environ; *wrk != NULL; wrk++) {
2640 (void) envlist_setenv(envlist, *wrk);
2641 }
2642
703e0e89
RH		 2643 /* Read the stack limit from the kernel. If it's "unlimited",
2644 then we can do little else besides use the default. */
2645 {
2646 struct rlimit lim;
2647 if (getrlimit(RLIMIT_STACK, &lim) == 0
2648 && lim.rlim_cur != RLIM_INFINITY) {
2649 guest_stack_size = lim.rlim_cur;
2650 }
2651 }
2652
b1f9be31 2653 cpu_model = NULL;
b5ec5ce0 2654#if defined(cpudef_setup)
2655 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
2656#endif
2657
586314f2 2658 optind = 1;
d691f669
FB		 2659 for(;;) {
2660 if (optind >= argc)
2661 break;
2662 r = argv[optind];
2663 if (r[0] != '-')
2664 break;
586314f2 2665 optind++;
d691f669
FB		 2666 r++;
2667 if (!strcmp(r, "-")) {
2668 break;
2669 } else if (!strcmp(r, "d")) {
e19e89a5 2670 int mask;
c7cd6a37 2671 const CPULogItem *item;
6f1f31c0
FB		 2672
2673 if (optind >= argc)
2674 break;
3b46e624 2675
6f1f31c0
FB		 2676 r = argv[optind++];
2677 mask = cpu_str_to_log_mask(r);
e19e89a5
FB		 2678 if (!mask) {
2679 printf("Log items (comma separated):\n");
2680 for(item = cpu_log_items; item->mask != 0; item++) {
2681 printf("%-10s %s\n", item->name, item->help);
2682 }
2683 exit(1);
2684 }
2685 cpu_set_log(mask);
04a6dfeb
AJ		 2686 } else if (!strcmp(r, "E")) {
2687 r = argv[optind++];
2688 if (envlist_setenv(envlist, r) != 0)
2689 usage();
2690 } else if (!strcmp(r, "U")) {
2691 r = argv[optind++];
2692 if (envlist_unsetenv(envlist, r) != 0)
2693 usage();
7d8cec95
AJ		 2694 } else if (!strcmp(r, "0")) {
2695 r = argv[optind++];
2696 argv0 = r;
d691f669 2697 } else if (!strcmp(r, "s")) {
491150db
AJ		 2698 if (optind >= argc)
2699 break;
d691f669 2700 r = argv[optind++];
703e0e89
RH		 2701 guest_stack_size = strtoul(r, (char **)&r, 0);
2702 if (guest_stack_size == 0)
44de1b33 2703 usage();
d691f669 2704 if (*r == 'M')
703e0e89 2705 guest_stack_size *= 1024 * 1024;
d691f669 2706 else if (*r == 'k' || *r == 'K')
703e0e89 2707 guest_stack_size *= 1024;
d691f669
FB		 2708 } else if (!strcmp(r, "L")) {
2709 interp_prefix = argv[optind++];
54936004 2710 } else if (!strcmp(r, "p")) {
491150db
AJ		 2711 if (optind >= argc)
2712 break;
83fb7adf
FB		 2713 qemu_host_page_size = atoi(argv[optind++]);
2714 if (qemu_host_page_size == 0 ||
2715 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 2716 fprintf(stderr, "page size must be a power of two\n");
2717 exit(1);
2718 }
1fddef4b 2719 } else if (!strcmp(r, "g")) {
491150db
AJ		 2720 if (optind >= argc)
2721 break;
74c33bed 2722 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 2723 } else if (!strcmp(r, "r")) {
2724 qemu_uname_release = argv[optind++];
b1f9be31
JM		 2725 } else if (!strcmp(r, "cpu")) {
2726 cpu_model = argv[optind++];
491150db 2727 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
c732abe2 2728/* XXX: implement xxx_cpu_list for targets that still miss it */
b5ec5ce0 2729#if defined(cpu_list_id)
2730 cpu_list_id(stdout, &fprintf, "");
b1f9be31 2731#endif
2d18e637 2732 exit(1);
b1f9be31 2733 }
379f6698
PB		 2734#if defined(CONFIG_USE_GUEST_BASE)
2735 } else if (!strcmp(r, "B")) {
2736 guest_base = strtol(argv[optind++], NULL, 0);
2737 have_guest_base = 1;
2738#endif
b12b6a18 2739 } else if (!strcmp(r, "drop-ld-preload")) {
04a6dfeb 2740 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
1b530a6d
AJ		 2741 } else if (!strcmp(r, "singlestep")) {
2742 singlestep = 1;
b6741956
FB		 2743 } else if (!strcmp(r, "strace")) {
2744 do_strace = 1;
5fafdf24 2745 } else
c6981055 2746 {
d691f669
FB		 2747 usage();
2748 }
586314f2 2749 }
d691f669
FB		 2750 if (optind >= argc)
2751 usage();
586314f2 2752 filename = argv[optind];
d088d664 2753 exec_path = argv[optind];
586314f2 2754
31e31b8a 2755 /* Zero out regs */
01ffc75b 2756 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 2757
2758 /* Zero out image_info */
2759 memset(info, 0, sizeof(struct image_info));
2760
edf8e2af
MW		 2761 memset(&bprm, 0, sizeof (bprm));
2762
74cd30b8
FB		 2763 /* Scan interp_prefix dir for replacement files. */
2764 init_paths(interp_prefix);
2765
46027c07 2766 if (cpu_model == NULL) {
aaed909a 2767#if defined(TARGET_I386)
46027c07
FB		 2768#ifdef TARGET_X86_64
2769 cpu_model = "qemu64";
2770#else
2771 cpu_model = "qemu32";
2772#endif
aaed909a 2773#elif defined(TARGET_ARM)
088ab16c 2774 cpu_model = "any";
aaed909a
FB		 2775#elif defined(TARGET_M68K)
2776 cpu_model = "any";
2777#elif defined(TARGET_SPARC)
2778#ifdef TARGET_SPARC64
2779 cpu_model = "TI UltraSparc II";
2780#else
2781 cpu_model = "Fujitsu MB86904";
46027c07 2782#endif
aaed909a
FB		 2783#elif defined(TARGET_MIPS)
2784#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2785 cpu_model = "20Kc";
2786#else
2787 cpu_model = "24Kf";
2788#endif
2789#elif defined(TARGET_PPC)
7ded4f52
FB		 2790#ifdef TARGET_PPC64
2791 cpu_model = "970";
2792#else
aaed909a 2793 cpu_model = "750";
7ded4f52 2794#endif
aaed909a
FB		 2795#else
2796 cpu_model = "any";
2797#endif
2798 }
26a5f13b 2799 cpu_exec_init_all(0);
83fb7adf
FB		 2800 /* NOTE: we need to init the CPU at this stage to get
2801 qemu_host_page_size */
aaed909a
FB		 2802 env = cpu_init(cpu_model);
2803 if (!env) {
2804 fprintf(stderr, "Unable to find CPU definition\n");
2805 exit(1);
2806 }
b55a37c9
BS		 2807#if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
2808 cpu_reset(env);
2809#endif
2810
d5975363 2811 thread_env = env;
3b46e624 2812
b6741956
FB		 2813 if (getenv("QEMU_STRACE")) {
2814 do_strace = 1;
b92c47c1
TS		 2815 }
2816
04a6dfeb
AJ		 2817 target_environ = envlist_to_environ(envlist, NULL);
2818 envlist_free(envlist);
b12b6a18 2819
379f6698
PB		 2820#if defined(CONFIG_USE_GUEST_BASE)
2821 /*
2822 * Now that page sizes are configured in cpu_init() we can do
2823 * proper page alignment for guest_base.
2824 */
2825 guest_base = HOST_PAGE_ALIGN(guest_base);
14f24e14 2826#endif /* CONFIG_USE_GUEST_BASE */
379f6698
PB		 2827
2828 /*
2829 * Read in mmap_min_addr kernel parameter. This value is used
2830 * When loading the ELF image to determine whether guest_base
14f24e14 2831 * is needed. It is also used in mmap_find_vma.
379f6698 2832 */
14f24e14 2833 {
379f6698
PB		 2834 FILE *fp;
2835
2836 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
2837 unsigned long tmp;
2838 if (fscanf(fp, "%lu", &tmp) == 1) {
2839 mmap_min_addr = tmp;
2840 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
2841 }
2842 fclose(fp);
2843 }
2844 }
379f6698 2845
7d8cec95
AJ		 2846 /*
2847 * Prepare copy of argv vector for target.
2848 */
2849 target_argc = argc - optind;
2850 target_argv = calloc(target_argc + 1, sizeof (char *));
2851 if (target_argv == NULL) {
2852 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2853 exit(1);
2854 }
2855
2856 /*
2857 * If argv0 is specified (using '-0' switch) we replace
2858 * argv[0] pointer with the given one.
2859 */
2860 i = 0;
2861 if (argv0 != NULL) {
2862 target_argv[i++] = strdup(argv0);
2863 }
2864 for (; i < target_argc; i++) {
2865 target_argv[i] = strdup(argv[optind + i]);
2866 }
2867 target_argv[target_argc] = NULL;
2868
edf8e2af
MW		 2869 memset(ts, 0, sizeof(TaskState));
2870 init_task_state(ts);
2871 /* build Task State */
2872 ts->info = info;
2873 ts->bprm = &bprm;
2874 env->opaque = ts;
2875 task_settid(ts);
2876
fd4d81dd
AP		 2877 ret = loader_exec(filename, target_argv, target_environ, regs,
2878 info, &bprm);
2879 if (ret != 0) {
2880 printf("Error %d while loading %s\n", ret, filename);
b12b6a18
TS		 2881 _exit(1);
2882 }
2883
7d8cec95
AJ		 2884 for (i = 0; i < target_argc; i++) {
2885 free(target_argv[i]);
2886 }
2887 free(target_argv);
2888
b12b6a18
TS		 2889 for (wrk = target_environ; *wrk; wrk++) {
2890 free(*wrk);
31e31b8a 2891 }
3b46e624 2892
b12b6a18
TS		 2893 free(target_environ);
2894
2e77eac6 2895 if (qemu_log_enabled()) {
379f6698
PB		 2896#if defined(CONFIG_USE_GUEST_BASE)
2897 qemu_log("guest_base 0x%lx\n", guest_base);
2898#endif
2e77eac6
BS		 2899 log_page_dump();
2900
2901 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2902 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2903 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2904 info->start_code);
2905 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2906 info->start_data);
2907 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2908 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2909 info->start_stack);
2910 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2911 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2912 }
31e31b8a 2913
53a5960a 2914 target_set_brk(info->brk);
31e31b8a 2915 syscall_init();
66fb9763 2916 signal_init();
31e31b8a 2917
b346ff46 2918#if defined(TARGET_I386)
2e255c6b
FB		 2919 cpu_x86_set_cpl(env, 3);
2920
3802ce26 2921 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 2922 env->hflags |= HF_PE_MASK;
2923 if (env->cpuid_features & CPUID_SSE) {
2924 env->cr[4] |= CR4_OSFXSR_MASK;
2925 env->hflags |= HF_OSFXSR_MASK;
2926 }
d2fd1af7 2927#ifndef TARGET_ABI32
4dbc422b
FB		 2928 /* enable 64 bit mode if possible */
2929 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2930 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2931 exit(1);
2932 }
d2fd1af7 2933 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 2934 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 2935 env->hflags |= HF_LMA_MASK;
2936#endif
1bde465e 2937
415e561f
FB		 2938 /* flags setup : we activate the IRQs by default as in user mode */
2939 env->eflags |= IF_MASK;
3b46e624 2940
6dbad63e 2941 /* linux register setup */
d2fd1af7 2942#ifndef TARGET_ABI32
84409ddb
JM		 2943 env->regs[R_EAX] = regs->rax;
2944 env->regs[R_EBX] = regs->rbx;
2945 env->regs[R_ECX] = regs->rcx;
2946 env->regs[R_EDX] = regs->rdx;
2947 env->regs[R_ESI] = regs->rsi;
2948 env->regs[R_EDI] = regs->rdi;
2949 env->regs[R_EBP] = regs->rbp;
2950 env->regs[R_ESP] = regs->rsp;
2951 env->eip = regs->rip;
2952#else
0ecfa993
FB		 2953 env->regs[R_EAX] = regs->eax;
2954 env->regs[R_EBX] = regs->ebx;
2955 env->regs[R_ECX] = regs->ecx;
2956 env->regs[R_EDX] = regs->edx;
2957 env->regs[R_ESI] = regs->esi;
2958 env->regs[R_EDI] = regs->edi;
2959 env->regs[R_EBP] = regs->ebp;
2960 env->regs[R_ESP] = regs->esp;
dab2ed99 2961 env->eip = regs->eip;
84409ddb 2962#endif
31e31b8a 2963
f4beb510 2964 /* linux interrupt setup */
e441570f
AZ		 2965#ifndef TARGET_ABI32
2966 env->idt.limit = 511;
2967#else
2968 env->idt.limit = 255;
2969#endif
2970 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2971 PROT_READ|PROT_WRITE,
2972 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2973 idt_table = g2h(env->idt.base);
f4beb510
FB		 2974 set_idt(0, 0);
2975 set_idt(1, 0);
2976 set_idt(2, 0);
2977 set_idt(3, 3);
2978 set_idt(4, 3);
ec95da6c 2979 set_idt(5, 0);
f4beb510
FB		 2980 set_idt(6, 0);
2981 set_idt(7, 0);
2982 set_idt(8, 0);
2983 set_idt(9, 0);
2984 set_idt(10, 0);
2985 set_idt(11, 0);
2986 set_idt(12, 0);
2987 set_idt(13, 0);
2988 set_idt(14, 0);
2989 set_idt(15, 0);
2990 set_idt(16, 0);
2991 set_idt(17, 0);
2992 set_idt(18, 0);
2993 set_idt(19, 0);
2994 set_idt(0x80, 3);
2995
6dbad63e 2996 /* linux segment setup */
8d18e893
FB		 2997 {
2998 uint64_t *gdt_table;
e441570f
AZ		 2999 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
3000 PROT_READ|PROT_WRITE,
3001 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 3002 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 3003 gdt_table = g2h(env->gdt.base);
d2fd1af7 3004#ifdef TARGET_ABI32
8d18e893
FB		 3005 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3006 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3007 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 3008#else
3009 /* 64 bit code segment */
3010 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3011 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3012 DESC_L_MASK |
3013 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3014#endif
8d18e893
FB		 3015 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
3016 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3017 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
3018 }
6dbad63e 3019 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 3020 cpu_x86_load_seg(env, R_SS, __USER_DS);
3021#ifdef TARGET_ABI32
6dbad63e
FB		 3022 cpu_x86_load_seg(env, R_DS, __USER_DS);
3023 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 3024 cpu_x86_load_seg(env, R_FS, __USER_DS);
3025 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 3026 /* This hack makes Wine work... */
3027 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 3028#else
3029 cpu_x86_load_seg(env, R_DS, 0);
3030 cpu_x86_load_seg(env, R_ES, 0);
3031 cpu_x86_load_seg(env, R_FS, 0);
3032 cpu_x86_load_seg(env, R_GS, 0);
3033#endif
b346ff46
FB		 3034#elif defined(TARGET_ARM)
3035 {
3036 int i;
b5ff1b31 3037 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 3038 for(i = 0; i < 16; i++) {
3039 env->regs[i] = regs->uregs[i];
3040 }
b346ff46 3041 }
93ac68bc 3042#elif defined(TARGET_SPARC)
060366c5
FB		 3043 {
3044 int i;
3045 env->pc = regs->pc;
3046 env->npc = regs->npc;
3047 env->y = regs->y;
3048 for(i = 0; i < 8; i++)
3049 env->gregs[i] = regs->u_regs[i];
3050 for(i = 0; i < 8; i++)
3051 env->regwptr[i] = regs->u_regs[i + 8];
3052 }
67867308
FB		 3053#elif defined(TARGET_PPC)
3054 {
3055 int i;
3fc6c082 3056
0411a972
JM		 3057#if defined(TARGET_PPC64)
3058#if defined(TARGET_ABI32)
3059 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 3060#else
0411a972
JM		 3061 env->msr |= (target_ulong)1 << MSR_SF;
3062#endif
84409ddb 3063#endif
67867308
FB		 3064 env->nip = regs->nip;
3065 for(i = 0; i < 32; i++) {
3066 env->gpr[i] = regs->gpr[i];
3067 }
3068 }
e6e5906b
PB		 3069#elif defined(TARGET_M68K)
3070 {
e6e5906b
PB		 3071 env->pc = regs->pc;
3072 env->dregs[0] = regs->d0;
3073 env->dregs[1] = regs->d1;
3074 env->dregs[2] = regs->d2;
3075 env->dregs[3] = regs->d3;
3076 env->dregs[4] = regs->d4;
3077 env->dregs[5] = regs->d5;
3078 env->dregs[6] = regs->d6;
3079 env->dregs[7] = regs->d7;
3080 env->aregs[0] = regs->a0;
3081 env->aregs[1] = regs->a1;
3082 env->aregs[2] = regs->a2;
3083 env->aregs[3] = regs->a3;
3084 env->aregs[4] = regs->a4;
3085 env->aregs[5] = regs->a5;
3086 env->aregs[6] = regs->a6;
3087 env->aregs[7] = regs->usp;
3088 env->sr = regs->sr;
3089 ts->sim_syscalls = 1;
3090 }
b779e29e
EI		 3091#elif defined(TARGET_MICROBLAZE)
3092 {
3093 env->regs[0] = regs->r0;
3094 env->regs[1] = regs->r1;
3095 env->regs[2] = regs->r2;
3096 env->regs[3] = regs->r3;
3097 env->regs[4] = regs->r4;
3098 env->regs[5] = regs->r5;
3099 env->regs[6] = regs->r6;
3100 env->regs[7] = regs->r7;
3101 env->regs[8] = regs->r8;
3102 env->regs[9] = regs->r9;
3103 env->regs[10] = regs->r10;
3104 env->regs[11] = regs->r11;
3105 env->regs[12] = regs->r12;
3106 env->regs[13] = regs->r13;
3107 env->regs[14] = regs->r14;
3108 env->regs[15] = regs->r15;
3109 env->regs[16] = regs->r16;
3110 env->regs[17] = regs->r17;
3111 env->regs[18] = regs->r18;
3112 env->regs[19] = regs->r19;
3113 env->regs[20] = regs->r20;
3114 env->regs[21] = regs->r21;
3115 env->regs[22] = regs->r22;
3116 env->regs[23] = regs->r23;
3117 env->regs[24] = regs->r24;
3118 env->regs[25] = regs->r25;
3119 env->regs[26] = regs->r26;
3120 env->regs[27] = regs->r27;
3121 env->regs[28] = regs->r28;
3122 env->regs[29] = regs->r29;
3123 env->regs[30] = regs->r30;
3124 env->regs[31] = regs->r31;
3125 env->sregs[SR_PC] = regs->pc;
3126 }
048f6b4d
FB		 3127#elif defined(TARGET_MIPS)
3128 {
3129 int i;
3130
3131 for(i = 0; i < 32; i++) {
b5dc7732 3132 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 3133 }
b5dc7732 3134 env->active_tc.PC = regs->cp0_epc;
048f6b4d 3135 }
fdf9b3e8
FB		 3136#elif defined(TARGET_SH4)
3137 {
3138 int i;
3139
3140 for(i = 0; i < 16; i++) {
3141 env->gregs[i] = regs->regs[i];
3142 }
3143 env->pc = regs->pc;
3144 }
7a3148a9
JM		 3145#elif defined(TARGET_ALPHA)
3146 {
3147 int i;
3148
3149 for(i = 0; i < 28; i++) {
992f48a0 3150 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9 3151 }
dad081ee 3152 env->ir[IR_SP] = regs->usp;
7a3148a9 3153 env->pc = regs->pc;
7a3148a9 3154 }
48733d19
TS		 3155#elif defined(TARGET_CRIS)
3156 {
3157 env->regs[0] = regs->r0;
3158 env->regs[1] = regs->r1;
3159 env->regs[2] = regs->r2;
3160 env->regs[3] = regs->r3;
3161 env->regs[4] = regs->r4;
3162 env->regs[5] = regs->r5;
3163 env->regs[6] = regs->r6;
3164 env->regs[7] = regs->r7;
3165 env->regs[8] = regs->r8;
3166 env->regs[9] = regs->r9;
3167 env->regs[10] = regs->r10;
3168 env->regs[11] = regs->r11;
3169 env->regs[12] = regs->r12;
3170 env->regs[13] = regs->r13;
3171 env->regs[14] = info->start_stack;
3172 env->regs[15] = regs->acr;
3173 env->pc = regs->erp;
3174 }
b346ff46
FB		 3175#else
3176#error unsupported target CPU
3177#endif
31e31b8a 3178
a87295e8
PB		 3179#if defined(TARGET_ARM) || defined(TARGET_M68K)
3180 ts->stack_base = info->start_stack;
3181 ts->heap_base = info->brk;
3182 /* This will be filled in on the first SYS_HEAPINFO call. */
3183 ts->heap_limit = 0;
3184#endif
3185
74c33bed
FB		 3186 if (gdbstub_port) {
3187 gdbserver_start (gdbstub_port);
1fddef4b
FB		 3188 gdb_handlesig(env, 0);
3189 }
1b6b029e
FB		 3190 cpu_loop(env);
3191 /* never exits */
31e31b8a
FB		 3192 return 0;
3193}
Qemu copy for testing