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Commit | Line | Data |
---|---|---|
31e31b8a | 1 | /* |
93ac68bc | 2 | * qemu user main |
5fafdf24 | 3 | * |
31e31b8a FB |
4 | * Copyright (c) 2003 Fabrice Bellard |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | #include <stdlib.h> | |
21 | #include <stdio.h> | |
22 | #include <stdarg.h> | |
04369ff2 | 23 | #include <string.h> |
31e31b8a | 24 | #include <errno.h> |
0ecfa993 | 25 | #include <unistd.h> |
31e31b8a | 26 | |
3ef693a0 | 27 | #include "qemu.h" |
31e31b8a | 28 | |
3ef693a0 | 29 | #define DEBUG_LOGFILE "/tmp/qemu.log" |
586314f2 | 30 | |
83fb7adf FB |
31 | #ifdef __APPLE__ |
32 | #include <crt_externs.h> | |
33 | # define environ (*_NSGetEnviron()) | |
34 | #endif | |
35 | ||
74cd30b8 | 36 | static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
c5937220 | 37 | const char *qemu_uname_release = CONFIG_UNAME_RELEASE; |
586314f2 | 38 | |
3a4739d6 | 39 | #if defined(__i386__) && !defined(CONFIG_STATIC) |
f801f97e FB |
40 | /* Force usage of an ELF interpreter even if it is an ELF shared |
41 | object ! */ | |
42 | const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; | |
4304763b | 43 | #endif |
74cd30b8 | 44 | |
93ac68bc | 45 | /* for recent libc, we add these dummy symbols which are not declared |
74cd30b8 | 46 | when generating a linked object (bug in ld ?) */ |
fbf59244 | 47 | #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC) |
c6981055 FB |
48 | long __preinit_array_start[0]; |
49 | long __preinit_array_end[0]; | |
74cd30b8 FB |
50 | long __init_array_start[0]; |
51 | long __init_array_end[0]; | |
52 | long __fini_array_start[0]; | |
53 | long __fini_array_end[0]; | |
54 | #endif | |
55 | ||
9de5e440 FB |
56 | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so |
57 | we allocate a bigger stack. Need a better solution, for example | |
58 | by remapping the process stack directly at the right place */ | |
59 | unsigned long x86_stack_size = 512 * 1024; | |
31e31b8a FB |
60 | |
61 | void gemu_log(const char *fmt, ...) | |
62 | { | |
63 | va_list ap; | |
64 | ||
65 | va_start(ap, fmt); | |
66 | vfprintf(stderr, fmt, ap); | |
67 | va_end(ap); | |
68 | } | |
69 | ||
61190b14 | 70 | void cpu_outb(CPUState *env, int addr, int val) |
367e86e8 FB |
71 | { |
72 | fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val); | |
73 | } | |
74 | ||
61190b14 | 75 | void cpu_outw(CPUState *env, int addr, int val) |
367e86e8 FB |
76 | { |
77 | fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val); | |
78 | } | |
79 | ||
61190b14 | 80 | void cpu_outl(CPUState *env, int addr, int val) |
367e86e8 FB |
81 | { |
82 | fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val); | |
83 | } | |
84 | ||
61190b14 | 85 | int cpu_inb(CPUState *env, int addr) |
367e86e8 FB |
86 | { |
87 | fprintf(stderr, "inb: port=0x%04x\n", addr); | |
88 | return 0; | |
89 | } | |
90 | ||
61190b14 | 91 | int cpu_inw(CPUState *env, int addr) |
367e86e8 FB |
92 | { |
93 | fprintf(stderr, "inw: port=0x%04x\n", addr); | |
94 | return 0; | |
95 | } | |
96 | ||
61190b14 | 97 | int cpu_inl(CPUState *env, int addr) |
367e86e8 FB |
98 | { |
99 | fprintf(stderr, "inl: port=0x%04x\n", addr); | |
100 | return 0; | |
101 | } | |
102 | ||
a541f297 | 103 | int cpu_get_pic_interrupt(CPUState *env) |
92ccca6a FB |
104 | { |
105 | return -1; | |
106 | } | |
107 | ||
28ab0e2e FB |
108 | /* timers for rdtsc */ |
109 | ||
1dce7c3c | 110 | #if 0 |
28ab0e2e FB |
111 | |
112 | static uint64_t emu_time; | |
113 | ||
114 | int64_t cpu_get_real_ticks(void) | |
115 | { | |
116 | return emu_time++; | |
117 | } | |
118 | ||
119 | #endif | |
120 | ||
a541f297 FB |
121 | #ifdef TARGET_I386 |
122 | /***********************************************************/ | |
123 | /* CPUX86 core interface */ | |
124 | ||
02a1602e FB |
125 | void cpu_smm_update(CPUState *env) |
126 | { | |
127 | } | |
128 | ||
28ab0e2e FB |
129 | uint64_t cpu_get_tsc(CPUX86State *env) |
130 | { | |
131 | return cpu_get_real_ticks(); | |
132 | } | |
133 | ||
5fafdf24 | 134 | static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
f4beb510 | 135 | int flags) |
6dbad63e | 136 | { |
f4beb510 | 137 | unsigned int e1, e2; |
53a5960a | 138 | uint32_t *p; |
6dbad63e FB |
139 | e1 = (addr << 16) | (limit & 0xffff); |
140 | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); | |
f4beb510 | 141 | e2 |= flags; |
53a5960a PB |
142 | p = ptr; |
143 | p[0] = tswapl(e1); | |
144 | p[1] = tswapl(e2); | |
f4beb510 FB |
145 | } |
146 | ||
5fafdf24 | 147 | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
f4beb510 FB |
148 | unsigned long addr, unsigned int sel) |
149 | { | |
150 | unsigned int e1, e2; | |
53a5960a | 151 | uint32_t *p; |
f4beb510 FB |
152 | e1 = (addr & 0xffff) | (sel << 16); |
153 | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); | |
53a5960a PB |
154 | p = ptr; |
155 | p[0] = tswapl(e1); | |
156 | p[1] = tswapl(e2); | |
6dbad63e FB |
157 | } |
158 | ||
159 | uint64_t gdt_table[6]; | |
f4beb510 FB |
160 | uint64_t idt_table[256]; |
161 | ||
162 | /* only dpl matters as we do only user space emulation */ | |
163 | static void set_idt(int n, unsigned int dpl) | |
164 | { | |
165 | set_gate(idt_table + n, 0, dpl, 0, 0); | |
166 | } | |
31e31b8a | 167 | |
89e957e7 | 168 | void cpu_loop(CPUX86State *env) |
1b6b029e | 169 | { |
bc8a22cc | 170 | int trapnr; |
80a9d035 | 171 | target_ulong pc; |
9de5e440 | 172 | target_siginfo_t info; |
851e67a1 | 173 | |
1b6b029e | 174 | for(;;) { |
bc8a22cc | 175 | trapnr = cpu_x86_exec(env); |
bc8a22cc | 176 | switch(trapnr) { |
f4beb510 FB |
177 | case 0x80: |
178 | /* linux syscall */ | |
5fafdf24 TS |
179 | env->regs[R_EAX] = do_syscall(env, |
180 | env->regs[R_EAX], | |
f4beb510 FB |
181 | env->regs[R_EBX], |
182 | env->regs[R_ECX], | |
183 | env->regs[R_EDX], | |
184 | env->regs[R_ESI], | |
185 | env->regs[R_EDI], | |
186 | env->regs[R_EBP]); | |
187 | break; | |
188 | case EXCP0B_NOSEG: | |
189 | case EXCP0C_STACK: | |
190 | info.si_signo = SIGBUS; | |
191 | info.si_errno = 0; | |
192 | info.si_code = TARGET_SI_KERNEL; | |
193 | info._sifields._sigfault._addr = 0; | |
194 | queue_signal(info.si_signo, &info); | |
195 | break; | |
1b6b029e | 196 | case EXCP0D_GPF: |
84409ddb | 197 | #ifndef TARGET_X86_64 |
851e67a1 | 198 | if (env->eflags & VM_MASK) { |
89e957e7 | 199 | handle_vm86_fault(env); |
84409ddb JM |
200 | } else |
201 | #endif | |
202 | { | |
f4beb510 FB |
203 | info.si_signo = SIGSEGV; |
204 | info.si_errno = 0; | |
205 | info.si_code = TARGET_SI_KERNEL; | |
206 | info._sifields._sigfault._addr = 0; | |
207 | queue_signal(info.si_signo, &info); | |
1b6b029e FB |
208 | } |
209 | break; | |
b689bc57 FB |
210 | case EXCP0E_PAGE: |
211 | info.si_signo = SIGSEGV; | |
212 | info.si_errno = 0; | |
213 | if (!(env->error_code & 1)) | |
214 | info.si_code = TARGET_SEGV_MAPERR; | |
215 | else | |
216 | info.si_code = TARGET_SEGV_ACCERR; | |
970a87a6 | 217 | info._sifields._sigfault._addr = env->cr[2]; |
b689bc57 FB |
218 | queue_signal(info.si_signo, &info); |
219 | break; | |
9de5e440 | 220 | case EXCP00_DIVZ: |
84409ddb | 221 | #ifndef TARGET_X86_64 |
bc8a22cc | 222 | if (env->eflags & VM_MASK) { |
447db213 | 223 | handle_vm86_trap(env, trapnr); |
84409ddb JM |
224 | } else |
225 | #endif | |
226 | { | |
bc8a22cc FB |
227 | /* division by zero */ |
228 | info.si_signo = SIGFPE; | |
229 | info.si_errno = 0; | |
230 | info.si_code = TARGET_FPE_INTDIV; | |
231 | info._sifields._sigfault._addr = env->eip; | |
232 | queue_signal(info.si_signo, &info); | |
233 | } | |
9de5e440 | 234 | break; |
447db213 FB |
235 | case EXCP01_SSTP: |
236 | case EXCP03_INT3: | |
84409ddb | 237 | #ifndef TARGET_X86_64 |
447db213 FB |
238 | if (env->eflags & VM_MASK) { |
239 | handle_vm86_trap(env, trapnr); | |
84409ddb JM |
240 | } else |
241 | #endif | |
242 | { | |
447db213 FB |
243 | info.si_signo = SIGTRAP; |
244 | info.si_errno = 0; | |
245 | if (trapnr == EXCP01_SSTP) { | |
246 | info.si_code = TARGET_TRAP_BRKPT; | |
247 | info._sifields._sigfault._addr = env->eip; | |
248 | } else { | |
249 | info.si_code = TARGET_SI_KERNEL; | |
250 | info._sifields._sigfault._addr = 0; | |
251 | } | |
252 | queue_signal(info.si_signo, &info); | |
253 | } | |
254 | break; | |
9de5e440 FB |
255 | case EXCP04_INTO: |
256 | case EXCP05_BOUND: | |
84409ddb | 257 | #ifndef TARGET_X86_64 |
bc8a22cc | 258 | if (env->eflags & VM_MASK) { |
447db213 | 259 | handle_vm86_trap(env, trapnr); |
84409ddb JM |
260 | } else |
261 | #endif | |
262 | { | |
bc8a22cc FB |
263 | info.si_signo = SIGSEGV; |
264 | info.si_errno = 0; | |
b689bc57 | 265 | info.si_code = TARGET_SI_KERNEL; |
bc8a22cc FB |
266 | info._sifields._sigfault._addr = 0; |
267 | queue_signal(info.si_signo, &info); | |
268 | } | |
9de5e440 FB |
269 | break; |
270 | case EXCP06_ILLOP: | |
271 | info.si_signo = SIGILL; | |
272 | info.si_errno = 0; | |
273 | info.si_code = TARGET_ILL_ILLOPN; | |
274 | info._sifields._sigfault._addr = env->eip; | |
275 | queue_signal(info.si_signo, &info); | |
276 | break; | |
277 | case EXCP_INTERRUPT: | |
278 | /* just indicate that signals should be handled asap */ | |
279 | break; | |
1fddef4b FB |
280 | case EXCP_DEBUG: |
281 | { | |
282 | int sig; | |
283 | ||
284 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
285 | if (sig) | |
286 | { | |
287 | info.si_signo = sig; | |
288 | info.si_errno = 0; | |
289 | info.si_code = TARGET_TRAP_BRKPT; | |
290 | queue_signal(info.si_signo, &info); | |
291 | } | |
292 | } | |
293 | break; | |
1b6b029e | 294 | default: |
970a87a6 | 295 | pc = env->segs[R_CS].base + env->eip; |
5fafdf24 | 296 | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", |
bc8a22cc | 297 | (long)pc, trapnr); |
1b6b029e FB |
298 | abort(); |
299 | } | |
66fb9763 | 300 | process_pending_signals(env); |
1b6b029e FB |
301 | } |
302 | } | |
b346ff46 FB |
303 | #endif |
304 | ||
305 | #ifdef TARGET_ARM | |
306 | ||
6f1f31c0 FB |
307 | /* XXX: find a better solution */ |
308 | extern void tb_invalidate_page_range(target_ulong start, target_ulong end); | |
309 | ||
310 | static void arm_cache_flush(target_ulong start, target_ulong last) | |
311 | { | |
312 | target_ulong addr, last1; | |
313 | ||
314 | if (last < start) | |
315 | return; | |
316 | addr = start; | |
317 | for(;;) { | |
318 | last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1; | |
319 | if (last1 > last) | |
320 | last1 = last; | |
321 | tb_invalidate_page_range(addr, last1 + 1); | |
322 | if (last1 == last) | |
323 | break; | |
324 | addr = last1 + 1; | |
325 | } | |
326 | } | |
327 | ||
b346ff46 FB |
328 | void cpu_loop(CPUARMState *env) |
329 | { | |
330 | int trapnr; | |
331 | unsigned int n, insn; | |
332 | target_siginfo_t info; | |
b5ff1b31 | 333 | uint32_t addr; |
3b46e624 | 334 | |
b346ff46 FB |
335 | for(;;) { |
336 | trapnr = cpu_arm_exec(env); | |
337 | switch(trapnr) { | |
338 | case EXCP_UDEF: | |
c6981055 FB |
339 | { |
340 | TaskState *ts = env->opaque; | |
341 | uint32_t opcode; | |
342 | ||
343 | /* we handle the FPU emulation here, as Linux */ | |
344 | /* we get the opcode */ | |
53a5960a | 345 | opcode = tget32(env->regs[15]); |
3b46e624 | 346 | |
19b045de | 347 | if (EmulateAll(opcode, &ts->fpa, env) == 0) { |
c6981055 FB |
348 | info.si_signo = SIGILL; |
349 | info.si_errno = 0; | |
350 | info.si_code = TARGET_ILL_ILLOPN; | |
351 | info._sifields._sigfault._addr = env->regs[15]; | |
352 | queue_signal(info.si_signo, &info); | |
353 | } else { | |
354 | /* increment PC */ | |
355 | env->regs[15] += 4; | |
356 | } | |
357 | } | |
b346ff46 FB |
358 | break; |
359 | case EXCP_SWI: | |
06c949e6 | 360 | case EXCP_BKPT: |
b346ff46 | 361 | { |
ce4defa0 | 362 | env->eabi = 1; |
b346ff46 | 363 | /* system call */ |
06c949e6 PB |
364 | if (trapnr == EXCP_BKPT) { |
365 | if (env->thumb) { | |
53a5960a | 366 | insn = tget16(env->regs[15]); |
06c949e6 PB |
367 | n = insn & 0xff; |
368 | env->regs[15] += 2; | |
369 | } else { | |
53a5960a | 370 | insn = tget32(env->regs[15]); |
06c949e6 PB |
371 | n = (insn & 0xf) | ((insn >> 4) & 0xff0); |
372 | env->regs[15] += 4; | |
373 | } | |
192c7bd9 | 374 | } else { |
06c949e6 | 375 | if (env->thumb) { |
53a5960a | 376 | insn = tget16(env->regs[15] - 2); |
06c949e6 PB |
377 | n = insn & 0xff; |
378 | } else { | |
53a5960a | 379 | insn = tget32(env->regs[15] - 4); |
06c949e6 PB |
380 | n = insn & 0xffffff; |
381 | } | |
192c7bd9 FB |
382 | } |
383 | ||
6f1f31c0 FB |
384 | if (n == ARM_NR_cacheflush) { |
385 | arm_cache_flush(env->regs[0], env->regs[1]); | |
a4f81979 FB |
386 | } else if (n == ARM_NR_semihosting |
387 | || n == ARM_NR_thumb_semihosting) { | |
388 | env->regs[0] = do_arm_semihosting (env); | |
ce4defa0 | 389 | } else if (n == 0 || n >= ARM_SYSCALL_BASE |
192c7bd9 | 390 | || (env->thumb && n == ARM_THUMB_SYSCALL)) { |
b346ff46 | 391 | /* linux syscall */ |
ce4defa0 | 392 | if (env->thumb || n == 0) { |
192c7bd9 FB |
393 | n = env->regs[7]; |
394 | } else { | |
395 | n -= ARM_SYSCALL_BASE; | |
ce4defa0 | 396 | env->eabi = 0; |
192c7bd9 | 397 | } |
5fafdf24 TS |
398 | env->regs[0] = do_syscall(env, |
399 | n, | |
b346ff46 FB |
400 | env->regs[0], |
401 | env->regs[1], | |
402 | env->regs[2], | |
403 | env->regs[3], | |
404 | env->regs[4], | |
e1a2849c | 405 | env->regs[5]); |
b346ff46 FB |
406 | } else { |
407 | goto error; | |
408 | } | |
409 | } | |
410 | break; | |
43fff238 FB |
411 | case EXCP_INTERRUPT: |
412 | /* just indicate that signals should be handled asap */ | |
413 | break; | |
68016c62 | 414 | case EXCP_PREFETCH_ABORT: |
b5ff1b31 FB |
415 | addr = env->cp15.c6_data; |
416 | goto do_segv; | |
68016c62 | 417 | case EXCP_DATA_ABORT: |
b5ff1b31 FB |
418 | addr = env->cp15.c6_insn; |
419 | goto do_segv; | |
420 | do_segv: | |
68016c62 FB |
421 | { |
422 | info.si_signo = SIGSEGV; | |
423 | info.si_errno = 0; | |
424 | /* XXX: check env->error_code */ | |
425 | info.si_code = TARGET_SEGV_MAPERR; | |
b5ff1b31 | 426 | info._sifields._sigfault._addr = addr; |
68016c62 FB |
427 | queue_signal(info.si_signo, &info); |
428 | } | |
429 | break; | |
1fddef4b FB |
430 | case EXCP_DEBUG: |
431 | { | |
432 | int sig; | |
433 | ||
434 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
435 | if (sig) | |
436 | { | |
437 | info.si_signo = sig; | |
438 | info.si_errno = 0; | |
439 | info.si_code = TARGET_TRAP_BRKPT; | |
440 | queue_signal(info.si_signo, &info); | |
441 | } | |
442 | } | |
443 | break; | |
b346ff46 FB |
444 | default: |
445 | error: | |
5fafdf24 | 446 | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", |
b346ff46 | 447 | trapnr); |
7fe48483 | 448 | cpu_dump_state(env, stderr, fprintf, 0); |
b346ff46 FB |
449 | abort(); |
450 | } | |
451 | process_pending_signals(env); | |
452 | } | |
453 | } | |
454 | ||
455 | #endif | |
1b6b029e | 456 | |
93ac68bc FB |
457 | #ifdef TARGET_SPARC |
458 | ||
060366c5 FB |
459 | //#define DEBUG_WIN |
460 | ||
2623cbaf FB |
461 | /* WARNING: dealing with register windows _is_ complicated. More info |
462 | can be found at http://www.sics.se/~psm/sparcstack.html */ | |
060366c5 FB |
463 | static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
464 | { | |
465 | index = (index + cwp * 16) & (16 * NWINDOWS - 1); | |
466 | /* wrap handling : if cwp is on the last window, then we use the | |
467 | registers 'after' the end */ | |
468 | if (index < 8 && env->cwp == (NWINDOWS - 1)) | |
469 | index += (16 * NWINDOWS); | |
470 | return index; | |
471 | } | |
472 | ||
2623cbaf FB |
473 | /* save the register window 'cwp1' */ |
474 | static inline void save_window_offset(CPUSPARCState *env, int cwp1) | |
060366c5 | 475 | { |
2623cbaf | 476 | unsigned int i; |
53a5960a | 477 | target_ulong sp_ptr; |
3b46e624 | 478 | |
53a5960a | 479 | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; |
060366c5 | 480 | #if defined(DEBUG_WIN) |
5fafdf24 | 481 | printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n", |
060366c5 FB |
482 | (int)sp_ptr, cwp1); |
483 | #endif | |
2623cbaf | 484 | for(i = 0; i < 16; i++) { |
53a5960a PB |
485 | tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]); |
486 | sp_ptr += sizeof(target_ulong); | |
2623cbaf | 487 | } |
060366c5 FB |
488 | } |
489 | ||
490 | static void save_window(CPUSPARCState *env) | |
491 | { | |
5ef54116 | 492 | #ifndef TARGET_SPARC64 |
2623cbaf FB |
493 | unsigned int new_wim; |
494 | new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) & | |
495 | ((1LL << NWINDOWS) - 1); | |
496 | save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); | |
497 | env->wim = new_wim; | |
5ef54116 FB |
498 | #else |
499 | save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); | |
500 | env->cansave++; | |
501 | env->canrestore--; | |
502 | #endif | |
060366c5 FB |
503 | } |
504 | ||
505 | static void restore_window(CPUSPARCState *env) | |
506 | { | |
507 | unsigned int new_wim, i, cwp1; | |
53a5960a | 508 | target_ulong sp_ptr; |
3b46e624 | 509 | |
060366c5 FB |
510 | new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) & |
511 | ((1LL << NWINDOWS) - 1); | |
3b46e624 | 512 | |
060366c5 FB |
513 | /* restore the invalid window */ |
514 | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); | |
53a5960a | 515 | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; |
060366c5 | 516 | #if defined(DEBUG_WIN) |
5fafdf24 | 517 | printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n", |
060366c5 FB |
518 | (int)sp_ptr, cwp1); |
519 | #endif | |
2623cbaf | 520 | for(i = 0; i < 16; i++) { |
53a5960a PB |
521 | env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr); |
522 | sp_ptr += sizeof(target_ulong); | |
2623cbaf | 523 | } |
060366c5 | 524 | env->wim = new_wim; |
5ef54116 FB |
525 | #ifdef TARGET_SPARC64 |
526 | env->canrestore++; | |
527 | if (env->cleanwin < NWINDOWS - 1) | |
528 | env->cleanwin++; | |
529 | env->cansave--; | |
530 | #endif | |
060366c5 FB |
531 | } |
532 | ||
533 | static void flush_windows(CPUSPARCState *env) | |
534 | { | |
535 | int offset, cwp1; | |
2623cbaf FB |
536 | |
537 | offset = 1; | |
060366c5 FB |
538 | for(;;) { |
539 | /* if restore would invoke restore_window(), then we can stop */ | |
2623cbaf | 540 | cwp1 = (env->cwp + offset) & (NWINDOWS - 1); |
060366c5 FB |
541 | if (env->wim & (1 << cwp1)) |
542 | break; | |
2623cbaf | 543 | save_window_offset(env, cwp1); |
060366c5 FB |
544 | offset++; |
545 | } | |
2623cbaf FB |
546 | /* set wim so that restore will reload the registers */ |
547 | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); | |
548 | env->wim = 1 << cwp1; | |
549 | #if defined(DEBUG_WIN) | |
550 | printf("flush_windows: nb=%d\n", offset - 1); | |
80a9d035 | 551 | #endif |
2623cbaf | 552 | } |
060366c5 | 553 | |
93ac68bc FB |
554 | void cpu_loop (CPUSPARCState *env) |
555 | { | |
060366c5 | 556 | int trapnr, ret; |
61ff6f58 | 557 | target_siginfo_t info; |
3b46e624 | 558 | |
060366c5 FB |
559 | while (1) { |
560 | trapnr = cpu_sparc_exec (env); | |
3b46e624 | 561 | |
060366c5 | 562 | switch (trapnr) { |
5ef54116 | 563 | #ifndef TARGET_SPARC64 |
5fafdf24 | 564 | case 0x88: |
060366c5 | 565 | case 0x90: |
5ef54116 FB |
566 | #else |
567 | case 0x16d: | |
568 | #endif | |
060366c5 | 569 | ret = do_syscall (env, env->gregs[1], |
5fafdf24 TS |
570 | env->regwptr[0], env->regwptr[1], |
571 | env->regwptr[2], env->regwptr[3], | |
060366c5 FB |
572 | env->regwptr[4], env->regwptr[5]); |
573 | if ((unsigned int)ret >= (unsigned int)(-515)) { | |
27908725 FB |
574 | #ifdef TARGET_SPARC64 |
575 | env->xcc |= PSR_CARRY; | |
576 | #else | |
060366c5 | 577 | env->psr |= PSR_CARRY; |
27908725 | 578 | #endif |
060366c5 FB |
579 | ret = -ret; |
580 | } else { | |
27908725 FB |
581 | #ifdef TARGET_SPARC64 |
582 | env->xcc &= ~PSR_CARRY; | |
583 | #else | |
060366c5 | 584 | env->psr &= ~PSR_CARRY; |
27908725 | 585 | #endif |
060366c5 FB |
586 | } |
587 | env->regwptr[0] = ret; | |
588 | /* next instruction */ | |
589 | env->pc = env->npc; | |
590 | env->npc = env->npc + 4; | |
591 | break; | |
592 | case 0x83: /* flush windows */ | |
2623cbaf | 593 | flush_windows(env); |
060366c5 FB |
594 | /* next instruction */ |
595 | env->pc = env->npc; | |
596 | env->npc = env->npc + 4; | |
597 | break; | |
3475187d | 598 | #ifndef TARGET_SPARC64 |
060366c5 FB |
599 | case TT_WIN_OVF: /* window overflow */ |
600 | save_window(env); | |
601 | break; | |
602 | case TT_WIN_UNF: /* window underflow */ | |
603 | restore_window(env); | |
604 | break; | |
61ff6f58 FB |
605 | case TT_TFAULT: |
606 | case TT_DFAULT: | |
607 | { | |
608 | info.si_signo = SIGSEGV; | |
609 | info.si_errno = 0; | |
610 | /* XXX: check env->error_code */ | |
611 | info.si_code = TARGET_SEGV_MAPERR; | |
612 | info._sifields._sigfault._addr = env->mmuregs[4]; | |
613 | queue_signal(info.si_signo, &info); | |
614 | } | |
615 | break; | |
3475187d | 616 | #else |
5ef54116 FB |
617 | case TT_SPILL: /* window overflow */ |
618 | save_window(env); | |
619 | break; | |
620 | case TT_FILL: /* window underflow */ | |
621 | restore_window(env); | |
622 | break; | |
7f84a729 BS |
623 | case TT_TFAULT: |
624 | case TT_DFAULT: | |
625 | { | |
626 | info.si_signo = SIGSEGV; | |
627 | info.si_errno = 0; | |
628 | /* XXX: check env->error_code */ | |
629 | info.si_code = TARGET_SEGV_MAPERR; | |
630 | if (trapnr == TT_DFAULT) | |
631 | info._sifields._sigfault._addr = env->dmmuregs[4]; | |
632 | else | |
633 | info._sifields._sigfault._addr = env->tpc[env->tl]; | |
634 | queue_signal(info.si_signo, &info); | |
635 | } | |
636 | break; | |
3475187d | 637 | #endif |
48dc41eb FB |
638 | case EXCP_INTERRUPT: |
639 | /* just indicate that signals should be handled asap */ | |
640 | break; | |
1fddef4b FB |
641 | case EXCP_DEBUG: |
642 | { | |
643 | int sig; | |
644 | ||
645 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
646 | if (sig) | |
647 | { | |
648 | info.si_signo = sig; | |
649 | info.si_errno = 0; | |
650 | info.si_code = TARGET_TRAP_BRKPT; | |
651 | queue_signal(info.si_signo, &info); | |
652 | } | |
653 | } | |
654 | break; | |
060366c5 FB |
655 | default: |
656 | printf ("Unhandled trap: 0x%x\n", trapnr); | |
7fe48483 | 657 | cpu_dump_state(env, stderr, fprintf, 0); |
060366c5 FB |
658 | exit (1); |
659 | } | |
660 | process_pending_signals (env); | |
661 | } | |
93ac68bc FB |
662 | } |
663 | ||
664 | #endif | |
665 | ||
67867308 | 666 | #ifdef TARGET_PPC |
9fddaa0c FB |
667 | |
668 | static inline uint64_t cpu_ppc_get_tb (CPUState *env) | |
669 | { | |
670 | /* TO FIX */ | |
671 | return 0; | |
672 | } | |
3b46e624 | 673 | |
9fddaa0c FB |
674 | uint32_t cpu_ppc_load_tbl (CPUState *env) |
675 | { | |
676 | return cpu_ppc_get_tb(env) & 0xFFFFFFFF; | |
677 | } | |
3b46e624 | 678 | |
9fddaa0c FB |
679 | uint32_t cpu_ppc_load_tbu (CPUState *env) |
680 | { | |
681 | return cpu_ppc_get_tb(env) >> 32; | |
682 | } | |
3b46e624 | 683 | |
9fddaa0c FB |
684 | static void cpu_ppc_store_tb (CPUState *env, uint64_t value) |
685 | { | |
686 | /* TO FIX */ | |
687 | } | |
688 | ||
689 | void cpu_ppc_store_tbu (CPUState *env, uint32_t value) | |
690 | { | |
691 | cpu_ppc_store_tb(env, ((uint64_t)value << 32) | cpu_ppc_load_tbl(env)); | |
692 | } | |
5fafdf24 | 693 | |
9fddaa0c FB |
694 | void cpu_ppc_store_tbl (CPUState *env, uint32_t value) |
695 | { | |
696 | cpu_ppc_store_tb(env, ((uint64_t)cpu_ppc_load_tbl(env) << 32) | value); | |
697 | } | |
76a66253 JM |
698 | |
699 | void cpu_ppc601_store_rtcu (CPUState *env, uint32_t value) | |
700 | __attribute__ (( alias ("cpu_ppc_store_tbu") )); | |
701 | ||
702 | uint32_t cpu_ppc601_load_rtcu (CPUState *env) | |
703 | __attribute__ (( alias ("cpu_ppc_load_tbu") )); | |
704 | ||
705 | void cpu_ppc601_store_rtcl (CPUState *env, uint32_t value) | |
9fddaa0c | 706 | { |
76a66253 | 707 | cpu_ppc_store_tbl(env, value & 0x3FFFFF80); |
9fddaa0c | 708 | } |
76a66253 JM |
709 | |
710 | uint32_t cpu_ppc601_load_rtcl (CPUState *env) | |
9fddaa0c | 711 | { |
76a66253 | 712 | return cpu_ppc_load_tbl(env) & 0x3FFFFF80; |
9fddaa0c | 713 | } |
76a66253 | 714 | |
a750fc0b JM |
715 | /* XXX: to be fixed */ |
716 | int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp) | |
717 | { | |
718 | return -1; | |
719 | } | |
720 | ||
721 | int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) | |
722 | { | |
723 | return -1; | |
724 | } | |
725 | ||
e1833e1f JM |
726 | #define EXCP_DUMP(env, fmt, args...) \ |
727 | do { \ | |
728 | fprintf(stderr, fmt , ##args); \ | |
729 | cpu_dump_state(env, stderr, fprintf, 0); \ | |
730 | if (loglevel != 0) { \ | |
731 | fprintf(logfile, fmt , ##args); \ | |
732 | cpu_dump_state(env, logfile, fprintf, 0); \ | |
733 | } \ | |
734 | } while (0) | |
735 | ||
67867308 FB |
736 | void cpu_loop(CPUPPCState *env) |
737 | { | |
67867308 | 738 | target_siginfo_t info; |
61190b14 FB |
739 | int trapnr; |
740 | uint32_t ret; | |
3b46e624 | 741 | |
67867308 FB |
742 | for(;;) { |
743 | trapnr = cpu_ppc_exec(env); | |
744 | switch(trapnr) { | |
e1833e1f JM |
745 | case POWERPC_EXCP_NONE: |
746 | /* Just go on */ | |
67867308 | 747 | break; |
e1833e1f JM |
748 | case POWERPC_EXCP_CRITICAL: /* Critical input */ |
749 | cpu_abort(env, "Critical interrupt while in user mode. " | |
750 | "Aborting\n"); | |
61190b14 | 751 | break; |
e1833e1f JM |
752 | case POWERPC_EXCP_MCHECK: /* Machine check exception */ |
753 | cpu_abort(env, "Machine check exception while in user mode. " | |
754 | "Aborting\n"); | |
755 | break; | |
756 | case POWERPC_EXCP_DSI: /* Data storage exception */ | |
757 | EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n", | |
758 | env->spr[SPR_DAR]); | |
759 | /* XXX: check this. Seems bugged */ | |
2be0071f FB |
760 | switch (env->error_code & 0xFF000000) { |
761 | case 0x40000000: | |
61190b14 FB |
762 | info.si_signo = TARGET_SIGSEGV; |
763 | info.si_errno = 0; | |
764 | info.si_code = TARGET_SEGV_MAPERR; | |
765 | break; | |
2be0071f | 766 | case 0x04000000: |
61190b14 FB |
767 | info.si_signo = TARGET_SIGILL; |
768 | info.si_errno = 0; | |
769 | info.si_code = TARGET_ILL_ILLADR; | |
770 | break; | |
2be0071f | 771 | case 0x08000000: |
61190b14 FB |
772 | info.si_signo = TARGET_SIGSEGV; |
773 | info.si_errno = 0; | |
774 | info.si_code = TARGET_SEGV_ACCERR; | |
775 | break; | |
61190b14 FB |
776 | default: |
777 | /* Let's send a regular segfault... */ | |
e1833e1f JM |
778 | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", |
779 | env->error_code); | |
61190b14 FB |
780 | info.si_signo = TARGET_SIGSEGV; |
781 | info.si_errno = 0; | |
782 | info.si_code = TARGET_SEGV_MAPERR; | |
783 | break; | |
784 | } | |
67867308 FB |
785 | info._sifields._sigfault._addr = env->nip; |
786 | queue_signal(info.si_signo, &info); | |
787 | break; | |
e1833e1f JM |
788 | case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
789 | EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n", | |
790 | env->spr[SPR_DAR]); | |
791 | /* XXX: check this */ | |
2be0071f FB |
792 | switch (env->error_code & 0xFF000000) { |
793 | case 0x40000000: | |
61190b14 | 794 | info.si_signo = TARGET_SIGSEGV; |
67867308 | 795 | info.si_errno = 0; |
61190b14 FB |
796 | info.si_code = TARGET_SEGV_MAPERR; |
797 | break; | |
2be0071f FB |
798 | case 0x10000000: |
799 | case 0x08000000: | |
61190b14 FB |
800 | info.si_signo = TARGET_SIGSEGV; |
801 | info.si_errno = 0; | |
802 | info.si_code = TARGET_SEGV_ACCERR; | |
803 | break; | |
804 | default: | |
805 | /* Let's send a regular segfault... */ | |
e1833e1f JM |
806 | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n", |
807 | env->error_code); | |
61190b14 FB |
808 | info.si_signo = TARGET_SIGSEGV; |
809 | info.si_errno = 0; | |
810 | info.si_code = TARGET_SEGV_MAPERR; | |
811 | break; | |
812 | } | |
813 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
814 | queue_signal(info.si_signo, &info); |
815 | break; | |
e1833e1f JM |
816 | case POWERPC_EXCP_EXTERNAL: /* External input */ |
817 | cpu_abort(env, "External interrupt while in user mode. " | |
818 | "Aborting\n"); | |
819 | break; | |
820 | case POWERPC_EXCP_ALIGN: /* Alignment exception */ | |
821 | EXCP_DUMP(env, "Unaligned memory access\n"); | |
822 | /* XXX: check this */ | |
61190b14 | 823 | info.si_signo = TARGET_SIGBUS; |
67867308 | 824 | info.si_errno = 0; |
61190b14 FB |
825 | info.si_code = TARGET_BUS_ADRALN; |
826 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
827 | queue_signal(info.si_signo, &info); |
828 | break; | |
e1833e1f JM |
829 | case POWERPC_EXCP_PROGRAM: /* Program exception */ |
830 | /* XXX: check this */ | |
61190b14 | 831 | switch (env->error_code & ~0xF) { |
e1833e1f JM |
832 | case POWERPC_EXCP_FP: |
833 | EXCP_DUMP(env, "Floating point program exception\n"); | |
61190b14 FB |
834 | /* Set FX */ |
835 | env->fpscr[7] |= 0x8; | |
836 | /* Finally, update FEX */ | |
837 | if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) & | |
838 | ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3))) | |
839 | env->fpscr[7] |= 0x4; | |
840 | info.si_signo = TARGET_SIGFPE; | |
841 | info.si_errno = 0; | |
842 | switch (env->error_code & 0xF) { | |
e1833e1f | 843 | case POWERPC_EXCP_FP_OX: |
61190b14 FB |
844 | info.si_code = TARGET_FPE_FLTOVF; |
845 | break; | |
e1833e1f | 846 | case POWERPC_EXCP_FP_UX: |
61190b14 FB |
847 | info.si_code = TARGET_FPE_FLTUND; |
848 | break; | |
e1833e1f JM |
849 | case POWERPC_EXCP_FP_ZX: |
850 | case POWERPC_EXCP_FP_VXZDZ: | |
61190b14 FB |
851 | info.si_code = TARGET_FPE_FLTDIV; |
852 | break; | |
e1833e1f | 853 | case POWERPC_EXCP_FP_XX: |
61190b14 FB |
854 | info.si_code = TARGET_FPE_FLTRES; |
855 | break; | |
e1833e1f | 856 | case POWERPC_EXCP_FP_VXSOFT: |
61190b14 FB |
857 | info.si_code = TARGET_FPE_FLTINV; |
858 | break; | |
e1833e1f JM |
859 | case POWERPC_EXCP_FP_VXNAN: |
860 | case POWERPC_EXCP_FP_VXISI: | |
861 | case POWERPC_EXCP_FP_VXIDI: | |
862 | case POWERPC_EXCP_FP_VXIMZ: | |
863 | case POWERPC_EXCP_FP_VXVC: | |
864 | case POWERPC_EXCP_FP_VXSQRT: | |
865 | case POWERPC_EXCP_FP_VXCVI: | |
61190b14 FB |
866 | info.si_code = TARGET_FPE_FLTSUB; |
867 | break; | |
868 | default: | |
e1833e1f JM |
869 | EXCP_DUMP(env, "Unknown floating point exception (%02x)\n", |
870 | env->error_code); | |
871 | break; | |
61190b14 | 872 | } |
e1833e1f JM |
873 | break; |
874 | case POWERPC_EXCP_INVAL: | |
875 | EXCP_DUMP(env, "Invalid instruction\n"); | |
61190b14 FB |
876 | info.si_signo = TARGET_SIGILL; |
877 | info.si_errno = 0; | |
878 | switch (env->error_code & 0xF) { | |
e1833e1f | 879 | case POWERPC_EXCP_INVAL_INVAL: |
61190b14 FB |
880 | info.si_code = TARGET_ILL_ILLOPC; |
881 | break; | |
e1833e1f | 882 | case POWERPC_EXCP_INVAL_LSWX: |
a750fc0b | 883 | info.si_code = TARGET_ILL_ILLOPN; |
61190b14 | 884 | break; |
e1833e1f | 885 | case POWERPC_EXCP_INVAL_SPR: |
61190b14 FB |
886 | info.si_code = TARGET_ILL_PRVREG; |
887 | break; | |
e1833e1f | 888 | case POWERPC_EXCP_INVAL_FP: |
61190b14 FB |
889 | info.si_code = TARGET_ILL_COPROC; |
890 | break; | |
891 | default: | |
e1833e1f JM |
892 | EXCP_DUMP(env, "Unknown invalid operation (%02x)\n", |
893 | env->error_code & 0xF); | |
61190b14 FB |
894 | info.si_code = TARGET_ILL_ILLADR; |
895 | break; | |
896 | } | |
897 | break; | |
e1833e1f JM |
898 | case POWERPC_EXCP_PRIV: |
899 | EXCP_DUMP(env, "Privilege violation\n"); | |
61190b14 FB |
900 | info.si_signo = TARGET_SIGILL; |
901 | info.si_errno = 0; | |
902 | switch (env->error_code & 0xF) { | |
e1833e1f | 903 | case POWERPC_EXCP_PRIV_OPC: |
61190b14 FB |
904 | info.si_code = TARGET_ILL_PRVOPC; |
905 | break; | |
e1833e1f | 906 | case POWERPC_EXCP_PRIV_REG: |
61190b14 | 907 | info.si_code = TARGET_ILL_PRVREG; |
e1833e1f | 908 | break; |
61190b14 | 909 | default: |
e1833e1f JM |
910 | EXCP_DUMP(env, "Unknown privilege violation (%02x)\n", |
911 | env->error_code & 0xF); | |
61190b14 FB |
912 | info.si_code = TARGET_ILL_PRVOPC; |
913 | break; | |
914 | } | |
915 | break; | |
e1833e1f JM |
916 | case POWERPC_EXCP_TRAP: |
917 | cpu_abort(env, "Tried to call a TRAP\n"); | |
918 | break; | |
61190b14 FB |
919 | default: |
920 | /* Should not happen ! */ | |
e1833e1f JM |
921 | cpu_abort(env, "Unknown program exception (%02x)\n", |
922 | env->error_code); | |
923 | break; | |
61190b14 FB |
924 | } |
925 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
926 | queue_signal(info.si_signo, &info); |
927 | break; | |
e1833e1f JM |
928 | case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ |
929 | EXCP_DUMP(env, "No floating point allowed\n"); | |
61190b14 | 930 | info.si_signo = TARGET_SIGILL; |
67867308 | 931 | info.si_errno = 0; |
61190b14 FB |
932 | info.si_code = TARGET_ILL_COPROC; |
933 | info._sifields._sigfault._addr = env->nip - 4; | |
67867308 FB |
934 | queue_signal(info.si_signo, &info); |
935 | break; | |
e1833e1f JM |
936 | case POWERPC_EXCP_SYSCALL: /* System call exception */ |
937 | cpu_abort(env, "Syscall exception while in user mode. " | |
938 | "Aborting\n"); | |
61190b14 | 939 | break; |
e1833e1f JM |
940 | case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ |
941 | EXCP_DUMP(env, "No APU instruction allowed\n"); | |
942 | info.si_signo = TARGET_SIGILL; | |
943 | info.si_errno = 0; | |
944 | info.si_code = TARGET_ILL_COPROC; | |
945 | info._sifields._sigfault._addr = env->nip - 4; | |
946 | queue_signal(info.si_signo, &info); | |
61190b14 | 947 | break; |
e1833e1f JM |
948 | case POWERPC_EXCP_DECR: /* Decrementer exception */ |
949 | cpu_abort(env, "Decrementer interrupt while in user mode. " | |
950 | "Aborting\n"); | |
61190b14 | 951 | break; |
e1833e1f JM |
952 | case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ |
953 | cpu_abort(env, "Fix interval timer interrupt while in user mode. " | |
954 | "Aborting\n"); | |
955 | break; | |
956 | case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ | |
957 | cpu_abort(env, "Watchdog timer interrupt while in user mode. " | |
958 | "Aborting\n"); | |
959 | break; | |
960 | case POWERPC_EXCP_DTLB: /* Data TLB error */ | |
961 | cpu_abort(env, "Data TLB exception while in user mode. " | |
962 | "Aborting\n"); | |
963 | break; | |
964 | case POWERPC_EXCP_ITLB: /* Instruction TLB error */ | |
965 | cpu_abort(env, "Instruction TLB exception while in user mode. " | |
966 | "Aborting\n"); | |
967 | break; | |
968 | case POWERPC_EXCP_DEBUG: /* Debug interrupt */ | |
969 | /* XXX: check this */ | |
1fddef4b FB |
970 | { |
971 | int sig; | |
972 | ||
e1833e1f JM |
973 | sig = gdb_handlesig(env, TARGET_SIGTRAP); |
974 | if (sig) { | |
1fddef4b FB |
975 | info.si_signo = sig; |
976 | info.si_errno = 0; | |
977 | info.si_code = TARGET_TRAP_BRKPT; | |
978 | queue_signal(info.si_signo, &info); | |
979 | } | |
980 | } | |
981 | break; | |
e1833e1f JM |
982 | #if defined(TARGET_PPCEMB) |
983 | case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ | |
984 | EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n"); | |
985 | info.si_signo = TARGET_SIGILL; | |
986 | info.si_errno = 0; | |
987 | info.si_code = TARGET_ILL_COPROC; | |
988 | info._sifields._sigfault._addr = env->nip - 4; | |
989 | queue_signal(info.si_signo, &info); | |
990 | break; | |
991 | case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ | |
992 | cpu_abort(env, "Embedded floating-point data IRQ not handled\n"); | |
993 | break; | |
994 | case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ | |
995 | cpu_abort(env, "Embedded floating-point round IRQ not handled\n"); | |
996 | break; | |
997 | case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ | |
998 | cpu_abort(env, "Performance monitor exception not handled\n"); | |
999 | break; | |
1000 | case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ | |
1001 | cpu_abort(env, "Doorbell interrupt while in user mode. " | |
1002 | "Aborting\n"); | |
1003 | break; | |
1004 | case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ | |
1005 | cpu_abort(env, "Doorbell critical interrupt while in user mode. " | |
1006 | "Aborting\n"); | |
1007 | break; | |
1008 | case POWERPC_EXCP_RESET: /* System reset exception */ | |
1009 | cpu_abort(env, "Reset interrupt while in user mode. " | |
1010 | "Aborting\n"); | |
1011 | break; | |
1012 | #endif /* defined(TARGET_PPCEMB) */ | |
1013 | #if defined(TARGET_PPC64) /* PowerPC 64 */ | |
1014 | case POWERPC_EXCP_DSEG: /* Data segment exception */ | |
1015 | cpu_abort(env, "Data segment exception while in user mode. " | |
1016 | "Aborting\n"); | |
1017 | break; | |
1018 | case POWERPC_EXCP_ISEG: /* Instruction segment exception */ | |
1019 | cpu_abort(env, "Instruction segment exception " | |
1020 | "while in user mode. Aborting\n"); | |
1021 | break; | |
1022 | #endif /* defined(TARGET_PPC64) */ | |
1023 | #if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ | |
1024 | case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ | |
1025 | cpu_abort(env, "Hypervisor decrementer interrupt " | |
1026 | "while in user mode. Aborting\n"); | |
1027 | break; | |
1028 | #endif /* defined(TARGET_PPC64H) */ | |
1029 | case POWERPC_EXCP_TRACE: /* Trace exception */ | |
1030 | /* Nothing to do: | |
1031 | * we use this exception to emulate step-by-step execution mode. | |
1032 | */ | |
1033 | break; | |
1034 | #if defined(TARGET_PPC64H) /* PowerPC 64 with hypervisor mode support */ | |
1035 | case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ | |
1036 | cpu_abort(env, "Hypervisor data storage exception " | |
1037 | "while in user mode. Aborting\n"); | |
1038 | break; | |
1039 | case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ | |
1040 | cpu_abort(env, "Hypervisor instruction storage exception " | |
1041 | "while in user mode. Aborting\n"); | |
1042 | break; | |
1043 | case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ | |
1044 | cpu_abort(env, "Hypervisor data segment exception " | |
1045 | "while in user mode. Aborting\n"); | |
1046 | break; | |
1047 | case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ | |
1048 | cpu_abort(env, "Hypervisor instruction segment exception " | |
1049 | "while in user mode. Aborting\n"); | |
1050 | break; | |
1051 | #endif /* defined(TARGET_PPC64H) */ | |
1052 | case POWERPC_EXCP_VPU: /* Vector unavailable exception */ | |
1053 | EXCP_DUMP(env, "No Altivec instructions allowed\n"); | |
1054 | info.si_signo = TARGET_SIGILL; | |
1055 | info.si_errno = 0; | |
1056 | info.si_code = TARGET_ILL_COPROC; | |
1057 | info._sifields._sigfault._addr = env->nip - 4; | |
1058 | queue_signal(info.si_signo, &info); | |
1059 | break; | |
1060 | case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ | |
1061 | cpu_abort(env, "Programable interval timer interrupt " | |
1062 | "while in user mode. Aborting\n"); | |
1063 | break; | |
1064 | case POWERPC_EXCP_IO: /* IO error exception */ | |
1065 | cpu_abort(env, "IO error exception while in user mode. " | |
1066 | "Aborting\n"); | |
1067 | break; | |
1068 | case POWERPC_EXCP_RUNM: /* Run mode exception */ | |
1069 | cpu_abort(env, "Run mode exception while in user mode. " | |
1070 | "Aborting\n"); | |
1071 | break; | |
1072 | case POWERPC_EXCP_EMUL: /* Emulation trap exception */ | |
1073 | cpu_abort(env, "Emulation trap exception not handled\n"); | |
1074 | break; | |
1075 | case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ | |
1076 | cpu_abort(env, "Instruction fetch TLB exception " | |
1077 | "while in user-mode. Aborting"); | |
1078 | break; | |
1079 | case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ | |
1080 | cpu_abort(env, "Data load TLB exception while in user-mode. " | |
1081 | "Aborting"); | |
1082 | break; | |
1083 | case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ | |
1084 | cpu_abort(env, "Data store TLB exception while in user-mode. " | |
1085 | "Aborting"); | |
1086 | break; | |
1087 | case POWERPC_EXCP_FPA: /* Floating-point assist exception */ | |
1088 | cpu_abort(env, "Floating-point assist exception not handled\n"); | |
1089 | break; | |
1090 | case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ | |
1091 | cpu_abort(env, "Instruction address breakpoint exception " | |
1092 | "not handled\n"); | |
1093 | break; | |
1094 | case POWERPC_EXCP_SMI: /* System management interrupt */ | |
1095 | cpu_abort(env, "System management interrupt while in user mode. " | |
1096 | "Aborting\n"); | |
1097 | break; | |
1098 | case POWERPC_EXCP_THERM: /* Thermal interrupt */ | |
1099 | cpu_abort(env, "Thermal interrupt interrupt while in user mode. " | |
1100 | "Aborting\n"); | |
1101 | break; | |
1102 | case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ | |
1103 | cpu_abort(env, "Performance monitor exception not handled\n"); | |
1104 | break; | |
1105 | case POWERPC_EXCP_VPUA: /* Vector assist exception */ | |
1106 | cpu_abort(env, "Vector assist exception not handled\n"); | |
1107 | break; | |
1108 | case POWERPC_EXCP_SOFTP: /* Soft patch exception */ | |
1109 | cpu_abort(env, "Soft patch exception not handled\n"); | |
1110 | break; | |
1111 | case POWERPC_EXCP_MAINT: /* Maintenance exception */ | |
1112 | cpu_abort(env, "Maintenance exception while in user mode. " | |
1113 | "Aborting\n"); | |
1114 | break; | |
1115 | case POWERPC_EXCP_STOP: /* stop translation */ | |
1116 | /* We did invalidate the instruction cache. Go on */ | |
1117 | break; | |
1118 | case POWERPC_EXCP_BRANCH: /* branch instruction: */ | |
1119 | /* We just stopped because of a branch. Go on */ | |
1120 | break; | |
1121 | case POWERPC_EXCP_SYSCALL_USER: | |
1122 | /* system call in user-mode emulation */ | |
1123 | /* WARNING: | |
1124 | * PPC ABI uses overflow flag in cr0 to signal an error | |
1125 | * in syscalls. | |
1126 | */ | |
1127 | #if 0 | |
1128 | printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0], | |
1129 | env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]); | |
1130 | #endif | |
1131 | env->crf[0] &= ~0x1; | |
1132 | ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], | |
1133 | env->gpr[5], env->gpr[6], env->gpr[7], | |
1134 | env->gpr[8]); | |
1135 | if (ret > (uint32_t)(-515)) { | |
1136 | env->crf[0] |= 0x1; | |
1137 | ret = -ret; | |
61190b14 | 1138 | } |
e1833e1f JM |
1139 | env->gpr[3] = ret; |
1140 | #if 0 | |
1141 | printf("syscall returned 0x%08x (%d)\n", ret, ret); | |
1142 | #endif | |
1143 | break; | |
1144 | default: | |
1145 | cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr); | |
1146 | break; | |
67867308 FB |
1147 | } |
1148 | process_pending_signals(env); | |
1149 | } | |
1150 | } | |
1151 | #endif | |
1152 | ||
048f6b4d FB |
1153 | #ifdef TARGET_MIPS |
1154 | ||
1155 | #define MIPS_SYS(name, args) args, | |
1156 | ||
1157 | static const uint8_t mips_syscall_args[] = { | |
1158 | MIPS_SYS(sys_syscall , 0) /* 4000 */ | |
1159 | MIPS_SYS(sys_exit , 1) | |
1160 | MIPS_SYS(sys_fork , 0) | |
1161 | MIPS_SYS(sys_read , 3) | |
1162 | MIPS_SYS(sys_write , 3) | |
1163 | MIPS_SYS(sys_open , 3) /* 4005 */ | |
1164 | MIPS_SYS(sys_close , 1) | |
1165 | MIPS_SYS(sys_waitpid , 3) | |
1166 | MIPS_SYS(sys_creat , 2) | |
1167 | MIPS_SYS(sys_link , 2) | |
1168 | MIPS_SYS(sys_unlink , 1) /* 4010 */ | |
1169 | MIPS_SYS(sys_execve , 0) | |
1170 | MIPS_SYS(sys_chdir , 1) | |
1171 | MIPS_SYS(sys_time , 1) | |
1172 | MIPS_SYS(sys_mknod , 3) | |
1173 | MIPS_SYS(sys_chmod , 2) /* 4015 */ | |
1174 | MIPS_SYS(sys_lchown , 3) | |
1175 | MIPS_SYS(sys_ni_syscall , 0) | |
1176 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ | |
1177 | MIPS_SYS(sys_lseek , 3) | |
1178 | MIPS_SYS(sys_getpid , 0) /* 4020 */ | |
1179 | MIPS_SYS(sys_mount , 5) | |
1180 | MIPS_SYS(sys_oldumount , 1) | |
1181 | MIPS_SYS(sys_setuid , 1) | |
1182 | MIPS_SYS(sys_getuid , 0) | |
1183 | MIPS_SYS(sys_stime , 1) /* 4025 */ | |
1184 | MIPS_SYS(sys_ptrace , 4) | |
1185 | MIPS_SYS(sys_alarm , 1) | |
1186 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ | |
1187 | MIPS_SYS(sys_pause , 0) | |
1188 | MIPS_SYS(sys_utime , 2) /* 4030 */ | |
1189 | MIPS_SYS(sys_ni_syscall , 0) | |
1190 | MIPS_SYS(sys_ni_syscall , 0) | |
1191 | MIPS_SYS(sys_access , 2) | |
1192 | MIPS_SYS(sys_nice , 1) | |
1193 | MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ | |
1194 | MIPS_SYS(sys_sync , 0) | |
1195 | MIPS_SYS(sys_kill , 2) | |
1196 | MIPS_SYS(sys_rename , 2) | |
1197 | MIPS_SYS(sys_mkdir , 2) | |
1198 | MIPS_SYS(sys_rmdir , 1) /* 4040 */ | |
1199 | MIPS_SYS(sys_dup , 1) | |
1200 | MIPS_SYS(sys_pipe , 0) | |
1201 | MIPS_SYS(sys_times , 1) | |
1202 | MIPS_SYS(sys_ni_syscall , 0) | |
1203 | MIPS_SYS(sys_brk , 1) /* 4045 */ | |
1204 | MIPS_SYS(sys_setgid , 1) | |
1205 | MIPS_SYS(sys_getgid , 0) | |
1206 | MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ | |
1207 | MIPS_SYS(sys_geteuid , 0) | |
1208 | MIPS_SYS(sys_getegid , 0) /* 4050 */ | |
1209 | MIPS_SYS(sys_acct , 0) | |
1210 | MIPS_SYS(sys_umount , 2) | |
1211 | MIPS_SYS(sys_ni_syscall , 0) | |
1212 | MIPS_SYS(sys_ioctl , 3) | |
1213 | MIPS_SYS(sys_fcntl , 3) /* 4055 */ | |
1214 | MIPS_SYS(sys_ni_syscall , 2) | |
1215 | MIPS_SYS(sys_setpgid , 2) | |
1216 | MIPS_SYS(sys_ni_syscall , 0) | |
1217 | MIPS_SYS(sys_olduname , 1) | |
1218 | MIPS_SYS(sys_umask , 1) /* 4060 */ | |
1219 | MIPS_SYS(sys_chroot , 1) | |
1220 | MIPS_SYS(sys_ustat , 2) | |
1221 | MIPS_SYS(sys_dup2 , 2) | |
1222 | MIPS_SYS(sys_getppid , 0) | |
1223 | MIPS_SYS(sys_getpgrp , 0) /* 4065 */ | |
1224 | MIPS_SYS(sys_setsid , 0) | |
1225 | MIPS_SYS(sys_sigaction , 3) | |
1226 | MIPS_SYS(sys_sgetmask , 0) | |
1227 | MIPS_SYS(sys_ssetmask , 1) | |
1228 | MIPS_SYS(sys_setreuid , 2) /* 4070 */ | |
1229 | MIPS_SYS(sys_setregid , 2) | |
1230 | MIPS_SYS(sys_sigsuspend , 0) | |
1231 | MIPS_SYS(sys_sigpending , 1) | |
1232 | MIPS_SYS(sys_sethostname , 2) | |
1233 | MIPS_SYS(sys_setrlimit , 2) /* 4075 */ | |
1234 | MIPS_SYS(sys_getrlimit , 2) | |
1235 | MIPS_SYS(sys_getrusage , 2) | |
1236 | MIPS_SYS(sys_gettimeofday, 2) | |
1237 | MIPS_SYS(sys_settimeofday, 2) | |
1238 | MIPS_SYS(sys_getgroups , 2) /* 4080 */ | |
1239 | MIPS_SYS(sys_setgroups , 2) | |
1240 | MIPS_SYS(sys_ni_syscall , 0) /* old_select */ | |
1241 | MIPS_SYS(sys_symlink , 2) | |
1242 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ | |
1243 | MIPS_SYS(sys_readlink , 3) /* 4085 */ | |
1244 | MIPS_SYS(sys_uselib , 1) | |
1245 | MIPS_SYS(sys_swapon , 2) | |
1246 | MIPS_SYS(sys_reboot , 3) | |
1247 | MIPS_SYS(old_readdir , 3) | |
1248 | MIPS_SYS(old_mmap , 6) /* 4090 */ | |
1249 | MIPS_SYS(sys_munmap , 2) | |
1250 | MIPS_SYS(sys_truncate , 2) | |
1251 | MIPS_SYS(sys_ftruncate , 2) | |
1252 | MIPS_SYS(sys_fchmod , 2) | |
1253 | MIPS_SYS(sys_fchown , 3) /* 4095 */ | |
1254 | MIPS_SYS(sys_getpriority , 2) | |
1255 | MIPS_SYS(sys_setpriority , 3) | |
1256 | MIPS_SYS(sys_ni_syscall , 0) | |
1257 | MIPS_SYS(sys_statfs , 2) | |
1258 | MIPS_SYS(sys_fstatfs , 2) /* 4100 */ | |
1259 | MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ | |
1260 | MIPS_SYS(sys_socketcall , 2) | |
1261 | MIPS_SYS(sys_syslog , 3) | |
1262 | MIPS_SYS(sys_setitimer , 3) | |
1263 | MIPS_SYS(sys_getitimer , 2) /* 4105 */ | |
1264 | MIPS_SYS(sys_newstat , 2) | |
1265 | MIPS_SYS(sys_newlstat , 2) | |
1266 | MIPS_SYS(sys_newfstat , 2) | |
1267 | MIPS_SYS(sys_uname , 1) | |
1268 | MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ | |
1269 | MIPS_SYS(sys_vhangup , 0) | |
1270 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ | |
1271 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ | |
1272 | MIPS_SYS(sys_wait4 , 4) | |
1273 | MIPS_SYS(sys_swapoff , 1) /* 4115 */ | |
1274 | MIPS_SYS(sys_sysinfo , 1) | |
1275 | MIPS_SYS(sys_ipc , 6) | |
1276 | MIPS_SYS(sys_fsync , 1) | |
1277 | MIPS_SYS(sys_sigreturn , 0) | |
1278 | MIPS_SYS(sys_clone , 0) /* 4120 */ | |
1279 | MIPS_SYS(sys_setdomainname, 2) | |
1280 | MIPS_SYS(sys_newuname , 1) | |
1281 | MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ | |
1282 | MIPS_SYS(sys_adjtimex , 1) | |
1283 | MIPS_SYS(sys_mprotect , 3) /* 4125 */ | |
1284 | MIPS_SYS(sys_sigprocmask , 3) | |
1285 | MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ | |
1286 | MIPS_SYS(sys_init_module , 5) | |
1287 | MIPS_SYS(sys_delete_module, 1) | |
1288 | MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ | |
1289 | MIPS_SYS(sys_quotactl , 0) | |
1290 | MIPS_SYS(sys_getpgid , 1) | |
1291 | MIPS_SYS(sys_fchdir , 1) | |
1292 | MIPS_SYS(sys_bdflush , 2) | |
1293 | MIPS_SYS(sys_sysfs , 3) /* 4135 */ | |
1294 | MIPS_SYS(sys_personality , 1) | |
1295 | MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ | |
1296 | MIPS_SYS(sys_setfsuid , 1) | |
1297 | MIPS_SYS(sys_setfsgid , 1) | |
1298 | MIPS_SYS(sys_llseek , 5) /* 4140 */ | |
1299 | MIPS_SYS(sys_getdents , 3) | |
1300 | MIPS_SYS(sys_select , 5) | |
1301 | MIPS_SYS(sys_flock , 2) | |
1302 | MIPS_SYS(sys_msync , 3) | |
1303 | MIPS_SYS(sys_readv , 3) /* 4145 */ | |
1304 | MIPS_SYS(sys_writev , 3) | |
1305 | MIPS_SYS(sys_cacheflush , 3) | |
1306 | MIPS_SYS(sys_cachectl , 3) | |
1307 | MIPS_SYS(sys_sysmips , 4) | |
1308 | MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ | |
1309 | MIPS_SYS(sys_getsid , 1) | |
1310 | MIPS_SYS(sys_fdatasync , 0) | |
1311 | MIPS_SYS(sys_sysctl , 1) | |
1312 | MIPS_SYS(sys_mlock , 2) | |
1313 | MIPS_SYS(sys_munlock , 2) /* 4155 */ | |
1314 | MIPS_SYS(sys_mlockall , 1) | |
1315 | MIPS_SYS(sys_munlockall , 0) | |
1316 | MIPS_SYS(sys_sched_setparam, 2) | |
1317 | MIPS_SYS(sys_sched_getparam, 2) | |
1318 | MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ | |
1319 | MIPS_SYS(sys_sched_getscheduler, 1) | |
1320 | MIPS_SYS(sys_sched_yield , 0) | |
1321 | MIPS_SYS(sys_sched_get_priority_max, 1) | |
1322 | MIPS_SYS(sys_sched_get_priority_min, 1) | |
1323 | MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ | |
1324 | MIPS_SYS(sys_nanosleep, 2) | |
1325 | MIPS_SYS(sys_mremap , 4) | |
1326 | MIPS_SYS(sys_accept , 3) | |
1327 | MIPS_SYS(sys_bind , 3) | |
1328 | MIPS_SYS(sys_connect , 3) /* 4170 */ | |
1329 | MIPS_SYS(sys_getpeername , 3) | |
1330 | MIPS_SYS(sys_getsockname , 3) | |
1331 | MIPS_SYS(sys_getsockopt , 5) | |
1332 | MIPS_SYS(sys_listen , 2) | |
1333 | MIPS_SYS(sys_recv , 4) /* 4175 */ | |
1334 | MIPS_SYS(sys_recvfrom , 6) | |
1335 | MIPS_SYS(sys_recvmsg , 3) | |
1336 | MIPS_SYS(sys_send , 4) | |
1337 | MIPS_SYS(sys_sendmsg , 3) | |
1338 | MIPS_SYS(sys_sendto , 6) /* 4180 */ | |
1339 | MIPS_SYS(sys_setsockopt , 5) | |
1340 | MIPS_SYS(sys_shutdown , 2) | |
1341 | MIPS_SYS(sys_socket , 3) | |
1342 | MIPS_SYS(sys_socketpair , 4) | |
1343 | MIPS_SYS(sys_setresuid , 3) /* 4185 */ | |
1344 | MIPS_SYS(sys_getresuid , 3) | |
1345 | MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ | |
1346 | MIPS_SYS(sys_poll , 3) | |
1347 | MIPS_SYS(sys_nfsservctl , 3) | |
1348 | MIPS_SYS(sys_setresgid , 3) /* 4190 */ | |
1349 | MIPS_SYS(sys_getresgid , 3) | |
1350 | MIPS_SYS(sys_prctl , 5) | |
1351 | MIPS_SYS(sys_rt_sigreturn, 0) | |
1352 | MIPS_SYS(sys_rt_sigaction, 4) | |
1353 | MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ | |
1354 | MIPS_SYS(sys_rt_sigpending, 2) | |
1355 | MIPS_SYS(sys_rt_sigtimedwait, 4) | |
1356 | MIPS_SYS(sys_rt_sigqueueinfo, 3) | |
1357 | MIPS_SYS(sys_rt_sigsuspend, 0) | |
1358 | MIPS_SYS(sys_pread64 , 6) /* 4200 */ | |
1359 | MIPS_SYS(sys_pwrite64 , 6) | |
1360 | MIPS_SYS(sys_chown , 3) | |
1361 | MIPS_SYS(sys_getcwd , 2) | |
1362 | MIPS_SYS(sys_capget , 2) | |
1363 | MIPS_SYS(sys_capset , 2) /* 4205 */ | |
1364 | MIPS_SYS(sys_sigaltstack , 0) | |
1365 | MIPS_SYS(sys_sendfile , 4) | |
1366 | MIPS_SYS(sys_ni_syscall , 0) | |
1367 | MIPS_SYS(sys_ni_syscall , 0) | |
1368 | MIPS_SYS(sys_mmap2 , 6) /* 4210 */ | |
1369 | MIPS_SYS(sys_truncate64 , 4) | |
1370 | MIPS_SYS(sys_ftruncate64 , 4) | |
1371 | MIPS_SYS(sys_stat64 , 2) | |
1372 | MIPS_SYS(sys_lstat64 , 2) | |
1373 | MIPS_SYS(sys_fstat64 , 2) /* 4215 */ | |
1374 | MIPS_SYS(sys_pivot_root , 2) | |
1375 | MIPS_SYS(sys_mincore , 3) | |
1376 | MIPS_SYS(sys_madvise , 3) | |
1377 | MIPS_SYS(sys_getdents64 , 3) | |
1378 | MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ | |
1379 | MIPS_SYS(sys_ni_syscall , 0) | |
1380 | MIPS_SYS(sys_gettid , 0) | |
1381 | MIPS_SYS(sys_readahead , 5) | |
1382 | MIPS_SYS(sys_setxattr , 5) | |
1383 | MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ | |
1384 | MIPS_SYS(sys_fsetxattr , 5) | |
1385 | MIPS_SYS(sys_getxattr , 4) | |
1386 | MIPS_SYS(sys_lgetxattr , 4) | |
1387 | MIPS_SYS(sys_fgetxattr , 4) | |
1388 | MIPS_SYS(sys_listxattr , 3) /* 4230 */ | |
1389 | MIPS_SYS(sys_llistxattr , 3) | |
1390 | MIPS_SYS(sys_flistxattr , 3) | |
1391 | MIPS_SYS(sys_removexattr , 2) | |
1392 | MIPS_SYS(sys_lremovexattr, 2) | |
1393 | MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ | |
1394 | MIPS_SYS(sys_tkill , 2) | |
1395 | MIPS_SYS(sys_sendfile64 , 5) | |
1396 | MIPS_SYS(sys_futex , 2) | |
1397 | MIPS_SYS(sys_sched_setaffinity, 3) | |
1398 | MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ | |
1399 | MIPS_SYS(sys_io_setup , 2) | |
1400 | MIPS_SYS(sys_io_destroy , 1) | |
1401 | MIPS_SYS(sys_io_getevents, 5) | |
1402 | MIPS_SYS(sys_io_submit , 3) | |
1403 | MIPS_SYS(sys_io_cancel , 3) /* 4245 */ | |
1404 | MIPS_SYS(sys_exit_group , 1) | |
1405 | MIPS_SYS(sys_lookup_dcookie, 3) | |
1406 | MIPS_SYS(sys_epoll_create, 1) | |
1407 | MIPS_SYS(sys_epoll_ctl , 4) | |
1408 | MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ | |
1409 | MIPS_SYS(sys_remap_file_pages, 5) | |
1410 | MIPS_SYS(sys_set_tid_address, 1) | |
1411 | MIPS_SYS(sys_restart_syscall, 0) | |
1412 | MIPS_SYS(sys_fadvise64_64, 7) | |
1413 | MIPS_SYS(sys_statfs64 , 3) /* 4255 */ | |
1414 | MIPS_SYS(sys_fstatfs64 , 2) | |
1415 | MIPS_SYS(sys_timer_create, 3) | |
1416 | MIPS_SYS(sys_timer_settime, 4) | |
1417 | MIPS_SYS(sys_timer_gettime, 2) | |
1418 | MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ | |
1419 | MIPS_SYS(sys_timer_delete, 1) | |
1420 | MIPS_SYS(sys_clock_settime, 2) | |
1421 | MIPS_SYS(sys_clock_gettime, 2) | |
1422 | MIPS_SYS(sys_clock_getres, 2) | |
1423 | MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ | |
1424 | MIPS_SYS(sys_tgkill , 3) | |
1425 | MIPS_SYS(sys_utimes , 2) | |
1426 | MIPS_SYS(sys_mbind , 4) | |
1427 | MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ | |
1428 | MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ | |
1429 | MIPS_SYS(sys_mq_open , 4) | |
1430 | MIPS_SYS(sys_mq_unlink , 1) | |
1431 | MIPS_SYS(sys_mq_timedsend, 5) | |
1432 | MIPS_SYS(sys_mq_timedreceive, 5) | |
1433 | MIPS_SYS(sys_mq_notify , 2) /* 4275 */ | |
1434 | MIPS_SYS(sys_mq_getsetattr, 3) | |
1435 | MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ | |
1436 | MIPS_SYS(sys_waitid , 4) | |
1437 | MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ | |
1438 | MIPS_SYS(sys_add_key , 5) | |
388bb21a | 1439 | MIPS_SYS(sys_request_key, 4) |
048f6b4d | 1440 | MIPS_SYS(sys_keyctl , 5) |
6f5b89a0 | 1441 | MIPS_SYS(sys_set_thread_area, 1) |
388bb21a TS |
1442 | MIPS_SYS(sys_inotify_init, 0) |
1443 | MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ | |
1444 | MIPS_SYS(sys_inotify_rm_watch, 2) | |
1445 | MIPS_SYS(sys_migrate_pages, 4) | |
1446 | MIPS_SYS(sys_openat, 4) | |
1447 | MIPS_SYS(sys_mkdirat, 3) | |
1448 | MIPS_SYS(sys_mknodat, 4) /* 4290 */ | |
1449 | MIPS_SYS(sys_fchownat, 5) | |
1450 | MIPS_SYS(sys_futimesat, 3) | |
1451 | MIPS_SYS(sys_fstatat64, 4) | |
1452 | MIPS_SYS(sys_unlinkat, 3) | |
1453 | MIPS_SYS(sys_renameat, 4) /* 4295 */ | |
1454 | MIPS_SYS(sys_linkat, 5) | |
1455 | MIPS_SYS(sys_symlinkat, 3) | |
1456 | MIPS_SYS(sys_readlinkat, 4) | |
1457 | MIPS_SYS(sys_fchmodat, 3) | |
1458 | MIPS_SYS(sys_faccessat, 3) /* 4300 */ | |
1459 | MIPS_SYS(sys_pselect6, 6) | |
1460 | MIPS_SYS(sys_ppoll, 5) | |
1461 | MIPS_SYS(sys_unshare, 1) | |
1462 | MIPS_SYS(sys_splice, 4) | |
1463 | MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ | |
1464 | MIPS_SYS(sys_tee, 4) | |
1465 | MIPS_SYS(sys_vmsplice, 4) | |
1466 | MIPS_SYS(sys_move_pages, 6) | |
1467 | MIPS_SYS(sys_set_robust_list, 2) | |
1468 | MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ | |
1469 | MIPS_SYS(sys_kexec_load, 4) | |
1470 | MIPS_SYS(sys_getcpu, 3) | |
1471 | MIPS_SYS(sys_epoll_pwait, 6) | |
1472 | MIPS_SYS(sys_ioprio_set, 3) | |
1473 | MIPS_SYS(sys_ioprio_get, 2) | |
048f6b4d FB |
1474 | }; |
1475 | ||
1476 | #undef MIPS_SYS | |
1477 | ||
1478 | void cpu_loop(CPUMIPSState *env) | |
1479 | { | |
1480 | target_siginfo_t info; | |
388bb21a | 1481 | int trapnr, ret; |
048f6b4d | 1482 | unsigned int syscall_num; |
048f6b4d FB |
1483 | |
1484 | for(;;) { | |
1485 | trapnr = cpu_mips_exec(env); | |
1486 | switch(trapnr) { | |
1487 | case EXCP_SYSCALL: | |
ead9360e TS |
1488 | syscall_num = env->gpr[2][env->current_tc] - 4000; |
1489 | env->PC[env->current_tc] += 4; | |
388bb21a TS |
1490 | if (syscall_num >= sizeof(mips_syscall_args)) { |
1491 | ret = -ENOSYS; | |
1492 | } else { | |
1493 | int nb_args; | |
1494 | target_ulong sp_reg; | |
1495 | target_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; | |
1496 | ||
1497 | nb_args = mips_syscall_args[syscall_num]; | |
ead9360e | 1498 | sp_reg = env->gpr[29][env->current_tc]; |
388bb21a TS |
1499 | switch (nb_args) { |
1500 | /* these arguments are taken from the stack */ | |
1501 | case 8: arg8 = tgetl(sp_reg + 28); | |
1502 | case 7: arg7 = tgetl(sp_reg + 24); | |
1503 | case 6: arg6 = tgetl(sp_reg + 20); | |
1504 | case 5: arg5 = tgetl(sp_reg + 16); | |
1505 | default: | |
1506 | break; | |
048f6b4d | 1507 | } |
ead9360e TS |
1508 | ret = do_syscall(env, env->gpr[2][env->current_tc], |
1509 | env->gpr[4][env->current_tc], | |
1510 | env->gpr[5][env->current_tc], | |
1511 | env->gpr[6][env->current_tc], | |
1512 | env->gpr[7][env->current_tc], | |
388bb21a TS |
1513 | arg5, arg6/*, arg7, arg8*/); |
1514 | } | |
1515 | if ((unsigned int)ret >= (unsigned int)(-1133)) { | |
ead9360e | 1516 | env->gpr[7][env->current_tc] = 1; /* error flag */ |
388bb21a TS |
1517 | ret = -ret; |
1518 | } else { | |
ead9360e | 1519 | env->gpr[7][env->current_tc] = 0; /* error flag */ |
048f6b4d | 1520 | } |
ead9360e | 1521 | env->gpr[2][env->current_tc] = ret; |
048f6b4d | 1522 | break; |
ca7c2b1b TS |
1523 | case EXCP_TLBL: |
1524 | case EXCP_TLBS: | |
6900e84b | 1525 | case EXCP_CpU: |
048f6b4d | 1526 | case EXCP_RI: |
bc1ad2de FB |
1527 | info.si_signo = TARGET_SIGILL; |
1528 | info.si_errno = 0; | |
1529 | info.si_code = 0; | |
1530 | queue_signal(info.si_signo, &info); | |
048f6b4d | 1531 | break; |
106ec879 FB |
1532 | case EXCP_INTERRUPT: |
1533 | /* just indicate that signals should be handled asap */ | |
1534 | break; | |
d08b2a28 PB |
1535 | case EXCP_DEBUG: |
1536 | { | |
1537 | int sig; | |
1538 | ||
1539 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1540 | if (sig) | |
1541 | { | |
1542 | info.si_signo = sig; | |
1543 | info.si_errno = 0; | |
1544 | info.si_code = TARGET_TRAP_BRKPT; | |
1545 | queue_signal(info.si_signo, &info); | |
1546 | } | |
1547 | } | |
1548 | break; | |
048f6b4d FB |
1549 | default: |
1550 | // error: | |
5fafdf24 | 1551 | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", |
048f6b4d FB |
1552 | trapnr); |
1553 | cpu_dump_state(env, stderr, fprintf, 0); | |
1554 | abort(); | |
1555 | } | |
1556 | process_pending_signals(env); | |
1557 | } | |
1558 | } | |
1559 | #endif | |
1560 | ||
fdf9b3e8 FB |
1561 | #ifdef TARGET_SH4 |
1562 | void cpu_loop (CPUState *env) | |
1563 | { | |
1564 | int trapnr, ret; | |
355fb23d | 1565 | target_siginfo_t info; |
3b46e624 | 1566 | |
fdf9b3e8 FB |
1567 | while (1) { |
1568 | trapnr = cpu_sh4_exec (env); | |
3b46e624 | 1569 | |
fdf9b3e8 FB |
1570 | switch (trapnr) { |
1571 | case 0x160: | |
5fafdf24 TS |
1572 | ret = do_syscall(env, |
1573 | env->gregs[3], | |
1574 | env->gregs[4], | |
1575 | env->gregs[5], | |
1576 | env->gregs[6], | |
1577 | env->gregs[7], | |
1578 | env->gregs[0], | |
fdf9b3e8 | 1579 | 0); |
9c2a9ea1 | 1580 | env->gregs[0] = ret; |
fdf9b3e8 FB |
1581 | env->pc += 2; |
1582 | break; | |
355fb23d PB |
1583 | case EXCP_DEBUG: |
1584 | { | |
1585 | int sig; | |
1586 | ||
1587 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1588 | if (sig) | |
1589 | { | |
1590 | info.si_signo = sig; | |
1591 | info.si_errno = 0; | |
1592 | info.si_code = TARGET_TRAP_BRKPT; | |
1593 | queue_signal(info.si_signo, &info); | |
1594 | } | |
1595 | } | |
1596 | break; | |
fdf9b3e8 FB |
1597 | default: |
1598 | printf ("Unhandled trap: 0x%x\n", trapnr); | |
1599 | cpu_dump_state(env, stderr, fprintf, 0); | |
1600 | exit (1); | |
1601 | } | |
1602 | process_pending_signals (env); | |
1603 | } | |
1604 | } | |
1605 | #endif | |
1606 | ||
e6e5906b PB |
1607 | #ifdef TARGET_M68K |
1608 | ||
1609 | void cpu_loop(CPUM68KState *env) | |
1610 | { | |
1611 | int trapnr; | |
1612 | unsigned int n; | |
1613 | target_siginfo_t info; | |
1614 | TaskState *ts = env->opaque; | |
3b46e624 | 1615 | |
e6e5906b PB |
1616 | for(;;) { |
1617 | trapnr = cpu_m68k_exec(env); | |
1618 | switch(trapnr) { | |
1619 | case EXCP_ILLEGAL: | |
1620 | { | |
1621 | if (ts->sim_syscalls) { | |
1622 | uint16_t nr; | |
1623 | nr = lduw(env->pc + 2); | |
1624 | env->pc += 4; | |
1625 | do_m68k_simcall(env, nr); | |
1626 | } else { | |
1627 | goto do_sigill; | |
1628 | } | |
1629 | } | |
1630 | break; | |
a87295e8 | 1631 | case EXCP_HALT_INSN: |
e6e5906b | 1632 | /* Semihosing syscall. */ |
a87295e8 | 1633 | env->pc += 4; |
e6e5906b PB |
1634 | do_m68k_semihosting(env, env->dregs[0]); |
1635 | break; | |
1636 | case EXCP_LINEA: | |
1637 | case EXCP_LINEF: | |
1638 | case EXCP_UNSUPPORTED: | |
1639 | do_sigill: | |
1640 | info.si_signo = SIGILL; | |
1641 | info.si_errno = 0; | |
1642 | info.si_code = TARGET_ILL_ILLOPN; | |
1643 | info._sifields._sigfault._addr = env->pc; | |
1644 | queue_signal(info.si_signo, &info); | |
1645 | break; | |
1646 | case EXCP_TRAP0: | |
1647 | { | |
1648 | ts->sim_syscalls = 0; | |
1649 | n = env->dregs[0]; | |
1650 | env->pc += 2; | |
5fafdf24 TS |
1651 | env->dregs[0] = do_syscall(env, |
1652 | n, | |
e6e5906b PB |
1653 | env->dregs[1], |
1654 | env->dregs[2], | |
1655 | env->dregs[3], | |
1656 | env->dregs[4], | |
1657 | env->dregs[5], | |
1658 | env->dregs[6]); | |
1659 | } | |
1660 | break; | |
1661 | case EXCP_INTERRUPT: | |
1662 | /* just indicate that signals should be handled asap */ | |
1663 | break; | |
1664 | case EXCP_ACCESS: | |
1665 | { | |
1666 | info.si_signo = SIGSEGV; | |
1667 | info.si_errno = 0; | |
1668 | /* XXX: check env->error_code */ | |
1669 | info.si_code = TARGET_SEGV_MAPERR; | |
1670 | info._sifields._sigfault._addr = env->mmu.ar; | |
1671 | queue_signal(info.si_signo, &info); | |
1672 | } | |
1673 | break; | |
1674 | case EXCP_DEBUG: | |
1675 | { | |
1676 | int sig; | |
1677 | ||
1678 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1679 | if (sig) | |
1680 | { | |
1681 | info.si_signo = sig; | |
1682 | info.si_errno = 0; | |
1683 | info.si_code = TARGET_TRAP_BRKPT; | |
1684 | queue_signal(info.si_signo, &info); | |
1685 | } | |
1686 | } | |
1687 | break; | |
1688 | default: | |
5fafdf24 | 1689 | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", |
e6e5906b PB |
1690 | trapnr); |
1691 | cpu_dump_state(env, stderr, fprintf, 0); | |
1692 | abort(); | |
1693 | } | |
1694 | process_pending_signals(env); | |
1695 | } | |
1696 | } | |
1697 | #endif /* TARGET_M68K */ | |
1698 | ||
7a3148a9 JM |
1699 | #ifdef TARGET_ALPHA |
1700 | void cpu_loop (CPUState *env) | |
1701 | { | |
e96efcfc | 1702 | int trapnr; |
7a3148a9 | 1703 | target_siginfo_t info; |
3b46e624 | 1704 | |
7a3148a9 JM |
1705 | while (1) { |
1706 | trapnr = cpu_alpha_exec (env); | |
3b46e624 | 1707 | |
7a3148a9 JM |
1708 | switch (trapnr) { |
1709 | case EXCP_RESET: | |
1710 | fprintf(stderr, "Reset requested. Exit\n"); | |
1711 | exit(1); | |
1712 | break; | |
1713 | case EXCP_MCHK: | |
1714 | fprintf(stderr, "Machine check exception. Exit\n"); | |
1715 | exit(1); | |
1716 | break; | |
1717 | case EXCP_ARITH: | |
1718 | fprintf(stderr, "Arithmetic trap.\n"); | |
1719 | exit(1); | |
1720 | break; | |
1721 | case EXCP_HW_INTERRUPT: | |
5fafdf24 | 1722 | fprintf(stderr, "External interrupt. Exit\n"); |
7a3148a9 JM |
1723 | exit(1); |
1724 | break; | |
1725 | case EXCP_DFAULT: | |
1726 | fprintf(stderr, "MMU data fault\n"); | |
1727 | exit(1); | |
1728 | break; | |
1729 | case EXCP_DTB_MISS_PAL: | |
1730 | fprintf(stderr, "MMU data TLB miss in PALcode\n"); | |
1731 | exit(1); | |
1732 | break; | |
1733 | case EXCP_ITB_MISS: | |
1734 | fprintf(stderr, "MMU instruction TLB miss\n"); | |
1735 | exit(1); | |
1736 | break; | |
1737 | case EXCP_ITB_ACV: | |
1738 | fprintf(stderr, "MMU instruction access violation\n"); | |
1739 | exit(1); | |
1740 | break; | |
1741 | case EXCP_DTB_MISS_NATIVE: | |
1742 | fprintf(stderr, "MMU data TLB miss\n"); | |
1743 | exit(1); | |
1744 | break; | |
1745 | case EXCP_UNALIGN: | |
1746 | fprintf(stderr, "Unaligned access\n"); | |
1747 | exit(1); | |
1748 | break; | |
1749 | case EXCP_OPCDEC: | |
1750 | fprintf(stderr, "Invalid instruction\n"); | |
1751 | exit(1); | |
1752 | break; | |
1753 | case EXCP_FEN: | |
1754 | fprintf(stderr, "Floating-point not allowed\n"); | |
1755 | exit(1); | |
1756 | break; | |
1757 | case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): | |
1758 | fprintf(stderr, "Call to PALcode\n"); | |
1759 | call_pal(env, (trapnr >> 6) | 0x80); | |
1760 | break; | |
1761 | case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): | |
7f75ffd3 | 1762 | fprintf(stderr, "Privileged call to PALcode\n"); |
7a3148a9 JM |
1763 | exit(1); |
1764 | break; | |
1765 | case EXCP_DEBUG: | |
1766 | { | |
1767 | int sig; | |
1768 | ||
1769 | sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
1770 | if (sig) | |
1771 | { | |
1772 | info.si_signo = sig; | |
1773 | info.si_errno = 0; | |
1774 | info.si_code = TARGET_TRAP_BRKPT; | |
1775 | queue_signal(info.si_signo, &info); | |
1776 | } | |
1777 | } | |
1778 | break; | |
1779 | default: | |
1780 | printf ("Unhandled trap: 0x%x\n", trapnr); | |
1781 | cpu_dump_state(env, stderr, fprintf, 0); | |
1782 | exit (1); | |
1783 | } | |
1784 | process_pending_signals (env); | |
1785 | } | |
1786 | } | |
1787 | #endif /* TARGET_ALPHA */ | |
1788 | ||
31e31b8a FB |
1789 | void usage(void) |
1790 | { | |
84f2e8ef | 1791 | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n" |
b1f9be31 | 1792 | "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n" |
b346ff46 | 1793 | "Linux CPU emulator (compiled for %s emulation)\n" |
d691f669 | 1794 | "\n" |
b12b6a18 TS |
1795 | "-h print this help\n" |
1796 | "-g port wait gdb connection to port\n" | |
1797 | "-L path set the elf interpreter prefix (default=%s)\n" | |
1798 | "-s size set the stack size in bytes (default=%ld)\n" | |
1799 | "-cpu model select CPU (-cpu ? for list)\n" | |
1800 | "-drop-ld-preload drop LD_PRELOAD for target process\n" | |
54936004 FB |
1801 | "\n" |
1802 | "debug options:\n" | |
c6981055 FB |
1803 | #ifdef USE_CODE_COPY |
1804 | "-no-code-copy disable code copy acceleration\n" | |
1805 | #endif | |
6f1f31c0 | 1806 | "-d options activate log (logfile=%s)\n" |
54936004 | 1807 | "-p pagesize set the host page size to 'pagesize'\n", |
b346ff46 | 1808 | TARGET_ARCH, |
5fafdf24 | 1809 | interp_prefix, |
54936004 FB |
1810 | x86_stack_size, |
1811 | DEBUG_LOGFILE); | |
74cd30b8 | 1812 | _exit(1); |
31e31b8a FB |
1813 | } |
1814 | ||
9de5e440 | 1815 | /* XXX: currently only used for async signals (see signal.c) */ |
b346ff46 | 1816 | CPUState *global_env; |
59faf6d6 | 1817 | |
851e67a1 FB |
1818 | /* used to free thread contexts */ |
1819 | TaskState *first_task_state; | |
9de5e440 | 1820 | |
31e31b8a FB |
1821 | int main(int argc, char **argv) |
1822 | { | |
1823 | const char *filename; | |
b1f9be31 | 1824 | const char *cpu_model; |
01ffc75b | 1825 | struct target_pt_regs regs1, *regs = ®s1; |
31e31b8a | 1826 | struct image_info info1, *info = &info1; |
851e67a1 | 1827 | TaskState ts1, *ts = &ts1; |
b346ff46 | 1828 | CPUState *env; |
586314f2 | 1829 | int optind; |
d691f669 | 1830 | const char *r; |
74c33bed | 1831 | int gdbstub_port = 0; |
b12b6a18 TS |
1832 | int drop_ld_preload = 0, environ_count = 0; |
1833 | char **target_environ, **wrk, **dst; | |
1834 | ||
31e31b8a FB |
1835 | if (argc <= 1) |
1836 | usage(); | |
f801f97e | 1837 | |
cc38b844 FB |
1838 | /* init debug */ |
1839 | cpu_set_log_filename(DEBUG_LOGFILE); | |
1840 | ||
b1f9be31 | 1841 | cpu_model = NULL; |
586314f2 | 1842 | optind = 1; |
d691f669 FB |
1843 | for(;;) { |
1844 | if (optind >= argc) | |
1845 | break; | |
1846 | r = argv[optind]; | |
1847 | if (r[0] != '-') | |
1848 | break; | |
586314f2 | 1849 | optind++; |
d691f669 FB |
1850 | r++; |
1851 | if (!strcmp(r, "-")) { | |
1852 | break; | |
1853 | } else if (!strcmp(r, "d")) { | |
e19e89a5 FB |
1854 | int mask; |
1855 | CPULogItem *item; | |
6f1f31c0 FB |
1856 | |
1857 | if (optind >= argc) | |
1858 | break; | |
3b46e624 | 1859 | |
6f1f31c0 FB |
1860 | r = argv[optind++]; |
1861 | mask = cpu_str_to_log_mask(r); | |
e19e89a5 FB |
1862 | if (!mask) { |
1863 | printf("Log items (comma separated):\n"); | |
1864 | for(item = cpu_log_items; item->mask != 0; item++) { | |
1865 | printf("%-10s %s\n", item->name, item->help); | |
1866 | } | |
1867 | exit(1); | |
1868 | } | |
1869 | cpu_set_log(mask); | |
d691f669 FB |
1870 | } else if (!strcmp(r, "s")) { |
1871 | r = argv[optind++]; | |
1872 | x86_stack_size = strtol(r, (char **)&r, 0); | |
1873 | if (x86_stack_size <= 0) | |
1874 | usage(); | |
1875 | if (*r == 'M') | |
1876 | x86_stack_size *= 1024 * 1024; | |
1877 | else if (*r == 'k' || *r == 'K') | |
1878 | x86_stack_size *= 1024; | |
1879 | } else if (!strcmp(r, "L")) { | |
1880 | interp_prefix = argv[optind++]; | |
54936004 | 1881 | } else if (!strcmp(r, "p")) { |
83fb7adf FB |
1882 | qemu_host_page_size = atoi(argv[optind++]); |
1883 | if (qemu_host_page_size == 0 || | |
1884 | (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { | |
54936004 FB |
1885 | fprintf(stderr, "page size must be a power of two\n"); |
1886 | exit(1); | |
1887 | } | |
1fddef4b | 1888 | } else if (!strcmp(r, "g")) { |
74c33bed | 1889 | gdbstub_port = atoi(argv[optind++]); |
c5937220 PB |
1890 | } else if (!strcmp(r, "r")) { |
1891 | qemu_uname_release = argv[optind++]; | |
b1f9be31 JM |
1892 | } else if (!strcmp(r, "cpu")) { |
1893 | cpu_model = argv[optind++]; | |
1894 | if (strcmp(cpu_model, "?") == 0) { | |
1895 | #if defined(TARGET_PPC) | |
1896 | ppc_cpu_list(stdout, &fprintf); | |
1897 | #elif defined(TARGET_ARM) | |
1898 | arm_cpu_list(); | |
1899 | #elif defined(TARGET_MIPS) | |
1900 | mips_cpu_list(stdout, &fprintf); | |
925fb139 BS |
1901 | #elif defined(TARGET_SPARC) |
1902 | sparc_cpu_list(stdout, &fprintf); | |
b1f9be31 | 1903 | #endif |
cff4cbed | 1904 | _exit(1); |
b1f9be31 | 1905 | } |
b12b6a18 TS |
1906 | } else if (!strcmp(r, "drop-ld-preload")) { |
1907 | drop_ld_preload = 1; | |
5fafdf24 | 1908 | } else |
c6981055 FB |
1909 | #ifdef USE_CODE_COPY |
1910 | if (!strcmp(r, "no-code-copy")) { | |
1911 | code_copy_enabled = 0; | |
5fafdf24 | 1912 | } else |
c6981055 FB |
1913 | #endif |
1914 | { | |
d691f669 FB |
1915 | usage(); |
1916 | } | |
586314f2 | 1917 | } |
d691f669 FB |
1918 | if (optind >= argc) |
1919 | usage(); | |
586314f2 FB |
1920 | filename = argv[optind]; |
1921 | ||
31e31b8a | 1922 | /* Zero out regs */ |
01ffc75b | 1923 | memset(regs, 0, sizeof(struct target_pt_regs)); |
31e31b8a FB |
1924 | |
1925 | /* Zero out image_info */ | |
1926 | memset(info, 0, sizeof(struct image_info)); | |
1927 | ||
74cd30b8 FB |
1928 | /* Scan interp_prefix dir for replacement files. */ |
1929 | init_paths(interp_prefix); | |
1930 | ||
83fb7adf FB |
1931 | /* NOTE: we need to init the CPU at this stage to get |
1932 | qemu_host_page_size */ | |
b346ff46 | 1933 | env = cpu_init(); |
15338fd7 | 1934 | global_env = env; |
3b46e624 | 1935 | |
b12b6a18 TS |
1936 | wrk = environ; |
1937 | while (*(wrk++)) | |
1938 | environ_count++; | |
1939 | ||
1940 | target_environ = malloc((environ_count + 1) * sizeof(char *)); | |
1941 | if (!target_environ) | |
1942 | abort(); | |
1943 | for (wrk = environ, dst = target_environ; *wrk; wrk++) { | |
1944 | if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11)) | |
1945 | continue; | |
1946 | *(dst++) = strdup(*wrk); | |
1947 | } | |
403f14ef | 1948 | *dst = NULL; /* NULL terminate target_environ */ |
b12b6a18 TS |
1949 | |
1950 | if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) { | |
1951 | printf("Error loading %s\n", filename); | |
1952 | _exit(1); | |
1953 | } | |
1954 | ||
1955 | for (wrk = target_environ; *wrk; wrk++) { | |
1956 | free(*wrk); | |
31e31b8a | 1957 | } |
3b46e624 | 1958 | |
b12b6a18 TS |
1959 | free(target_environ); |
1960 | ||
4b74fe1f | 1961 | if (loglevel) { |
54936004 | 1962 | page_dump(logfile); |
3b46e624 | 1963 | |
4b74fe1f FB |
1964 | fprintf(logfile, "start_brk 0x%08lx\n" , info->start_brk); |
1965 | fprintf(logfile, "end_code 0x%08lx\n" , info->end_code); | |
1966 | fprintf(logfile, "start_code 0x%08lx\n" , info->start_code); | |
e5fe0c52 | 1967 | fprintf(logfile, "start_data 0x%08lx\n" , info->start_data); |
4b74fe1f FB |
1968 | fprintf(logfile, "end_data 0x%08lx\n" , info->end_data); |
1969 | fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack); | |
1970 | fprintf(logfile, "brk 0x%08lx\n" , info->brk); | |
b346ff46 | 1971 | fprintf(logfile, "entry 0x%08lx\n" , info->entry); |
4b74fe1f | 1972 | } |
31e31b8a | 1973 | |
53a5960a | 1974 | target_set_brk(info->brk); |
31e31b8a | 1975 | syscall_init(); |
66fb9763 | 1976 | signal_init(); |
31e31b8a | 1977 | |
851e67a1 FB |
1978 | /* build Task State */ |
1979 | memset(ts, 0, sizeof(TaskState)); | |
1980 | env->opaque = ts; | |
1981 | ts->used = 1; | |
978efd6a | 1982 | ts->info = info; |
59faf6d6 | 1983 | env->user_mode_only = 1; |
3b46e624 | 1984 | |
b346ff46 | 1985 | #if defined(TARGET_I386) |
2e255c6b FB |
1986 | cpu_x86_set_cpl(env, 3); |
1987 | ||
3802ce26 | 1988 | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; |
1bde465e FB |
1989 | env->hflags |= HF_PE_MASK; |
1990 | if (env->cpuid_features & CPUID_SSE) { | |
1991 | env->cr[4] |= CR4_OSFXSR_MASK; | |
1992 | env->hflags |= HF_OSFXSR_MASK; | |
1993 | } | |
1994 | ||
415e561f FB |
1995 | /* flags setup : we activate the IRQs by default as in user mode */ |
1996 | env->eflags |= IF_MASK; | |
3b46e624 | 1997 | |
6dbad63e | 1998 | /* linux register setup */ |
84409ddb JM |
1999 | #if defined(TARGET_X86_64) |
2000 | env->regs[R_EAX] = regs->rax; | |
2001 | env->regs[R_EBX] = regs->rbx; | |
2002 | env->regs[R_ECX] = regs->rcx; | |
2003 | env->regs[R_EDX] = regs->rdx; | |
2004 | env->regs[R_ESI] = regs->rsi; | |
2005 | env->regs[R_EDI] = regs->rdi; | |
2006 | env->regs[R_EBP] = regs->rbp; | |
2007 | env->regs[R_ESP] = regs->rsp; | |
2008 | env->eip = regs->rip; | |
2009 | #else | |
0ecfa993 FB |
2010 | env->regs[R_EAX] = regs->eax; |
2011 | env->regs[R_EBX] = regs->ebx; | |
2012 | env->regs[R_ECX] = regs->ecx; | |
2013 | env->regs[R_EDX] = regs->edx; | |
2014 | env->regs[R_ESI] = regs->esi; | |
2015 | env->regs[R_EDI] = regs->edi; | |
2016 | env->regs[R_EBP] = regs->ebp; | |
2017 | env->regs[R_ESP] = regs->esp; | |
dab2ed99 | 2018 | env->eip = regs->eip; |
84409ddb | 2019 | #endif |
31e31b8a | 2020 | |
f4beb510 | 2021 | /* linux interrupt setup */ |
53a5960a | 2022 | env->idt.base = h2g(idt_table); |
f4beb510 FB |
2023 | env->idt.limit = sizeof(idt_table) - 1; |
2024 | set_idt(0, 0); | |
2025 | set_idt(1, 0); | |
2026 | set_idt(2, 0); | |
2027 | set_idt(3, 3); | |
2028 | set_idt(4, 3); | |
2029 | set_idt(5, 3); | |
2030 | set_idt(6, 0); | |
2031 | set_idt(7, 0); | |
2032 | set_idt(8, 0); | |
2033 | set_idt(9, 0); | |
2034 | set_idt(10, 0); | |
2035 | set_idt(11, 0); | |
2036 | set_idt(12, 0); | |
2037 | set_idt(13, 0); | |
2038 | set_idt(14, 0); | |
2039 | set_idt(15, 0); | |
2040 | set_idt(16, 0); | |
2041 | set_idt(17, 0); | |
2042 | set_idt(18, 0); | |
2043 | set_idt(19, 0); | |
2044 | set_idt(0x80, 3); | |
2045 | ||
6dbad63e | 2046 | /* linux segment setup */ |
53a5960a | 2047 | env->gdt.base = h2g(gdt_table); |
6dbad63e | 2048 | env->gdt.limit = sizeof(gdt_table) - 1; |
f4beb510 | 2049 | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
5fafdf24 | 2050 | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
f4beb510 FB |
2051 | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
2052 | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, | |
5fafdf24 | 2053 | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
f4beb510 | 2054 | (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
6dbad63e FB |
2055 | cpu_x86_load_seg(env, R_CS, __USER_CS); |
2056 | cpu_x86_load_seg(env, R_DS, __USER_DS); | |
2057 | cpu_x86_load_seg(env, R_ES, __USER_DS); | |
2058 | cpu_x86_load_seg(env, R_SS, __USER_DS); | |
2059 | cpu_x86_load_seg(env, R_FS, __USER_DS); | |
2060 | cpu_x86_load_seg(env, R_GS, __USER_DS); | |
92ccca6a | 2061 | |
d6eb40f6 TS |
2062 | /* This hack makes Wine work... */ |
2063 | env->segs[R_FS].selector = 0; | |
b346ff46 FB |
2064 | #elif defined(TARGET_ARM) |
2065 | { | |
2066 | int i; | |
b1f9be31 JM |
2067 | if (cpu_model == NULL) |
2068 | cpu_model = "arm926"; | |
2069 | cpu_arm_set_model(env, cpu_model); | |
b5ff1b31 | 2070 | cpsr_write(env, regs->uregs[16], 0xffffffff); |
b346ff46 FB |
2071 | for(i = 0; i < 16; i++) { |
2072 | env->regs[i] = regs->uregs[i]; | |
2073 | } | |
b346ff46 | 2074 | } |
93ac68bc | 2075 | #elif defined(TARGET_SPARC) |
060366c5 FB |
2076 | { |
2077 | int i; | |
925fb139 BS |
2078 | const sparc_def_t *def; |
2079 | #ifdef TARGET_SPARC64 | |
2080 | if (cpu_model == NULL) | |
2081 | cpu_model = "TI UltraSparc II"; | |
2082 | #else | |
2083 | if (cpu_model == NULL) | |
2084 | cpu_model = "Fujitsu MB86904"; | |
2085 | #endif | |
2086 | sparc_find_by_name(cpu_model, &def); | |
2087 | if (def == NULL) { | |
2088 | fprintf(stderr, "Unable to find Sparc CPU definition\n"); | |
2089 | exit(1); | |
2090 | } | |
2091 | cpu_sparc_register(env, def); | |
060366c5 FB |
2092 | env->pc = regs->pc; |
2093 | env->npc = regs->npc; | |
2094 | env->y = regs->y; | |
2095 | for(i = 0; i < 8; i++) | |
2096 | env->gregs[i] = regs->u_regs[i]; | |
2097 | for(i = 0; i < 8; i++) | |
2098 | env->regwptr[i] = regs->u_regs[i + 8]; | |
2099 | } | |
67867308 FB |
2100 | #elif defined(TARGET_PPC) |
2101 | { | |
3fc6c082 | 2102 | ppc_def_t *def; |
67867308 | 2103 | int i; |
3fc6c082 FB |
2104 | |
2105 | /* Choose and initialise CPU */ | |
b1f9be31 JM |
2106 | if (cpu_model == NULL) |
2107 | cpu_model = "750"; | |
2108 | ppc_find_by_name(cpu_model, &def); | |
3fc6c082 | 2109 | if (def == NULL) { |
c68ea704 | 2110 | cpu_abort(env, |
3fc6c082 FB |
2111 | "Unable to find PowerPC CPU definition\n"); |
2112 | } | |
c68ea704 | 2113 | cpu_ppc_register(env, def); |
3fc6c082 | 2114 | |
61190b14 | 2115 | for (i = 0; i < 32; i++) { |
4c2e770f | 2116 | if (i != 12 && i != 6 && i != 13) |
61190b14 FB |
2117 | env->msr[i] = (regs->msr >> i) & 1; |
2118 | } | |
84409ddb JM |
2119 | #if defined(TARGET_PPC64) |
2120 | msr_sf = 1; | |
2121 | #endif | |
67867308 FB |
2122 | env->nip = regs->nip; |
2123 | for(i = 0; i < 32; i++) { | |
2124 | env->gpr[i] = regs->gpr[i]; | |
2125 | } | |
2126 | } | |
e6e5906b PB |
2127 | #elif defined(TARGET_M68K) |
2128 | { | |
0633879f | 2129 | if (cpu_model == NULL) |
0402f767 | 2130 | cpu_model = "any"; |
0633879f | 2131 | if (cpu_m68k_set_model(env, cpu_model)) { |
e6e5906b PB |
2132 | cpu_abort(cpu_single_env, |
2133 | "Unable to find m68k CPU definition\n"); | |
2134 | } | |
e6e5906b PB |
2135 | env->pc = regs->pc; |
2136 | env->dregs[0] = regs->d0; | |
2137 | env->dregs[1] = regs->d1; | |
2138 | env->dregs[2] = regs->d2; | |
2139 | env->dregs[3] = regs->d3; | |
2140 | env->dregs[4] = regs->d4; | |
2141 | env->dregs[5] = regs->d5; | |
2142 | env->dregs[6] = regs->d6; | |
2143 | env->dregs[7] = regs->d7; | |
2144 | env->aregs[0] = regs->a0; | |
2145 | env->aregs[1] = regs->a1; | |
2146 | env->aregs[2] = regs->a2; | |
2147 | env->aregs[3] = regs->a3; | |
2148 | env->aregs[4] = regs->a4; | |
2149 | env->aregs[5] = regs->a5; | |
2150 | env->aregs[6] = regs->a6; | |
2151 | env->aregs[7] = regs->usp; | |
2152 | env->sr = regs->sr; | |
2153 | ts->sim_syscalls = 1; | |
2154 | } | |
048f6b4d FB |
2155 | #elif defined(TARGET_MIPS) |
2156 | { | |
cff4cbed | 2157 | mips_def_t *def; |
048f6b4d FB |
2158 | int i; |
2159 | ||
cff4cbed TS |
2160 | /* Choose and initialise CPU */ |
2161 | if (cpu_model == NULL) | |
2162 | cpu_model = "24Kf"; | |
2163 | mips_find_by_name(cpu_model, &def); | |
2164 | if (def == NULL) | |
2165 | cpu_abort(env, "Unable to find MIPS CPU definition\n"); | |
2166 | cpu_mips_register(env, def); | |
2167 | ||
048f6b4d | 2168 | for(i = 0; i < 32; i++) { |
ead9360e | 2169 | env->gpr[i][env->current_tc] = regs->regs[i]; |
048f6b4d | 2170 | } |
ead9360e | 2171 | env->PC[env->current_tc] = regs->cp0_epc; |
048f6b4d | 2172 | } |
fdf9b3e8 FB |
2173 | #elif defined(TARGET_SH4) |
2174 | { | |
2175 | int i; | |
2176 | ||
2177 | for(i = 0; i < 16; i++) { | |
2178 | env->gregs[i] = regs->regs[i]; | |
2179 | } | |
2180 | env->pc = regs->pc; | |
2181 | } | |
7a3148a9 JM |
2182 | #elif defined(TARGET_ALPHA) |
2183 | { | |
2184 | int i; | |
2185 | ||
2186 | for(i = 0; i < 28; i++) { | |
2187 | env->ir[i] = ((target_ulong *)regs)[i]; | |
2188 | } | |
2189 | env->ipr[IPR_USP] = regs->usp; | |
2190 | env->ir[30] = regs->usp; | |
2191 | env->pc = regs->pc; | |
2192 | env->unique = regs->unique; | |
2193 | } | |
b346ff46 FB |
2194 | #else |
2195 | #error unsupported target CPU | |
2196 | #endif | |
31e31b8a | 2197 | |
a87295e8 PB |
2198 | #if defined(TARGET_ARM) || defined(TARGET_M68K) |
2199 | ts->stack_base = info->start_stack; | |
2200 | ts->heap_base = info->brk; | |
2201 | /* This will be filled in on the first SYS_HEAPINFO call. */ | |
2202 | ts->heap_limit = 0; | |
2203 | #endif | |
2204 | ||
74c33bed FB |
2205 | if (gdbstub_port) { |
2206 | gdbserver_start (gdbstub_port); | |
1fddef4b FB |
2207 | gdb_handlesig(env, 0); |
2208 | } | |
1b6b029e FB |
2209 | cpu_loop(env); |
2210 | /* never exits */ | |
31e31b8a FB |
2211 | return 0; |
2212 | } |