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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
530e7615
BS		 18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 * MA 02110-1301, USA.
31e31b8a
FB		 20 */
21#include <stdlib.h>
22#include <stdio.h>
23#include <stdarg.h>
04369ff2 24#include <string.h>
31e31b8a 25#include <errno.h>
0ecfa993 26#include <unistd.h>
e441570f 27#include <sys/mman.h>
edf8e2af 28#include <sys/syscall.h>
31e31b8a 29
3ef693a0 30#include "qemu.h"
ca10f867 31#include "qemu-common.h"
902b3d5c 32#include "cache-utils.h"
d5975363
PB		 33/* For tb_lock */
34#include "exec-all.h"
31e31b8a 35
04a6dfeb
AJ		 36
37#include "envlist.h"
38
3ef693a0 39#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 40
d088d664
AJ		 41char *exec_path;
42
1b530a6d
AJ		 43int singlestep;
44
74cd30b8 45static const char *interp_prefix = CONFIG_QEMU_PREFIX;
c5937220 46const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 47
3a4739d6 48#if defined(__i386__) && !defined(CONFIG_STATIC)
f801f97e
FB		 49/* Force usage of an ELF interpreter even if it is an ELF shared
50 object ! */
51const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
4304763b 52#endif
74cd30b8 53
93ac68bc 54/* for recent libc, we add these dummy symbols which are not declared
74cd30b8 55 when generating a linked object (bug in ld ?) */
fbf59244 56#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46027c07
FB		 57asm(".globl __preinit_array_start\n"
58 ".globl __preinit_array_end\n"
59 ".globl __init_array_start\n"
60 ".globl __init_array_end\n"
61 ".globl __fini_array_start\n"
62 ".globl __fini_array_end\n"
63 ".section \".rodata\"\n"
64 "__preinit_array_start:\n"
65 "__preinit_array_end:\n"
66 "__init_array_start:\n"
67 "__init_array_end:\n"
68 "__fini_array_start:\n"
69 "__fini_array_end:\n"
7bba1ee8
TS		 70 ".long 0\n"
71 ".previous\n");
74cd30b8
FB		 72#endif
73
9de5e440
FB		 74/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
75 we allocate a bigger stack. Need a better solution, for example
76 by remapping the process stack directly at the right place */
77unsigned long x86_stack_size = 512 * 1024;
31e31b8a
FB		 78
79void gemu_log(const char *fmt, ...)
80{
81 va_list ap;
82
83 va_start(ap, fmt);
84 vfprintf(stderr, fmt, ap);
85 va_end(ap);
86}
87
8fcd3692 88#if defined(TARGET_I386)
a541f297 89int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 90{
91 return -1;
92}
8fcd3692 93#endif
92ccca6a 94
28ab0e2e
FB		 95/* timers for rdtsc */
96
1dce7c3c 97#if 0
28ab0e2e
FB		 98
99static uint64_t emu_time;
100
101int64_t cpu_get_real_ticks(void)
102{
103 return emu_time++;
104}
105
106#endif
107
d5975363
PB		 108#if defined(USE_NPTL)
109/***********************************************************/
110/* Helper routines for implementing atomic operations. */
111
112/* To implement exclusive operations we force all cpus to syncronise.
113 We don't require a full sync, only that no cpus are executing guest code.
114 The alternative is to map target atomic ops onto host equivalents,
115 which requires quite a lot of per host/target work. */
c2764719 116static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 117static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
118static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
119static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
120static int pending_cpus;
121
122/* Make sure everything is in a consistent state for calling fork(). */
123void fork_start(void)
124{
125 mmap_fork_start();
126 pthread_mutex_lock(&tb_lock);
127 pthread_mutex_lock(&exclusive_lock);
128}
129
130void fork_end(int child)
131{
132 if (child) {
133 /* Child processes created by fork() only have a single thread.
134 Discard information about the parent threads. */
135 first_cpu = thread_env;
136 thread_env->next_cpu = NULL;
137 pending_cpus = 0;
138 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 139 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 140 pthread_cond_init(&exclusive_cond, NULL);
141 pthread_cond_init(&exclusive_resume, NULL);
142 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 143 gdbserver_fork(thread_env);
d5975363
PB		 144 } else {
145 pthread_mutex_unlock(&exclusive_lock);
146 pthread_mutex_unlock(&tb_lock);
147 }
148 mmap_fork_end(child);
149}
150
151/* Wait for pending exclusive operations to complete. The exclusive lock
152 must be held. */
153static inline void exclusive_idle(void)
154{
155 while (pending_cpus) {
156 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
157 }
158}
159
160/* Start an exclusive operation.
161 Must only be called from outside cpu_arm_exec. */
162static inline void start_exclusive(void)
163{
164 CPUState *other;
165 pthread_mutex_lock(&exclusive_lock);
166 exclusive_idle();
167
168 pending_cpus = 1;
169 /* Make all other cpus stop executing. */
170 for (other = first_cpu; other; other = other->next_cpu) {
171 if (other->running) {
172 pending_cpus++;
3098dba0 173 cpu_exit(other);
d5975363
PB		 174 }
175 }
176 if (pending_cpus > 1) {
177 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
178 }
179}
180
181/* Finish an exclusive operation. */
182static inline void end_exclusive(void)
183{
184 pending_cpus = 0;
185 pthread_cond_broadcast(&exclusive_resume);
186 pthread_mutex_unlock(&exclusive_lock);
187}
188
189/* Wait for exclusive ops to finish, and begin cpu execution. */
190static inline void cpu_exec_start(CPUState *env)
191{
192 pthread_mutex_lock(&exclusive_lock);
193 exclusive_idle();
194 env->running = 1;
195 pthread_mutex_unlock(&exclusive_lock);
196}
197
198/* Mark cpu as not executing, and release pending exclusive ops. */
199static inline void cpu_exec_end(CPUState *env)
200{
201 pthread_mutex_lock(&exclusive_lock);
202 env->running = 0;
203 if (pending_cpus > 1) {
204 pending_cpus--;
205 if (pending_cpus == 1) {
206 pthread_cond_signal(&exclusive_cond);
207 }
208 }
209 exclusive_idle();
210 pthread_mutex_unlock(&exclusive_lock);
211}
c2764719
PB		 212
213void cpu_list_lock(void)
214{
215 pthread_mutex_lock(&cpu_list_mutex);
216}
217
218void cpu_list_unlock(void)
219{
220 pthread_mutex_unlock(&cpu_list_mutex);
221}
d5975363
PB		 222#else /* if !USE_NPTL */
223/* These are no-ops because we are not threadsafe. */
224static inline void cpu_exec_start(CPUState *env)
225{
226}
227
228static inline void cpu_exec_end(CPUState *env)
229{
230}
231
232static inline void start_exclusive(void)
233{
234}
235
236static inline void end_exclusive(void)
237{
238}
239
240void fork_start(void)
241{
242}
243
244void fork_end(int child)
245{
2b1319c8
AJ		 246 if (child) {
247 gdbserver_fork(thread_env);
248 }
d5975363 249}
c2764719
PB		 250
251void cpu_list_lock(void)
252{
253}
254
255void cpu_list_unlock(void)
256{
257}
d5975363
PB		 258#endif
259
260
a541f297
FB		 261#ifdef TARGET_I386
262/***********************************************************/
263/* CPUX86 core interface */
264
02a1602e
FB		 265void cpu_smm_update(CPUState *env)
266{
267}
268
28ab0e2e
FB		 269uint64_t cpu_get_tsc(CPUX86State *env)
270{
271 return cpu_get_real_ticks();
272}
273
5fafdf24 274static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 275 int flags)
6dbad63e 276{
f4beb510 277 unsigned int e1, e2;
53a5960a 278 uint32_t *p;
6dbad63e
FB		 279 e1 = (addr << 16) | (limit & 0xffff);
280 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 281 e2 |= flags;
53a5960a 282 p = ptr;
d538e8f5 283 p[0] = tswap32(e1);
284 p[1] = tswap32(e2);
f4beb510
FB		 285}
286
e441570f 287static uint64_t *idt_table;
eb38c52c 288#ifdef TARGET_X86_64
d2fd1af7
FB		 289static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
290 uint64_t addr, unsigned int sel)
f4beb510 291{
4dbc422b 292 uint32_t *p, e1, e2;
f4beb510
FB		 293 e1 = (addr & 0xffff) | (sel << 16);
294 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 295 p = ptr;
4dbc422b
FB		 296 p[0] = tswap32(e1);
297 p[1] = tswap32(e2);
298 p[2] = tswap32(addr >> 32);
299 p[3] = 0;
6dbad63e 300}
d2fd1af7
FB		 301/* only dpl matters as we do only user space emulation */
302static void set_idt(int n, unsigned int dpl)
303{
304 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
305}
306#else
d2fd1af7
FB		 307static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
308 uint32_t addr, unsigned int sel)
309{
4dbc422b 310 uint32_t *p, e1, e2;
d2fd1af7
FB		 311 e1 = (addr & 0xffff) | (sel << 16);
312 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
313 p = ptr;
4dbc422b
FB		 314 p[0] = tswap32(e1);
315 p[1] = tswap32(e2);
d2fd1af7
FB		 316}
317
f4beb510
FB		 318/* only dpl matters as we do only user space emulation */
319static void set_idt(int n, unsigned int dpl)
320{
321 set_gate(idt_table + n, 0, dpl, 0, 0);
322}
d2fd1af7 323#endif
31e31b8a 324
89e957e7 325void cpu_loop(CPUX86State *env)
1b6b029e 326{
bc8a22cc 327 int trapnr;
992f48a0 328 abi_ulong pc;
9de5e440 329 target_siginfo_t info;
851e67a1 330
1b6b029e 331 for(;;) {
bc8a22cc 332 trapnr = cpu_x86_exec(env);
bc8a22cc 333 switch(trapnr) {
f4beb510 334 case 0x80:
d2fd1af7 335 /* linux syscall from int $0x80 */
5fafdf24
TS		 336 env->regs[R_EAX] = do_syscall(env,
337 env->regs[R_EAX],
f4beb510
FB		 338 env->regs[R_EBX],
339 env->regs[R_ECX],
340 env->regs[R_EDX],
341 env->regs[R_ESI],
342 env->regs[R_EDI],
343 env->regs[R_EBP]);
344 break;
d2fd1af7
FB		 345#ifndef TARGET_ABI32
346 case EXCP_SYSCALL:
347 /* linux syscall from syscall intruction */
348 env->regs[R_EAX] = do_syscall(env,
349 env->regs[R_EAX],
350 env->regs[R_EDI],
351 env->regs[R_ESI],
352 env->regs[R_EDX],
353 env->regs[10],
354 env->regs[8],
355 env->regs[9]);
356 env->eip = env->exception_next_eip;
357 break;
358#endif
f4beb510
FB		 359 case EXCP0B_NOSEG:
360 case EXCP0C_STACK:
361 info.si_signo = SIGBUS;
362 info.si_errno = 0;
363 info.si_code = TARGET_SI_KERNEL;
364 info._sifields._sigfault._addr = 0;
624f7979 365 queue_signal(env, info.si_signo, &info);
f4beb510 366 break;
1b6b029e 367 case EXCP0D_GPF:
d2fd1af7 368 /* XXX: potential problem if ABI32 */
84409ddb 369#ifndef TARGET_X86_64
851e67a1 370 if (env->eflags & VM_MASK) {
89e957e7 371 handle_vm86_fault(env);
84409ddb
JM		 372 } else
373#endif
374 {
f4beb510
FB		 375 info.si_signo = SIGSEGV;
376 info.si_errno = 0;
377 info.si_code = TARGET_SI_KERNEL;
378 info._sifields._sigfault._addr = 0;
624f7979 379 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 380 }
381 break;
b689bc57
FB		 382 case EXCP0E_PAGE:
383 info.si_signo = SIGSEGV;
384 info.si_errno = 0;
385 if (!(env->error_code & 1))
386 info.si_code = TARGET_SEGV_MAPERR;
387 else
388 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 389 info._sifields._sigfault._addr = env->cr[2];
624f7979 390 queue_signal(env, info.si_signo, &info);
b689bc57 391 break;
9de5e440 392 case EXCP00_DIVZ:
84409ddb 393#ifndef TARGET_X86_64
bc8a22cc 394 if (env->eflags & VM_MASK) {
447db213 395 handle_vm86_trap(env, trapnr);
84409ddb
JM		 396 } else
397#endif
398 {
bc8a22cc
FB		 399 /* division by zero */
400 info.si_signo = SIGFPE;
401 info.si_errno = 0;
402 info.si_code = TARGET_FPE_INTDIV;
403 info._sifields._sigfault._addr = env->eip;
624f7979 404 queue_signal(env, info.si_signo, &info);
bc8a22cc 405 }
9de5e440 406 break;
01df040b 407 case EXCP01_DB:
447db213 408 case EXCP03_INT3:
84409ddb 409#ifndef TARGET_X86_64
447db213
FB		 410 if (env->eflags & VM_MASK) {
411 handle_vm86_trap(env, trapnr);
84409ddb
JM		 412 } else
413#endif
414 {
447db213
FB		 415 info.si_signo = SIGTRAP;
416 info.si_errno = 0;
01df040b 417 if (trapnr == EXCP01_DB) {
447db213
FB		 418 info.si_code = TARGET_TRAP_BRKPT;
419 info._sifields._sigfault._addr = env->eip;
420 } else {
421 info.si_code = TARGET_SI_KERNEL;
422 info._sifields._sigfault._addr = 0;
423 }
624f7979 424 queue_signal(env, info.si_signo, &info);
447db213
FB		 425 }
426 break;
9de5e440
FB		 427 case EXCP04_INTO:
428 case EXCP05_BOUND:
84409ddb 429#ifndef TARGET_X86_64
bc8a22cc 430 if (env->eflags & VM_MASK) {
447db213 431 handle_vm86_trap(env, trapnr);
84409ddb
JM		 432 } else
433#endif
434 {
bc8a22cc
FB		 435 info.si_signo = SIGSEGV;
436 info.si_errno = 0;
b689bc57 437 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 438 info._sifields._sigfault._addr = 0;
624f7979 439 queue_signal(env, info.si_signo, &info);
bc8a22cc 440 }
9de5e440
FB		 441 break;
442 case EXCP06_ILLOP:
443 info.si_signo = SIGILL;
444 info.si_errno = 0;
445 info.si_code = TARGET_ILL_ILLOPN;
446 info._sifields._sigfault._addr = env->eip;
624f7979 447 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 448 break;
449 case EXCP_INTERRUPT:
450 /* just indicate that signals should be handled asap */
451 break;
1fddef4b
FB		 452 case EXCP_DEBUG:
453 {
454 int sig;
455
456 sig = gdb_handlesig (env, TARGET_SIGTRAP);
457 if (sig)
458 {
459 info.si_signo = sig;
460 info.si_errno = 0;
461 info.si_code = TARGET_TRAP_BRKPT;
624f7979 462 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 463 }
464 }
465 break;
1b6b029e 466 default:
970a87a6 467 pc = env->segs[R_CS].base + env->eip;
5fafdf24 468 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 469 (long)pc, trapnr);
1b6b029e
FB		 470 abort();
471 }
66fb9763 472 process_pending_signals(env);
1b6b029e
FB		 473 }
474}
b346ff46
FB		 475#endif
476
477#ifdef TARGET_ARM
478
992f48a0 479static void arm_cache_flush(abi_ulong start, abi_ulong last)
6f1f31c0 480{
992f48a0 481 abi_ulong addr, last1;
6f1f31c0
FB		 482
483 if (last < start)
484 return;
485 addr = start;
486 for(;;) {
487 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
488 if (last1 > last)
489 last1 = last;
490 tb_invalidate_page_range(addr, last1 + 1);
491 if (last1 == last)
492 break;
493 addr = last1 + 1;
494 }
495}
496
fbb4a2e3
PB		 497/* Handle a jump to the kernel code page. */
498static int
499do_kernel_trap(CPUARMState *env)
500{
501 uint32_t addr;
502 uint32_t cpsr;
503 uint32_t val;
504
505 switch (env->regs[15]) {
506 case 0xffff0fa0: /* __kernel_memory_barrier */
507 /* ??? No-op. Will need to do better for SMP. */
508 break;
509 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 510 /* XXX: This only works between threads, not between processes.
511 It's probably possible to implement this with native host
512 operations. However things like ldrex/strex are much harder so
513 there's not much point trying. */
514 start_exclusive();
fbb4a2e3
PB		 515 cpsr = cpsr_read(env);
516 addr = env->regs[2];
517 /* FIXME: This should SEGV if the access fails. */
518 if (get_user_u32(val, addr))
519 val = ~env->regs[0];
520 if (val == env->regs[0]) {
521 val = env->regs[1];
522 /* FIXME: Check for segfaults. */
523 put_user_u32(val, addr);
524 env->regs[0] = 0;
525 cpsr |= CPSR_C;
526 } else {
527 env->regs[0] = -1;
528 cpsr &= ~CPSR_C;
529 }
530 cpsr_write(env, cpsr, CPSR_C);
d5975363 531 end_exclusive();
fbb4a2e3
PB		 532 break;
533 case 0xffff0fe0: /* __kernel_get_tls */
534 env->regs[0] = env->cp15.c13_tls2;
535 break;
536 default:
537 return 1;
538 }
539 /* Jump back to the caller. */
540 addr = env->regs[14];
541 if (addr & 1) {
542 env->thumb = 1;
543 addr &= ~1;
544 }
545 env->regs[15] = addr;
546
547 return 0;
548}
549
b346ff46
FB		 550void cpu_loop(CPUARMState *env)
551{
552 int trapnr;
553 unsigned int n, insn;
554 target_siginfo_t info;
b5ff1b31 555 uint32_t addr;
3b46e624 556
b346ff46 557 for(;;) {
d5975363 558 cpu_exec_start(env);
b346ff46 559 trapnr = cpu_arm_exec(env);
d5975363 560 cpu_exec_end(env);
b346ff46
FB		 561 switch(trapnr) {
562 case EXCP_UDEF:
c6981055
FB		 563 {
564 TaskState *ts = env->opaque;
565 uint32_t opcode;
6d9a42be 566 int rc;
c6981055
FB		 567
568 /* we handle the FPU emulation here, as Linux */
569 /* we get the opcode */
2f619698
FB		 570 /* FIXME - what to do if get_user() fails? */
571 get_user_u32(opcode, env->regs[15]);
3b46e624 572
6d9a42be
AJ		 573 rc = EmulateAll(opcode, &ts->fpa, env);
574 if (rc == 0) { /* illegal instruction */
c6981055
FB		 575 info.si_signo = SIGILL;
576 info.si_errno = 0;
577 info.si_code = TARGET_ILL_ILLOPN;
578 info._sifields._sigfault._addr = env->regs[15];
624f7979 579 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 580 } else if (rc < 0) { /* FP exception */
581 int arm_fpe=0;
582
583 /* translate softfloat flags to FPSR flags */
584 if (-rc & float_flag_invalid)
585 arm_fpe |= BIT_IOC;
586 if (-rc & float_flag_divbyzero)
587 arm_fpe |= BIT_DZC;
588 if (-rc & float_flag_overflow)
589 arm_fpe |= BIT_OFC;
590 if (-rc & float_flag_underflow)
591 arm_fpe |= BIT_UFC;
592 if (-rc & float_flag_inexact)
593 arm_fpe |= BIT_IXC;
594
595 FPSR fpsr = ts->fpa.fpsr;
596 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
597
598 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
599 info.si_signo = SIGFPE;
600 info.si_errno = 0;
601
602 /* ordered by priority, least first */
603 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
604 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
605 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
606 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
607 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
608
609 info._sifields._sigfault._addr = env->regs[15];
624f7979 610 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 611 } else {
612 env->regs[15] += 4;
613 }
614
615 /* accumulate unenabled exceptions */
616 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
617 fpsr |= BIT_IXC;
618 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
619 fpsr |= BIT_UFC;
620 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
621 fpsr |= BIT_OFC;
622 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
623 fpsr |= BIT_DZC;
624 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
625 fpsr |= BIT_IOC;
626 ts->fpa.fpsr=fpsr;
627 } else { /* everything OK */
c6981055
FB		 628 /* increment PC */
629 env->regs[15] += 4;
630 }
631 }
b346ff46
FB		 632 break;
633 case EXCP_SWI:
06c949e6 634 case EXCP_BKPT:
b346ff46 635 {
ce4defa0 636 env->eabi = 1;
b346ff46 637 /* system call */
06c949e6
PB		 638 if (trapnr == EXCP_BKPT) {
639 if (env->thumb) {
2f619698
FB		 640 /* FIXME - what to do if get_user() fails? */
641 get_user_u16(insn, env->regs[15]);
06c949e6
PB		 642 n = insn & 0xff;
643 env->regs[15] += 2;
644 } else {
2f619698
FB		 645 /* FIXME - what to do if get_user() fails? */
646 get_user_u32(insn, env->regs[15]);
06c949e6
PB		 647 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
648 env->regs[15] += 4;
649 }
192c7bd9 650 } else {
06c949e6 651 if (env->thumb) {
2f619698
FB		 652 /* FIXME - what to do if get_user() fails? */
653 get_user_u16(insn, env->regs[15] - 2);
06c949e6
PB		 654 n = insn & 0xff;
655 } else {
2f619698
FB		 656 /* FIXME - what to do if get_user() fails? */
657 get_user_u32(insn, env->regs[15] - 4);
06c949e6
PB		 658 n = insn & 0xffffff;
659 }
192c7bd9
FB		 660 }
661
6f1f31c0
FB		 662 if (n == ARM_NR_cacheflush) {
663 arm_cache_flush(env->regs[0], env->regs[1]);
a4f81979
FB		 664 } else if (n == ARM_NR_semihosting
665 || n == ARM_NR_thumb_semihosting) {
666 env->regs[0] = do_arm_semihosting (env);
ce4defa0 667 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 668 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 669 /* linux syscall */
ce4defa0 670 if (env->thumb || n == 0) {
192c7bd9
FB		 671 n = env->regs[7];
672 } else {
673 n -= ARM_SYSCALL_BASE;
ce4defa0 674 env->eabi = 0;
192c7bd9 675 }
fbb4a2e3
PB		 676 if ( n > ARM_NR_BASE) {
677 switch (n) {
678 case ARM_NR_cacheflush:
679 arm_cache_flush(env->regs[0], env->regs[1]);
680 break;
681 case ARM_NR_set_tls:
682 cpu_set_tls(env, env->regs[0]);
683 env->regs[0] = 0;
684 break;
685 default:
686 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
687 n);
688 env->regs[0] = -TARGET_ENOSYS;
689 break;
690 }
691 } else {
692 env->regs[0] = do_syscall(env,
693 n,
694 env->regs[0],
695 env->regs[1],
696 env->regs[2],
697 env->regs[3],
698 env->regs[4],
699 env->regs[5]);
700 }
b346ff46
FB		 701 } else {
702 goto error;
703 }
704 }
705 break;
43fff238
FB		 706 case EXCP_INTERRUPT:
707 /* just indicate that signals should be handled asap */
708 break;
68016c62 709 case EXCP_PREFETCH_ABORT:
eae473c1 710 addr = env->cp15.c6_insn;
b5ff1b31 711 goto do_segv;
68016c62 712 case EXCP_DATA_ABORT:
eae473c1 713 addr = env->cp15.c6_data;
b5ff1b31
FB		 714 goto do_segv;
715 do_segv:
68016c62
FB		 716 {
717 info.si_signo = SIGSEGV;
718 info.si_errno = 0;
719 /* XXX: check env->error_code */
720 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 721 info._sifields._sigfault._addr = addr;
624f7979 722 queue_signal(env, info.si_signo, &info);
68016c62
FB		 723 }
724 break;
1fddef4b
FB		 725 case EXCP_DEBUG:
726 {
727 int sig;
728
729 sig = gdb_handlesig (env, TARGET_SIGTRAP);
730 if (sig)
731 {
732 info.si_signo = sig;
733 info.si_errno = 0;
734 info.si_code = TARGET_TRAP_BRKPT;
624f7979 735 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 736 }
737 }
738 break;
fbb4a2e3
PB		 739 case EXCP_KERNEL_TRAP:
740 if (do_kernel_trap(env))
741 goto error;
742 break;
b346ff46
FB		 743 default:
744 error:
5fafdf24 745 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 746 trapnr);
7fe48483 747 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 748 abort();
749 }
750 process_pending_signals(env);
751 }
752}
753
754#endif
1b6b029e 755
93ac68bc 756#ifdef TARGET_SPARC
ed23fbd9 757#define SPARC64_STACK_BIAS 2047
93ac68bc 758
060366c5
FB		 759//#define DEBUG_WIN
760
2623cbaf
FB		 761/* WARNING: dealing with register windows _is_ complicated. More info
762 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 763static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
764{
1a14026e 765 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 766 /* wrap handling : if cwp is on the last window, then we use the
767 registers 'after' the end */
1a14026e
BS		 768 if (index < 8 && env->cwp == env->nwindows - 1)
769 index += 16 * env->nwindows;
060366c5
FB		 770 return index;
771}
772
2623cbaf
FB		 773/* save the register window 'cwp1' */
774static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 775{
2623cbaf 776 unsigned int i;
992f48a0 777 abi_ulong sp_ptr;
3b46e624 778
53a5960a 779 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 780#ifdef TARGET_SPARC64
781 if (sp_ptr & 3)
782 sp_ptr += SPARC64_STACK_BIAS;
783#endif
060366c5 784#if defined(DEBUG_WIN)
2daf0284
BS		 785 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
786 sp_ptr, cwp1);
060366c5 787#endif
2623cbaf 788 for(i = 0; i < 16; i++) {
2f619698
FB		 789 /* FIXME - what to do if put_user() fails? */
790 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 791 sp_ptr += sizeof(abi_ulong);
2623cbaf 792 }
060366c5
FB		 793}
794
795static void save_window(CPUSPARCState *env)
796{
5ef54116 797#ifndef TARGET_SPARC64
2623cbaf 798 unsigned int new_wim;
1a14026e
BS		 799 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
800 ((1LL << env->nwindows) - 1);
801 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 802 env->wim = new_wim;
5ef54116 803#else
1a14026e 804 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 805 env->cansave++;
806 env->canrestore--;
807#endif
060366c5
FB		 808}
809
810static void restore_window(CPUSPARCState *env)
811{
eda52953
BS		 812#ifndef TARGET_SPARC64
813 unsigned int new_wim;
814#endif
815 unsigned int i, cwp1;
992f48a0 816 abi_ulong sp_ptr;
3b46e624 817
eda52953 818#ifndef TARGET_SPARC64
1a14026e
BS		 819 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
820 ((1LL << env->nwindows) - 1);
eda52953 821#endif
3b46e624 822
060366c5 823 /* restore the invalid window */
1a14026e 824 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 825 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 826#ifdef TARGET_SPARC64
827 if (sp_ptr & 3)
828 sp_ptr += SPARC64_STACK_BIAS;
829#endif
060366c5 830#if defined(DEBUG_WIN)
2daf0284
BS		 831 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
832 sp_ptr, cwp1);
060366c5 833#endif
2623cbaf 834 for(i = 0; i < 16; i++) {
2f619698
FB		 835 /* FIXME - what to do if get_user() fails? */
836 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 837 sp_ptr += sizeof(abi_ulong);
2623cbaf 838 }
5ef54116
FB		 839#ifdef TARGET_SPARC64
840 env->canrestore++;
1a14026e
BS		 841 if (env->cleanwin < env->nwindows - 1)
842 env->cleanwin++;
5ef54116 843 env->cansave--;
eda52953
BS		 844#else
845 env->wim = new_wim;
5ef54116 846#endif
060366c5
FB		 847}
848
849static void flush_windows(CPUSPARCState *env)
850{
851 int offset, cwp1;
2623cbaf
FB		 852
853 offset = 1;
060366c5
FB		 854 for(;;) {
855 /* if restore would invoke restore_window(), then we can stop */
1a14026e 856 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 857#ifndef TARGET_SPARC64
060366c5
FB		 858 if (env->wim & (1 << cwp1))
859 break;
eda52953
BS		 860#else
861 if (env->canrestore == 0)
862 break;
863 env->cansave++;
864 env->canrestore--;
865#endif
2623cbaf 866 save_window_offset(env, cwp1);
060366c5
FB		 867 offset++;
868 }
1a14026e 869 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 870#ifndef TARGET_SPARC64
871 /* set wim so that restore will reload the registers */
2623cbaf 872 env->wim = 1 << cwp1;
eda52953 873#endif
2623cbaf
FB		 874#if defined(DEBUG_WIN)
875 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 876#endif
2623cbaf 877}
060366c5 878
93ac68bc
FB		 879void cpu_loop (CPUSPARCState *env)
880{
060366c5 881 int trapnr, ret;
61ff6f58 882 target_siginfo_t info;
3b46e624 883
060366c5
FB		 884 while (1) {
885 trapnr = cpu_sparc_exec (env);
3b46e624 886
060366c5 887 switch (trapnr) {
5ef54116 888#ifndef TARGET_SPARC64
5fafdf24 889 case 0x88:
060366c5 890 case 0x90:
5ef54116 891#else
cb33da57 892 case 0x110:
5ef54116
FB		 893 case 0x16d:
894#endif
060366c5 895 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 896 env->regwptr[0], env->regwptr[1],
897 env->regwptr[2], env->regwptr[3],
060366c5
FB		 898 env->regwptr[4], env->regwptr[5]);
899 if ((unsigned int)ret >= (unsigned int)(-515)) {
992f48a0 900#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 901 env->xcc |= PSR_CARRY;
902#else
060366c5 903 env->psr |= PSR_CARRY;
27908725 904#endif
060366c5
FB		 905 ret = -ret;
906 } else {
992f48a0 907#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 908 env->xcc &= ~PSR_CARRY;
909#else
060366c5 910 env->psr &= ~PSR_CARRY;
27908725 911#endif
060366c5
FB		 912 }
913 env->regwptr[0] = ret;
914 /* next instruction */
915 env->pc = env->npc;
916 env->npc = env->npc + 4;
917 break;
918 case 0x83: /* flush windows */
992f48a0
BS		 919#ifdef TARGET_ABI32
920 case 0x103:
921#endif
2623cbaf 922 flush_windows(env);
060366c5
FB		 923 /* next instruction */
924 env->pc = env->npc;
925 env->npc = env->npc + 4;
926 break;
3475187d 927#ifndef TARGET_SPARC64
060366c5
FB		 928 case TT_WIN_OVF: /* window overflow */
929 save_window(env);
930 break;
931 case TT_WIN_UNF: /* window underflow */
932 restore_window(env);
933 break;
61ff6f58
FB		 934 case TT_TFAULT:
935 case TT_DFAULT:
936 {
937 info.si_signo = SIGSEGV;
938 info.si_errno = 0;
939 /* XXX: check env->error_code */
940 info.si_code = TARGET_SEGV_MAPERR;
941 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 942 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 943 }
944 break;
3475187d 945#else
5ef54116
FB		 946 case TT_SPILL: /* window overflow */
947 save_window(env);
948 break;
949 case TT_FILL: /* window underflow */
950 restore_window(env);
951 break;
7f84a729
BS		 952 case TT_TFAULT:
953 case TT_DFAULT:
954 {
955 info.si_signo = SIGSEGV;
956 info.si_errno = 0;
957 /* XXX: check env->error_code */
958 info.si_code = TARGET_SEGV_MAPERR;
959 if (trapnr == TT_DFAULT)
960 info._sifields._sigfault._addr = env->dmmuregs[4];
961 else
375ee38b 962 info._sifields._sigfault._addr = env->tsptr->tpc;
624f7979 963 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 964 }
965 break;
27524dc3 966#ifndef TARGET_ABI32
5bfb56b2
BS		 967 case 0x16e:
968 flush_windows(env);
969 sparc64_get_context(env);
970 break;
971 case 0x16f:
972 flush_windows(env);
973 sparc64_set_context(env);
974 break;
27524dc3 975#endif
3475187d 976#endif
48dc41eb
FB		 977 case EXCP_INTERRUPT:
978 /* just indicate that signals should be handled asap */
979 break;
1fddef4b
FB		 980 case EXCP_DEBUG:
981 {
982 int sig;
983
984 sig = gdb_handlesig (env, TARGET_SIGTRAP);
985 if (sig)
986 {
987 info.si_signo = sig;
988 info.si_errno = 0;
989 info.si_code = TARGET_TRAP_BRKPT;
624f7979 990 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 991 }
992 }
993 break;
060366c5
FB		 994 default:
995 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 996 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 997 exit (1);
998 }
999 process_pending_signals (env);
1000 }
93ac68bc
FB		 1001}
1002
1003#endif
1004
67867308 1005#ifdef TARGET_PPC
9fddaa0c
FB		 1006static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1007{
1008 /* TO FIX */
1009 return 0;
1010}
3b46e624 1011
9fddaa0c
FB		 1012uint32_t cpu_ppc_load_tbl (CPUState *env)
1013{
1014 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1015}
3b46e624 1016
9fddaa0c
FB		 1017uint32_t cpu_ppc_load_tbu (CPUState *env)
1018{
1019 return cpu_ppc_get_tb(env) >> 32;
1020}
3b46e624 1021
a062e36c 1022uint32_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 1023{
a062e36c 1024 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
9fddaa0c 1025}
5fafdf24 1026
a062e36c 1027uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 1028{
a062e36c 1029 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1030}
76a66253 1031
76a66253
JM		 1032uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1033__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1034
76a66253 1035uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 1036{
76a66253 1037 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1038}
76a66253 1039
a750fc0b
JM		 1040/* XXX: to be fixed */
1041int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1042{
1043 return -1;
1044}
1045
1046int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1047{
1048 return -1;
1049}
1050
001faf32
BS		 1051#define EXCP_DUMP(env, fmt, ...) \
1052do { \
1053 fprintf(stderr, fmt , ## __VA_ARGS__); \
1054 cpu_dump_state(env, stderr, fprintf, 0); \
1055 qemu_log(fmt, ## __VA_ARGS__); \
1056 log_cpu_state(env, 0); \
e1833e1f
JM		 1057} while (0)
1058
67867308
FB		 1059void cpu_loop(CPUPPCState *env)
1060{
67867308 1061 target_siginfo_t info;
61190b14
FB		 1062 int trapnr;
1063 uint32_t ret;
3b46e624 1064
67867308
FB		 1065 for(;;) {
1066 trapnr = cpu_ppc_exec(env);
1067 switch(trapnr) {
e1833e1f
JM		 1068 case POWERPC_EXCP_NONE:
1069 /* Just go on */
67867308 1070 break;
e1833e1f
JM		 1071 case POWERPC_EXCP_CRITICAL: /* Critical input */
1072 cpu_abort(env, "Critical interrupt while in user mode. "
1073 "Aborting\n");
61190b14 1074 break;
e1833e1f
JM		 1075 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1076 cpu_abort(env, "Machine check exception while in user mode. "
1077 "Aborting\n");
1078 break;
1079 case POWERPC_EXCP_DSI: /* Data storage exception */
1080 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1081 env->spr[SPR_DAR]);
1082 /* XXX: check this. Seems bugged */
2be0071f
FB		 1083 switch (env->error_code & 0xFF000000) {
1084 case 0x40000000:
61190b14
FB		 1085 info.si_signo = TARGET_SIGSEGV;
1086 info.si_errno = 0;
1087 info.si_code = TARGET_SEGV_MAPERR;
1088 break;
2be0071f 1089 case 0x04000000:
61190b14
FB		 1090 info.si_signo = TARGET_SIGILL;
1091 info.si_errno = 0;
1092 info.si_code = TARGET_ILL_ILLADR;
1093 break;
2be0071f 1094 case 0x08000000:
61190b14
FB		 1095 info.si_signo = TARGET_SIGSEGV;
1096 info.si_errno = 0;
1097 info.si_code = TARGET_SEGV_ACCERR;
1098 break;
61190b14
FB		 1099 default:
1100 /* Let's send a regular segfault... */
e1833e1f
JM		 1101 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1102 env->error_code);
61190b14
FB		 1103 info.si_signo = TARGET_SIGSEGV;
1104 info.si_errno = 0;
1105 info.si_code = TARGET_SEGV_MAPERR;
1106 break;
1107 }
67867308 1108 info._sifields._sigfault._addr = env->nip;
624f7979 1109 queue_signal(env, info.si_signo, &info);
67867308 1110 break;
e1833e1f
JM		 1111 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1112 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
f10c315f 1113 env->spr[SPR_SRR0]);
e1833e1f 1114 /* XXX: check this */
2be0071f
FB		 1115 switch (env->error_code & 0xFF000000) {
1116 case 0x40000000:
61190b14 1117 info.si_signo = TARGET_SIGSEGV;
67867308 1118 info.si_errno = 0;
61190b14
FB		 1119 info.si_code = TARGET_SEGV_MAPERR;
1120 break;
2be0071f
FB		 1121 case 0x10000000:
1122 case 0x08000000:
61190b14
FB		 1123 info.si_signo = TARGET_SIGSEGV;
1124 info.si_errno = 0;
1125 info.si_code = TARGET_SEGV_ACCERR;
1126 break;
1127 default:
1128 /* Let's send a regular segfault... */
e1833e1f
JM		 1129 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1130 env->error_code);
61190b14
FB		 1131 info.si_signo = TARGET_SIGSEGV;
1132 info.si_errno = 0;
1133 info.si_code = TARGET_SEGV_MAPERR;
1134 break;
1135 }
1136 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1137 queue_signal(env, info.si_signo, &info);
67867308 1138 break;
e1833e1f
JM		 1139 case POWERPC_EXCP_EXTERNAL: /* External input */
1140 cpu_abort(env, "External interrupt while in user mode. "
1141 "Aborting\n");
1142 break;
1143 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1144 EXCP_DUMP(env, "Unaligned memory access\n");
1145 /* XXX: check this */
61190b14 1146 info.si_signo = TARGET_SIGBUS;
67867308 1147 info.si_errno = 0;
61190b14
FB		 1148 info.si_code = TARGET_BUS_ADRALN;
1149 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1150 queue_signal(env, info.si_signo, &info);
67867308 1151 break;
e1833e1f
JM		 1152 case POWERPC_EXCP_PROGRAM: /* Program exception */
1153 /* XXX: check this */
61190b14 1154 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1155 case POWERPC_EXCP_FP:
1156 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1157 info.si_signo = TARGET_SIGFPE;
1158 info.si_errno = 0;
1159 switch (env->error_code & 0xF) {
e1833e1f 1160 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1161 info.si_code = TARGET_FPE_FLTOVF;
1162 break;
e1833e1f 1163 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1164 info.si_code = TARGET_FPE_FLTUND;
1165 break;
e1833e1f
JM		 1166 case POWERPC_EXCP_FP_ZX:
1167 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1168 info.si_code = TARGET_FPE_FLTDIV;
1169 break;
e1833e1f 1170 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1171 info.si_code = TARGET_FPE_FLTRES;
1172 break;
e1833e1f 1173 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1174 info.si_code = TARGET_FPE_FLTINV;
1175 break;
7c58044c 1176 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1177 case POWERPC_EXCP_FP_VXISI:
1178 case POWERPC_EXCP_FP_VXIDI:
1179 case POWERPC_EXCP_FP_VXIMZ:
1180 case POWERPC_EXCP_FP_VXVC:
1181 case POWERPC_EXCP_FP_VXSQRT:
1182 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1183 info.si_code = TARGET_FPE_FLTSUB;
1184 break;
1185 default:
e1833e1f
JM		 1186 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1187 env->error_code);
1188 break;
61190b14 1189 }
e1833e1f
JM		 1190 break;
1191 case POWERPC_EXCP_INVAL:
1192 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1193 info.si_signo = TARGET_SIGILL;
1194 info.si_errno = 0;
1195 switch (env->error_code & 0xF) {
e1833e1f 1196 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1197 info.si_code = TARGET_ILL_ILLOPC;
1198 break;
e1833e1f 1199 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1200 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1201 break;
e1833e1f 1202 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1203 info.si_code = TARGET_ILL_PRVREG;
1204 break;
e1833e1f 1205 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1206 info.si_code = TARGET_ILL_COPROC;
1207 break;
1208 default:
e1833e1f
JM		 1209 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1210 env->error_code & 0xF);
61190b14
FB		 1211 info.si_code = TARGET_ILL_ILLADR;
1212 break;
1213 }
1214 break;
e1833e1f
JM		 1215 case POWERPC_EXCP_PRIV:
1216 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1217 info.si_signo = TARGET_SIGILL;
1218 info.si_errno = 0;
1219 switch (env->error_code & 0xF) {
e1833e1f 1220 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1221 info.si_code = TARGET_ILL_PRVOPC;
1222 break;
e1833e1f 1223 case POWERPC_EXCP_PRIV_REG:
61190b14 1224 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1225 break;
61190b14 1226 default:
e1833e1f
JM		 1227 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1228 env->error_code & 0xF);
61190b14
FB		 1229 info.si_code = TARGET_ILL_PRVOPC;
1230 break;
1231 }
1232 break;
e1833e1f
JM		 1233 case POWERPC_EXCP_TRAP:
1234 cpu_abort(env, "Tried to call a TRAP\n");
1235 break;
61190b14
FB		 1236 default:
1237 /* Should not happen ! */
e1833e1f
JM		 1238 cpu_abort(env, "Unknown program exception (%02x)\n",
1239 env->error_code);
1240 break;
61190b14
FB		 1241 }
1242 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1243 queue_signal(env, info.si_signo, &info);
67867308 1244 break;
e1833e1f
JM		 1245 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1246 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1247 info.si_signo = TARGET_SIGILL;
67867308 1248 info.si_errno = 0;
61190b14
FB		 1249 info.si_code = TARGET_ILL_COPROC;
1250 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1251 queue_signal(env, info.si_signo, &info);
67867308 1252 break;
e1833e1f
JM		 1253 case POWERPC_EXCP_SYSCALL: /* System call exception */
1254 cpu_abort(env, "Syscall exception while in user mode. "
1255 "Aborting\n");
61190b14 1256 break;
e1833e1f
JM		 1257 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1258 EXCP_DUMP(env, "No APU instruction allowed\n");
1259 info.si_signo = TARGET_SIGILL;
1260 info.si_errno = 0;
1261 info.si_code = TARGET_ILL_COPROC;
1262 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1263 queue_signal(env, info.si_signo, &info);
61190b14 1264 break;
e1833e1f
JM		 1265 case POWERPC_EXCP_DECR: /* Decrementer exception */
1266 cpu_abort(env, "Decrementer interrupt while in user mode. "
1267 "Aborting\n");
61190b14 1268 break;
e1833e1f
JM		 1269 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1270 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1271 "Aborting\n");
1272 break;
1273 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1274 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1275 "Aborting\n");
1276 break;
1277 case POWERPC_EXCP_DTLB: /* Data TLB error */
1278 cpu_abort(env, "Data TLB exception while in user mode. "
1279 "Aborting\n");
1280 break;
1281 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1282 cpu_abort(env, "Instruction TLB exception while in user mode. "
1283 "Aborting\n");
1284 break;
e1833e1f
JM		 1285 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1286 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1287 info.si_signo = TARGET_SIGILL;
1288 info.si_errno = 0;
1289 info.si_code = TARGET_ILL_COPROC;
1290 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1291 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1292 break;
1293 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1294 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1295 break;
1296 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1297 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1298 break;
1299 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1300 cpu_abort(env, "Performance monitor exception not handled\n");
1301 break;
1302 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1303 cpu_abort(env, "Doorbell interrupt while in user mode. "
1304 "Aborting\n");
1305 break;
1306 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1307 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1308 "Aborting\n");
1309 break;
1310 case POWERPC_EXCP_RESET: /* System reset exception */
1311 cpu_abort(env, "Reset interrupt while in user mode. "
1312 "Aborting\n");
1313 break;
e1833e1f
JM		 1314 case POWERPC_EXCP_DSEG: /* Data segment exception */
1315 cpu_abort(env, "Data segment exception while in user mode. "
1316 "Aborting\n");
1317 break;
1318 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1319 cpu_abort(env, "Instruction segment exception "
1320 "while in user mode. Aborting\n");
1321 break;
e85e7c6e 1322 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1323 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1324 cpu_abort(env, "Hypervisor decrementer interrupt "
1325 "while in user mode. Aborting\n");
1326 break;
e1833e1f
JM		 1327 case POWERPC_EXCP_TRACE: /* Trace exception */
1328 /* Nothing to do:
1329 * we use this exception to emulate step-by-step execution mode.
1330 */
1331 break;
e85e7c6e 1332 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1333 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1334 cpu_abort(env, "Hypervisor data storage exception "
1335 "while in user mode. Aborting\n");
1336 break;
1337 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1338 cpu_abort(env, "Hypervisor instruction storage exception "
1339 "while in user mode. Aborting\n");
1340 break;
1341 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1342 cpu_abort(env, "Hypervisor data segment exception "
1343 "while in user mode. Aborting\n");
1344 break;
1345 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1346 cpu_abort(env, "Hypervisor instruction segment exception "
1347 "while in user mode. Aborting\n");
1348 break;
e1833e1f
JM		 1349 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1350 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1351 info.si_signo = TARGET_SIGILL;
1352 info.si_errno = 0;
1353 info.si_code = TARGET_ILL_COPROC;
1354 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1355 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1356 break;
1357 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1358 cpu_abort(env, "Programable interval timer interrupt "
1359 "while in user mode. Aborting\n");
1360 break;
1361 case POWERPC_EXCP_IO: /* IO error exception */
1362 cpu_abort(env, "IO error exception while in user mode. "
1363 "Aborting\n");
1364 break;
1365 case POWERPC_EXCP_RUNM: /* Run mode exception */
1366 cpu_abort(env, "Run mode exception while in user mode. "
1367 "Aborting\n");
1368 break;
1369 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1370 cpu_abort(env, "Emulation trap exception not handled\n");
1371 break;
1372 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1373 cpu_abort(env, "Instruction fetch TLB exception "
1374 "while in user-mode. Aborting");
1375 break;
1376 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1377 cpu_abort(env, "Data load TLB exception while in user-mode. "
1378 "Aborting");
1379 break;
1380 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1381 cpu_abort(env, "Data store TLB exception while in user-mode. "
1382 "Aborting");
1383 break;
1384 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1385 cpu_abort(env, "Floating-point assist exception not handled\n");
1386 break;
1387 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1388 cpu_abort(env, "Instruction address breakpoint exception "
1389 "not handled\n");
1390 break;
1391 case POWERPC_EXCP_SMI: /* System management interrupt */
1392 cpu_abort(env, "System management interrupt while in user mode. "
1393 "Aborting\n");
1394 break;
1395 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1396 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1397 "Aborting\n");
1398 break;
1399 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1400 cpu_abort(env, "Performance monitor exception not handled\n");
1401 break;
1402 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1403 cpu_abort(env, "Vector assist exception not handled\n");
1404 break;
1405 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1406 cpu_abort(env, "Soft patch exception not handled\n");
1407 break;
1408 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1409 cpu_abort(env, "Maintenance exception while in user mode. "
1410 "Aborting\n");
1411 break;
1412 case POWERPC_EXCP_STOP: /* stop translation */
1413 /* We did invalidate the instruction cache. Go on */
1414 break;
1415 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1416 /* We just stopped because of a branch. Go on */
1417 break;
1418 case POWERPC_EXCP_SYSCALL_USER:
1419 /* system call in user-mode emulation */
1420 /* WARNING:
1421 * PPC ABI uses overflow flag in cr0 to signal an error
1422 * in syscalls.
1423 */
1424#if 0
1425 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1426 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1427#endif
1428 env->crf[0] &= ~0x1;
1429 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1430 env->gpr[5], env->gpr[6], env->gpr[7],
1431 env->gpr[8]);
bcd4933a
NF		 1432 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1433 /* Returning from a successful sigreturn syscall.
1434 Avoid corrupting register state. */
1435 break;
1436 }
e1833e1f
JM		 1437 if (ret > (uint32_t)(-515)) {
1438 env->crf[0] |= 0x1;
1439 ret = -ret;
61190b14 1440 }
e1833e1f
JM		 1441 env->gpr[3] = ret;
1442#if 0
1443 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1444#endif
1445 break;
71f75756
AJ		 1446 case EXCP_DEBUG:
1447 {
1448 int sig;
1449
1450 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1451 if (sig) {
1452 info.si_signo = sig;
1453 info.si_errno = 0;
1454 info.si_code = TARGET_TRAP_BRKPT;
1455 queue_signal(env, info.si_signo, &info);
1456 }
1457 }
1458 break;
56ba31ff
JM		 1459 case EXCP_INTERRUPT:
1460 /* just indicate that signals should be handled asap */
1461 break;
e1833e1f
JM		 1462 default:
1463 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1464 break;
67867308
FB		 1465 }
1466 process_pending_signals(env);
1467 }
1468}
1469#endif
1470
048f6b4d
FB		 1471#ifdef TARGET_MIPS
1472
1473#define MIPS_SYS(name, args) args,
1474
1475static const uint8_t mips_syscall_args[] = {
1476 MIPS_SYS(sys_syscall , 0) /* 4000 */
1477 MIPS_SYS(sys_exit , 1)
1478 MIPS_SYS(sys_fork , 0)
1479 MIPS_SYS(sys_read , 3)
1480 MIPS_SYS(sys_write , 3)
1481 MIPS_SYS(sys_open , 3) /* 4005 */
1482 MIPS_SYS(sys_close , 1)
1483 MIPS_SYS(sys_waitpid , 3)
1484 MIPS_SYS(sys_creat , 2)
1485 MIPS_SYS(sys_link , 2)
1486 MIPS_SYS(sys_unlink , 1) /* 4010 */
1487 MIPS_SYS(sys_execve , 0)
1488 MIPS_SYS(sys_chdir , 1)
1489 MIPS_SYS(sys_time , 1)
1490 MIPS_SYS(sys_mknod , 3)
1491 MIPS_SYS(sys_chmod , 2) /* 4015 */
1492 MIPS_SYS(sys_lchown , 3)
1493 MIPS_SYS(sys_ni_syscall , 0)
1494 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1495 MIPS_SYS(sys_lseek , 3)
1496 MIPS_SYS(sys_getpid , 0) /* 4020 */
1497 MIPS_SYS(sys_mount , 5)
1498 MIPS_SYS(sys_oldumount , 1)
1499 MIPS_SYS(sys_setuid , 1)
1500 MIPS_SYS(sys_getuid , 0)
1501 MIPS_SYS(sys_stime , 1) /* 4025 */
1502 MIPS_SYS(sys_ptrace , 4)
1503 MIPS_SYS(sys_alarm , 1)
1504 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1505 MIPS_SYS(sys_pause , 0)
1506 MIPS_SYS(sys_utime , 2) /* 4030 */
1507 MIPS_SYS(sys_ni_syscall , 0)
1508 MIPS_SYS(sys_ni_syscall , 0)
1509 MIPS_SYS(sys_access , 2)
1510 MIPS_SYS(sys_nice , 1)
1511 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1512 MIPS_SYS(sys_sync , 0)
1513 MIPS_SYS(sys_kill , 2)
1514 MIPS_SYS(sys_rename , 2)
1515 MIPS_SYS(sys_mkdir , 2)
1516 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1517 MIPS_SYS(sys_dup , 1)
1518 MIPS_SYS(sys_pipe , 0)
1519 MIPS_SYS(sys_times , 1)
1520 MIPS_SYS(sys_ni_syscall , 0)
1521 MIPS_SYS(sys_brk , 1) /* 4045 */
1522 MIPS_SYS(sys_setgid , 1)
1523 MIPS_SYS(sys_getgid , 0)
1524 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1525 MIPS_SYS(sys_geteuid , 0)
1526 MIPS_SYS(sys_getegid , 0) /* 4050 */
1527 MIPS_SYS(sys_acct , 0)
1528 MIPS_SYS(sys_umount , 2)
1529 MIPS_SYS(sys_ni_syscall , 0)
1530 MIPS_SYS(sys_ioctl , 3)
1531 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1532 MIPS_SYS(sys_ni_syscall , 2)
1533 MIPS_SYS(sys_setpgid , 2)
1534 MIPS_SYS(sys_ni_syscall , 0)
1535 MIPS_SYS(sys_olduname , 1)
1536 MIPS_SYS(sys_umask , 1) /* 4060 */
1537 MIPS_SYS(sys_chroot , 1)
1538 MIPS_SYS(sys_ustat , 2)
1539 MIPS_SYS(sys_dup2 , 2)
1540 MIPS_SYS(sys_getppid , 0)
1541 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1542 MIPS_SYS(sys_setsid , 0)
1543 MIPS_SYS(sys_sigaction , 3)
1544 MIPS_SYS(sys_sgetmask , 0)
1545 MIPS_SYS(sys_ssetmask , 1)
1546 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1547 MIPS_SYS(sys_setregid , 2)
1548 MIPS_SYS(sys_sigsuspend , 0)
1549 MIPS_SYS(sys_sigpending , 1)
1550 MIPS_SYS(sys_sethostname , 2)
1551 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1552 MIPS_SYS(sys_getrlimit , 2)
1553 MIPS_SYS(sys_getrusage , 2)
1554 MIPS_SYS(sys_gettimeofday, 2)
1555 MIPS_SYS(sys_settimeofday, 2)
1556 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1557 MIPS_SYS(sys_setgroups , 2)
1558 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1559 MIPS_SYS(sys_symlink , 2)
1560 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1561 MIPS_SYS(sys_readlink , 3) /* 4085 */
1562 MIPS_SYS(sys_uselib , 1)
1563 MIPS_SYS(sys_swapon , 2)
1564 MIPS_SYS(sys_reboot , 3)
1565 MIPS_SYS(old_readdir , 3)
1566 MIPS_SYS(old_mmap , 6) /* 4090 */
1567 MIPS_SYS(sys_munmap , 2)
1568 MIPS_SYS(sys_truncate , 2)
1569 MIPS_SYS(sys_ftruncate , 2)
1570 MIPS_SYS(sys_fchmod , 2)
1571 MIPS_SYS(sys_fchown , 3) /* 4095 */
1572 MIPS_SYS(sys_getpriority , 2)
1573 MIPS_SYS(sys_setpriority , 3)
1574 MIPS_SYS(sys_ni_syscall , 0)
1575 MIPS_SYS(sys_statfs , 2)
1576 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1577 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1578 MIPS_SYS(sys_socketcall , 2)
1579 MIPS_SYS(sys_syslog , 3)
1580 MIPS_SYS(sys_setitimer , 3)
1581 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1582 MIPS_SYS(sys_newstat , 2)
1583 MIPS_SYS(sys_newlstat , 2)
1584 MIPS_SYS(sys_newfstat , 2)
1585 MIPS_SYS(sys_uname , 1)
1586 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1587 MIPS_SYS(sys_vhangup , 0)
1588 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1589 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1590 MIPS_SYS(sys_wait4 , 4)
1591 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1592 MIPS_SYS(sys_sysinfo , 1)
1593 MIPS_SYS(sys_ipc , 6)
1594 MIPS_SYS(sys_fsync , 1)
1595 MIPS_SYS(sys_sigreturn , 0)
18113962 1596 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1597 MIPS_SYS(sys_setdomainname, 2)
1598 MIPS_SYS(sys_newuname , 1)
1599 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1600 MIPS_SYS(sys_adjtimex , 1)
1601 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1602 MIPS_SYS(sys_sigprocmask , 3)
1603 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1604 MIPS_SYS(sys_init_module , 5)
1605 MIPS_SYS(sys_delete_module, 1)
1606 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1607 MIPS_SYS(sys_quotactl , 0)
1608 MIPS_SYS(sys_getpgid , 1)
1609 MIPS_SYS(sys_fchdir , 1)
1610 MIPS_SYS(sys_bdflush , 2)
1611 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1612 MIPS_SYS(sys_personality , 1)
1613 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1614 MIPS_SYS(sys_setfsuid , 1)
1615 MIPS_SYS(sys_setfsgid , 1)
1616 MIPS_SYS(sys_llseek , 5) /* 4140 */
1617 MIPS_SYS(sys_getdents , 3)
1618 MIPS_SYS(sys_select , 5)
1619 MIPS_SYS(sys_flock , 2)
1620 MIPS_SYS(sys_msync , 3)
1621 MIPS_SYS(sys_readv , 3) /* 4145 */
1622 MIPS_SYS(sys_writev , 3)
1623 MIPS_SYS(sys_cacheflush , 3)
1624 MIPS_SYS(sys_cachectl , 3)
1625 MIPS_SYS(sys_sysmips , 4)
1626 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1627 MIPS_SYS(sys_getsid , 1)
1628 MIPS_SYS(sys_fdatasync , 0)
1629 MIPS_SYS(sys_sysctl , 1)
1630 MIPS_SYS(sys_mlock , 2)
1631 MIPS_SYS(sys_munlock , 2) /* 4155 */
1632 MIPS_SYS(sys_mlockall , 1)
1633 MIPS_SYS(sys_munlockall , 0)
1634 MIPS_SYS(sys_sched_setparam, 2)
1635 MIPS_SYS(sys_sched_getparam, 2)
1636 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1637 MIPS_SYS(sys_sched_getscheduler, 1)
1638 MIPS_SYS(sys_sched_yield , 0)
1639 MIPS_SYS(sys_sched_get_priority_max, 1)
1640 MIPS_SYS(sys_sched_get_priority_min, 1)
1641 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1642 MIPS_SYS(sys_nanosleep, 2)
1643 MIPS_SYS(sys_mremap , 4)
1644 MIPS_SYS(sys_accept , 3)
1645 MIPS_SYS(sys_bind , 3)
1646 MIPS_SYS(sys_connect , 3) /* 4170 */
1647 MIPS_SYS(sys_getpeername , 3)
1648 MIPS_SYS(sys_getsockname , 3)
1649 MIPS_SYS(sys_getsockopt , 5)
1650 MIPS_SYS(sys_listen , 2)
1651 MIPS_SYS(sys_recv , 4) /* 4175 */
1652 MIPS_SYS(sys_recvfrom , 6)
1653 MIPS_SYS(sys_recvmsg , 3)
1654 MIPS_SYS(sys_send , 4)
1655 MIPS_SYS(sys_sendmsg , 3)
1656 MIPS_SYS(sys_sendto , 6) /* 4180 */
1657 MIPS_SYS(sys_setsockopt , 5)
1658 MIPS_SYS(sys_shutdown , 2)
1659 MIPS_SYS(sys_socket , 3)
1660 MIPS_SYS(sys_socketpair , 4)
1661 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1662 MIPS_SYS(sys_getresuid , 3)
1663 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1664 MIPS_SYS(sys_poll , 3)
1665 MIPS_SYS(sys_nfsservctl , 3)
1666 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1667 MIPS_SYS(sys_getresgid , 3)
1668 MIPS_SYS(sys_prctl , 5)
1669 MIPS_SYS(sys_rt_sigreturn, 0)
1670 MIPS_SYS(sys_rt_sigaction, 4)
1671 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1672 MIPS_SYS(sys_rt_sigpending, 2)
1673 MIPS_SYS(sys_rt_sigtimedwait, 4)
1674 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1675 MIPS_SYS(sys_rt_sigsuspend, 0)
1676 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1677 MIPS_SYS(sys_pwrite64 , 6)
1678 MIPS_SYS(sys_chown , 3)
1679 MIPS_SYS(sys_getcwd , 2)
1680 MIPS_SYS(sys_capget , 2)
1681 MIPS_SYS(sys_capset , 2) /* 4205 */
1682 MIPS_SYS(sys_sigaltstack , 0)
1683 MIPS_SYS(sys_sendfile , 4)
1684 MIPS_SYS(sys_ni_syscall , 0)
1685 MIPS_SYS(sys_ni_syscall , 0)
1686 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1687 MIPS_SYS(sys_truncate64 , 4)
1688 MIPS_SYS(sys_ftruncate64 , 4)
1689 MIPS_SYS(sys_stat64 , 2)
1690 MIPS_SYS(sys_lstat64 , 2)
1691 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1692 MIPS_SYS(sys_pivot_root , 2)
1693 MIPS_SYS(sys_mincore , 3)
1694 MIPS_SYS(sys_madvise , 3)
1695 MIPS_SYS(sys_getdents64 , 3)
1696 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1697 MIPS_SYS(sys_ni_syscall , 0)
1698 MIPS_SYS(sys_gettid , 0)
1699 MIPS_SYS(sys_readahead , 5)
1700 MIPS_SYS(sys_setxattr , 5)
1701 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1702 MIPS_SYS(sys_fsetxattr , 5)
1703 MIPS_SYS(sys_getxattr , 4)
1704 MIPS_SYS(sys_lgetxattr , 4)
1705 MIPS_SYS(sys_fgetxattr , 4)
1706 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1707 MIPS_SYS(sys_llistxattr , 3)
1708 MIPS_SYS(sys_flistxattr , 3)
1709 MIPS_SYS(sys_removexattr , 2)
1710 MIPS_SYS(sys_lremovexattr, 2)
1711 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1712 MIPS_SYS(sys_tkill , 2)
1713 MIPS_SYS(sys_sendfile64 , 5)
1714 MIPS_SYS(sys_futex , 2)
1715 MIPS_SYS(sys_sched_setaffinity, 3)
1716 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1717 MIPS_SYS(sys_io_setup , 2)
1718 MIPS_SYS(sys_io_destroy , 1)
1719 MIPS_SYS(sys_io_getevents, 5)
1720 MIPS_SYS(sys_io_submit , 3)
1721 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1722 MIPS_SYS(sys_exit_group , 1)
1723 MIPS_SYS(sys_lookup_dcookie, 3)
1724 MIPS_SYS(sys_epoll_create, 1)
1725 MIPS_SYS(sys_epoll_ctl , 4)
1726 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1727 MIPS_SYS(sys_remap_file_pages, 5)
1728 MIPS_SYS(sys_set_tid_address, 1)
1729 MIPS_SYS(sys_restart_syscall, 0)
1730 MIPS_SYS(sys_fadvise64_64, 7)
1731 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1732 MIPS_SYS(sys_fstatfs64 , 2)
1733 MIPS_SYS(sys_timer_create, 3)
1734 MIPS_SYS(sys_timer_settime, 4)
1735 MIPS_SYS(sys_timer_gettime, 2)
1736 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1737 MIPS_SYS(sys_timer_delete, 1)
1738 MIPS_SYS(sys_clock_settime, 2)
1739 MIPS_SYS(sys_clock_gettime, 2)
1740 MIPS_SYS(sys_clock_getres, 2)
1741 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1742 MIPS_SYS(sys_tgkill , 3)
1743 MIPS_SYS(sys_utimes , 2)
1744 MIPS_SYS(sys_mbind , 4)
1745 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1746 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1747 MIPS_SYS(sys_mq_open , 4)
1748 MIPS_SYS(sys_mq_unlink , 1)
1749 MIPS_SYS(sys_mq_timedsend, 5)
1750 MIPS_SYS(sys_mq_timedreceive, 5)
1751 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1752 MIPS_SYS(sys_mq_getsetattr, 3)
1753 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1754 MIPS_SYS(sys_waitid , 4)
1755 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1756 MIPS_SYS(sys_add_key , 5)
388bb21a 1757 MIPS_SYS(sys_request_key, 4)
048f6b4d 1758 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 1759 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 1760 MIPS_SYS(sys_inotify_init, 0)
1761 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1762 MIPS_SYS(sys_inotify_rm_watch, 2)
1763 MIPS_SYS(sys_migrate_pages, 4)
1764 MIPS_SYS(sys_openat, 4)
1765 MIPS_SYS(sys_mkdirat, 3)
1766 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1767 MIPS_SYS(sys_fchownat, 5)
1768 MIPS_SYS(sys_futimesat, 3)
1769 MIPS_SYS(sys_fstatat64, 4)
1770 MIPS_SYS(sys_unlinkat, 3)
1771 MIPS_SYS(sys_renameat, 4) /* 4295 */
1772 MIPS_SYS(sys_linkat, 5)
1773 MIPS_SYS(sys_symlinkat, 3)
1774 MIPS_SYS(sys_readlinkat, 4)
1775 MIPS_SYS(sys_fchmodat, 3)
1776 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1777 MIPS_SYS(sys_pselect6, 6)
1778 MIPS_SYS(sys_ppoll, 5)
1779 MIPS_SYS(sys_unshare, 1)
1780 MIPS_SYS(sys_splice, 4)
1781 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1782 MIPS_SYS(sys_tee, 4)
1783 MIPS_SYS(sys_vmsplice, 4)
1784 MIPS_SYS(sys_move_pages, 6)
1785 MIPS_SYS(sys_set_robust_list, 2)
1786 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1787 MIPS_SYS(sys_kexec_load, 4)
1788 MIPS_SYS(sys_getcpu, 3)
1789 MIPS_SYS(sys_epoll_pwait, 6)
1790 MIPS_SYS(sys_ioprio_set, 3)
1791 MIPS_SYS(sys_ioprio_get, 2)
048f6b4d
FB		 1792};
1793
1794#undef MIPS_SYS
1795
590bc601
PB		 1796static int do_store_exclusive(CPUMIPSState *env)
1797{
1798 target_ulong addr;
1799 target_ulong page_addr;
1800 target_ulong val;
1801 int flags;
1802 int segv = 0;
1803 int reg;
1804 int d;
1805
1806 addr = env->CP0_LLAddr;
1807 page_addr = addr & TARGET_PAGE_MASK;
1808 start_exclusive();
1809 mmap_lock();
1810 flags = page_get_flags(page_addr);
1811 if ((flags & PAGE_READ) == 0) {
1812 segv = 1;
1813 } else {
1814 reg = env->llreg & 0x1f;
1815 d = (env->llreg & 0x20) != 0;
1816 if (d) {
1817 segv = get_user_s64(val, addr);
1818 } else {
1819 segv = get_user_s32(val, addr);
1820 }
1821 if (!segv) {
1822 if (val != env->llval) {
1823 env->active_tc.gpr[reg] = 0;
1824 } else {
1825 if (d) {
1826 segv = put_user_u64(env->llnewval, addr);
1827 } else {
1828 segv = put_user_u32(env->llnewval, addr);
1829 }
1830 if (!segv) {
1831 env->active_tc.gpr[reg] = 1;
1832 }
1833 }
1834 }
1835 }
1836 env->CP0_LLAddr = -1;
1837 if (!segv) {
1838 env->active_tc.PC += 4;
1839 }
1840 mmap_unlock();
1841 end_exclusive();
1842 return segv;
1843}
1844
048f6b4d
FB		 1845void cpu_loop(CPUMIPSState *env)
1846{
1847 target_siginfo_t info;
388bb21a 1848 int trapnr, ret;
048f6b4d 1849 unsigned int syscall_num;
048f6b4d
FB		 1850
1851 for(;;) {
590bc601 1852 cpu_exec_start(env);
048f6b4d 1853 trapnr = cpu_mips_exec(env);
590bc601 1854 cpu_exec_end(env);
048f6b4d
FB		 1855 switch(trapnr) {
1856 case EXCP_SYSCALL:
b5dc7732
TS		 1857 syscall_num = env->active_tc.gpr[2] - 4000;
1858 env->active_tc.PC += 4;
388bb21a
TS		 1859 if (syscall_num >= sizeof(mips_syscall_args)) {
1860 ret = -ENOSYS;
1861 } else {
1862 int nb_args;
992f48a0
BS		 1863 abi_ulong sp_reg;
1864 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 1865
1866 nb_args = mips_syscall_args[syscall_num];
b5dc7732 1867 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 1868 switch (nb_args) {
1869 /* these arguments are taken from the stack */
2f619698
FB		 1870 /* FIXME - what to do if get_user() fails? */
1871 case 8: get_user_ual(arg8, sp_reg + 28);
1872 case 7: get_user_ual(arg7, sp_reg + 24);
1873 case 6: get_user_ual(arg6, sp_reg + 20);
1874 case 5: get_user_ual(arg5, sp_reg + 16);
388bb21a
TS		 1875 default:
1876 break;
048f6b4d 1877 }
b5dc7732
TS		 1878 ret = do_syscall(env, env->active_tc.gpr[2],
1879 env->active_tc.gpr[4],
1880 env->active_tc.gpr[5],
1881 env->active_tc.gpr[6],
1882 env->active_tc.gpr[7],
388bb21a
TS		 1883 arg5, arg6/*, arg7, arg8*/);
1884 }
0b1bcb00
PB		 1885 if (ret == -TARGET_QEMU_ESIGRETURN) {
1886 /* Returning from a successful sigreturn syscall.
1887 Avoid clobbering register state. */
1888 break;
1889 }
388bb21a 1890 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 1891 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 1892 ret = -ret;
1893 } else {
b5dc7732 1894 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 1895 }
b5dc7732 1896 env->active_tc.gpr[2] = ret;
048f6b4d 1897 break;
ca7c2b1b
TS		 1898 case EXCP_TLBL:
1899 case EXCP_TLBS:
e4474235
PB		 1900 info.si_signo = TARGET_SIGSEGV;
1901 info.si_errno = 0;
1902 /* XXX: check env->error_code */
1903 info.si_code = TARGET_SEGV_MAPERR;
1904 info._sifields._sigfault._addr = env->CP0_BadVAddr;
1905 queue_signal(env, info.si_signo, &info);
1906 break;
6900e84b 1907 case EXCP_CpU:
048f6b4d 1908 case EXCP_RI:
bc1ad2de
FB		 1909 info.si_signo = TARGET_SIGILL;
1910 info.si_errno = 0;
1911 info.si_code = 0;
624f7979 1912 queue_signal(env, info.si_signo, &info);
048f6b4d 1913 break;
106ec879
FB		 1914 case EXCP_INTERRUPT:
1915 /* just indicate that signals should be handled asap */
1916 break;
d08b2a28
PB		 1917 case EXCP_DEBUG:
1918 {
1919 int sig;
1920
1921 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1922 if (sig)
1923 {
1924 info.si_signo = sig;
1925 info.si_errno = 0;
1926 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1927 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 1928 }
1929 }
1930 break;
590bc601
PB		 1931 case EXCP_SC:
1932 if (do_store_exclusive(env)) {
1933 info.si_signo = TARGET_SIGSEGV;
1934 info.si_errno = 0;
1935 info.si_code = TARGET_SEGV_MAPERR;
1936 info._sifields._sigfault._addr = env->active_tc.PC;
1937 queue_signal(env, info.si_signo, &info);
1938 }
1939 break;
048f6b4d
FB		 1940 default:
1941 // error:
5fafdf24 1942 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 1943 trapnr);
1944 cpu_dump_state(env, stderr, fprintf, 0);
1945 abort();
1946 }
1947 process_pending_signals(env);
1948 }
1949}
1950#endif
1951
fdf9b3e8
FB		 1952#ifdef TARGET_SH4
1953void cpu_loop (CPUState *env)
1954{
1955 int trapnr, ret;
355fb23d 1956 target_siginfo_t info;
3b46e624 1957
fdf9b3e8
FB		 1958 while (1) {
1959 trapnr = cpu_sh4_exec (env);
3b46e624 1960
fdf9b3e8
FB		 1961 switch (trapnr) {
1962 case 0x160:
0b6d3ae0 1963 env->pc += 2;
5fafdf24
TS		 1964 ret = do_syscall(env,
1965 env->gregs[3],
1966 env->gregs[4],
1967 env->gregs[5],
1968 env->gregs[6],
1969 env->gregs[7],
1970 env->gregs[0],
fca743f3 1971 env->gregs[1]);
9c2a9ea1 1972 env->gregs[0] = ret;
fdf9b3e8 1973 break;
c3b5bc8a
TS		 1974 case EXCP_INTERRUPT:
1975 /* just indicate that signals should be handled asap */
1976 break;
355fb23d
PB		 1977 case EXCP_DEBUG:
1978 {
1979 int sig;
1980
1981 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1982 if (sig)
1983 {
1984 info.si_signo = sig;
1985 info.si_errno = 0;
1986 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1987 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 1988 }
1989 }
1990 break;
c3b5bc8a
TS		 1991 case 0xa0:
1992 case 0xc0:
1993 info.si_signo = SIGSEGV;
1994 info.si_errno = 0;
1995 info.si_code = TARGET_SEGV_MAPERR;
1996 info._sifields._sigfault._addr = env->tea;
624f7979 1997 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 1998 break;
1999
fdf9b3e8
FB		 2000 default:
2001 printf ("Unhandled trap: 0x%x\n", trapnr);
2002 cpu_dump_state(env, stderr, fprintf, 0);
2003 exit (1);
2004 }
2005 process_pending_signals (env);
2006 }
2007}
2008#endif
2009
48733d19
TS		 2010#ifdef TARGET_CRIS
2011void cpu_loop (CPUState *env)
2012{
2013 int trapnr, ret;
2014 target_siginfo_t info;
2015
2016 while (1) {
2017 trapnr = cpu_cris_exec (env);
2018 switch (trapnr) {
2019 case 0xaa:
2020 {
2021 info.si_signo = SIGSEGV;
2022 info.si_errno = 0;
2023 /* XXX: check env->error_code */
2024 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2025 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 2026 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2027 }
2028 break;
b6d3abda
EI		 2029 case EXCP_INTERRUPT:
2030 /* just indicate that signals should be handled asap */
2031 break;
48733d19
TS		 2032 case EXCP_BREAK:
2033 ret = do_syscall(env,
2034 env->regs[9],
2035 env->regs[10],
2036 env->regs[11],
2037 env->regs[12],
2038 env->regs[13],
2039 env->pregs[7],
2040 env->pregs[11]);
2041 env->regs[10] = ret;
48733d19
TS		 2042 break;
2043 case EXCP_DEBUG:
2044 {
2045 int sig;
2046
2047 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2048 if (sig)
2049 {
2050 info.si_signo = sig;
2051 info.si_errno = 0;
2052 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2053 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2054 }
2055 }
2056 break;
2057 default:
2058 printf ("Unhandled trap: 0x%x\n", trapnr);
2059 cpu_dump_state(env, stderr, fprintf, 0);
2060 exit (1);
2061 }
2062 process_pending_signals (env);
2063 }
2064}
2065#endif
2066
b779e29e
EI		 2067#ifdef TARGET_MICROBLAZE
2068void cpu_loop (CPUState *env)
2069{
2070 int trapnr, ret;
2071 target_siginfo_t info;
2072
2073 while (1) {
2074 trapnr = cpu_mb_exec (env);
2075 switch (trapnr) {
2076 case 0xaa:
2077 {
2078 info.si_signo = SIGSEGV;
2079 info.si_errno = 0;
2080 /* XXX: check env->error_code */
2081 info.si_code = TARGET_SEGV_MAPERR;
2082 info._sifields._sigfault._addr = 0;
2083 queue_signal(env, info.si_signo, &info);
2084 }
2085 break;
2086 case EXCP_INTERRUPT:
2087 /* just indicate that signals should be handled asap */
2088 break;
2089 case EXCP_BREAK:
2090 /* Return address is 4 bytes after the call. */
2091 env->regs[14] += 4;
2092 ret = do_syscall(env,
2093 env->regs[12],
2094 env->regs[5],
2095 env->regs[6],
2096 env->regs[7],
2097 env->regs[8],
2098 env->regs[9],
2099 env->regs[10]);
2100 env->regs[3] = ret;
2101 env->sregs[SR_PC] = env->regs[14];
2102 break;
2103 case EXCP_DEBUG:
2104 {
2105 int sig;
2106
2107 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2108 if (sig)
2109 {
2110 info.si_signo = sig;
2111 info.si_errno = 0;
2112 info.si_code = TARGET_TRAP_BRKPT;
2113 queue_signal(env, info.si_signo, &info);
2114 }
2115 }
2116 break;
2117 default:
2118 printf ("Unhandled trap: 0x%x\n", trapnr);
2119 cpu_dump_state(env, stderr, fprintf, 0);
2120 exit (1);
2121 }
2122 process_pending_signals (env);
2123 }
2124}
2125#endif
2126
e6e5906b
PB		 2127#ifdef TARGET_M68K
2128
2129void cpu_loop(CPUM68KState *env)
2130{
2131 int trapnr;
2132 unsigned int n;
2133 target_siginfo_t info;
2134 TaskState *ts = env->opaque;
3b46e624 2135
e6e5906b
PB		 2136 for(;;) {
2137 trapnr = cpu_m68k_exec(env);
2138 switch(trapnr) {
2139 case EXCP_ILLEGAL:
2140 {
2141 if (ts->sim_syscalls) {
2142 uint16_t nr;
2143 nr = lduw(env->pc + 2);
2144 env->pc += 4;
2145 do_m68k_simcall(env, nr);
2146 } else {
2147 goto do_sigill;
2148 }
2149 }
2150 break;
a87295e8 2151 case EXCP_HALT_INSN:
e6e5906b 2152 /* Semihosing syscall. */
a87295e8 2153 env->pc += 4;
e6e5906b
PB		 2154 do_m68k_semihosting(env, env->dregs[0]);
2155 break;
2156 case EXCP_LINEA:
2157 case EXCP_LINEF:
2158 case EXCP_UNSUPPORTED:
2159 do_sigill:
2160 info.si_signo = SIGILL;
2161 info.si_errno = 0;
2162 info.si_code = TARGET_ILL_ILLOPN;
2163 info._sifields._sigfault._addr = env->pc;
624f7979 2164 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2165 break;
2166 case EXCP_TRAP0:
2167 {
2168 ts->sim_syscalls = 0;
2169 n = env->dregs[0];
2170 env->pc += 2;
5fafdf24
TS		 2171 env->dregs[0] = do_syscall(env,
2172 n,
e6e5906b
PB		 2173 env->dregs[1],
2174 env->dregs[2],
2175 env->dregs[3],
2176 env->dregs[4],
2177 env->dregs[5],
bb7ec043 2178 env->aregs[0]);
e6e5906b
PB		 2179 }
2180 break;
2181 case EXCP_INTERRUPT:
2182 /* just indicate that signals should be handled asap */
2183 break;
2184 case EXCP_ACCESS:
2185 {
2186 info.si_signo = SIGSEGV;
2187 info.si_errno = 0;
2188 /* XXX: check env->error_code */
2189 info.si_code = TARGET_SEGV_MAPERR;
2190 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2191 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2192 }
2193 break;
2194 case EXCP_DEBUG:
2195 {
2196 int sig;
2197
2198 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2199 if (sig)
2200 {
2201 info.si_signo = sig;
2202 info.si_errno = 0;
2203 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2204 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2205 }
2206 }
2207 break;
2208 default:
5fafdf24 2209 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2210 trapnr);
2211 cpu_dump_state(env, stderr, fprintf, 0);
2212 abort();
2213 }
2214 process_pending_signals(env);
2215 }
2216}
2217#endif /* TARGET_M68K */
2218
7a3148a9
JM		 2219#ifdef TARGET_ALPHA
2220void cpu_loop (CPUState *env)
2221{
e96efcfc 2222 int trapnr;
7a3148a9 2223 target_siginfo_t info;
3b46e624 2224
7a3148a9
JM		 2225 while (1) {
2226 trapnr = cpu_alpha_exec (env);
3b46e624 2227
7a3148a9
JM		 2228 switch (trapnr) {
2229 case EXCP_RESET:
2230 fprintf(stderr, "Reset requested. Exit\n");
2231 exit(1);
2232 break;
2233 case EXCP_MCHK:
2234 fprintf(stderr, "Machine check exception. Exit\n");
2235 exit(1);
2236 break;
2237 case EXCP_ARITH:
2238 fprintf(stderr, "Arithmetic trap.\n");
2239 exit(1);
2240 break;
2241 case EXCP_HW_INTERRUPT:
5fafdf24 2242 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2243 exit(1);
2244 break;
2245 case EXCP_DFAULT:
2246 fprintf(stderr, "MMU data fault\n");
2247 exit(1);
2248 break;
2249 case EXCP_DTB_MISS_PAL:
2250 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2251 exit(1);
2252 break;
2253 case EXCP_ITB_MISS:
2254 fprintf(stderr, "MMU instruction TLB miss\n");
2255 exit(1);
2256 break;
2257 case EXCP_ITB_ACV:
2258 fprintf(stderr, "MMU instruction access violation\n");
2259 exit(1);
2260 break;
2261 case EXCP_DTB_MISS_NATIVE:
2262 fprintf(stderr, "MMU data TLB miss\n");
2263 exit(1);
2264 break;
2265 case EXCP_UNALIGN:
2266 fprintf(stderr, "Unaligned access\n");
2267 exit(1);
2268 break;
2269 case EXCP_OPCDEC:
2270 fprintf(stderr, "Invalid instruction\n");
2271 exit(1);
2272 break;
2273 case EXCP_FEN:
2274 fprintf(stderr, "Floating-point not allowed\n");
2275 exit(1);
2276 break;
2277 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
7a3148a9
JM		 2278 call_pal(env, (trapnr >> 6) | 0x80);
2279 break;
2280 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
7f75ffd3 2281 fprintf(stderr, "Privileged call to PALcode\n");
7a3148a9
JM		 2282 exit(1);
2283 break;
2284 case EXCP_DEBUG:
2285 {
2286 int sig;
2287
2288 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2289 if (sig)
2290 {
2291 info.si_signo = sig;
2292 info.si_errno = 0;
2293 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2294 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2295 }
2296 }
2297 break;
2298 default:
2299 printf ("Unhandled trap: 0x%x\n", trapnr);
2300 cpu_dump_state(env, stderr, fprintf, 0);
2301 exit (1);
2302 }
2303 process_pending_signals (env);
2304 }
2305}
2306#endif /* TARGET_ALPHA */
2307
8fcd3692 2308static void usage(void)
31e31b8a 2309{
4a19f1ec 2310 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
68d0f70e 2311 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
b346ff46 2312 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 2313 "\n"
68d0f70e 2314 "Standard options:\n"
b12b6a18
TS		 2315 "-h print this help\n"
2316 "-g port wait gdb connection to port\n"
2317 "-L path set the elf interpreter prefix (default=%s)\n"
2318 "-s size set the stack size in bytes (default=%ld)\n"
2319 "-cpu model select CPU (-cpu ? for list)\n"
2320 "-drop-ld-preload drop LD_PRELOAD for target process\n"
04a6dfeb
AJ		 2321 "-E var=value sets/modifies targets environment variable(s)\n"
2322 "-U var unsets targets environment variable(s)\n"
7d8cec95 2323 "-0 argv0 forces target process argv[0] to be argv0\n"
54936004 2324 "\n"
68d0f70e 2325 "Debug options:\n"
6f1f31c0 2326 "-d options activate log (logfile=%s)\n"
b6741956 2327 "-p pagesize set the host page size to 'pagesize'\n"
1b530a6d 2328 "-singlestep always run in singlestep mode\n"
b01bcae6
AZ		 2329 "-strace log system calls\n"
2330 "\n"
68d0f70e 2331 "Environment variables:\n"
b01bcae6
AZ		 2332 "QEMU_STRACE Print system calls and arguments similar to the\n"
2333 " 'strace' program. Enable by setting to any value.\n"
04a6dfeb
AJ		 2334 "You can use -E and -U options to set/unset environment variables\n"
2335 "for target process. It is possible to provide several variables\n"
2336 "by repeating the option. For example:\n"
2337 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2338 "Note that if you provide several changes to single variable\n"
2339 "last change will stay in effect.\n"
b01bcae6 2340 ,
b346ff46 2341 TARGET_ARCH,
5fafdf24 2342 interp_prefix,
54936004
FB		 2343 x86_stack_size,
2344 DEBUG_LOGFILE);
2d18e637 2345 exit(1);
31e31b8a
FB		 2346}
2347
d5975363 2348THREAD CPUState *thread_env;
59faf6d6 2349
edf8e2af
MW		 2350void task_settid(TaskState *ts)
2351{
2352 if (ts->ts_tid == 0) {
2353#ifdef USE_NPTL
2354 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2355#else
2356 /* when no threads are used, tid becomes pid */
2357 ts->ts_tid = getpid();
2358#endif
2359 }
2360}
2361
2362void stop_all_tasks(void)
2363{
2364 /*
2365 * We trust that when using NPTL, start_exclusive()
2366 * handles thread stopping correctly.
2367 */
2368 start_exclusive();
2369}
2370
c3a92833 2371/* Assumes contents are already zeroed. */
624f7979
PB		 2372void init_task_state(TaskState *ts)
2373{
2374 int i;
2375
624f7979
PB		 2376 ts->used = 1;
2377 ts->first_free = ts->sigqueue_table;
2378 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2379 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2380 }
2381 ts->sigqueue_table[i].next = NULL;
2382}
2383
902b3d5c 2384int main(int argc, char **argv, char **envp)
31e31b8a
FB		 2385{
2386 const char *filename;
b1f9be31 2387 const char *cpu_model;
01ffc75b 2388 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 2389 struct image_info info1, *info = &info1;
edf8e2af 2390 struct linux_binprm bprm;
851e67a1 2391 TaskState ts1, *ts = &ts1;
b346ff46 2392 CPUState *env;
586314f2 2393 int optind;
d691f669 2394 const char *r;
74c33bed 2395 int gdbstub_port = 0;
04a6dfeb 2396 char **target_environ, **wrk;
7d8cec95
AJ		 2397 char **target_argv;
2398 int target_argc;
04a6dfeb 2399 envlist_t *envlist = NULL;
7d8cec95
AJ		 2400 const char *argv0 = NULL;
2401 int i;
fd4d81dd 2402 int ret;
b12b6a18 2403
31e31b8a 2404 if (argc <= 1)
44de1b33 2405 usage();
f801f97e 2406
902b3d5c 2407 qemu_cache_utils_init(envp);
2408
cc38b844
FB		 2409 /* init debug */
2410 cpu_set_log_filename(DEBUG_LOGFILE);
2411
04a6dfeb
AJ		 2412 if ((envlist = envlist_create()) == NULL) {
2413 (void) fprintf(stderr, "Unable to allocate envlist\n");
2414 exit(1);
2415 }
2416
2417 /* add current environment into the list */
2418 for (wrk = environ; *wrk != NULL; wrk++) {
2419 (void) envlist_setenv(envlist, *wrk);
2420 }
2421
b1f9be31 2422 cpu_model = NULL;
586314f2 2423 optind = 1;
d691f669
FB		 2424 for(;;) {
2425 if (optind >= argc)
2426 break;
2427 r = argv[optind];
2428 if (r[0] != '-')
2429 break;
586314f2 2430 optind++;
d691f669
FB		 2431 r++;
2432 if (!strcmp(r, "-")) {
2433 break;
2434 } else if (!strcmp(r, "d")) {
e19e89a5 2435 int mask;
c7cd6a37 2436 const CPULogItem *item;
6f1f31c0
FB		 2437
2438 if (optind >= argc)
2439 break;
3b46e624 2440
6f1f31c0
FB		 2441 r = argv[optind++];
2442 mask = cpu_str_to_log_mask(r);
e19e89a5
FB		 2443 if (!mask) {
2444 printf("Log items (comma separated):\n");
2445 for(item = cpu_log_items; item->mask != 0; item++) {
2446 printf("%-10s %s\n", item->name, item->help);
2447 }
2448 exit(1);
2449 }
2450 cpu_set_log(mask);
04a6dfeb
AJ		 2451 } else if (!strcmp(r, "E")) {
2452 r = argv[optind++];
2453 if (envlist_setenv(envlist, r) != 0)
2454 usage();
2455 } else if (!strcmp(r, "U")) {
2456 r = argv[optind++];
2457 if (envlist_unsetenv(envlist, r) != 0)
2458 usage();
7d8cec95
AJ		 2459 } else if (!strcmp(r, "0")) {
2460 r = argv[optind++];
2461 argv0 = r;
d691f669 2462 } else if (!strcmp(r, "s")) {
491150db
AJ		 2463 if (optind >= argc)
2464 break;
d691f669
FB		 2465 r = argv[optind++];
2466 x86_stack_size = strtol(r, (char **)&r, 0);
2467 if (x86_stack_size <= 0)
44de1b33 2468 usage();
d691f669
FB		 2469 if (*r == 'M')
2470 x86_stack_size *= 1024 * 1024;
2471 else if (*r == 'k' || *r == 'K')
2472 x86_stack_size *= 1024;
2473 } else if (!strcmp(r, "L")) {
2474 interp_prefix = argv[optind++];
54936004 2475 } else if (!strcmp(r, "p")) {
491150db
AJ		 2476 if (optind >= argc)
2477 break;
83fb7adf
FB		 2478 qemu_host_page_size = atoi(argv[optind++]);
2479 if (qemu_host_page_size == 0 ||
2480 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 2481 fprintf(stderr, "page size must be a power of two\n");
2482 exit(1);
2483 }
1fddef4b 2484 } else if (!strcmp(r, "g")) {
491150db
AJ		 2485 if (optind >= argc)
2486 break;
74c33bed 2487 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 2488 } else if (!strcmp(r, "r")) {
2489 qemu_uname_release = argv[optind++];
b1f9be31
JM		 2490 } else if (!strcmp(r, "cpu")) {
2491 cpu_model = argv[optind++];
491150db 2492 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
c732abe2
JM		 2493/* XXX: implement xxx_cpu_list for targets that still miss it */
2494#if defined(cpu_list)
2495 cpu_list(stdout, &fprintf);
b1f9be31 2496#endif
2d18e637 2497 exit(1);
b1f9be31 2498 }
b12b6a18 2499 } else if (!strcmp(r, "drop-ld-preload")) {
04a6dfeb 2500 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
1b530a6d
AJ		 2501 } else if (!strcmp(r, "singlestep")) {
2502 singlestep = 1;
b6741956
FB		 2503 } else if (!strcmp(r, "strace")) {
2504 do_strace = 1;
5fafdf24 2505 } else
c6981055 2506 {
d691f669
FB		 2507 usage();
2508 }
586314f2 2509 }
d691f669
FB		 2510 if (optind >= argc)
2511 usage();
586314f2 2512 filename = argv[optind];
d088d664 2513 exec_path = argv[optind];
586314f2 2514
31e31b8a 2515 /* Zero out regs */
01ffc75b 2516 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 2517
2518 /* Zero out image_info */
2519 memset(info, 0, sizeof(struct image_info));
2520
edf8e2af
MW		 2521 memset(&bprm, 0, sizeof (bprm));
2522
74cd30b8
FB		 2523 /* Scan interp_prefix dir for replacement files. */
2524 init_paths(interp_prefix);
2525
46027c07 2526 if (cpu_model == NULL) {
aaed909a 2527#if defined(TARGET_I386)
46027c07
FB		 2528#ifdef TARGET_X86_64
2529 cpu_model = "qemu64";
2530#else
2531 cpu_model = "qemu32";
2532#endif
aaed909a 2533#elif defined(TARGET_ARM)
088ab16c 2534 cpu_model = "any";
aaed909a
FB		 2535#elif defined(TARGET_M68K)
2536 cpu_model = "any";
2537#elif defined(TARGET_SPARC)
2538#ifdef TARGET_SPARC64
2539 cpu_model = "TI UltraSparc II";
2540#else
2541 cpu_model = "Fujitsu MB86904";
46027c07 2542#endif
aaed909a
FB		 2543#elif defined(TARGET_MIPS)
2544#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2545 cpu_model = "20Kc";
2546#else
2547 cpu_model = "24Kf";
2548#endif
2549#elif defined(TARGET_PPC)
7ded4f52
FB		 2550#ifdef TARGET_PPC64
2551 cpu_model = "970";
2552#else
aaed909a 2553 cpu_model = "750";
7ded4f52 2554#endif
aaed909a
FB		 2555#else
2556 cpu_model = "any";
2557#endif
2558 }
26a5f13b 2559 cpu_exec_init_all(0);
83fb7adf
FB		 2560 /* NOTE: we need to init the CPU at this stage to get
2561 qemu_host_page_size */
aaed909a
FB		 2562 env = cpu_init(cpu_model);
2563 if (!env) {
2564 fprintf(stderr, "Unable to find CPU definition\n");
2565 exit(1);
2566 }
d5975363 2567 thread_env = env;
3b46e624 2568
b6741956
FB		 2569 if (getenv("QEMU_STRACE")) {
2570 do_strace = 1;
b92c47c1
TS		 2571 }
2572
04a6dfeb
AJ		 2573 target_environ = envlist_to_environ(envlist, NULL);
2574 envlist_free(envlist);
b12b6a18 2575
7d8cec95
AJ		 2576 /*
2577 * Prepare copy of argv vector for target.
2578 */
2579 target_argc = argc - optind;
2580 target_argv = calloc(target_argc + 1, sizeof (char *));
2581 if (target_argv == NULL) {
2582 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2583 exit(1);
2584 }
2585
2586 /*
2587 * If argv0 is specified (using '-0' switch) we replace
2588 * argv[0] pointer with the given one.
2589 */
2590 i = 0;
2591 if (argv0 != NULL) {
2592 target_argv[i++] = strdup(argv0);
2593 }
2594 for (; i < target_argc; i++) {
2595 target_argv[i] = strdup(argv[optind + i]);
2596 }
2597 target_argv[target_argc] = NULL;
2598
edf8e2af
MW		 2599 memset(ts, 0, sizeof(TaskState));
2600 init_task_state(ts);
2601 /* build Task State */
2602 ts->info = info;
2603 ts->bprm = &bprm;
2604 env->opaque = ts;
2605 task_settid(ts);
2606
fd4d81dd
AP		 2607 ret = loader_exec(filename, target_argv, target_environ, regs,
2608 info, &bprm);
2609 if (ret != 0) {
2610 printf("Error %d while loading %s\n", ret, filename);
b12b6a18
TS		 2611 _exit(1);
2612 }
2613
7d8cec95
AJ		 2614 for (i = 0; i < target_argc; i++) {
2615 free(target_argv[i]);
2616 }
2617 free(target_argv);
2618
b12b6a18
TS		 2619 for (wrk = target_environ; *wrk; wrk++) {
2620 free(*wrk);
31e31b8a 2621 }
3b46e624 2622
b12b6a18
TS		 2623 free(target_environ);
2624
2e77eac6
BS		 2625 if (qemu_log_enabled()) {
2626 log_page_dump();
2627
2628 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2629 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2630 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2631 info->start_code);
2632 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2633 info->start_data);
2634 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2635 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2636 info->start_stack);
2637 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2638 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2639 }
31e31b8a 2640
53a5960a 2641 target_set_brk(info->brk);
31e31b8a 2642 syscall_init();
66fb9763 2643 signal_init();
31e31b8a 2644
b346ff46 2645#if defined(TARGET_I386)
2e255c6b
FB		 2646 cpu_x86_set_cpl(env, 3);
2647
3802ce26 2648 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 2649 env->hflags |= HF_PE_MASK;
2650 if (env->cpuid_features & CPUID_SSE) {
2651 env->cr[4] |= CR4_OSFXSR_MASK;
2652 env->hflags |= HF_OSFXSR_MASK;
2653 }
d2fd1af7 2654#ifndef TARGET_ABI32
4dbc422b
FB		 2655 /* enable 64 bit mode if possible */
2656 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2657 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2658 exit(1);
2659 }
d2fd1af7 2660 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 2661 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 2662 env->hflags |= HF_LMA_MASK;
2663#endif
1bde465e 2664
415e561f
FB		 2665 /* flags setup : we activate the IRQs by default as in user mode */
2666 env->eflags |= IF_MASK;
3b46e624 2667
6dbad63e 2668 /* linux register setup */
d2fd1af7 2669#ifndef TARGET_ABI32
84409ddb
JM		 2670 env->regs[R_EAX] = regs->rax;
2671 env->regs[R_EBX] = regs->rbx;
2672 env->regs[R_ECX] = regs->rcx;
2673 env->regs[R_EDX] = regs->rdx;
2674 env->regs[R_ESI] = regs->rsi;
2675 env->regs[R_EDI] = regs->rdi;
2676 env->regs[R_EBP] = regs->rbp;
2677 env->regs[R_ESP] = regs->rsp;
2678 env->eip = regs->rip;
2679#else
0ecfa993
FB		 2680 env->regs[R_EAX] = regs->eax;
2681 env->regs[R_EBX] = regs->ebx;
2682 env->regs[R_ECX] = regs->ecx;
2683 env->regs[R_EDX] = regs->edx;
2684 env->regs[R_ESI] = regs->esi;
2685 env->regs[R_EDI] = regs->edi;
2686 env->regs[R_EBP] = regs->ebp;
2687 env->regs[R_ESP] = regs->esp;
dab2ed99 2688 env->eip = regs->eip;
84409ddb 2689#endif
31e31b8a 2690
f4beb510 2691 /* linux interrupt setup */
e441570f
AZ		 2692#ifndef TARGET_ABI32
2693 env->idt.limit = 511;
2694#else
2695 env->idt.limit = 255;
2696#endif
2697 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2698 PROT_READ|PROT_WRITE,
2699 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2700 idt_table = g2h(env->idt.base);
f4beb510
FB		 2701 set_idt(0, 0);
2702 set_idt(1, 0);
2703 set_idt(2, 0);
2704 set_idt(3, 3);
2705 set_idt(4, 3);
ec95da6c 2706 set_idt(5, 0);
f4beb510
FB		 2707 set_idt(6, 0);
2708 set_idt(7, 0);
2709 set_idt(8, 0);
2710 set_idt(9, 0);
2711 set_idt(10, 0);
2712 set_idt(11, 0);
2713 set_idt(12, 0);
2714 set_idt(13, 0);
2715 set_idt(14, 0);
2716 set_idt(15, 0);
2717 set_idt(16, 0);
2718 set_idt(17, 0);
2719 set_idt(18, 0);
2720 set_idt(19, 0);
2721 set_idt(0x80, 3);
2722
6dbad63e 2723 /* linux segment setup */
8d18e893
FB		 2724 {
2725 uint64_t *gdt_table;
e441570f
AZ		 2726 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2727 PROT_READ|PROT_WRITE,
2728 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 2729 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 2730 gdt_table = g2h(env->gdt.base);
d2fd1af7 2731#ifdef TARGET_ABI32
8d18e893
FB		 2732 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2733 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2734 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 2735#else
2736 /* 64 bit code segment */
2737 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2738 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2739 DESC_L_MASK |
2740 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2741#endif
8d18e893
FB		 2742 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2743 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2744 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2745 }
6dbad63e 2746 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 2747 cpu_x86_load_seg(env, R_SS, __USER_DS);
2748#ifdef TARGET_ABI32
6dbad63e
FB		 2749 cpu_x86_load_seg(env, R_DS, __USER_DS);
2750 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 2751 cpu_x86_load_seg(env, R_FS, __USER_DS);
2752 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 2753 /* This hack makes Wine work... */
2754 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 2755#else
2756 cpu_x86_load_seg(env, R_DS, 0);
2757 cpu_x86_load_seg(env, R_ES, 0);
2758 cpu_x86_load_seg(env, R_FS, 0);
2759 cpu_x86_load_seg(env, R_GS, 0);
2760#endif
b346ff46
FB		 2761#elif defined(TARGET_ARM)
2762 {
2763 int i;
b5ff1b31 2764 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 2765 for(i = 0; i < 16; i++) {
2766 env->regs[i] = regs->uregs[i];
2767 }
b346ff46 2768 }
93ac68bc 2769#elif defined(TARGET_SPARC)
060366c5
FB		 2770 {
2771 int i;
2772 env->pc = regs->pc;
2773 env->npc = regs->npc;
2774 env->y = regs->y;
2775 for(i = 0; i < 8; i++)
2776 env->gregs[i] = regs->u_regs[i];
2777 for(i = 0; i < 8; i++)
2778 env->regwptr[i] = regs->u_regs[i + 8];
2779 }
67867308
FB		 2780#elif defined(TARGET_PPC)
2781 {
2782 int i;
3fc6c082 2783
0411a972
JM		 2784#if defined(TARGET_PPC64)
2785#if defined(TARGET_ABI32)
2786 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 2787#else
0411a972
JM		 2788 env->msr |= (target_ulong)1 << MSR_SF;
2789#endif
84409ddb 2790#endif
67867308
FB		 2791 env->nip = regs->nip;
2792 for(i = 0; i < 32; i++) {
2793 env->gpr[i] = regs->gpr[i];
2794 }
2795 }
e6e5906b
PB		 2796#elif defined(TARGET_M68K)
2797 {
e6e5906b
PB		 2798 env->pc = regs->pc;
2799 env->dregs[0] = regs->d0;
2800 env->dregs[1] = regs->d1;
2801 env->dregs[2] = regs->d2;
2802 env->dregs[3] = regs->d3;
2803 env->dregs[4] = regs->d4;
2804 env->dregs[5] = regs->d5;
2805 env->dregs[6] = regs->d6;
2806 env->dregs[7] = regs->d7;
2807 env->aregs[0] = regs->a0;
2808 env->aregs[1] = regs->a1;
2809 env->aregs[2] = regs->a2;
2810 env->aregs[3] = regs->a3;
2811 env->aregs[4] = regs->a4;
2812 env->aregs[5] = regs->a5;
2813 env->aregs[6] = regs->a6;
2814 env->aregs[7] = regs->usp;
2815 env->sr = regs->sr;
2816 ts->sim_syscalls = 1;
2817 }
b779e29e
EI		 2818#elif defined(TARGET_MICROBLAZE)
2819 {
2820 env->regs[0] = regs->r0;
2821 env->regs[1] = regs->r1;
2822 env->regs[2] = regs->r2;
2823 env->regs[3] = regs->r3;
2824 env->regs[4] = regs->r4;
2825 env->regs[5] = regs->r5;
2826 env->regs[6] = regs->r6;
2827 env->regs[7] = regs->r7;
2828 env->regs[8] = regs->r8;
2829 env->regs[9] = regs->r9;
2830 env->regs[10] = regs->r10;
2831 env->regs[11] = regs->r11;
2832 env->regs[12] = regs->r12;
2833 env->regs[13] = regs->r13;
2834 env->regs[14] = regs->r14;
2835 env->regs[15] = regs->r15;
2836 env->regs[16] = regs->r16;
2837 env->regs[17] = regs->r17;
2838 env->regs[18] = regs->r18;
2839 env->regs[19] = regs->r19;
2840 env->regs[20] = regs->r20;
2841 env->regs[21] = regs->r21;
2842 env->regs[22] = regs->r22;
2843 env->regs[23] = regs->r23;
2844 env->regs[24] = regs->r24;
2845 env->regs[25] = regs->r25;
2846 env->regs[26] = regs->r26;
2847 env->regs[27] = regs->r27;
2848 env->regs[28] = regs->r28;
2849 env->regs[29] = regs->r29;
2850 env->regs[30] = regs->r30;
2851 env->regs[31] = regs->r31;
2852 env->sregs[SR_PC] = regs->pc;
2853 }
048f6b4d
FB		 2854#elif defined(TARGET_MIPS)
2855 {
2856 int i;
2857
2858 for(i = 0; i < 32; i++) {
b5dc7732 2859 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 2860 }
b5dc7732 2861 env->active_tc.PC = regs->cp0_epc;
048f6b4d 2862 }
fdf9b3e8
FB		 2863#elif defined(TARGET_SH4)
2864 {
2865 int i;
2866
2867 for(i = 0; i < 16; i++) {
2868 env->gregs[i] = regs->regs[i];
2869 }
2870 env->pc = regs->pc;
2871 }
7a3148a9
JM		 2872#elif defined(TARGET_ALPHA)
2873 {
2874 int i;
2875
2876 for(i = 0; i < 28; i++) {
992f48a0 2877 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9
JM		 2878 }
2879 env->ipr[IPR_USP] = regs->usp;
2880 env->ir[30] = regs->usp;
2881 env->pc = regs->pc;
2882 env->unique = regs->unique;
2883 }
48733d19
TS		 2884#elif defined(TARGET_CRIS)
2885 {
2886 env->regs[0] = regs->r0;
2887 env->regs[1] = regs->r1;
2888 env->regs[2] = regs->r2;
2889 env->regs[3] = regs->r3;
2890 env->regs[4] = regs->r4;
2891 env->regs[5] = regs->r5;
2892 env->regs[6] = regs->r6;
2893 env->regs[7] = regs->r7;
2894 env->regs[8] = regs->r8;
2895 env->regs[9] = regs->r9;
2896 env->regs[10] = regs->r10;
2897 env->regs[11] = regs->r11;
2898 env->regs[12] = regs->r12;
2899 env->regs[13] = regs->r13;
2900 env->regs[14] = info->start_stack;
2901 env->regs[15] = regs->acr;
2902 env->pc = regs->erp;
2903 }
b346ff46
FB		 2904#else
2905#error unsupported target CPU
2906#endif
31e31b8a 2907
a87295e8
PB		 2908#if defined(TARGET_ARM) || defined(TARGET_M68K)
2909 ts->stack_base = info->start_stack;
2910 ts->heap_base = info->brk;
2911 /* This will be filled in on the first SYS_HEAPINFO call. */
2912 ts->heap_limit = 0;
2913#endif
2914
74c33bed
FB		 2915 if (gdbstub_port) {
2916 gdbserver_start (gdbstub_port);
1fddef4b
FB		 2917 gdb_handlesig(env, 0);
2918 }
1b6b029e
FB		 2919 cpu_loop(env);
2920 /* never exits */
31e31b8a
FB		 2921 return 0;
2922}
Qemu copy for testing