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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
16 | #include "memory.h" | |
1c0ffa58 | 17 | #include "exec-memory.h" |
658b2224 | 18 | #include "ioport.h" |
74901c3b | 19 | #include "bitops.h" |
3e9d69e7 | 20 | #include "kvm.h" |
093bc2cd AK |
21 | #include <assert.h> |
22 | ||
7762c2c1 | 23 | #include "memory-internal.h" |
67d95c15 | 24 | |
4ef4db86 | 25 | unsigned memory_region_transaction_depth = 0; |
7664e80c AK |
26 | static bool global_dirty_log = false; |
27 | ||
72e22d2f AK |
28 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
29 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 30 | |
0d673e36 AK |
31 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
32 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
33 | ||
093bc2cd AK |
34 | typedef struct AddrRange AddrRange; |
35 | ||
8417cebf AK |
36 | /* |
37 | * Note using signed integers limits us to physical addresses at most | |
38 | * 63 bits wide. They are needed for negative offsetting in aliases | |
39 | * (large MemoryRegion::alias_offset). | |
40 | */ | |
093bc2cd | 41 | struct AddrRange { |
08dafab4 AK |
42 | Int128 start; |
43 | Int128 size; | |
093bc2cd AK |
44 | }; |
45 | ||
08dafab4 | 46 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
47 | { |
48 | return (AddrRange) { start, size }; | |
49 | } | |
50 | ||
51 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
52 | { | |
08dafab4 | 53 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
54 | } |
55 | ||
08dafab4 | 56 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 57 | { |
08dafab4 | 58 | return int128_add(r.start, r.size); |
093bc2cd AK |
59 | } |
60 | ||
08dafab4 | 61 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 62 | { |
08dafab4 | 63 | int128_addto(&range.start, delta); |
093bc2cd AK |
64 | return range; |
65 | } | |
66 | ||
08dafab4 AK |
67 | static bool addrrange_contains(AddrRange range, Int128 addr) |
68 | { | |
69 | return int128_ge(addr, range.start) | |
70 | && int128_lt(addr, addrrange_end(range)); | |
71 | } | |
72 | ||
093bc2cd AK |
73 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
74 | { | |
08dafab4 AK |
75 | return addrrange_contains(r1, r2.start) |
76 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
77 | } |
78 | ||
79 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
80 | { | |
08dafab4 AK |
81 | Int128 start = int128_max(r1.start, r2.start); |
82 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
83 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
84 | } |
85 | ||
0e0d36b4 AK |
86 | enum ListenerDirection { Forward, Reverse }; |
87 | ||
7376e582 AK |
88 | static bool memory_listener_match(MemoryListener *listener, |
89 | MemoryRegionSection *section) | |
90 | { | |
91 | return !listener->address_space_filter | |
92 | || listener->address_space_filter == section->address_space; | |
93 | } | |
94 | ||
95 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
96 | do { \ |
97 | MemoryListener *_listener; \ | |
98 | \ | |
99 | switch (_direction) { \ | |
100 | case Forward: \ | |
101 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
102 | _listener->_callback(_listener, ##_args); \ | |
103 | } \ | |
104 | break; \ | |
105 | case Reverse: \ | |
106 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
107 | memory_listeners, link) { \ | |
108 | _listener->_callback(_listener, ##_args); \ | |
109 | } \ | |
110 | break; \ | |
111 | default: \ | |
112 | abort(); \ | |
113 | } \ | |
114 | } while (0) | |
115 | ||
7376e582 AK |
116 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
117 | do { \ | |
118 | MemoryListener *_listener; \ | |
119 | \ | |
120 | switch (_direction) { \ | |
121 | case Forward: \ | |
122 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
123 | if (memory_listener_match(_listener, _section)) { \ | |
124 | _listener->_callback(_listener, _section, ##_args); \ | |
125 | } \ | |
126 | } \ | |
127 | break; \ | |
128 | case Reverse: \ | |
129 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
130 | memory_listeners, link) { \ | |
131 | if (memory_listener_match(_listener, _section)) { \ | |
132 | _listener->_callback(_listener, _section, ##_args); \ | |
133 | } \ | |
134 | } \ | |
135 | break; \ | |
136 | default: \ | |
137 | abort(); \ | |
138 | } \ | |
139 | } while (0) | |
140 | ||
0e0d36b4 | 141 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 142 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 AK |
143 | .mr = (fr)->mr, \ |
144 | .address_space = (as)->root, \ | |
145 | .offset_within_region = (fr)->offset_in_region, \ | |
146 | .size = int128_get64((fr)->addr.size), \ | |
147 | .offset_within_address_space = int128_get64((fr)->addr.start), \ | |
7a8499e8 | 148 | .readonly = (fr)->readonly, \ |
7376e582 | 149 | })) |
0e0d36b4 | 150 | |
093bc2cd AK |
151 | struct CoalescedMemoryRange { |
152 | AddrRange addr; | |
153 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
154 | }; | |
155 | ||
3e9d69e7 AK |
156 | struct MemoryRegionIoeventfd { |
157 | AddrRange addr; | |
158 | bool match_data; | |
159 | uint64_t data; | |
753d5e14 | 160 | EventNotifier *e; |
3e9d69e7 AK |
161 | }; |
162 | ||
163 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
164 | MemoryRegionIoeventfd b) | |
165 | { | |
08dafab4 | 166 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 167 | return true; |
08dafab4 | 168 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 169 | return false; |
08dafab4 | 170 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 171 | return true; |
08dafab4 | 172 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
173 | return false; |
174 | } else if (a.match_data < b.match_data) { | |
175 | return true; | |
176 | } else if (a.match_data > b.match_data) { | |
177 | return false; | |
178 | } else if (a.match_data) { | |
179 | if (a.data < b.data) { | |
180 | return true; | |
181 | } else if (a.data > b.data) { | |
182 | return false; | |
183 | } | |
184 | } | |
753d5e14 | 185 | if (a.e < b.e) { |
3e9d69e7 | 186 | return true; |
753d5e14 | 187 | } else if (a.e > b.e) { |
3e9d69e7 AK |
188 | return false; |
189 | } | |
190 | return false; | |
191 | } | |
192 | ||
193 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
194 | MemoryRegionIoeventfd b) | |
195 | { | |
196 | return !memory_region_ioeventfd_before(a, b) | |
197 | && !memory_region_ioeventfd_before(b, a); | |
198 | } | |
199 | ||
093bc2cd AK |
200 | typedef struct FlatRange FlatRange; |
201 | typedef struct FlatView FlatView; | |
202 | ||
203 | /* Range of memory in the global map. Addresses are absolute. */ | |
204 | struct FlatRange { | |
205 | MemoryRegion *mr; | |
206 | target_phys_addr_t offset_in_region; | |
207 | AddrRange addr; | |
5a583347 | 208 | uint8_t dirty_log_mask; |
d0a9b5bc | 209 | bool readable; |
fb1cd6f9 | 210 | bool readonly; |
093bc2cd AK |
211 | }; |
212 | ||
213 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
214 | * order. | |
215 | */ | |
216 | struct FlatView { | |
217 | FlatRange *ranges; | |
218 | unsigned nr; | |
219 | unsigned nr_allocated; | |
220 | }; | |
221 | ||
cc31e6e7 AK |
222 | typedef struct AddressSpaceOps AddressSpaceOps; |
223 | ||
093bc2cd AK |
224 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
225 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
226 | ||
093bc2cd AK |
227 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
228 | { | |
229 | return a->mr == b->mr | |
230 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 231 | && a->offset_in_region == b->offset_in_region |
fb1cd6f9 AK |
232 | && a->readable == b->readable |
233 | && a->readonly == b->readonly; | |
093bc2cd AK |
234 | } |
235 | ||
236 | static void flatview_init(FlatView *view) | |
237 | { | |
238 | view->ranges = NULL; | |
239 | view->nr = 0; | |
240 | view->nr_allocated = 0; | |
241 | } | |
242 | ||
243 | /* Insert a range into a given position. Caller is responsible for maintaining | |
244 | * sorting order. | |
245 | */ | |
246 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
247 | { | |
248 | if (view->nr == view->nr_allocated) { | |
249 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 250 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
251 | view->nr_allocated * sizeof(*view->ranges)); |
252 | } | |
253 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
254 | (view->nr - pos) * sizeof(FlatRange)); | |
255 | view->ranges[pos] = *range; | |
256 | ++view->nr; | |
257 | } | |
258 | ||
259 | static void flatview_destroy(FlatView *view) | |
260 | { | |
7267c094 | 261 | g_free(view->ranges); |
093bc2cd AK |
262 | } |
263 | ||
3d8e6bf9 AK |
264 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
265 | { | |
08dafab4 | 266 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 267 | && r1->mr == r2->mr |
08dafab4 AK |
268 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
269 | r1->addr.size), | |
270 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 271 | && r1->dirty_log_mask == r2->dirty_log_mask |
fb1cd6f9 AK |
272 | && r1->readable == r2->readable |
273 | && r1->readonly == r2->readonly; | |
3d8e6bf9 AK |
274 | } |
275 | ||
276 | /* Attempt to simplify a view by merging ajacent ranges */ | |
277 | static void flatview_simplify(FlatView *view) | |
278 | { | |
279 | unsigned i, j; | |
280 | ||
281 | i = 0; | |
282 | while (i < view->nr) { | |
283 | j = i + 1; | |
284 | while (j < view->nr | |
285 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 286 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
287 | ++j; |
288 | } | |
289 | ++i; | |
290 | memmove(&view->ranges[i], &view->ranges[j], | |
291 | (view->nr - j) * sizeof(view->ranges[j])); | |
292 | view->nr -= j - i; | |
293 | } | |
294 | } | |
295 | ||
164a4dcd AK |
296 | static void memory_region_read_accessor(void *opaque, |
297 | target_phys_addr_t addr, | |
298 | uint64_t *value, | |
299 | unsigned size, | |
300 | unsigned shift, | |
301 | uint64_t mask) | |
302 | { | |
303 | MemoryRegion *mr = opaque; | |
304 | uint64_t tmp; | |
305 | ||
d410515e JK |
306 | if (mr->flush_coalesced_mmio) { |
307 | qemu_flush_coalesced_mmio_buffer(); | |
308 | } | |
164a4dcd AK |
309 | tmp = mr->ops->read(mr->opaque, addr, size); |
310 | *value |= (tmp & mask) << shift; | |
311 | } | |
312 | ||
313 | static void memory_region_write_accessor(void *opaque, | |
314 | target_phys_addr_t addr, | |
315 | uint64_t *value, | |
316 | unsigned size, | |
317 | unsigned shift, | |
318 | uint64_t mask) | |
319 | { | |
320 | MemoryRegion *mr = opaque; | |
321 | uint64_t tmp; | |
322 | ||
d410515e JK |
323 | if (mr->flush_coalesced_mmio) { |
324 | qemu_flush_coalesced_mmio_buffer(); | |
325 | } | |
164a4dcd AK |
326 | tmp = (*value >> shift) & mask; |
327 | mr->ops->write(mr->opaque, addr, tmp, size); | |
328 | } | |
329 | ||
330 | static void access_with_adjusted_size(target_phys_addr_t addr, | |
331 | uint64_t *value, | |
332 | unsigned size, | |
333 | unsigned access_size_min, | |
334 | unsigned access_size_max, | |
335 | void (*access)(void *opaque, | |
336 | target_phys_addr_t addr, | |
337 | uint64_t *value, | |
338 | unsigned size, | |
339 | unsigned shift, | |
340 | uint64_t mask), | |
341 | void *opaque) | |
342 | { | |
343 | uint64_t access_mask; | |
344 | unsigned access_size; | |
345 | unsigned i; | |
346 | ||
347 | if (!access_size_min) { | |
348 | access_size_min = 1; | |
349 | } | |
350 | if (!access_size_max) { | |
351 | access_size_max = 4; | |
352 | } | |
353 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
354 | access_mask = -1ULL >> (64 - access_size * 8); | |
355 | for (i = 0; i < size; i += access_size) { | |
356 | /* FIXME: big-endian support */ | |
357 | access(opaque, addr + i, value, access_size, i * 8, access_mask); | |
358 | } | |
359 | } | |
360 | ||
8df8a843 | 361 | static AddressSpace address_space_memory; |
cc31e6e7 | 362 | |
627a0e90 AK |
363 | static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
364 | unsigned width, bool write) | |
365 | { | |
366 | const MemoryRegionPortio *mrp; | |
367 | ||
368 | for (mrp = mr->ops->old_portio; mrp->size; ++mrp) { | |
369 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len | |
370 | && width == mrp->size | |
371 | && (write ? (bool)mrp->write : (bool)mrp->read)) { | |
372 | return mrp; | |
373 | } | |
374 | } | |
375 | return NULL; | |
376 | } | |
377 | ||
658b2224 AK |
378 | static void memory_region_iorange_read(IORange *iorange, |
379 | uint64_t offset, | |
380 | unsigned width, | |
381 | uint64_t *data) | |
382 | { | |
a2d33521 AK |
383 | MemoryRegionIORange *mrio |
384 | = container_of(iorange, MemoryRegionIORange, iorange); | |
385 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 386 | |
a2d33521 | 387 | offset += mrio->offset; |
627a0e90 | 388 | if (mr->ops->old_portio) { |
a2d33521 AK |
389 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
390 | width, false); | |
627a0e90 AK |
391 | |
392 | *data = ((uint64_t)1 << (width * 8)) - 1; | |
393 | if (mrp) { | |
2b50aa1f | 394 | *data = mrp->read(mr->opaque, offset); |
03808f58 | 395 | } else if (width == 2) { |
a2d33521 | 396 | mrp = find_portio(mr, offset - mrio->offset, 1, false); |
03808f58 | 397 | assert(mrp); |
2b50aa1f AK |
398 | *data = mrp->read(mr->opaque, offset) | |
399 | (mrp->read(mr->opaque, offset + 1) << 8); | |
627a0e90 AK |
400 | } |
401 | return; | |
402 | } | |
3a130f4e | 403 | *data = 0; |
2b50aa1f | 404 | access_with_adjusted_size(offset, data, width, |
3a130f4e AK |
405 | mr->ops->impl.min_access_size, |
406 | mr->ops->impl.max_access_size, | |
407 | memory_region_read_accessor, mr); | |
658b2224 AK |
408 | } |
409 | ||
410 | static void memory_region_iorange_write(IORange *iorange, | |
411 | uint64_t offset, | |
412 | unsigned width, | |
413 | uint64_t data) | |
414 | { | |
a2d33521 AK |
415 | MemoryRegionIORange *mrio |
416 | = container_of(iorange, MemoryRegionIORange, iorange); | |
417 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 418 | |
a2d33521 | 419 | offset += mrio->offset; |
627a0e90 | 420 | if (mr->ops->old_portio) { |
a2d33521 AK |
421 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
422 | width, true); | |
627a0e90 AK |
423 | |
424 | if (mrp) { | |
2b50aa1f | 425 | mrp->write(mr->opaque, offset, data); |
03808f58 | 426 | } else if (width == 2) { |
7e2a62d8 | 427 | mrp = find_portio(mr, offset - mrio->offset, 1, true); |
03808f58 | 428 | assert(mrp); |
2b50aa1f AK |
429 | mrp->write(mr->opaque, offset, data & 0xff); |
430 | mrp->write(mr->opaque, offset + 1, data >> 8); | |
627a0e90 AK |
431 | } |
432 | return; | |
433 | } | |
2b50aa1f | 434 | access_with_adjusted_size(offset, &data, width, |
3a130f4e AK |
435 | mr->ops->impl.min_access_size, |
436 | mr->ops->impl.max_access_size, | |
437 | memory_region_write_accessor, mr); | |
658b2224 AK |
438 | } |
439 | ||
a2d33521 AK |
440 | static void memory_region_iorange_destructor(IORange *iorange) |
441 | { | |
442 | g_free(container_of(iorange, MemoryRegionIORange, iorange)); | |
443 | } | |
444 | ||
93632747 | 445 | const IORangeOps memory_region_iorange_ops = { |
658b2224 AK |
446 | .read = memory_region_iorange_read, |
447 | .write = memory_region_iorange_write, | |
a2d33521 | 448 | .destructor = memory_region_iorange_destructor, |
658b2224 AK |
449 | }; |
450 | ||
8df8a843 | 451 | static AddressSpace address_space_io; |
658b2224 | 452 | |
e2177955 AK |
453 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
454 | { | |
0d673e36 AK |
455 | AddressSpace *as; |
456 | ||
e2177955 AK |
457 | while (mr->parent) { |
458 | mr = mr->parent; | |
459 | } | |
0d673e36 AK |
460 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
461 | if (mr == as->root) { | |
462 | return as; | |
463 | } | |
e2177955 AK |
464 | } |
465 | abort(); | |
466 | } | |
467 | ||
093bc2cd AK |
468 | /* Render a memory region into the global view. Ranges in @view obscure |
469 | * ranges in @mr. | |
470 | */ | |
471 | static void render_memory_region(FlatView *view, | |
472 | MemoryRegion *mr, | |
08dafab4 | 473 | Int128 base, |
fb1cd6f9 AK |
474 | AddrRange clip, |
475 | bool readonly) | |
093bc2cd AK |
476 | { |
477 | MemoryRegion *subregion; | |
478 | unsigned i; | |
479 | target_phys_addr_t offset_in_region; | |
08dafab4 AK |
480 | Int128 remain; |
481 | Int128 now; | |
093bc2cd AK |
482 | FlatRange fr; |
483 | AddrRange tmp; | |
484 | ||
6bba19ba AK |
485 | if (!mr->enabled) { |
486 | return; | |
487 | } | |
488 | ||
08dafab4 | 489 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 490 | readonly |= mr->readonly; |
093bc2cd AK |
491 | |
492 | tmp = addrrange_make(base, mr->size); | |
493 | ||
494 | if (!addrrange_intersects(tmp, clip)) { | |
495 | return; | |
496 | } | |
497 | ||
498 | clip = addrrange_intersection(tmp, clip); | |
499 | ||
500 | if (mr->alias) { | |
08dafab4 AK |
501 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
502 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 503 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
504 | return; |
505 | } | |
506 | ||
507 | /* Render subregions in priority order. */ | |
508 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 509 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
510 | } |
511 | ||
14a3c10a | 512 | if (!mr->terminates) { |
093bc2cd AK |
513 | return; |
514 | } | |
515 | ||
08dafab4 | 516 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
517 | base = clip.start; |
518 | remain = clip.size; | |
519 | ||
520 | /* Render the region itself into any gaps left by the current view. */ | |
08dafab4 AK |
521 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
522 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
523 | continue; |
524 | } | |
08dafab4 AK |
525 | if (int128_lt(base, view->ranges[i].addr.start)) { |
526 | now = int128_min(remain, | |
527 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
528 | fr.mr = mr; |
529 | fr.offset_in_region = offset_in_region; | |
530 | fr.addr = addrrange_make(base, now); | |
5a583347 | 531 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 532 | fr.readable = mr->readable; |
fb1cd6f9 | 533 | fr.readonly = readonly; |
093bc2cd AK |
534 | flatview_insert(view, i, &fr); |
535 | ++i; | |
08dafab4 AK |
536 | int128_addto(&base, now); |
537 | offset_in_region += int128_get64(now); | |
538 | int128_subfrom(&remain, now); | |
093bc2cd | 539 | } |
08dafab4 AK |
540 | if (int128_eq(base, view->ranges[i].addr.start)) { |
541 | now = int128_min(remain, view->ranges[i].addr.size); | |
542 | int128_addto(&base, now); | |
543 | offset_in_region += int128_get64(now); | |
544 | int128_subfrom(&remain, now); | |
093bc2cd AK |
545 | } |
546 | } | |
08dafab4 | 547 | if (int128_nz(remain)) { |
093bc2cd AK |
548 | fr.mr = mr; |
549 | fr.offset_in_region = offset_in_region; | |
550 | fr.addr = addrrange_make(base, remain); | |
5a583347 | 551 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 552 | fr.readable = mr->readable; |
fb1cd6f9 | 553 | fr.readonly = readonly; |
093bc2cd AK |
554 | flatview_insert(view, i, &fr); |
555 | } | |
556 | } | |
557 | ||
558 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
559 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
560 | { | |
561 | FlatView view; | |
562 | ||
563 | flatview_init(&view); | |
564 | ||
08dafab4 AK |
565 | render_memory_region(&view, mr, int128_zero(), |
566 | addrrange_make(int128_zero(), int128_2_64()), false); | |
3d8e6bf9 | 567 | flatview_simplify(&view); |
093bc2cd AK |
568 | |
569 | return view; | |
570 | } | |
571 | ||
3e9d69e7 AK |
572 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
573 | MemoryRegionIoeventfd *fds_new, | |
574 | unsigned fds_new_nb, | |
575 | MemoryRegionIoeventfd *fds_old, | |
576 | unsigned fds_old_nb) | |
577 | { | |
578 | unsigned iold, inew; | |
80a1ea37 AK |
579 | MemoryRegionIoeventfd *fd; |
580 | MemoryRegionSection section; | |
3e9d69e7 AK |
581 | |
582 | /* Generate a symmetric difference of the old and new fd sets, adding | |
583 | * and deleting as necessary. | |
584 | */ | |
585 | ||
586 | iold = inew = 0; | |
587 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
588 | if (iold < fds_old_nb | |
589 | && (inew == fds_new_nb | |
590 | || memory_region_ioeventfd_before(fds_old[iold], | |
591 | fds_new[inew]))) { | |
80a1ea37 AK |
592 | fd = &fds_old[iold]; |
593 | section = (MemoryRegionSection) { | |
594 | .address_space = as->root, | |
595 | .offset_within_address_space = int128_get64(fd->addr.start), | |
596 | .size = int128_get64(fd->addr.size), | |
597 | }; | |
598 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 599 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
600 | ++iold; |
601 | } else if (inew < fds_new_nb | |
602 | && (iold == fds_old_nb | |
603 | || memory_region_ioeventfd_before(fds_new[inew], | |
604 | fds_old[iold]))) { | |
80a1ea37 AK |
605 | fd = &fds_new[inew]; |
606 | section = (MemoryRegionSection) { | |
607 | .address_space = as->root, | |
608 | .offset_within_address_space = int128_get64(fd->addr.start), | |
609 | .size = int128_get64(fd->addr.size), | |
610 | }; | |
611 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 612 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
613 | ++inew; |
614 | } else { | |
615 | ++iold; | |
616 | ++inew; | |
617 | } | |
618 | } | |
619 | } | |
620 | ||
621 | static void address_space_update_ioeventfds(AddressSpace *as) | |
622 | { | |
623 | FlatRange *fr; | |
624 | unsigned ioeventfd_nb = 0; | |
625 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
626 | AddrRange tmp; | |
627 | unsigned i; | |
628 | ||
8786db7c | 629 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
3e9d69e7 AK |
630 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
631 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
632 | int128_sub(fr->addr.start, |
633 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
634 | if (addrrange_intersects(fr->addr, tmp)) { |
635 | ++ioeventfd_nb; | |
7267c094 | 636 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
637 | ioeventfd_nb * sizeof(*ioeventfds)); |
638 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
639 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
640 | } | |
641 | } | |
642 | } | |
643 | ||
644 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
645 | as->ioeventfds, as->ioeventfd_nb); | |
646 | ||
7267c094 | 647 | g_free(as->ioeventfds); |
3e9d69e7 AK |
648 | as->ioeventfds = ioeventfds; |
649 | as->ioeventfd_nb = ioeventfd_nb; | |
650 | } | |
651 | ||
b8af1afb AK |
652 | static void address_space_update_topology_pass(AddressSpace *as, |
653 | FlatView old_view, | |
654 | FlatView new_view, | |
655 | bool adding) | |
093bc2cd | 656 | { |
093bc2cd AK |
657 | unsigned iold, inew; |
658 | FlatRange *frold, *frnew; | |
093bc2cd AK |
659 | |
660 | /* Generate a symmetric difference of the old and new memory maps. | |
661 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
662 | */ | |
663 | iold = inew = 0; | |
664 | while (iold < old_view.nr || inew < new_view.nr) { | |
665 | if (iold < old_view.nr) { | |
666 | frold = &old_view.ranges[iold]; | |
667 | } else { | |
668 | frold = NULL; | |
669 | } | |
670 | if (inew < new_view.nr) { | |
671 | frnew = &new_view.ranges[inew]; | |
672 | } else { | |
673 | frnew = NULL; | |
674 | } | |
675 | ||
676 | if (frold | |
677 | && (!frnew | |
08dafab4 AK |
678 | || int128_lt(frold->addr.start, frnew->addr.start) |
679 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd AK |
680 | && !flatrange_equal(frold, frnew)))) { |
681 | /* In old, but (not in new, or in new but attributes changed). */ | |
682 | ||
b8af1afb | 683 | if (!adding) { |
72e22d2f | 684 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
685 | } |
686 | ||
093bc2cd AK |
687 | ++iold; |
688 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
689 | /* In both (logging may have changed) */ | |
690 | ||
b8af1afb | 691 | if (adding) { |
50c1e149 | 692 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 693 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 694 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 695 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 696 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 697 | } |
5a583347 AK |
698 | } |
699 | ||
093bc2cd AK |
700 | ++iold; |
701 | ++inew; | |
093bc2cd AK |
702 | } else { |
703 | /* In new */ | |
704 | ||
b8af1afb | 705 | if (adding) { |
72e22d2f | 706 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
707 | } |
708 | ||
093bc2cd AK |
709 | ++inew; |
710 | } | |
711 | } | |
b8af1afb AK |
712 | } |
713 | ||
714 | ||
715 | static void address_space_update_topology(AddressSpace *as) | |
716 | { | |
8786db7c | 717 | FlatView old_view = *as->current_map; |
b8af1afb AK |
718 | FlatView new_view = generate_memory_topology(as->root); |
719 | ||
720 | address_space_update_topology_pass(as, old_view, new_view, false); | |
721 | address_space_update_topology_pass(as, old_view, new_view, true); | |
722 | ||
8786db7c | 723 | *as->current_map = new_view; |
093bc2cd | 724 | flatview_destroy(&old_view); |
3e9d69e7 | 725 | address_space_update_ioeventfds(as); |
093bc2cd AK |
726 | } |
727 | ||
4ef4db86 AK |
728 | void memory_region_transaction_begin(void) |
729 | { | |
bb880ded | 730 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
731 | ++memory_region_transaction_depth; |
732 | } | |
733 | ||
734 | void memory_region_transaction_commit(void) | |
735 | { | |
0d673e36 AK |
736 | AddressSpace *as; |
737 | ||
4ef4db86 AK |
738 | assert(memory_region_transaction_depth); |
739 | --memory_region_transaction_depth; | |
02e2b95f JK |
740 | if (!memory_region_transaction_depth) { |
741 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
742 | ||
0d673e36 AK |
743 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
744 | address_space_update_topology(as); | |
02e2b95f JK |
745 | } |
746 | ||
747 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
e87c099f | 748 | } |
4ef4db86 AK |
749 | } |
750 | ||
545e92e0 AK |
751 | static void memory_region_destructor_none(MemoryRegion *mr) |
752 | { | |
753 | } | |
754 | ||
755 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
756 | { | |
757 | qemu_ram_free(mr->ram_addr); | |
758 | } | |
759 | ||
760 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
761 | { | |
762 | qemu_ram_free_from_ptr(mr->ram_addr); | |
763 | } | |
764 | ||
765 | static void memory_region_destructor_iomem(MemoryRegion *mr) | |
766 | { | |
545e92e0 AK |
767 | } |
768 | ||
d0a9b5bc AK |
769 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
770 | { | |
771 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
772 | } |
773 | ||
be675c97 AK |
774 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
775 | { | |
2c3579ab | 776 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
777 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
778 | #else | |
779 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
780 | #endif | |
781 | } | |
782 | ||
093bc2cd AK |
783 | void memory_region_init(MemoryRegion *mr, |
784 | const char *name, | |
785 | uint64_t size) | |
786 | { | |
787 | mr->ops = NULL; | |
788 | mr->parent = NULL; | |
08dafab4 AK |
789 | mr->size = int128_make64(size); |
790 | if (size == UINT64_MAX) { | |
791 | mr->size = int128_2_64(); | |
792 | } | |
093bc2cd | 793 | mr->addr = 0; |
b3b00c78 | 794 | mr->subpage = false; |
6bba19ba | 795 | mr->enabled = true; |
14a3c10a | 796 | mr->terminates = false; |
8ea9252a | 797 | mr->ram = false; |
d0a9b5bc | 798 | mr->readable = true; |
fb1cd6f9 | 799 | mr->readonly = false; |
75c578dc | 800 | mr->rom_device = false; |
545e92e0 | 801 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
802 | mr->priority = 0; |
803 | mr->may_overlap = false; | |
804 | mr->alias = NULL; | |
805 | QTAILQ_INIT(&mr->subregions); | |
806 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
807 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 808 | mr->name = g_strdup(name); |
5a583347 | 809 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
810 | mr->ioeventfd_nb = 0; |
811 | mr->ioeventfds = NULL; | |
d410515e | 812 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
813 | } |
814 | ||
815 | static bool memory_region_access_valid(MemoryRegion *mr, | |
816 | target_phys_addr_t addr, | |
897fa7cf AK |
817 | unsigned size, |
818 | bool is_write) | |
093bc2cd | 819 | { |
897fa7cf AK |
820 | if (mr->ops->valid.accepts |
821 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) { | |
822 | return false; | |
823 | } | |
824 | ||
093bc2cd AK |
825 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
826 | return false; | |
827 | } | |
828 | ||
829 | /* Treat zero as compatibility all valid */ | |
830 | if (!mr->ops->valid.max_access_size) { | |
831 | return true; | |
832 | } | |
833 | ||
834 | if (size > mr->ops->valid.max_access_size | |
835 | || size < mr->ops->valid.min_access_size) { | |
836 | return false; | |
837 | } | |
838 | return true; | |
839 | } | |
840 | ||
a621f38d AK |
841 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
842 | target_phys_addr_t addr, | |
843 | unsigned size) | |
093bc2cd | 844 | { |
164a4dcd | 845 | uint64_t data = 0; |
093bc2cd | 846 | |
897fa7cf | 847 | if (!memory_region_access_valid(mr, addr, size, false)) { |
093bc2cd AK |
848 | return -1U; /* FIXME: better signalling */ |
849 | } | |
850 | ||
74901c3b AK |
851 | if (!mr->ops->read) { |
852 | return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr); | |
853 | } | |
854 | ||
093bc2cd | 855 | /* FIXME: support unaligned access */ |
2b50aa1f | 856 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
857 | mr->ops->impl.min_access_size, |
858 | mr->ops->impl.max_access_size, | |
859 | memory_region_read_accessor, mr); | |
093bc2cd AK |
860 | |
861 | return data; | |
862 | } | |
863 | ||
a621f38d | 864 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 865 | { |
a621f38d AK |
866 | if (memory_region_wrong_endianness(mr)) { |
867 | switch (size) { | |
868 | case 1: | |
869 | break; | |
870 | case 2: | |
871 | *data = bswap16(*data); | |
872 | break; | |
873 | case 4: | |
874 | *data = bswap32(*data); | |
1470a0cd | 875 | break; |
a621f38d AK |
876 | default: |
877 | abort(); | |
878 | } | |
879 | } | |
880 | } | |
881 | ||
882 | static uint64_t memory_region_dispatch_read(MemoryRegion *mr, | |
883 | target_phys_addr_t addr, | |
884 | unsigned size) | |
885 | { | |
886 | uint64_t ret; | |
887 | ||
888 | ret = memory_region_dispatch_read1(mr, addr, size); | |
889 | adjust_endianness(mr, &ret, size); | |
890 | return ret; | |
891 | } | |
093bc2cd | 892 | |
a621f38d AK |
893 | static void memory_region_dispatch_write(MemoryRegion *mr, |
894 | target_phys_addr_t addr, | |
895 | uint64_t data, | |
896 | unsigned size) | |
897 | { | |
897fa7cf | 898 | if (!memory_region_access_valid(mr, addr, size, true)) { |
093bc2cd AK |
899 | return; /* FIXME: better signalling */ |
900 | } | |
901 | ||
a621f38d AK |
902 | adjust_endianness(mr, &data, size); |
903 | ||
74901c3b AK |
904 | if (!mr->ops->write) { |
905 | mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data); | |
906 | return; | |
907 | } | |
908 | ||
093bc2cd | 909 | /* FIXME: support unaligned access */ |
2b50aa1f | 910 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
911 | mr->ops->impl.min_access_size, |
912 | mr->ops->impl.max_access_size, | |
913 | memory_region_write_accessor, mr); | |
093bc2cd AK |
914 | } |
915 | ||
093bc2cd AK |
916 | void memory_region_init_io(MemoryRegion *mr, |
917 | const MemoryRegionOps *ops, | |
918 | void *opaque, | |
919 | const char *name, | |
920 | uint64_t size) | |
921 | { | |
922 | memory_region_init(mr, name, size); | |
923 | mr->ops = ops; | |
924 | mr->opaque = opaque; | |
14a3c10a | 925 | mr->terminates = true; |
26a83ad0 | 926 | mr->destructor = memory_region_destructor_iomem; |
97161e17 | 927 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
928 | } |
929 | ||
930 | void memory_region_init_ram(MemoryRegion *mr, | |
093bc2cd AK |
931 | const char *name, |
932 | uint64_t size) | |
933 | { | |
934 | memory_region_init(mr, name, size); | |
8ea9252a | 935 | mr->ram = true; |
14a3c10a | 936 | mr->terminates = true; |
545e92e0 | 937 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 938 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
939 | } |
940 | ||
941 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
093bc2cd AK |
942 | const char *name, |
943 | uint64_t size, | |
944 | void *ptr) | |
945 | { | |
946 | memory_region_init(mr, name, size); | |
8ea9252a | 947 | mr->ram = true; |
14a3c10a | 948 | mr->terminates = true; |
545e92e0 | 949 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 950 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
951 | } |
952 | ||
953 | void memory_region_init_alias(MemoryRegion *mr, | |
954 | const char *name, | |
955 | MemoryRegion *orig, | |
956 | target_phys_addr_t offset, | |
957 | uint64_t size) | |
958 | { | |
959 | memory_region_init(mr, name, size); | |
960 | mr->alias = orig; | |
961 | mr->alias_offset = offset; | |
962 | } | |
963 | ||
d0a9b5bc AK |
964 | void memory_region_init_rom_device(MemoryRegion *mr, |
965 | const MemoryRegionOps *ops, | |
75f5941c | 966 | void *opaque, |
d0a9b5bc AK |
967 | const char *name, |
968 | uint64_t size) | |
969 | { | |
970 | memory_region_init(mr, name, size); | |
7bc2b9cd | 971 | mr->ops = ops; |
75f5941c | 972 | mr->opaque = opaque; |
d0a9b5bc | 973 | mr->terminates = true; |
75c578dc | 974 | mr->rom_device = true; |
d0a9b5bc | 975 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 976 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
977 | } |
978 | ||
1660e72d JK |
979 | static uint64_t invalid_read(void *opaque, target_phys_addr_t addr, |
980 | unsigned size) | |
981 | { | |
982 | MemoryRegion *mr = opaque; | |
983 | ||
984 | if (!mr->warning_printed) { | |
985 | fprintf(stderr, "Invalid read from memory region %s\n", mr->name); | |
986 | mr->warning_printed = true; | |
987 | } | |
988 | return -1U; | |
989 | } | |
990 | ||
991 | static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data, | |
992 | unsigned size) | |
993 | { | |
994 | MemoryRegion *mr = opaque; | |
995 | ||
996 | if (!mr->warning_printed) { | |
997 | fprintf(stderr, "Invalid write to memory region %s\n", mr->name); | |
998 | mr->warning_printed = true; | |
999 | } | |
1000 | } | |
1001 | ||
1002 | static const MemoryRegionOps reservation_ops = { | |
1003 | .read = invalid_read, | |
1004 | .write = invalid_write, | |
1005 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1006 | }; | |
1007 | ||
1008 | void memory_region_init_reservation(MemoryRegion *mr, | |
1009 | const char *name, | |
1010 | uint64_t size) | |
1011 | { | |
1012 | memory_region_init_io(mr, &reservation_ops, mr, name, size); | |
1013 | } | |
1014 | ||
093bc2cd AK |
1015 | void memory_region_destroy(MemoryRegion *mr) |
1016 | { | |
1017 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
545e92e0 | 1018 | mr->destructor(mr); |
093bc2cd | 1019 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1020 | g_free((char *)mr->name); |
1021 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1022 | } |
1023 | ||
1024 | uint64_t memory_region_size(MemoryRegion *mr) | |
1025 | { | |
08dafab4 AK |
1026 | if (int128_eq(mr->size, int128_2_64())) { |
1027 | return UINT64_MAX; | |
1028 | } | |
1029 | return int128_get64(mr->size); | |
093bc2cd AK |
1030 | } |
1031 | ||
8991c79b AK |
1032 | const char *memory_region_name(MemoryRegion *mr) |
1033 | { | |
1034 | return mr->name; | |
1035 | } | |
1036 | ||
8ea9252a AK |
1037 | bool memory_region_is_ram(MemoryRegion *mr) |
1038 | { | |
1039 | return mr->ram; | |
1040 | } | |
1041 | ||
55043ba3 AK |
1042 | bool memory_region_is_logging(MemoryRegion *mr) |
1043 | { | |
1044 | return mr->dirty_log_mask; | |
1045 | } | |
1046 | ||
ce7923da AK |
1047 | bool memory_region_is_rom(MemoryRegion *mr) |
1048 | { | |
1049 | return mr->ram && mr->readonly; | |
1050 | } | |
1051 | ||
093bc2cd AK |
1052 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1053 | { | |
5a583347 AK |
1054 | uint8_t mask = 1 << client; |
1055 | ||
59023ef4 | 1056 | memory_region_transaction_begin(); |
5a583347 | 1057 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
59023ef4 | 1058 | memory_region_transaction_commit(); |
093bc2cd AK |
1059 | } |
1060 | ||
1061 | bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr, | |
cd7a45c9 | 1062 | target_phys_addr_t size, unsigned client) |
093bc2cd | 1063 | { |
14a3c10a | 1064 | assert(mr->terminates); |
cd7a45c9 BS |
1065 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1066 | 1 << client); | |
093bc2cd AK |
1067 | } |
1068 | ||
fd4aa979 BS |
1069 | void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1070 | target_phys_addr_t size) | |
093bc2cd | 1071 | { |
14a3c10a | 1072 | assert(mr->terminates); |
fd4aa979 | 1073 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1074 | } |
1075 | ||
1076 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) | |
1077 | { | |
0d673e36 | 1078 | AddressSpace *as; |
5a583347 AK |
1079 | FlatRange *fr; |
1080 | ||
0d673e36 AK |
1081 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1082 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { | |
1083 | if (fr->mr == mr) { | |
1084 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1085 | } | |
5a583347 AK |
1086 | } |
1087 | } | |
093bc2cd AK |
1088 | } |
1089 | ||
1090 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1091 | { | |
fb1cd6f9 | 1092 | if (mr->readonly != readonly) { |
59023ef4 | 1093 | memory_region_transaction_begin(); |
fb1cd6f9 | 1094 | mr->readonly = readonly; |
59023ef4 | 1095 | memory_region_transaction_commit(); |
fb1cd6f9 | 1096 | } |
093bc2cd AK |
1097 | } |
1098 | ||
d0a9b5bc AK |
1099 | void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable) |
1100 | { | |
1101 | if (mr->readable != readable) { | |
59023ef4 | 1102 | memory_region_transaction_begin(); |
d0a9b5bc | 1103 | mr->readable = readable; |
59023ef4 | 1104 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1105 | } |
1106 | } | |
1107 | ||
093bc2cd AK |
1108 | void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1109 | target_phys_addr_t size, unsigned client) | |
1110 | { | |
14a3c10a | 1111 | assert(mr->terminates); |
5a583347 AK |
1112 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1113 | mr->ram_addr + addr + size, | |
1114 | 1 << client); | |
093bc2cd AK |
1115 | } |
1116 | ||
1117 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1118 | { | |
1119 | if (mr->alias) { | |
1120 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1121 | } | |
1122 | ||
14a3c10a | 1123 | assert(mr->terminates); |
093bc2cd | 1124 | |
021d26d1 | 1125 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1126 | } |
1127 | ||
0d673e36 | 1128 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd AK |
1129 | { |
1130 | FlatRange *fr; | |
1131 | CoalescedMemoryRange *cmr; | |
1132 | AddrRange tmp; | |
1133 | ||
0d673e36 | 1134 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
093bc2cd | 1135 | if (fr->mr == mr) { |
08dafab4 AK |
1136 | qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start), |
1137 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1138 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1139 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1140 | int128_sub(fr->addr.start, |
1141 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1142 | if (!addrrange_intersects(tmp, fr->addr)) { |
1143 | continue; | |
1144 | } | |
1145 | tmp = addrrange_intersection(tmp, fr->addr); | |
08dafab4 AK |
1146 | qemu_register_coalesced_mmio(int128_get64(tmp.start), |
1147 | int128_get64(tmp.size)); | |
093bc2cd AK |
1148 | } |
1149 | } | |
1150 | } | |
1151 | } | |
1152 | ||
0d673e36 AK |
1153 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1154 | { | |
1155 | AddressSpace *as; | |
1156 | ||
1157 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1158 | memory_region_update_coalesced_range_as(mr, as); | |
1159 | } | |
1160 | } | |
1161 | ||
093bc2cd AK |
1162 | void memory_region_set_coalescing(MemoryRegion *mr) |
1163 | { | |
1164 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1165 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1166 | } |
1167 | ||
1168 | void memory_region_add_coalescing(MemoryRegion *mr, | |
1169 | target_phys_addr_t offset, | |
1170 | uint64_t size) | |
1171 | { | |
7267c094 | 1172 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1173 | |
08dafab4 | 1174 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1175 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1176 | memory_region_update_coalesced_range(mr); | |
d410515e | 1177 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1178 | } |
1179 | ||
1180 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1181 | { | |
1182 | CoalescedMemoryRange *cmr; | |
1183 | ||
d410515e JK |
1184 | qemu_flush_coalesced_mmio_buffer(); |
1185 | mr->flush_coalesced_mmio = false; | |
1186 | ||
093bc2cd AK |
1187 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1188 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1189 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1190 | g_free(cmr); |
093bc2cd AK |
1191 | } |
1192 | memory_region_update_coalesced_range(mr); | |
1193 | } | |
1194 | ||
d410515e JK |
1195 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1196 | { | |
1197 | mr->flush_coalesced_mmio = true; | |
1198 | } | |
1199 | ||
1200 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1201 | { | |
1202 | qemu_flush_coalesced_mmio_buffer(); | |
1203 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1204 | mr->flush_coalesced_mmio = false; | |
1205 | } | |
1206 | } | |
1207 | ||
3e9d69e7 AK |
1208 | void memory_region_add_eventfd(MemoryRegion *mr, |
1209 | target_phys_addr_t addr, | |
1210 | unsigned size, | |
1211 | bool match_data, | |
1212 | uint64_t data, | |
753d5e14 | 1213 | EventNotifier *e) |
3e9d69e7 AK |
1214 | { |
1215 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1216 | .addr.start = int128_make64(addr), |
1217 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1218 | .match_data = match_data, |
1219 | .data = data, | |
753d5e14 | 1220 | .e = e, |
3e9d69e7 AK |
1221 | }; |
1222 | unsigned i; | |
1223 | ||
59023ef4 | 1224 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1225 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1226 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1227 | break; | |
1228 | } | |
1229 | } | |
1230 | ++mr->ioeventfd_nb; | |
7267c094 | 1231 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1232 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1233 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1234 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1235 | mr->ioeventfds[i] = mrfd; | |
59023ef4 | 1236 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1237 | } |
1238 | ||
1239 | void memory_region_del_eventfd(MemoryRegion *mr, | |
1240 | target_phys_addr_t addr, | |
1241 | unsigned size, | |
1242 | bool match_data, | |
1243 | uint64_t data, | |
753d5e14 | 1244 | EventNotifier *e) |
3e9d69e7 AK |
1245 | { |
1246 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1247 | .addr.start = int128_make64(addr), |
1248 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1249 | .match_data = match_data, |
1250 | .data = data, | |
753d5e14 | 1251 | .e = e, |
3e9d69e7 AK |
1252 | }; |
1253 | unsigned i; | |
1254 | ||
59023ef4 | 1255 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1256 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1257 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1258 | break; | |
1259 | } | |
1260 | } | |
1261 | assert(i != mr->ioeventfd_nb); | |
1262 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1263 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1264 | --mr->ioeventfd_nb; | |
7267c094 | 1265 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1266 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
59023ef4 | 1267 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1268 | } |
1269 | ||
093bc2cd AK |
1270 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1271 | target_phys_addr_t offset, | |
1272 | MemoryRegion *subregion) | |
1273 | { | |
1274 | MemoryRegion *other; | |
1275 | ||
59023ef4 JK |
1276 | memory_region_transaction_begin(); |
1277 | ||
093bc2cd AK |
1278 | assert(!subregion->parent); |
1279 | subregion->parent = mr; | |
1280 | subregion->addr = offset; | |
1281 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1282 | if (subregion->may_overlap || other->may_overlap) { | |
1283 | continue; | |
1284 | } | |
08dafab4 AK |
1285 | if (int128_gt(int128_make64(offset), |
1286 | int128_add(int128_make64(other->addr), other->size)) | |
1287 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1288 | int128_make64(other->addr))) { | |
093bc2cd AK |
1289 | continue; |
1290 | } | |
a5e1cbc8 | 1291 | #if 0 |
860329b2 MW |
1292 | printf("warning: subregion collision %llx/%llx (%s) " |
1293 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1294 | (unsigned long long)offset, |
08dafab4 | 1295 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1296 | subregion->name, |
1297 | (unsigned long long)other->addr, | |
08dafab4 | 1298 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1299 | other->name); |
a5e1cbc8 | 1300 | #endif |
093bc2cd AK |
1301 | } |
1302 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1303 | if (subregion->priority >= other->priority) { | |
1304 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1305 | goto done; | |
1306 | } | |
1307 | } | |
1308 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1309 | done: | |
59023ef4 | 1310 | memory_region_transaction_commit(); |
093bc2cd AK |
1311 | } |
1312 | ||
1313 | ||
1314 | void memory_region_add_subregion(MemoryRegion *mr, | |
1315 | target_phys_addr_t offset, | |
1316 | MemoryRegion *subregion) | |
1317 | { | |
1318 | subregion->may_overlap = false; | |
1319 | subregion->priority = 0; | |
1320 | memory_region_add_subregion_common(mr, offset, subregion); | |
1321 | } | |
1322 | ||
1323 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
1324 | target_phys_addr_t offset, | |
1325 | MemoryRegion *subregion, | |
1326 | unsigned priority) | |
1327 | { | |
1328 | subregion->may_overlap = true; | |
1329 | subregion->priority = priority; | |
1330 | memory_region_add_subregion_common(mr, offset, subregion); | |
1331 | } | |
1332 | ||
1333 | void memory_region_del_subregion(MemoryRegion *mr, | |
1334 | MemoryRegion *subregion) | |
1335 | { | |
59023ef4 | 1336 | memory_region_transaction_begin(); |
093bc2cd AK |
1337 | assert(subregion->parent == mr); |
1338 | subregion->parent = NULL; | |
1339 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
59023ef4 | 1340 | memory_region_transaction_commit(); |
6bba19ba AK |
1341 | } |
1342 | ||
1343 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1344 | { | |
1345 | if (enabled == mr->enabled) { | |
1346 | return; | |
1347 | } | |
59023ef4 | 1348 | memory_region_transaction_begin(); |
6bba19ba | 1349 | mr->enabled = enabled; |
59023ef4 | 1350 | memory_region_transaction_commit(); |
093bc2cd | 1351 | } |
1c0ffa58 | 1352 | |
2282e1af AK |
1353 | void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr) |
1354 | { | |
1355 | MemoryRegion *parent = mr->parent; | |
1356 | unsigned priority = mr->priority; | |
1357 | bool may_overlap = mr->may_overlap; | |
1358 | ||
1359 | if (addr == mr->addr || !parent) { | |
1360 | mr->addr = addr; | |
1361 | return; | |
1362 | } | |
1363 | ||
1364 | memory_region_transaction_begin(); | |
1365 | memory_region_del_subregion(parent, mr); | |
1366 | if (may_overlap) { | |
1367 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1368 | } else { | |
1369 | memory_region_add_subregion(parent, addr, mr); | |
1370 | } | |
1371 | memory_region_transaction_commit(); | |
1372 | } | |
1373 | ||
4703359e AK |
1374 | void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset) |
1375 | { | |
4703359e | 1376 | assert(mr->alias); |
4703359e | 1377 | |
59023ef4 | 1378 | if (offset == mr->alias_offset) { |
4703359e AK |
1379 | return; |
1380 | } | |
1381 | ||
59023ef4 JK |
1382 | memory_region_transaction_begin(); |
1383 | mr->alias_offset = offset; | |
1384 | memory_region_transaction_commit(); | |
4703359e AK |
1385 | } |
1386 | ||
e34911c4 AK |
1387 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1388 | { | |
e34911c4 AK |
1389 | return mr->ram_addr; |
1390 | } | |
1391 | ||
e2177955 AK |
1392 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1393 | { | |
1394 | const AddrRange *addr = addr_; | |
1395 | const FlatRange *fr = fr_; | |
1396 | ||
1397 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1398 | return -1; | |
1399 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1400 | return 1; | |
1401 | } | |
1402 | return 0; | |
1403 | } | |
1404 | ||
1405 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1406 | { | |
8786db7c | 1407 | return bsearch(&addr, as->current_map->ranges, as->current_map->nr, |
e2177955 AK |
1408 | sizeof(FlatRange), cmp_flatrange_addr); |
1409 | } | |
1410 | ||
1411 | MemoryRegionSection memory_region_find(MemoryRegion *address_space, | |
1412 | target_phys_addr_t addr, uint64_t size) | |
1413 | { | |
1414 | AddressSpace *as = memory_region_to_address_space(address_space); | |
1415 | AddrRange range = addrrange_make(int128_make64(addr), | |
1416 | int128_make64(size)); | |
1417 | FlatRange *fr = address_space_lookup(as, range); | |
1418 | MemoryRegionSection ret = { .mr = NULL, .size = 0 }; | |
1419 | ||
1420 | if (!fr) { | |
1421 | return ret; | |
1422 | } | |
1423 | ||
8786db7c | 1424 | while (fr > as->current_map->ranges |
e2177955 AK |
1425 | && addrrange_intersects(fr[-1].addr, range)) { |
1426 | --fr; | |
1427 | } | |
1428 | ||
1429 | ret.mr = fr->mr; | |
1430 | range = addrrange_intersection(range, fr->addr); | |
1431 | ret.offset_within_region = fr->offset_in_region; | |
1432 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1433 | fr->addr.start)); | |
1434 | ret.size = int128_get64(range.size); | |
1435 | ret.offset_within_address_space = int128_get64(range.start); | |
7a8499e8 | 1436 | ret.readonly = fr->readonly; |
e2177955 AK |
1437 | return ret; |
1438 | } | |
1439 | ||
86e775c6 AK |
1440 | void memory_global_sync_dirty_bitmap(MemoryRegion *address_space) |
1441 | { | |
7664e80c AK |
1442 | AddressSpace *as = memory_region_to_address_space(address_space); |
1443 | FlatRange *fr; | |
1444 | ||
8786db7c | 1445 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
72e22d2f | 1446 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1447 | } |
1448 | } | |
1449 | ||
1450 | void memory_global_dirty_log_start(void) | |
1451 | { | |
7664e80c | 1452 | global_dirty_log = true; |
7376e582 | 1453 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1454 | } |
1455 | ||
1456 | void memory_global_dirty_log_stop(void) | |
1457 | { | |
7664e80c | 1458 | global_dirty_log = false; |
7376e582 | 1459 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1460 | } |
1461 | ||
1462 | static void listener_add_address_space(MemoryListener *listener, | |
1463 | AddressSpace *as) | |
1464 | { | |
1465 | FlatRange *fr; | |
1466 | ||
221b3a3f JG |
1467 | if (listener->address_space_filter |
1468 | && listener->address_space_filter != as->root) { | |
1469 | return; | |
1470 | } | |
1471 | ||
7664e80c AK |
1472 | if (global_dirty_log) { |
1473 | listener->log_global_start(listener); | |
1474 | } | |
8786db7c | 1475 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
7664e80c AK |
1476 | MemoryRegionSection section = { |
1477 | .mr = fr->mr, | |
1478 | .address_space = as->root, | |
1479 | .offset_within_region = fr->offset_in_region, | |
1480 | .size = int128_get64(fr->addr.size), | |
1481 | .offset_within_address_space = int128_get64(fr->addr.start), | |
7a8499e8 | 1482 | .readonly = fr->readonly, |
7664e80c AK |
1483 | }; |
1484 | listener->region_add(listener, §ion); | |
1485 | } | |
1486 | } | |
1487 | ||
7376e582 | 1488 | void memory_listener_register(MemoryListener *listener, MemoryRegion *filter) |
7664e80c | 1489 | { |
72e22d2f | 1490 | MemoryListener *other = NULL; |
0d673e36 | 1491 | AddressSpace *as; |
72e22d2f | 1492 | |
7376e582 | 1493 | listener->address_space_filter = filter; |
72e22d2f AK |
1494 | if (QTAILQ_EMPTY(&memory_listeners) |
1495 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1496 | memory_listeners)->priority) { | |
1497 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1498 | } else { | |
1499 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1500 | if (listener->priority < other->priority) { | |
1501 | break; | |
1502 | } | |
1503 | } | |
1504 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1505 | } | |
0d673e36 AK |
1506 | |
1507 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1508 | listener_add_address_space(listener, as); | |
1509 | } | |
7664e80c AK |
1510 | } |
1511 | ||
1512 | void memory_listener_unregister(MemoryListener *listener) | |
1513 | { | |
72e22d2f | 1514 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1515 | } |
e2177955 | 1516 | |
9ad2bbc1 | 1517 | void address_space_init(AddressSpace *as, MemoryRegion *root) |
1c0ffa58 | 1518 | { |
59023ef4 | 1519 | memory_region_transaction_begin(); |
8786db7c AK |
1520 | as->root = root; |
1521 | as->current_map = g_new(FlatView, 1); | |
1522 | flatview_init(as->current_map); | |
0d673e36 AK |
1523 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
1524 | as->name = NULL; | |
59023ef4 | 1525 | memory_region_transaction_commit(); |
1c0ffa58 | 1526 | } |
658b2224 | 1527 | |
8786db7c AK |
1528 | void set_system_memory_map(MemoryRegion *mr) |
1529 | { | |
1530 | address_space_init(&address_space_memory, mr); | |
0d673e36 | 1531 | address_space_memory.name = "memory"; |
8786db7c AK |
1532 | } |
1533 | ||
658b2224 AK |
1534 | void set_system_io_map(MemoryRegion *mr) |
1535 | { | |
8786db7c | 1536 | address_space_init(&address_space_io, mr); |
0d673e36 | 1537 | address_space_io.name = "I/O"; |
658b2224 | 1538 | } |
314e2987 | 1539 | |
37ec01d4 | 1540 | uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size) |
acbbec5d | 1541 | { |
37ec01d4 | 1542 | return memory_region_dispatch_read(mr, addr, size); |
acbbec5d AK |
1543 | } |
1544 | ||
37ec01d4 | 1545 | void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr, |
acbbec5d AK |
1546 | uint64_t val, unsigned size) |
1547 | { | |
37ec01d4 | 1548 | memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1549 | } |
1550 | ||
314e2987 BS |
1551 | typedef struct MemoryRegionList MemoryRegionList; |
1552 | ||
1553 | struct MemoryRegionList { | |
1554 | const MemoryRegion *mr; | |
1555 | bool printed; | |
1556 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1557 | }; | |
1558 | ||
1559 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1560 | ||
1561 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1562 | const MemoryRegion *mr, unsigned int level, | |
1563 | target_phys_addr_t base, | |
9479c57a | 1564 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1565 | { |
9479c57a JK |
1566 | MemoryRegionList *new_ml, *ml, *next_ml; |
1567 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1568 | const MemoryRegion *submr; |
1569 | unsigned int i; | |
1570 | ||
314e2987 BS |
1571 | if (!mr) { |
1572 | return; | |
1573 | } | |
1574 | ||
1575 | for (i = 0; i < level; i++) { | |
1576 | mon_printf(f, " "); | |
1577 | } | |
1578 | ||
1579 | if (mr->alias) { | |
1580 | MemoryRegionList *ml; | |
1581 | bool found = false; | |
1582 | ||
1583 | /* check if the alias is already in the queue */ | |
9479c57a | 1584 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1585 | if (ml->mr == mr->alias && !ml->printed) { |
1586 | found = true; | |
1587 | } | |
1588 | } | |
1589 | ||
1590 | if (!found) { | |
1591 | ml = g_new(MemoryRegionList, 1); | |
1592 | ml->mr = mr->alias; | |
1593 | ml->printed = false; | |
9479c57a | 1594 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1595 | } |
4896d74b JK |
1596 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1597 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1598 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1599 | base + mr->addr, |
08dafab4 AK |
1600 | base + mr->addr |
1601 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1602 | mr->priority, |
4896d74b JK |
1603 | mr->readable ? 'R' : '-', |
1604 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1605 | : '-', | |
314e2987 BS |
1606 | mr->name, |
1607 | mr->alias->name, | |
1608 | mr->alias_offset, | |
08dafab4 AK |
1609 | mr->alias_offset |
1610 | + (target_phys_addr_t)int128_get64(mr->size) - 1); | |
314e2987 | 1611 | } else { |
4896d74b JK |
1612 | mon_printf(f, |
1613 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1614 | base + mr->addr, |
08dafab4 AK |
1615 | base + mr->addr |
1616 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1617 | mr->priority, |
4896d74b JK |
1618 | mr->readable ? 'R' : '-', |
1619 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1620 | : '-', | |
314e2987 BS |
1621 | mr->name); |
1622 | } | |
9479c57a JK |
1623 | |
1624 | QTAILQ_INIT(&submr_print_queue); | |
1625 | ||
314e2987 | 1626 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1627 | new_ml = g_new(MemoryRegionList, 1); |
1628 | new_ml->mr = submr; | |
1629 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1630 | if (new_ml->mr->addr < ml->mr->addr || | |
1631 | (new_ml->mr->addr == ml->mr->addr && | |
1632 | new_ml->mr->priority > ml->mr->priority)) { | |
1633 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1634 | new_ml = NULL; | |
1635 | break; | |
1636 | } | |
1637 | } | |
1638 | if (new_ml) { | |
1639 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1640 | } | |
1641 | } | |
1642 | ||
1643 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1644 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1645 | alias_print_queue); | |
1646 | } | |
1647 | ||
88365e47 | 1648 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1649 | g_free(ml); |
314e2987 BS |
1650 | } |
1651 | } | |
1652 | ||
1653 | void mtree_info(fprintf_function mon_printf, void *f) | |
1654 | { | |
1655 | MemoryRegionListHead ml_head; | |
1656 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 1657 | AddressSpace *as; |
314e2987 BS |
1658 | |
1659 | QTAILQ_INIT(&ml_head); | |
1660 | ||
0d673e36 AK |
1661 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1662 | if (!as->name) { | |
1663 | continue; | |
1664 | } | |
1665 | mon_printf(f, "%s\n", as->name); | |
1666 | mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); | |
b9f9be88 BS |
1667 | } |
1668 | ||
1669 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1670 | /* print aliased regions */ |
1671 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1672 | if (!ml->printed) { | |
1673 | mon_printf(f, "%s\n", ml->mr->name); | |
1674 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1675 | } | |
1676 | } | |
1677 | ||
1678 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1679 | g_free(ml); |
314e2987 | 1680 | } |
314e2987 | 1681 | } |