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memory: abstract cracking of write access ops into a function
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 */
13
14#include "memory.h"
1c0ffa58 15#include "exec-memory.h"
658b2224 16#include "ioport.h"
74901c3b 17#include "bitops.h"
3e9d69e7 18#include "kvm.h"
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19#include <assert.h>
20
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21unsigned memory_region_transaction_depth = 0;
22
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23typedef struct AddrRange AddrRange;
24
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25/*
26 * Note using signed integers limits us to physical addresses at most
27 * 63 bits wide. They are needed for negative offsetting in aliases
28 * (large MemoryRegion::alias_offset).
29 */
093bc2cd 30struct AddrRange {
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31 int64_t start;
32 int64_t size;
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33};
34
8417cebf 35static AddrRange addrrange_make(int64_t start, int64_t size)
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36{
37 return (AddrRange) { start, size };
38}
39
40static bool addrrange_equal(AddrRange r1, AddrRange r2)
41{
42 return r1.start == r2.start && r1.size == r2.size;
43}
44
8417cebf 45static int64_t addrrange_end(AddrRange r)
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46{
47 return r.start + r.size;
48}
49
50static AddrRange addrrange_shift(AddrRange range, int64_t delta)
51{
52 range.start += delta;
53 return range;
54}
55
56static bool addrrange_intersects(AddrRange r1, AddrRange r2)
57{
58 return (r1.start >= r2.start && r1.start < r2.start + r2.size)
59 || (r2.start >= r1.start && r2.start < r1.start + r1.size);
60}
61
62static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
63{
8417cebf 64 int64_t start = MAX(r1.start, r2.start);
093bc2cd 65 /* off-by-one arithmetic to prevent overflow */
8417cebf 66 int64_t end = MIN(addrrange_end(r1) - 1, addrrange_end(r2) - 1);
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67 return addrrange_make(start, end - start + 1);
68}
69
70struct CoalescedMemoryRange {
71 AddrRange addr;
72 QTAILQ_ENTRY(CoalescedMemoryRange) link;
73};
74
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75struct MemoryRegionIoeventfd {
76 AddrRange addr;
77 bool match_data;
78 uint64_t data;
79 int fd;
80};
81
82static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
83 MemoryRegionIoeventfd b)
84{
85 if (a.addr.start < b.addr.start) {
86 return true;
87 } else if (a.addr.start > b.addr.start) {
88 return false;
89 } else if (a.addr.size < b.addr.size) {
90 return true;
91 } else if (a.addr.size > b.addr.size) {
92 return false;
93 } else if (a.match_data < b.match_data) {
94 return true;
95 } else if (a.match_data > b.match_data) {
96 return false;
97 } else if (a.match_data) {
98 if (a.data < b.data) {
99 return true;
100 } else if (a.data > b.data) {
101 return false;
102 }
103 }
104 if (a.fd < b.fd) {
105 return true;
106 } else if (a.fd > b.fd) {
107 return false;
108 }
109 return false;
110}
111
112static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
113 MemoryRegionIoeventfd b)
114{
115 return !memory_region_ioeventfd_before(a, b)
116 && !memory_region_ioeventfd_before(b, a);
117}
118
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119typedef struct FlatRange FlatRange;
120typedef struct FlatView FlatView;
121
122/* Range of memory in the global map. Addresses are absolute. */
123struct FlatRange {
124 MemoryRegion *mr;
125 target_phys_addr_t offset_in_region;
126 AddrRange addr;
5a583347 127 uint8_t dirty_log_mask;
d0a9b5bc 128 bool readable;
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129};
130
131/* Flattened global view of current active memory hierarchy. Kept in sorted
132 * order.
133 */
134struct FlatView {
135 FlatRange *ranges;
136 unsigned nr;
137 unsigned nr_allocated;
138};
139
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140typedef struct AddressSpace AddressSpace;
141typedef struct AddressSpaceOps AddressSpaceOps;
142
143/* A system address space - I/O, memory, etc. */
144struct AddressSpace {
145 const AddressSpaceOps *ops;
146 MemoryRegion *root;
147 FlatView current_map;
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148 int ioeventfd_nb;
149 MemoryRegionIoeventfd *ioeventfds;
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150};
151
152struct AddressSpaceOps {
153 void (*range_add)(AddressSpace *as, FlatRange *fr);
154 void (*range_del)(AddressSpace *as, FlatRange *fr);
155 void (*log_start)(AddressSpace *as, FlatRange *fr);
156 void (*log_stop)(AddressSpace *as, FlatRange *fr);
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157 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
158 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
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159};
160
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161#define FOR_EACH_FLAT_RANGE(var, view) \
162 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
163
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164static bool flatrange_equal(FlatRange *a, FlatRange *b)
165{
166 return a->mr == b->mr
167 && addrrange_equal(a->addr, b->addr)
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168 && a->offset_in_region == b->offset_in_region
169 && a->readable == b->readable;
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170}
171
172static void flatview_init(FlatView *view)
173{
174 view->ranges = NULL;
175 view->nr = 0;
176 view->nr_allocated = 0;
177}
178
179/* Insert a range into a given position. Caller is responsible for maintaining
180 * sorting order.
181 */
182static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
183{
184 if (view->nr == view->nr_allocated) {
185 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 186 view->ranges = g_realloc(view->ranges,
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187 view->nr_allocated * sizeof(*view->ranges));
188 }
189 memmove(view->ranges + pos + 1, view->ranges + pos,
190 (view->nr - pos) * sizeof(FlatRange));
191 view->ranges[pos] = *range;
192 ++view->nr;
193}
194
195static void flatview_destroy(FlatView *view)
196{
7267c094 197 g_free(view->ranges);
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198}
199
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200static bool can_merge(FlatRange *r1, FlatRange *r2)
201{
202 return addrrange_end(r1->addr) == r2->addr.start
203 && r1->mr == r2->mr
204 && r1->offset_in_region + r1->addr.size == r2->offset_in_region
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205 && r1->dirty_log_mask == r2->dirty_log_mask
206 && r1->readable == r2->readable;
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207}
208
209/* Attempt to simplify a view by merging ajacent ranges */
210static void flatview_simplify(FlatView *view)
211{
212 unsigned i, j;
213
214 i = 0;
215 while (i < view->nr) {
216 j = i + 1;
217 while (j < view->nr
218 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
219 view->ranges[i].addr.size += view->ranges[j].addr.size;
220 ++j;
221 }
222 ++i;
223 memmove(&view->ranges[i], &view->ranges[j],
224 (view->nr - j) * sizeof(view->ranges[j]));
225 view->nr -= j - i;
226 }
227}
228
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229static void memory_region_read_accessor(void *opaque,
230 target_phys_addr_t addr,
231 uint64_t *value,
232 unsigned size,
233 unsigned shift,
234 uint64_t mask)
235{
236 MemoryRegion *mr = opaque;
237 uint64_t tmp;
238
239 tmp = mr->ops->read(mr->opaque, addr, size);
240 *value |= (tmp & mask) << shift;
241}
242
243static void memory_region_write_accessor(void *opaque,
244 target_phys_addr_t addr,
245 uint64_t *value,
246 unsigned size,
247 unsigned shift,
248 uint64_t mask)
249{
250 MemoryRegion *mr = opaque;
251 uint64_t tmp;
252
253 tmp = (*value >> shift) & mask;
254 mr->ops->write(mr->opaque, addr, tmp, size);
255}
256
257static void access_with_adjusted_size(target_phys_addr_t addr,
258 uint64_t *value,
259 unsigned size,
260 unsigned access_size_min,
261 unsigned access_size_max,
262 void (*access)(void *opaque,
263 target_phys_addr_t addr,
264 uint64_t *value,
265 unsigned size,
266 unsigned shift,
267 uint64_t mask),
268 void *opaque)
269{
270 uint64_t access_mask;
271 unsigned access_size;
272 unsigned i;
273
274 if (!access_size_min) {
275 access_size_min = 1;
276 }
277 if (!access_size_max) {
278 access_size_max = 4;
279 }
280 access_size = MAX(MIN(size, access_size_max), access_size_min);
281 access_mask = -1ULL >> (64 - access_size * 8);
282 for (i = 0; i < size; i += access_size) {
283 /* FIXME: big-endian support */
284 access(opaque, addr + i, value, access_size, i * 8, access_mask);
285 }
286}
287
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288static void memory_region_prepare_ram_addr(MemoryRegion *mr);
289
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290static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
291{
292 ram_addr_t phys_offset, region_offset;
293
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294 memory_region_prepare_ram_addr(fr->mr);
295
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296 phys_offset = fr->mr->ram_addr;
297 region_offset = fr->offset_in_region;
298 /* cpu_register_physical_memory_log() wants region_offset for
299 * mmio, but prefers offseting phys_offset for RAM. Humour it.
300 */
301 if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
302 phys_offset += region_offset;
303 region_offset = 0;
304 }
305
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306 if (!fr->readable) {
307 phys_offset &= TARGET_PAGE_MASK;
308 }
309
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310 cpu_register_physical_memory_log(fr->addr.start,
311 fr->addr.size,
312 phys_offset,
313 region_offset,
314 fr->dirty_log_mask);
315}
316
317static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
318{
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319 if (fr->dirty_log_mask) {
320 cpu_physical_sync_dirty_bitmap(fr->addr.start,
321 fr->addr.start + fr->addr.size);
322 }
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323 cpu_register_physical_memory(fr->addr.start, fr->addr.size,
324 IO_MEM_UNASSIGNED);
325}
326
327static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
328{
329 cpu_physical_log_start(fr->addr.start, fr->addr.size);
330}
331
332static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
333{
334 cpu_physical_log_stop(fr->addr.start, fr->addr.size);
335}
336
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337static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
338{
339 int r;
340
341 assert(fd->match_data && fd->addr.size == 4);
342
343 r = kvm_set_ioeventfd_mmio_long(fd->fd, fd->addr.start, fd->data, true);
344 if (r < 0) {
345 abort();
346 }
347}
348
349static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
350{
351 int r;
352
353 r = kvm_set_ioeventfd_mmio_long(fd->fd, fd->addr.start, fd->data, false);
354 if (r < 0) {
355 abort();
356 }
357}
358
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359static const AddressSpaceOps address_space_ops_memory = {
360 .range_add = as_memory_range_add,
361 .range_del = as_memory_range_del,
362 .log_start = as_memory_log_start,
363 .log_stop = as_memory_log_stop,
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364 .ioeventfd_add = as_memory_ioeventfd_add,
365 .ioeventfd_del = as_memory_ioeventfd_del,
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366};
367
368static AddressSpace address_space_memory = {
369 .ops = &address_space_ops_memory,
370};
371
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372static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
373 unsigned width, bool write)
374{
375 const MemoryRegionPortio *mrp;
376
377 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
378 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
379 && width == mrp->size
380 && (write ? (bool)mrp->write : (bool)mrp->read)) {
381 return mrp;
382 }
383 }
384 return NULL;
385}
386
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387static void memory_region_iorange_read(IORange *iorange,
388 uint64_t offset,
389 unsigned width,
390 uint64_t *data)
391{
392 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
393
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394 if (mr->ops->old_portio) {
395 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
396
397 *data = ((uint64_t)1 << (width * 8)) - 1;
398 if (mrp) {
399 *data = mrp->read(mr->opaque, offset - mrp->offset);
400 }
401 return;
402 }
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403 *data = mr->ops->read(mr->opaque, offset, width);
404}
405
406static void memory_region_iorange_write(IORange *iorange,
407 uint64_t offset,
408 unsigned width,
409 uint64_t data)
410{
411 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
412
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413 if (mr->ops->old_portio) {
414 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
415
416 if (mrp) {
417 mrp->write(mr->opaque, offset - mrp->offset, data);
418 }
419 return;
420 }
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421 mr->ops->write(mr->opaque, offset, data, width);
422}
423
424static const IORangeOps memory_region_iorange_ops = {
425 .read = memory_region_iorange_read,
426 .write = memory_region_iorange_write,
427};
428
429static void as_io_range_add(AddressSpace *as, FlatRange *fr)
430{
431 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
432 fr->addr.start,fr->addr.size);
433 ioport_register(&fr->mr->iorange);
434}
435
436static void as_io_range_del(AddressSpace *as, FlatRange *fr)
437{
438 isa_unassign_ioport(fr->addr.start, fr->addr.size);
439}
440
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441static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
442{
443 int r;
444
445 assert(fd->match_data && fd->addr.size == 2);
446
447 r = kvm_set_ioeventfd_pio_word(fd->fd, fd->addr.start, fd->data, true);
448 if (r < 0) {
449 abort();
450 }
451}
452
453static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
454{
455 int r;
456
457 r = kvm_set_ioeventfd_pio_word(fd->fd, fd->addr.start, fd->data, false);
458 if (r < 0) {
459 abort();
460 }
461}
462
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463static const AddressSpaceOps address_space_ops_io = {
464 .range_add = as_io_range_add,
465 .range_del = as_io_range_del,
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466 .ioeventfd_add = as_io_ioeventfd_add,
467 .ioeventfd_del = as_io_ioeventfd_del,
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468};
469
470static AddressSpace address_space_io = {
471 .ops = &address_space_ops_io,
472};
473
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474/* Render a memory region into the global view. Ranges in @view obscure
475 * ranges in @mr.
476 */
477static void render_memory_region(FlatView *view,
478 MemoryRegion *mr,
479 target_phys_addr_t base,
480 AddrRange clip)
481{
482 MemoryRegion *subregion;
483 unsigned i;
484 target_phys_addr_t offset_in_region;
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485 int64_t remain;
486 int64_t now;
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487 FlatRange fr;
488 AddrRange tmp;
489
490 base += mr->addr;
491
492 tmp = addrrange_make(base, mr->size);
493
494 if (!addrrange_intersects(tmp, clip)) {
495 return;
496 }
497
498 clip = addrrange_intersection(tmp, clip);
499
500 if (mr->alias) {
501 base -= mr->alias->addr;
502 base -= mr->alias_offset;
503 render_memory_region(view, mr->alias, base, clip);
504 return;
505 }
506
507 /* Render subregions in priority order. */
508 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
509 render_memory_region(view, subregion, base, clip);
510 }
511
14a3c10a 512 if (!mr->terminates) {
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513 return;
514 }
515
516 offset_in_region = clip.start - base;
517 base = clip.start;
518 remain = clip.size;
519
520 /* Render the region itself into any gaps left by the current view. */
521 for (i = 0; i < view->nr && remain; ++i) {
522 if (base >= addrrange_end(view->ranges[i].addr)) {
523 continue;
524 }
525 if (base < view->ranges[i].addr.start) {
526 now = MIN(remain, view->ranges[i].addr.start - base);
527 fr.mr = mr;
528 fr.offset_in_region = offset_in_region;
529 fr.addr = addrrange_make(base, now);
5a583347 530 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 531 fr.readable = mr->readable;
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532 flatview_insert(view, i, &fr);
533 ++i;
534 base += now;
535 offset_in_region += now;
536 remain -= now;
537 }
538 if (base == view->ranges[i].addr.start) {
539 now = MIN(remain, view->ranges[i].addr.size);
540 base += now;
541 offset_in_region += now;
542 remain -= now;
543 }
544 }
545 if (remain) {
546 fr.mr = mr;
547 fr.offset_in_region = offset_in_region;
548 fr.addr = addrrange_make(base, remain);
5a583347 549 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 550 fr.readable = mr->readable;
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551 flatview_insert(view, i, &fr);
552 }
553}
554
555/* Render a memory topology into a list of disjoint absolute ranges. */
556static FlatView generate_memory_topology(MemoryRegion *mr)
557{
558 FlatView view;
559
560 flatview_init(&view);
561
8417cebf 562 render_memory_region(&view, mr, 0, addrrange_make(0, INT64_MAX));
3d8e6bf9 563 flatview_simplify(&view);
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564
565 return view;
566}
567
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568static void address_space_add_del_ioeventfds(AddressSpace *as,
569 MemoryRegionIoeventfd *fds_new,
570 unsigned fds_new_nb,
571 MemoryRegionIoeventfd *fds_old,
572 unsigned fds_old_nb)
573{
574 unsigned iold, inew;
575
576 /* Generate a symmetric difference of the old and new fd sets, adding
577 * and deleting as necessary.
578 */
579
580 iold = inew = 0;
581 while (iold < fds_old_nb || inew < fds_new_nb) {
582 if (iold < fds_old_nb
583 && (inew == fds_new_nb
584 || memory_region_ioeventfd_before(fds_old[iold],
585 fds_new[inew]))) {
586 as->ops->ioeventfd_del(as, &fds_old[iold]);
587 ++iold;
588 } else if (inew < fds_new_nb
589 && (iold == fds_old_nb
590 || memory_region_ioeventfd_before(fds_new[inew],
591 fds_old[iold]))) {
592 as->ops->ioeventfd_add(as, &fds_new[inew]);
593 ++inew;
594 } else {
595 ++iold;
596 ++inew;
597 }
598 }
599}
600
601static void address_space_update_ioeventfds(AddressSpace *as)
602{
603 FlatRange *fr;
604 unsigned ioeventfd_nb = 0;
605 MemoryRegionIoeventfd *ioeventfds = NULL;
606 AddrRange tmp;
607 unsigned i;
608
609 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
610 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
611 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
612 fr->addr.start - fr->offset_in_region);
613 if (addrrange_intersects(fr->addr, tmp)) {
614 ++ioeventfd_nb;
7267c094 615 ioeventfds = g_realloc(ioeventfds,
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616 ioeventfd_nb * sizeof(*ioeventfds));
617 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
618 ioeventfds[ioeventfd_nb-1].addr = tmp;
619 }
620 }
621 }
622
623 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
624 as->ioeventfds, as->ioeventfd_nb);
625
7267c094 626 g_free(as->ioeventfds);
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627 as->ioeventfds = ioeventfds;
628 as->ioeventfd_nb = ioeventfd_nb;
629}
630
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631static void address_space_update_topology_pass(AddressSpace *as,
632 FlatView old_view,
633 FlatView new_view,
634 bool adding)
093bc2cd 635{
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636 unsigned iold, inew;
637 FlatRange *frold, *frnew;
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638
639 /* Generate a symmetric difference of the old and new memory maps.
640 * Kill ranges in the old map, and instantiate ranges in the new map.
641 */
642 iold = inew = 0;
643 while (iold < old_view.nr || inew < new_view.nr) {
644 if (iold < old_view.nr) {
645 frold = &old_view.ranges[iold];
646 } else {
647 frold = NULL;
648 }
649 if (inew < new_view.nr) {
650 frnew = &new_view.ranges[inew];
651 } else {
652 frnew = NULL;
653 }
654
655 if (frold
656 && (!frnew
657 || frold->addr.start < frnew->addr.start
658 || (frold->addr.start == frnew->addr.start
659 && !flatrange_equal(frold, frnew)))) {
660 /* In old, but (not in new, or in new but attributes changed). */
661
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662 if (!adding) {
663 as->ops->range_del(as, frold);
664 }
665
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666 ++iold;
667 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
668 /* In both (logging may have changed) */
669
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670 if (adding) {
671 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
672 as->ops->log_stop(as, frnew);
673 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
674 as->ops->log_start(as, frnew);
675 }
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676 }
677
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678 ++iold;
679 ++inew;
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680 } else {
681 /* In new */
682
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683 if (adding) {
684 as->ops->range_add(as, frnew);
685 }
686
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687 ++inew;
688 }
689 }
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690}
691
692
693static void address_space_update_topology(AddressSpace *as)
694{
695 FlatView old_view = as->current_map;
696 FlatView new_view = generate_memory_topology(as->root);
697
698 address_space_update_topology_pass(as, old_view, new_view, false);
699 address_space_update_topology_pass(as, old_view, new_view, true);
700
cc31e6e7 701 as->current_map = new_view;
093bc2cd 702 flatview_destroy(&old_view);
3e9d69e7 703 address_space_update_ioeventfds(as);
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704}
705
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706static void memory_region_update_topology(void)
707{
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708 if (memory_region_transaction_depth) {
709 return;
710 }
711
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712 if (address_space_memory.root) {
713 address_space_update_topology(&address_space_memory);
714 }
715 if (address_space_io.root) {
716 address_space_update_topology(&address_space_io);
717 }
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718}
719
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720void memory_region_transaction_begin(void)
721{
722 ++memory_region_transaction_depth;
723}
724
725void memory_region_transaction_commit(void)
726{
727 assert(memory_region_transaction_depth);
728 --memory_region_transaction_depth;
729 memory_region_update_topology();
730}
731
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732static void memory_region_destructor_none(MemoryRegion *mr)
733{
734}
735
736static void memory_region_destructor_ram(MemoryRegion *mr)
737{
738 qemu_ram_free(mr->ram_addr);
739}
740
741static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
742{
743 qemu_ram_free_from_ptr(mr->ram_addr);
744}
745
746static void memory_region_destructor_iomem(MemoryRegion *mr)
747{
748 cpu_unregister_io_memory(mr->ram_addr);
749}
750
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751static void memory_region_destructor_rom_device(MemoryRegion *mr)
752{
753 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
754 cpu_unregister_io_memory(mr->ram_addr & ~(TARGET_PAGE_MASK | IO_MEM_ROMD));
755}
756
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757void memory_region_init(MemoryRegion *mr,
758 const char *name,
759 uint64_t size)
760{
761 mr->ops = NULL;
762 mr->parent = NULL;
763 mr->size = size;
764 mr->addr = 0;
765 mr->offset = 0;
14a3c10a 766 mr->terminates = false;
d0a9b5bc 767 mr->readable = true;
545e92e0 768 mr->destructor = memory_region_destructor_none;
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769 mr->priority = 0;
770 mr->may_overlap = false;
771 mr->alias = NULL;
772 QTAILQ_INIT(&mr->subregions);
773 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
774 QTAILQ_INIT(&mr->coalesced);
7267c094 775 mr->name = g_strdup(name);
5a583347 776 mr->dirty_log_mask = 0;
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777 mr->ioeventfd_nb = 0;
778 mr->ioeventfds = NULL;
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779}
780
781static bool memory_region_access_valid(MemoryRegion *mr,
782 target_phys_addr_t addr,
783 unsigned size)
784{
785 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
786 return false;
787 }
788
789 /* Treat zero as compatibility all valid */
790 if (!mr->ops->valid.max_access_size) {
791 return true;
792 }
793
794 if (size > mr->ops->valid.max_access_size
795 || size < mr->ops->valid.min_access_size) {
796 return false;
797 }
798 return true;
799}
800
801static uint32_t memory_region_read_thunk_n(void *_mr,
802 target_phys_addr_t addr,
803 unsigned size)
804{
805 MemoryRegion *mr = _mr;
164a4dcd 806 uint64_t data = 0;
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807
808 if (!memory_region_access_valid(mr, addr, size)) {
809 return -1U; /* FIXME: better signalling */
810 }
811
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812 if (!mr->ops->read) {
813 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
814 }
815
093bc2cd 816 /* FIXME: support unaligned access */
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817 access_with_adjusted_size(addr + mr->offset, &data, size,
818 mr->ops->impl.min_access_size,
819 mr->ops->impl.max_access_size,
820 memory_region_read_accessor, mr);
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821
822 return data;
823}
824
825static void memory_region_write_thunk_n(void *_mr,
826 target_phys_addr_t addr,
827 unsigned size,
828 uint64_t data)
829{
830 MemoryRegion *mr = _mr;
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831
832 if (!memory_region_access_valid(mr, addr, size)) {
833 return; /* FIXME: better signalling */
834 }
835
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836 if (!mr->ops->write) {
837 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
838 return;
839 }
840
093bc2cd 841 /* FIXME: support unaligned access */
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842 access_with_adjusted_size(addr + mr->offset, &data, size,
843 mr->ops->impl.min_access_size,
844 mr->ops->impl.max_access_size,
845 memory_region_write_accessor, mr);
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846}
847
848static uint32_t memory_region_read_thunk_b(void *mr, target_phys_addr_t addr)
849{
850 return memory_region_read_thunk_n(mr, addr, 1);
851}
852
853static uint32_t memory_region_read_thunk_w(void *mr, target_phys_addr_t addr)
854{
855 return memory_region_read_thunk_n(mr, addr, 2);
856}
857
858static uint32_t memory_region_read_thunk_l(void *mr, target_phys_addr_t addr)
859{
860 return memory_region_read_thunk_n(mr, addr, 4);
861}
862
863static void memory_region_write_thunk_b(void *mr, target_phys_addr_t addr,
864 uint32_t data)
865{
866 memory_region_write_thunk_n(mr, addr, 1, data);
867}
868
869static void memory_region_write_thunk_w(void *mr, target_phys_addr_t addr,
870 uint32_t data)
871{
872 memory_region_write_thunk_n(mr, addr, 2, data);
873}
874
875static void memory_region_write_thunk_l(void *mr, target_phys_addr_t addr,
876 uint32_t data)
877{
878 memory_region_write_thunk_n(mr, addr, 4, data);
879}
880
881static CPUReadMemoryFunc * const memory_region_read_thunk[] = {
882 memory_region_read_thunk_b,
883 memory_region_read_thunk_w,
884 memory_region_read_thunk_l,
885};
886
887static CPUWriteMemoryFunc * const memory_region_write_thunk[] = {
888 memory_region_write_thunk_b,
889 memory_region_write_thunk_w,
890 memory_region_write_thunk_l,
891};
892
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893static void memory_region_prepare_ram_addr(MemoryRegion *mr)
894{
895 if (mr->backend_registered) {
896 return;
897 }
898
545e92e0 899 mr->destructor = memory_region_destructor_iomem;
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900 mr->ram_addr = cpu_register_io_memory(memory_region_read_thunk,
901 memory_region_write_thunk,
902 mr,
903 mr->ops->endianness);
904 mr->backend_registered = true;
905}
906
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907void memory_region_init_io(MemoryRegion *mr,
908 const MemoryRegionOps *ops,
909 void *opaque,
910 const char *name,
911 uint64_t size)
912{
913 memory_region_init(mr, name, size);
914 mr->ops = ops;
915 mr->opaque = opaque;
14a3c10a 916 mr->terminates = true;
16ef61c9 917 mr->backend_registered = false;
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918}
919
920void memory_region_init_ram(MemoryRegion *mr,
921 DeviceState *dev,
922 const char *name,
923 uint64_t size)
924{
925 memory_region_init(mr, name, size);
14a3c10a 926 mr->terminates = true;
545e92e0 927 mr->destructor = memory_region_destructor_ram;
093bc2cd 928 mr->ram_addr = qemu_ram_alloc(dev, name, size);
16ef61c9 929 mr->backend_registered = true;
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930}
931
932void memory_region_init_ram_ptr(MemoryRegion *mr,
933 DeviceState *dev,
934 const char *name,
935 uint64_t size,
936 void *ptr)
937{
938 memory_region_init(mr, name, size);
14a3c10a 939 mr->terminates = true;
545e92e0 940 mr->destructor = memory_region_destructor_ram_from_ptr;
093bc2cd 941 mr->ram_addr = qemu_ram_alloc_from_ptr(dev, name, size, ptr);
16ef61c9 942 mr->backend_registered = true;
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943}
944
945void memory_region_init_alias(MemoryRegion *mr,
946 const char *name,
947 MemoryRegion *orig,
948 target_phys_addr_t offset,
949 uint64_t size)
950{
951 memory_region_init(mr, name, size);
952 mr->alias = orig;
953 mr->alias_offset = offset;
954}
955
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956void memory_region_init_rom_device(MemoryRegion *mr,
957 const MemoryRegionOps *ops,
958 DeviceState *dev,
959 const char *name,
960 uint64_t size)
961{
962 memory_region_init(mr, name, size);
963 mr->terminates = true;
964 mr->destructor = memory_region_destructor_rom_device;
965 mr->ram_addr = qemu_ram_alloc(dev, name, size);
966 mr->ram_addr |= cpu_register_io_memory(memory_region_read_thunk,
967 memory_region_write_thunk,
968 mr,
969 mr->ops->endianness);
970 mr->ram_addr |= IO_MEM_ROMD;
971 mr->backend_registered = true;
972}
973
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974void memory_region_destroy(MemoryRegion *mr)
975{
976 assert(QTAILQ_EMPTY(&mr->subregions));
545e92e0 977 mr->destructor(mr);
093bc2cd 978 memory_region_clear_coalescing(mr);
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979 g_free((char *)mr->name);
980 g_free(mr->ioeventfds);
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981}
982
983uint64_t memory_region_size(MemoryRegion *mr)
984{
985 return mr->size;
986}
987
988void memory_region_set_offset(MemoryRegion *mr, target_phys_addr_t offset)
989{
990 mr->offset = offset;
991}
992
993void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
994{
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995 uint8_t mask = 1 << client;
996
997 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
998 memory_region_update_topology();
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999}
1000
1001bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1002 unsigned client)
1003{
14a3c10a 1004 assert(mr->terminates);
5a583347 1005 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, 1 << client);
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1006}
1007
1008void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr)
1009{
14a3c10a 1010 assert(mr->terminates);
5a583347 1011 return cpu_physical_memory_set_dirty(mr->ram_addr + addr);
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1012}
1013
1014void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1015{
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1016 FlatRange *fr;
1017
cc31e6e7 1018 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
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1019 if (fr->mr == mr) {
1020 cpu_physical_sync_dirty_bitmap(fr->addr.start,
1021 fr->addr.start + fr->addr.size);
1022 }
1023 }
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1024}
1025
1026void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1027{
1028 /* FIXME */
1029}
1030
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1031void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1032{
1033 if (mr->readable != readable) {
1034 mr->readable = readable;
1035 memory_region_update_topology();
1036 }
1037}
1038
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1039void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1040 target_phys_addr_t size, unsigned client)
1041{
14a3c10a 1042 assert(mr->terminates);
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1043 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1044 mr->ram_addr + addr + size,
1045 1 << client);
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1046}
1047
1048void *memory_region_get_ram_ptr(MemoryRegion *mr)
1049{
1050 if (mr->alias) {
1051 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1052 }
1053
14a3c10a 1054 assert(mr->terminates);
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1055
1056 return qemu_get_ram_ptr(mr->ram_addr);
1057}
1058
1059static void memory_region_update_coalesced_range(MemoryRegion *mr)
1060{
1061 FlatRange *fr;
1062 CoalescedMemoryRange *cmr;
1063 AddrRange tmp;
1064
cc31e6e7 1065 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
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1066 if (fr->mr == mr) {
1067 qemu_unregister_coalesced_mmio(fr->addr.start, fr->addr.size);
1068 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1069 tmp = addrrange_shift(cmr->addr,
1070 fr->addr.start - fr->offset_in_region);
1071 if (!addrrange_intersects(tmp, fr->addr)) {
1072 continue;
1073 }
1074 tmp = addrrange_intersection(tmp, fr->addr);
1075 qemu_register_coalesced_mmio(tmp.start, tmp.size);
1076 }
1077 }
1078 }
1079}
1080
1081void memory_region_set_coalescing(MemoryRegion *mr)
1082{
1083 memory_region_clear_coalescing(mr);
1084 memory_region_add_coalescing(mr, 0, mr->size);
1085}
1086
1087void memory_region_add_coalescing(MemoryRegion *mr,
1088 target_phys_addr_t offset,
1089 uint64_t size)
1090{
7267c094 1091 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
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1092
1093 cmr->addr = addrrange_make(offset, size);
1094 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1095 memory_region_update_coalesced_range(mr);
1096}
1097
1098void memory_region_clear_coalescing(MemoryRegion *mr)
1099{
1100 CoalescedMemoryRange *cmr;
1101
1102 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1103 cmr = QTAILQ_FIRST(&mr->coalesced);
1104 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1105 g_free(cmr);
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1106 }
1107 memory_region_update_coalesced_range(mr);
1108}
1109
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1110void memory_region_add_eventfd(MemoryRegion *mr,
1111 target_phys_addr_t addr,
1112 unsigned size,
1113 bool match_data,
1114 uint64_t data,
1115 int fd)
1116{
1117 MemoryRegionIoeventfd mrfd = {
1118 .addr.start = addr,
1119 .addr.size = size,
1120 .match_data = match_data,
1121 .data = data,
1122 .fd = fd,
1123 };
1124 unsigned i;
1125
1126 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1127 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1128 break;
1129 }
1130 }
1131 ++mr->ioeventfd_nb;
7267c094 1132 mr->ioeventfds = g_realloc(mr->ioeventfds,
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1133 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1134 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1135 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1136 mr->ioeventfds[i] = mrfd;
1137 memory_region_update_topology();
1138}
1139
1140void memory_region_del_eventfd(MemoryRegion *mr,
1141 target_phys_addr_t addr,
1142 unsigned size,
1143 bool match_data,
1144 uint64_t data,
1145 int fd)
1146{
1147 MemoryRegionIoeventfd mrfd = {
1148 .addr.start = addr,
1149 .addr.size = size,
1150 .match_data = match_data,
1151 .data = data,
1152 .fd = fd,
1153 };
1154 unsigned i;
1155
1156 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1157 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1158 break;
1159 }
1160 }
1161 assert(i != mr->ioeventfd_nb);
1162 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1163 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1164 --mr->ioeventfd_nb;
7267c094 1165 mr->ioeventfds = g_realloc(mr->ioeventfds,
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1166 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1167 memory_region_update_topology();
1168}
1169
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1170static void memory_region_add_subregion_common(MemoryRegion *mr,
1171 target_phys_addr_t offset,
1172 MemoryRegion *subregion)
1173{
1174 MemoryRegion *other;
1175
1176 assert(!subregion->parent);
1177 subregion->parent = mr;
1178 subregion->addr = offset;
1179 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1180 if (subregion->may_overlap || other->may_overlap) {
1181 continue;
1182 }
1183 if (offset >= other->offset + other->size
1184 || offset + subregion->size <= other->offset) {
1185 continue;
1186 }
1187 printf("warning: subregion collision %llx/%llx vs %llx/%llx\n",
1188 (unsigned long long)offset,
1189 (unsigned long long)subregion->size,
1190 (unsigned long long)other->offset,
1191 (unsigned long long)other->size);
1192 }
1193 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1194 if (subregion->priority >= other->priority) {
1195 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1196 goto done;
1197 }
1198 }
1199 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1200done:
1201 memory_region_update_topology();
1202}
1203
1204
1205void memory_region_add_subregion(MemoryRegion *mr,
1206 target_phys_addr_t offset,
1207 MemoryRegion *subregion)
1208{
1209 subregion->may_overlap = false;
1210 subregion->priority = 0;
1211 memory_region_add_subregion_common(mr, offset, subregion);
1212}
1213
1214void memory_region_add_subregion_overlap(MemoryRegion *mr,
1215 target_phys_addr_t offset,
1216 MemoryRegion *subregion,
1217 unsigned priority)
1218{
1219 subregion->may_overlap = true;
1220 subregion->priority = priority;
1221 memory_region_add_subregion_common(mr, offset, subregion);
1222}
1223
1224void memory_region_del_subregion(MemoryRegion *mr,
1225 MemoryRegion *subregion)
1226{
1227 assert(subregion->parent == mr);
1228 subregion->parent = NULL;
1229 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1230 memory_region_update_topology();
1231}
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1232
1233void set_system_memory_map(MemoryRegion *mr)
1234{
cc31e6e7 1235 address_space_memory.root = mr;
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1236 memory_region_update_topology();
1237}
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1238
1239void set_system_io_map(MemoryRegion *mr)
1240{
1241 address_space_io.root = mr;
1242 memory_region_update_topology();
1243}