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i440fx: avoid destroying memory regions within a transaction
[qemu.git] / memory.c
CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
16#include "memory.h"
1c0ffa58 17#include "exec-memory.h"
658b2224 18#include "ioport.h"
74901c3b 19#include "bitops.h"
3e9d69e7 20#include "kvm.h"
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21#include <assert.h>
22
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23#define WANT_EXEC_OBSOLETE
24#include "exec-obsolete.h"
25
4ef4db86 26unsigned memory_region_transaction_depth = 0;
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27static bool global_dirty_log = false;
28
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29static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
30 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 31
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32typedef struct AddrRange AddrRange;
33
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34/*
35 * Note using signed integers limits us to physical addresses at most
36 * 63 bits wide. They are needed for negative offsetting in aliases
37 * (large MemoryRegion::alias_offset).
38 */
093bc2cd 39struct AddrRange {
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40 Int128 start;
41 Int128 size;
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42};
43
08dafab4 44static AddrRange addrrange_make(Int128 start, Int128 size)
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45{
46 return (AddrRange) { start, size };
47}
48
49static bool addrrange_equal(AddrRange r1, AddrRange r2)
50{
08dafab4 51 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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52}
53
08dafab4 54static Int128 addrrange_end(AddrRange r)
093bc2cd 55{
08dafab4 56 return int128_add(r.start, r.size);
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57}
58
08dafab4 59static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 60{
08dafab4 61 int128_addto(&range.start, delta);
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62 return range;
63}
64
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65static bool addrrange_contains(AddrRange range, Int128 addr)
66{
67 return int128_ge(addr, range.start)
68 && int128_lt(addr, addrrange_end(range));
69}
70
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71static bool addrrange_intersects(AddrRange r1, AddrRange r2)
72{
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73 return addrrange_contains(r1, r2.start)
74 || addrrange_contains(r2, r1.start);
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75}
76
77static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
78{
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79 Int128 start = int128_max(r1.start, r2.start);
80 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
81 return addrrange_make(start, int128_sub(end, start));
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82}
83
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84enum ListenerDirection { Forward, Reverse };
85
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86static bool memory_listener_match(MemoryListener *listener,
87 MemoryRegionSection *section)
88{
89 return !listener->address_space_filter
90 || listener->address_space_filter == section->address_space;
91}
92
93#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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94 do { \
95 MemoryListener *_listener; \
96 \
97 switch (_direction) { \
98 case Forward: \
99 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
100 _listener->_callback(_listener, ##_args); \
101 } \
102 break; \
103 case Reverse: \
104 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
105 memory_listeners, link) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 break; \
109 default: \
110 abort(); \
111 } \
112 } while (0)
113
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114#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
115 do { \
116 MemoryListener *_listener; \
117 \
118 switch (_direction) { \
119 case Forward: \
120 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
121 if (memory_listener_match(_listener, _section)) { \
122 _listener->_callback(_listener, _section, ##_args); \
123 } \
124 } \
125 break; \
126 case Reverse: \
127 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
128 memory_listeners, link) { \
129 if (memory_listener_match(_listener, _section)) { \
130 _listener->_callback(_listener, _section, ##_args); \
131 } \
132 } \
133 break; \
134 default: \
135 abort(); \
136 } \
137 } while (0)
138
0e0d36b4 139#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 140 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
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141 .mr = (fr)->mr, \
142 .address_space = (as)->root, \
143 .offset_within_region = (fr)->offset_in_region, \
144 .size = int128_get64((fr)->addr.size), \
145 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 146 .readonly = (fr)->readonly, \
7376e582 147 }))
0e0d36b4 148
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149struct CoalescedMemoryRange {
150 AddrRange addr;
151 QTAILQ_ENTRY(CoalescedMemoryRange) link;
152};
153
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154struct MemoryRegionIoeventfd {
155 AddrRange addr;
156 bool match_data;
157 uint64_t data;
753d5e14 158 EventNotifier *e;
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159};
160
161static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
162 MemoryRegionIoeventfd b)
163{
08dafab4 164 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 165 return true;
08dafab4 166 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 167 return false;
08dafab4 168 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 169 return true;
08dafab4 170 } else if (int128_gt(a.addr.size, b.addr.size)) {
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171 return false;
172 } else if (a.match_data < b.match_data) {
173 return true;
174 } else if (a.match_data > b.match_data) {
175 return false;
176 } else if (a.match_data) {
177 if (a.data < b.data) {
178 return true;
179 } else if (a.data > b.data) {
180 return false;
181 }
182 }
753d5e14 183 if (a.e < b.e) {
3e9d69e7 184 return true;
753d5e14 185 } else if (a.e > b.e) {
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186 return false;
187 }
188 return false;
189}
190
191static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
192 MemoryRegionIoeventfd b)
193{
194 return !memory_region_ioeventfd_before(a, b)
195 && !memory_region_ioeventfd_before(b, a);
196}
197
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198typedef struct FlatRange FlatRange;
199typedef struct FlatView FlatView;
200
201/* Range of memory in the global map. Addresses are absolute. */
202struct FlatRange {
203 MemoryRegion *mr;
204 target_phys_addr_t offset_in_region;
205 AddrRange addr;
5a583347 206 uint8_t dirty_log_mask;
d0a9b5bc 207 bool readable;
fb1cd6f9 208 bool readonly;
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209};
210
211/* Flattened global view of current active memory hierarchy. Kept in sorted
212 * order.
213 */
214struct FlatView {
215 FlatRange *ranges;
216 unsigned nr;
217 unsigned nr_allocated;
218};
219
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220typedef struct AddressSpace AddressSpace;
221typedef struct AddressSpaceOps AddressSpaceOps;
222
223/* A system address space - I/O, memory, etc. */
224struct AddressSpace {
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225 MemoryRegion *root;
226 FlatView current_map;
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227 int ioeventfd_nb;
228 MemoryRegionIoeventfd *ioeventfds;
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229};
230
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231#define FOR_EACH_FLAT_RANGE(var, view) \
232 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
233
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234static bool flatrange_equal(FlatRange *a, FlatRange *b)
235{
236 return a->mr == b->mr
237 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 238 && a->offset_in_region == b->offset_in_region
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239 && a->readable == b->readable
240 && a->readonly == b->readonly;
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241}
242
243static void flatview_init(FlatView *view)
244{
245 view->ranges = NULL;
246 view->nr = 0;
247 view->nr_allocated = 0;
248}
249
250/* Insert a range into a given position. Caller is responsible for maintaining
251 * sorting order.
252 */
253static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
254{
255 if (view->nr == view->nr_allocated) {
256 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 257 view->ranges = g_realloc(view->ranges,
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258 view->nr_allocated * sizeof(*view->ranges));
259 }
260 memmove(view->ranges + pos + 1, view->ranges + pos,
261 (view->nr - pos) * sizeof(FlatRange));
262 view->ranges[pos] = *range;
263 ++view->nr;
264}
265
266static void flatview_destroy(FlatView *view)
267{
7267c094 268 g_free(view->ranges);
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269}
270
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271static bool can_merge(FlatRange *r1, FlatRange *r2)
272{
08dafab4 273 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 274 && r1->mr == r2->mr
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275 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
276 r1->addr.size),
277 int128_make64(r2->offset_in_region))
d0a9b5bc 278 && r1->dirty_log_mask == r2->dirty_log_mask
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279 && r1->readable == r2->readable
280 && r1->readonly == r2->readonly;
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281}
282
283/* Attempt to simplify a view by merging ajacent ranges */
284static void flatview_simplify(FlatView *view)
285{
286 unsigned i, j;
287
288 i = 0;
289 while (i < view->nr) {
290 j = i + 1;
291 while (j < view->nr
292 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 293 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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294 ++j;
295 }
296 ++i;
297 memmove(&view->ranges[i], &view->ranges[j],
298 (view->nr - j) * sizeof(view->ranges[j]));
299 view->nr -= j - i;
300 }
301}
302
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303static void memory_region_read_accessor(void *opaque,
304 target_phys_addr_t addr,
305 uint64_t *value,
306 unsigned size,
307 unsigned shift,
308 uint64_t mask)
309{
310 MemoryRegion *mr = opaque;
311 uint64_t tmp;
312
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313 if (mr->flush_coalesced_mmio) {
314 qemu_flush_coalesced_mmio_buffer();
315 }
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316 tmp = mr->ops->read(mr->opaque, addr, size);
317 *value |= (tmp & mask) << shift;
318}
319
320static void memory_region_write_accessor(void *opaque,
321 target_phys_addr_t addr,
322 uint64_t *value,
323 unsigned size,
324 unsigned shift,
325 uint64_t mask)
326{
327 MemoryRegion *mr = opaque;
328 uint64_t tmp;
329
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330 if (mr->flush_coalesced_mmio) {
331 qemu_flush_coalesced_mmio_buffer();
332 }
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333 tmp = (*value >> shift) & mask;
334 mr->ops->write(mr->opaque, addr, tmp, size);
335}
336
337static void access_with_adjusted_size(target_phys_addr_t addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned access_size_min,
341 unsigned access_size_max,
342 void (*access)(void *opaque,
343 target_phys_addr_t addr,
344 uint64_t *value,
345 unsigned size,
346 unsigned shift,
347 uint64_t mask),
348 void *opaque)
349{
350 uint64_t access_mask;
351 unsigned access_size;
352 unsigned i;
353
354 if (!access_size_min) {
355 access_size_min = 1;
356 }
357 if (!access_size_max) {
358 access_size_max = 4;
359 }
360 access_size = MAX(MIN(size, access_size_max), access_size_min);
361 access_mask = -1ULL >> (64 - access_size * 8);
362 for (i = 0; i < size; i += access_size) {
363 /* FIXME: big-endian support */
364 access(opaque, addr + i, value, access_size, i * 8, access_mask);
365 }
366}
367
8df8a843 368static AddressSpace address_space_memory;
cc31e6e7 369
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370static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
371 unsigned width, bool write)
372{
373 const MemoryRegionPortio *mrp;
374
375 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
376 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
377 && width == mrp->size
378 && (write ? (bool)mrp->write : (bool)mrp->read)) {
379 return mrp;
380 }
381 }
382 return NULL;
383}
384
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385static void memory_region_iorange_read(IORange *iorange,
386 uint64_t offset,
387 unsigned width,
388 uint64_t *data)
389{
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390 MemoryRegionIORange *mrio
391 = container_of(iorange, MemoryRegionIORange, iorange);
392 MemoryRegion *mr = mrio->mr;
658b2224 393
a2d33521 394 offset += mrio->offset;
627a0e90 395 if (mr->ops->old_portio) {
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396 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
397 width, false);
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398
399 *data = ((uint64_t)1 << (width * 8)) - 1;
400 if (mrp) {
2b50aa1f 401 *data = mrp->read(mr->opaque, offset);
03808f58 402 } else if (width == 2) {
a2d33521 403 mrp = find_portio(mr, offset - mrio->offset, 1, false);
03808f58 404 assert(mrp);
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405 *data = mrp->read(mr->opaque, offset) |
406 (mrp->read(mr->opaque, offset + 1) << 8);
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407 }
408 return;
409 }
3a130f4e 410 *data = 0;
2b50aa1f 411 access_with_adjusted_size(offset, data, width,
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412 mr->ops->impl.min_access_size,
413 mr->ops->impl.max_access_size,
414 memory_region_read_accessor, mr);
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415}
416
417static void memory_region_iorange_write(IORange *iorange,
418 uint64_t offset,
419 unsigned width,
420 uint64_t data)
421{
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422 MemoryRegionIORange *mrio
423 = container_of(iorange, MemoryRegionIORange, iorange);
424 MemoryRegion *mr = mrio->mr;
658b2224 425
a2d33521 426 offset += mrio->offset;
627a0e90 427 if (mr->ops->old_portio) {
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428 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
429 width, true);
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430
431 if (mrp) {
2b50aa1f 432 mrp->write(mr->opaque, offset, data);
03808f58 433 } else if (width == 2) {
7e2a62d8 434 mrp = find_portio(mr, offset - mrio->offset, 1, true);
03808f58 435 assert(mrp);
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436 mrp->write(mr->opaque, offset, data & 0xff);
437 mrp->write(mr->opaque, offset + 1, data >> 8);
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438 }
439 return;
440 }
2b50aa1f 441 access_with_adjusted_size(offset, &data, width,
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442 mr->ops->impl.min_access_size,
443 mr->ops->impl.max_access_size,
444 memory_region_write_accessor, mr);
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445}
446
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447static void memory_region_iorange_destructor(IORange *iorange)
448{
449 g_free(container_of(iorange, MemoryRegionIORange, iorange));
450}
451
93632747 452const IORangeOps memory_region_iorange_ops = {
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453 .read = memory_region_iorange_read,
454 .write = memory_region_iorange_write,
a2d33521 455 .destructor = memory_region_iorange_destructor,
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456};
457
8df8a843 458static AddressSpace address_space_io;
658b2224 459
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460static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
461{
462 while (mr->parent) {
463 mr = mr->parent;
464 }
465 if (mr == address_space_memory.root) {
466 return &address_space_memory;
467 }
468 if (mr == address_space_io.root) {
469 return &address_space_io;
470 }
471 abort();
472}
473
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474/* Render a memory region into the global view. Ranges in @view obscure
475 * ranges in @mr.
476 */
477static void render_memory_region(FlatView *view,
478 MemoryRegion *mr,
08dafab4 479 Int128 base,
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480 AddrRange clip,
481 bool readonly)
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482{
483 MemoryRegion *subregion;
484 unsigned i;
485 target_phys_addr_t offset_in_region;
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486 Int128 remain;
487 Int128 now;
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488 FlatRange fr;
489 AddrRange tmp;
490
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491 if (!mr->enabled) {
492 return;
493 }
494
08dafab4 495 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 496 readonly |= mr->readonly;
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497
498 tmp = addrrange_make(base, mr->size);
499
500 if (!addrrange_intersects(tmp, clip)) {
501 return;
502 }
503
504 clip = addrrange_intersection(tmp, clip);
505
506 if (mr->alias) {
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507 int128_subfrom(&base, int128_make64(mr->alias->addr));
508 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 509 render_memory_region(view, mr->alias, base, clip, readonly);
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510 return;
511 }
512
513 /* Render subregions in priority order. */
514 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 515 render_memory_region(view, subregion, base, clip, readonly);
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516 }
517
14a3c10a 518 if (!mr->terminates) {
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519 return;
520 }
521
08dafab4 522 offset_in_region = int128_get64(int128_sub(clip.start, base));
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523 base = clip.start;
524 remain = clip.size;
525
526 /* Render the region itself into any gaps left by the current view. */
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527 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
528 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
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529 continue;
530 }
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531 if (int128_lt(base, view->ranges[i].addr.start)) {
532 now = int128_min(remain,
533 int128_sub(view->ranges[i].addr.start, base));
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534 fr.mr = mr;
535 fr.offset_in_region = offset_in_region;
536 fr.addr = addrrange_make(base, now);
5a583347 537 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 538 fr.readable = mr->readable;
fb1cd6f9 539 fr.readonly = readonly;
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540 flatview_insert(view, i, &fr);
541 ++i;
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542 int128_addto(&base, now);
543 offset_in_region += int128_get64(now);
544 int128_subfrom(&remain, now);
093bc2cd 545 }
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546 if (int128_eq(base, view->ranges[i].addr.start)) {
547 now = int128_min(remain, view->ranges[i].addr.size);
548 int128_addto(&base, now);
549 offset_in_region += int128_get64(now);
550 int128_subfrom(&remain, now);
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551 }
552 }
08dafab4 553 if (int128_nz(remain)) {
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554 fr.mr = mr;
555 fr.offset_in_region = offset_in_region;
556 fr.addr = addrrange_make(base, remain);
5a583347 557 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 558 fr.readable = mr->readable;
fb1cd6f9 559 fr.readonly = readonly;
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560 flatview_insert(view, i, &fr);
561 }
562}
563
564/* Render a memory topology into a list of disjoint absolute ranges. */
565static FlatView generate_memory_topology(MemoryRegion *mr)
566{
567 FlatView view;
568
569 flatview_init(&view);
570
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571 render_memory_region(&view, mr, int128_zero(),
572 addrrange_make(int128_zero(), int128_2_64()), false);
3d8e6bf9 573 flatview_simplify(&view);
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574
575 return view;
576}
577
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578static void address_space_add_del_ioeventfds(AddressSpace *as,
579 MemoryRegionIoeventfd *fds_new,
580 unsigned fds_new_nb,
581 MemoryRegionIoeventfd *fds_old,
582 unsigned fds_old_nb)
583{
584 unsigned iold, inew;
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585 MemoryRegionIoeventfd *fd;
586 MemoryRegionSection section;
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587
588 /* Generate a symmetric difference of the old and new fd sets, adding
589 * and deleting as necessary.
590 */
591
592 iold = inew = 0;
593 while (iold < fds_old_nb || inew < fds_new_nb) {
594 if (iold < fds_old_nb
595 && (inew == fds_new_nb
596 || memory_region_ioeventfd_before(fds_old[iold],
597 fds_new[inew]))) {
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598 fd = &fds_old[iold];
599 section = (MemoryRegionSection) {
600 .address_space = as->root,
601 .offset_within_address_space = int128_get64(fd->addr.start),
602 .size = int128_get64(fd->addr.size),
603 };
604 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 605 fd->match_data, fd->data, fd->e);
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606 ++iold;
607 } else if (inew < fds_new_nb
608 && (iold == fds_old_nb
609 || memory_region_ioeventfd_before(fds_new[inew],
610 fds_old[iold]))) {
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611 fd = &fds_new[inew];
612 section = (MemoryRegionSection) {
613 .address_space = as->root,
614 .offset_within_address_space = int128_get64(fd->addr.start),
615 .size = int128_get64(fd->addr.size),
616 };
617 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 618 fd->match_data, fd->data, fd->e);
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619 ++inew;
620 } else {
621 ++iold;
622 ++inew;
623 }
624 }
625}
626
627static void address_space_update_ioeventfds(AddressSpace *as)
628{
629 FlatRange *fr;
630 unsigned ioeventfd_nb = 0;
631 MemoryRegionIoeventfd *ioeventfds = NULL;
632 AddrRange tmp;
633 unsigned i;
634
635 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
636 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
637 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
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638 int128_sub(fr->addr.start,
639 int128_make64(fr->offset_in_region)));
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640 if (addrrange_intersects(fr->addr, tmp)) {
641 ++ioeventfd_nb;
7267c094 642 ioeventfds = g_realloc(ioeventfds,
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643 ioeventfd_nb * sizeof(*ioeventfds));
644 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
645 ioeventfds[ioeventfd_nb-1].addr = tmp;
646 }
647 }
648 }
649
650 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
651 as->ioeventfds, as->ioeventfd_nb);
652
7267c094 653 g_free(as->ioeventfds);
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654 as->ioeventfds = ioeventfds;
655 as->ioeventfd_nb = ioeventfd_nb;
656}
657
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658static void address_space_update_topology_pass(AddressSpace *as,
659 FlatView old_view,
660 FlatView new_view,
661 bool adding)
093bc2cd 662{
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663 unsigned iold, inew;
664 FlatRange *frold, *frnew;
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665
666 /* Generate a symmetric difference of the old and new memory maps.
667 * Kill ranges in the old map, and instantiate ranges in the new map.
668 */
669 iold = inew = 0;
670 while (iold < old_view.nr || inew < new_view.nr) {
671 if (iold < old_view.nr) {
672 frold = &old_view.ranges[iold];
673 } else {
674 frold = NULL;
675 }
676 if (inew < new_view.nr) {
677 frnew = &new_view.ranges[inew];
678 } else {
679 frnew = NULL;
680 }
681
682 if (frold
683 && (!frnew
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684 || int128_lt(frold->addr.start, frnew->addr.start)
685 || (int128_eq(frold->addr.start, frnew->addr.start)
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686 && !flatrange_equal(frold, frnew)))) {
687 /* In old, but (not in new, or in new but attributes changed). */
688
b8af1afb 689 if (!adding) {
72e22d2f 690 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
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691 }
692
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693 ++iold;
694 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
695 /* In both (logging may have changed) */
696
b8af1afb 697 if (adding) {
50c1e149 698 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 699 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 700 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 701 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 702 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 703 }
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704 }
705
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706 ++iold;
707 ++inew;
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708 } else {
709 /* In new */
710
b8af1afb 711 if (adding) {
72e22d2f 712 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
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713 }
714
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715 ++inew;
716 }
717 }
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718}
719
720
721static void address_space_update_topology(AddressSpace *as)
722{
723 FlatView old_view = as->current_map;
724 FlatView new_view = generate_memory_topology(as->root);
725
726 address_space_update_topology_pass(as, old_view, new_view, false);
727 address_space_update_topology_pass(as, old_view, new_view, true);
728
cc31e6e7 729 as->current_map = new_view;
093bc2cd 730 flatview_destroy(&old_view);
3e9d69e7 731 address_space_update_ioeventfds(as);
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732}
733
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734void memory_region_transaction_begin(void)
735{
bb880ded 736 qemu_flush_coalesced_mmio_buffer();
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737 ++memory_region_transaction_depth;
738}
739
740void memory_region_transaction_commit(void)
741{
742 assert(memory_region_transaction_depth);
743 --memory_region_transaction_depth;
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744 if (!memory_region_transaction_depth) {
745 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
746
747 if (address_space_memory.root) {
748 address_space_update_topology(&address_space_memory);
749 }
750 if (address_space_io.root) {
751 address_space_update_topology(&address_space_io);
752 }
753
754 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 755 }
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756}
757
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758static void memory_region_destructor_none(MemoryRegion *mr)
759{
760}
761
762static void memory_region_destructor_ram(MemoryRegion *mr)
763{
764 qemu_ram_free(mr->ram_addr);
765}
766
767static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
768{
769 qemu_ram_free_from_ptr(mr->ram_addr);
770}
771
772static void memory_region_destructor_iomem(MemoryRegion *mr)
773{
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774}
775
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776static void memory_region_destructor_rom_device(MemoryRegion *mr)
777{
778 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
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779}
780
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781static bool memory_region_wrong_endianness(MemoryRegion *mr)
782{
2c3579ab 783#ifdef TARGET_WORDS_BIGENDIAN
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784 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
785#else
786 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
787#endif
788}
789
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790void memory_region_init(MemoryRegion *mr,
791 const char *name,
792 uint64_t size)
793{
794 mr->ops = NULL;
795 mr->parent = NULL;
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796 mr->size = int128_make64(size);
797 if (size == UINT64_MAX) {
798 mr->size = int128_2_64();
799 }
093bc2cd 800 mr->addr = 0;
b3b00c78 801 mr->subpage = false;
6bba19ba 802 mr->enabled = true;
14a3c10a 803 mr->terminates = false;
8ea9252a 804 mr->ram = false;
d0a9b5bc 805 mr->readable = true;
fb1cd6f9 806 mr->readonly = false;
75c578dc 807 mr->rom_device = false;
545e92e0 808 mr->destructor = memory_region_destructor_none;
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809 mr->priority = 0;
810 mr->may_overlap = false;
811 mr->alias = NULL;
812 QTAILQ_INIT(&mr->subregions);
813 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
814 QTAILQ_INIT(&mr->coalesced);
7267c094 815 mr->name = g_strdup(name);
5a583347 816 mr->dirty_log_mask = 0;
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817 mr->ioeventfd_nb = 0;
818 mr->ioeventfds = NULL;
d410515e 819 mr->flush_coalesced_mmio = false;
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820}
821
822static bool memory_region_access_valid(MemoryRegion *mr,
823 target_phys_addr_t addr,
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824 unsigned size,
825 bool is_write)
093bc2cd 826{
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827 if (mr->ops->valid.accepts
828 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
829 return false;
830 }
831
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832 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
833 return false;
834 }
835
836 /* Treat zero as compatibility all valid */
837 if (!mr->ops->valid.max_access_size) {
838 return true;
839 }
840
841 if (size > mr->ops->valid.max_access_size
842 || size < mr->ops->valid.min_access_size) {
843 return false;
844 }
845 return true;
846}
847
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848static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
849 target_phys_addr_t addr,
850 unsigned size)
093bc2cd 851{
164a4dcd 852 uint64_t data = 0;
093bc2cd 853
897fa7cf 854 if (!memory_region_access_valid(mr, addr, size, false)) {
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855 return -1U; /* FIXME: better signalling */
856 }
857
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858 if (!mr->ops->read) {
859 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
860 }
861
093bc2cd 862 /* FIXME: support unaligned access */
2b50aa1f 863 access_with_adjusted_size(addr, &data, size,
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864 mr->ops->impl.min_access_size,
865 mr->ops->impl.max_access_size,
866 memory_region_read_accessor, mr);
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867
868 return data;
869}
870
a621f38d 871static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
093bc2cd 872{
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873 if (memory_region_wrong_endianness(mr)) {
874 switch (size) {
875 case 1:
876 break;
877 case 2:
878 *data = bswap16(*data);
879 break;
880 case 4:
881 *data = bswap32(*data);
1470a0cd 882 break;
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883 default:
884 abort();
885 }
886 }
887}
888
889static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
890 target_phys_addr_t addr,
891 unsigned size)
892{
893 uint64_t ret;
894
895 ret = memory_region_dispatch_read1(mr, addr, size);
896 adjust_endianness(mr, &ret, size);
897 return ret;
898}
093bc2cd 899
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900static void memory_region_dispatch_write(MemoryRegion *mr,
901 target_phys_addr_t addr,
902 uint64_t data,
903 unsigned size)
904{
897fa7cf 905 if (!memory_region_access_valid(mr, addr, size, true)) {
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906 return; /* FIXME: better signalling */
907 }
908
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909 adjust_endianness(mr, &data, size);
910
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911 if (!mr->ops->write) {
912 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
913 return;
914 }
915
093bc2cd 916 /* FIXME: support unaligned access */
2b50aa1f 917 access_with_adjusted_size(addr, &data, size,
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918 mr->ops->impl.min_access_size,
919 mr->ops->impl.max_access_size,
920 memory_region_write_accessor, mr);
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921}
922
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923void memory_region_init_io(MemoryRegion *mr,
924 const MemoryRegionOps *ops,
925 void *opaque,
926 const char *name,
927 uint64_t size)
928{
929 memory_region_init(mr, name, size);
930 mr->ops = ops;
931 mr->opaque = opaque;
14a3c10a 932 mr->terminates = true;
26a83ad0 933 mr->destructor = memory_region_destructor_iomem;
97161e17 934 mr->ram_addr = ~(ram_addr_t)0;
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935}
936
937void memory_region_init_ram(MemoryRegion *mr,
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938 const char *name,
939 uint64_t size)
940{
941 memory_region_init(mr, name, size);
8ea9252a 942 mr->ram = true;
14a3c10a 943 mr->terminates = true;
545e92e0 944 mr->destructor = memory_region_destructor_ram;
c5705a77 945 mr->ram_addr = qemu_ram_alloc(size, mr);
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946}
947
948void memory_region_init_ram_ptr(MemoryRegion *mr,
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949 const char *name,
950 uint64_t size,
951 void *ptr)
952{
953 memory_region_init(mr, name, size);
8ea9252a 954 mr->ram = true;
14a3c10a 955 mr->terminates = true;
545e92e0 956 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 957 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
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958}
959
960void memory_region_init_alias(MemoryRegion *mr,
961 const char *name,
962 MemoryRegion *orig,
963 target_phys_addr_t offset,
964 uint64_t size)
965{
966 memory_region_init(mr, name, size);
967 mr->alias = orig;
968 mr->alias_offset = offset;
969}
970
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971void memory_region_init_rom_device(MemoryRegion *mr,
972 const MemoryRegionOps *ops,
75f5941c 973 void *opaque,
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974 const char *name,
975 uint64_t size)
976{
977 memory_region_init(mr, name, size);
7bc2b9cd 978 mr->ops = ops;
75f5941c 979 mr->opaque = opaque;
d0a9b5bc 980 mr->terminates = true;
75c578dc 981 mr->rom_device = true;
d0a9b5bc 982 mr->destructor = memory_region_destructor_rom_device;
c5705a77 983 mr->ram_addr = qemu_ram_alloc(size, mr);
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984}
985
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986static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
987 unsigned size)
988{
989 MemoryRegion *mr = opaque;
990
991 if (!mr->warning_printed) {
992 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
993 mr->warning_printed = true;
994 }
995 return -1U;
996}
997
998static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
999 unsigned size)
1000{
1001 MemoryRegion *mr = opaque;
1002
1003 if (!mr->warning_printed) {
1004 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1005 mr->warning_printed = true;
1006 }
1007}
1008
1009static const MemoryRegionOps reservation_ops = {
1010 .read = invalid_read,
1011 .write = invalid_write,
1012 .endianness = DEVICE_NATIVE_ENDIAN,
1013};
1014
1015void memory_region_init_reservation(MemoryRegion *mr,
1016 const char *name,
1017 uint64_t size)
1018{
1019 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1020}
1021
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1022void memory_region_destroy(MemoryRegion *mr)
1023{
1024 assert(QTAILQ_EMPTY(&mr->subregions));
545e92e0 1025 mr->destructor(mr);
093bc2cd 1026 memory_region_clear_coalescing(mr);
7267c094
AL
1027 g_free((char *)mr->name);
1028 g_free(mr->ioeventfds);
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1029}
1030
1031uint64_t memory_region_size(MemoryRegion *mr)
1032{
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1033 if (int128_eq(mr->size, int128_2_64())) {
1034 return UINT64_MAX;
1035 }
1036 return int128_get64(mr->size);
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1037}
1038
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1039const char *memory_region_name(MemoryRegion *mr)
1040{
1041 return mr->name;
1042}
1043
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1044bool memory_region_is_ram(MemoryRegion *mr)
1045{
1046 return mr->ram;
1047}
1048
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1049bool memory_region_is_logging(MemoryRegion *mr)
1050{
1051 return mr->dirty_log_mask;
1052}
1053
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1054bool memory_region_is_rom(MemoryRegion *mr)
1055{
1056 return mr->ram && mr->readonly;
1057}
1058
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1059void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1060{
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1061 uint8_t mask = 1 << client;
1062
59023ef4 1063 memory_region_transaction_begin();
5a583347 1064 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
59023ef4 1065 memory_region_transaction_commit();
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1066}
1067
1068bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
cd7a45c9 1069 target_phys_addr_t size, unsigned client)
093bc2cd 1070{
14a3c10a 1071 assert(mr->terminates);
cd7a45c9
BS
1072 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1073 1 << client);
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1074}
1075
fd4aa979
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1076void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1077 target_phys_addr_t size)
093bc2cd 1078{
14a3c10a 1079 assert(mr->terminates);
fd4aa979 1080 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
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1081}
1082
1083void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1084{
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1085 FlatRange *fr;
1086
cc31e6e7 1087 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
5a583347 1088 if (fr->mr == mr) {
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1089 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1090 Forward, log_sync);
5a583347
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1091 }
1092 }
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1093}
1094
1095void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1096{
fb1cd6f9 1097 if (mr->readonly != readonly) {
59023ef4 1098 memory_region_transaction_begin();
fb1cd6f9 1099 mr->readonly = readonly;
59023ef4 1100 memory_region_transaction_commit();
fb1cd6f9 1101 }
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1102}
1103
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1104void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1105{
1106 if (mr->readable != readable) {
59023ef4 1107 memory_region_transaction_begin();
d0a9b5bc 1108 mr->readable = readable;
59023ef4 1109 memory_region_transaction_commit();
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1110 }
1111}
1112
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1113void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1114 target_phys_addr_t size, unsigned client)
1115{
14a3c10a 1116 assert(mr->terminates);
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1117 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1118 mr->ram_addr + addr + size,
1119 1 << client);
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1120}
1121
1122void *memory_region_get_ram_ptr(MemoryRegion *mr)
1123{
1124 if (mr->alias) {
1125 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1126 }
1127
14a3c10a 1128 assert(mr->terminates);
093bc2cd 1129
021d26d1 1130 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
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1131}
1132
1133static void memory_region_update_coalesced_range(MemoryRegion *mr)
1134{
1135 FlatRange *fr;
1136 CoalescedMemoryRange *cmr;
1137 AddrRange tmp;
1138
cc31e6e7 1139 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
093bc2cd 1140 if (fr->mr == mr) {
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1141 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1142 int128_get64(fr->addr.size));
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1143 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1144 tmp = addrrange_shift(cmr->addr,
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1145 int128_sub(fr->addr.start,
1146 int128_make64(fr->offset_in_region)));
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1147 if (!addrrange_intersects(tmp, fr->addr)) {
1148 continue;
1149 }
1150 tmp = addrrange_intersection(tmp, fr->addr);
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1151 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1152 int128_get64(tmp.size));
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1153 }
1154 }
1155 }
1156}
1157
1158void memory_region_set_coalescing(MemoryRegion *mr)
1159{
1160 memory_region_clear_coalescing(mr);
08dafab4 1161 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
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1162}
1163
1164void memory_region_add_coalescing(MemoryRegion *mr,
1165 target_phys_addr_t offset,
1166 uint64_t size)
1167{
7267c094 1168 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1169
08dafab4 1170 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
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1171 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1172 memory_region_update_coalesced_range(mr);
d410515e 1173 memory_region_set_flush_coalesced(mr);
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1174}
1175
1176void memory_region_clear_coalescing(MemoryRegion *mr)
1177{
1178 CoalescedMemoryRange *cmr;
1179
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1180 qemu_flush_coalesced_mmio_buffer();
1181 mr->flush_coalesced_mmio = false;
1182
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1183 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1184 cmr = QTAILQ_FIRST(&mr->coalesced);
1185 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1186 g_free(cmr);
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1187 }
1188 memory_region_update_coalesced_range(mr);
1189}
1190
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1191void memory_region_set_flush_coalesced(MemoryRegion *mr)
1192{
1193 mr->flush_coalesced_mmio = true;
1194}
1195
1196void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1197{
1198 qemu_flush_coalesced_mmio_buffer();
1199 if (QTAILQ_EMPTY(&mr->coalesced)) {
1200 mr->flush_coalesced_mmio = false;
1201 }
1202}
1203
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1204void memory_region_add_eventfd(MemoryRegion *mr,
1205 target_phys_addr_t addr,
1206 unsigned size,
1207 bool match_data,
1208 uint64_t data,
753d5e14 1209 EventNotifier *e)
3e9d69e7
AK
1210{
1211 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1212 .addr.start = int128_make64(addr),
1213 .addr.size = int128_make64(size),
3e9d69e7
AK
1214 .match_data = match_data,
1215 .data = data,
753d5e14 1216 .e = e,
3e9d69e7
AK
1217 };
1218 unsigned i;
1219
28f362be 1220 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1221 memory_region_transaction_begin();
3e9d69e7
AK
1222 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1223 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1224 break;
1225 }
1226 }
1227 ++mr->ioeventfd_nb;
7267c094 1228 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1229 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1230 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1231 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1232 mr->ioeventfds[i] = mrfd;
59023ef4 1233 memory_region_transaction_commit();
3e9d69e7
AK
1234}
1235
1236void memory_region_del_eventfd(MemoryRegion *mr,
1237 target_phys_addr_t addr,
1238 unsigned size,
1239 bool match_data,
1240 uint64_t data,
753d5e14 1241 EventNotifier *e)
3e9d69e7
AK
1242{
1243 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1244 .addr.start = int128_make64(addr),
1245 .addr.size = int128_make64(size),
3e9d69e7
AK
1246 .match_data = match_data,
1247 .data = data,
753d5e14 1248 .e = e,
3e9d69e7
AK
1249 };
1250 unsigned i;
1251
28f362be 1252 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1253 memory_region_transaction_begin();
3e9d69e7
AK
1254 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1255 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1256 break;
1257 }
1258 }
1259 assert(i != mr->ioeventfd_nb);
1260 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1261 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1262 --mr->ioeventfd_nb;
7267c094 1263 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1264 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
59023ef4 1265 memory_region_transaction_commit();
3e9d69e7
AK
1266}
1267
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AK
1268static void memory_region_add_subregion_common(MemoryRegion *mr,
1269 target_phys_addr_t offset,
1270 MemoryRegion *subregion)
1271{
1272 MemoryRegion *other;
1273
59023ef4
JK
1274 memory_region_transaction_begin();
1275
093bc2cd
AK
1276 assert(!subregion->parent);
1277 subregion->parent = mr;
1278 subregion->addr = offset;
1279 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1280 if (subregion->may_overlap || other->may_overlap) {
1281 continue;
1282 }
08dafab4
AK
1283 if (int128_gt(int128_make64(offset),
1284 int128_add(int128_make64(other->addr), other->size))
1285 || int128_le(int128_add(int128_make64(offset), subregion->size),
1286 int128_make64(other->addr))) {
093bc2cd
AK
1287 continue;
1288 }
a5e1cbc8 1289#if 0
860329b2
MW
1290 printf("warning: subregion collision %llx/%llx (%s) "
1291 "vs %llx/%llx (%s)\n",
093bc2cd 1292 (unsigned long long)offset,
08dafab4 1293 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1294 subregion->name,
1295 (unsigned long long)other->addr,
08dafab4 1296 (unsigned long long)int128_get64(other->size),
860329b2 1297 other->name);
a5e1cbc8 1298#endif
093bc2cd
AK
1299 }
1300 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1301 if (subregion->priority >= other->priority) {
1302 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1303 goto done;
1304 }
1305 }
1306 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1307done:
59023ef4 1308 memory_region_transaction_commit();
093bc2cd
AK
1309}
1310
1311
1312void memory_region_add_subregion(MemoryRegion *mr,
1313 target_phys_addr_t offset,
1314 MemoryRegion *subregion)
1315{
1316 subregion->may_overlap = false;
1317 subregion->priority = 0;
1318 memory_region_add_subregion_common(mr, offset, subregion);
1319}
1320
1321void memory_region_add_subregion_overlap(MemoryRegion *mr,
1322 target_phys_addr_t offset,
1323 MemoryRegion *subregion,
1324 unsigned priority)
1325{
1326 subregion->may_overlap = true;
1327 subregion->priority = priority;
1328 memory_region_add_subregion_common(mr, offset, subregion);
1329}
1330
1331void memory_region_del_subregion(MemoryRegion *mr,
1332 MemoryRegion *subregion)
1333{
59023ef4 1334 memory_region_transaction_begin();
093bc2cd
AK
1335 assert(subregion->parent == mr);
1336 subregion->parent = NULL;
1337 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
59023ef4 1338 memory_region_transaction_commit();
6bba19ba
AK
1339}
1340
1341void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1342{
1343 if (enabled == mr->enabled) {
1344 return;
1345 }
59023ef4 1346 memory_region_transaction_begin();
6bba19ba 1347 mr->enabled = enabled;
59023ef4 1348 memory_region_transaction_commit();
093bc2cd 1349}
1c0ffa58 1350
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AK
1351void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1352{
1353 MemoryRegion *parent = mr->parent;
1354 unsigned priority = mr->priority;
1355 bool may_overlap = mr->may_overlap;
1356
1357 if (addr == mr->addr || !parent) {
1358 mr->addr = addr;
1359 return;
1360 }
1361
1362 memory_region_transaction_begin();
1363 memory_region_del_subregion(parent, mr);
1364 if (may_overlap) {
1365 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1366 } else {
1367 memory_region_add_subregion(parent, addr, mr);
1368 }
1369 memory_region_transaction_commit();
1370}
1371
4703359e
AK
1372void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1373{
4703359e 1374 assert(mr->alias);
4703359e 1375
59023ef4 1376 if (offset == mr->alias_offset) {
4703359e
AK
1377 return;
1378 }
1379
59023ef4
JK
1380 memory_region_transaction_begin();
1381 mr->alias_offset = offset;
1382 memory_region_transaction_commit();
4703359e
AK
1383}
1384
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AK
1385ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1386{
e34911c4
AK
1387 return mr->ram_addr;
1388}
1389
e2177955
AK
1390static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1391{
1392 const AddrRange *addr = addr_;
1393 const FlatRange *fr = fr_;
1394
1395 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1396 return -1;
1397 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1398 return 1;
1399 }
1400 return 0;
1401}
1402
1403static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1404{
1405 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1406 sizeof(FlatRange), cmp_flatrange_addr);
1407}
1408
1409MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1410 target_phys_addr_t addr, uint64_t size)
1411{
1412 AddressSpace *as = memory_region_to_address_space(address_space);
1413 AddrRange range = addrrange_make(int128_make64(addr),
1414 int128_make64(size));
1415 FlatRange *fr = address_space_lookup(as, range);
1416 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1417
1418 if (!fr) {
1419 return ret;
1420 }
1421
1422 while (fr > as->current_map.ranges
1423 && addrrange_intersects(fr[-1].addr, range)) {
1424 --fr;
1425 }
1426
1427 ret.mr = fr->mr;
1428 range = addrrange_intersection(range, fr->addr);
1429 ret.offset_within_region = fr->offset_in_region;
1430 ret.offset_within_region += int128_get64(int128_sub(range.start,
1431 fr->addr.start));
1432 ret.size = int128_get64(range.size);
1433 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1434 ret.readonly = fr->readonly;
e2177955
AK
1435 return ret;
1436}
1437
86e775c6
AK
1438void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1439{
7664e80c
AK
1440 AddressSpace *as = memory_region_to_address_space(address_space);
1441 FlatRange *fr;
1442
7664e80c 1443 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
72e22d2f 1444 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c
AK
1445 }
1446}
1447
1448void memory_global_dirty_log_start(void)
1449{
7664e80c 1450 global_dirty_log = true;
7376e582 1451 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1452}
1453
1454void memory_global_dirty_log_stop(void)
1455{
7664e80c 1456 global_dirty_log = false;
7376e582 1457 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1458}
1459
1460static void listener_add_address_space(MemoryListener *listener,
1461 AddressSpace *as)
1462{
1463 FlatRange *fr;
1464
221b3a3f
JG
1465 if (listener->address_space_filter
1466 && listener->address_space_filter != as->root) {
1467 return;
1468 }
1469
7664e80c
AK
1470 if (global_dirty_log) {
1471 listener->log_global_start(listener);
1472 }
1473 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1474 MemoryRegionSection section = {
1475 .mr = fr->mr,
1476 .address_space = as->root,
1477 .offset_within_region = fr->offset_in_region,
1478 .size = int128_get64(fr->addr.size),
1479 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1480 .readonly = fr->readonly,
7664e80c
AK
1481 };
1482 listener->region_add(listener, &section);
1483 }
1484}
1485
7376e582 1486void memory_listener_register(MemoryListener *listener, MemoryRegion *filter)
7664e80c 1487{
72e22d2f
AK
1488 MemoryListener *other = NULL;
1489
7376e582 1490 listener->address_space_filter = filter;
72e22d2f
AK
1491 if (QTAILQ_EMPTY(&memory_listeners)
1492 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1493 memory_listeners)->priority) {
1494 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1495 } else {
1496 QTAILQ_FOREACH(other, &memory_listeners, link) {
1497 if (listener->priority < other->priority) {
1498 break;
1499 }
1500 }
1501 QTAILQ_INSERT_BEFORE(other, listener, link);
1502 }
7664e80c
AK
1503 listener_add_address_space(listener, &address_space_memory);
1504 listener_add_address_space(listener, &address_space_io);
1505}
1506
1507void memory_listener_unregister(MemoryListener *listener)
1508{
72e22d2f 1509 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1510}
e2177955 1511
1c0ffa58
AK
1512void set_system_memory_map(MemoryRegion *mr)
1513{
59023ef4 1514 memory_region_transaction_begin();
cc31e6e7 1515 address_space_memory.root = mr;
59023ef4 1516 memory_region_transaction_commit();
1c0ffa58 1517}
658b2224
AK
1518
1519void set_system_io_map(MemoryRegion *mr)
1520{
59023ef4 1521 memory_region_transaction_begin();
658b2224 1522 address_space_io.root = mr;
59023ef4 1523 memory_region_transaction_commit();
658b2224 1524}
314e2987 1525
37ec01d4 1526uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size)
acbbec5d 1527{
37ec01d4 1528 return memory_region_dispatch_read(mr, addr, size);
acbbec5d
AK
1529}
1530
37ec01d4 1531void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
acbbec5d
AK
1532 uint64_t val, unsigned size)
1533{
37ec01d4 1534 memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1535}
1536
314e2987
BS
1537typedef struct MemoryRegionList MemoryRegionList;
1538
1539struct MemoryRegionList {
1540 const MemoryRegion *mr;
1541 bool printed;
1542 QTAILQ_ENTRY(MemoryRegionList) queue;
1543};
1544
1545typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1546
1547static void mtree_print_mr(fprintf_function mon_printf, void *f,
1548 const MemoryRegion *mr, unsigned int level,
1549 target_phys_addr_t base,
9479c57a 1550 MemoryRegionListHead *alias_print_queue)
314e2987 1551{
9479c57a
JK
1552 MemoryRegionList *new_ml, *ml, *next_ml;
1553 MemoryRegionListHead submr_print_queue;
314e2987
BS
1554 const MemoryRegion *submr;
1555 unsigned int i;
1556
314e2987
BS
1557 if (!mr) {
1558 return;
1559 }
1560
1561 for (i = 0; i < level; i++) {
1562 mon_printf(f, " ");
1563 }
1564
1565 if (mr->alias) {
1566 MemoryRegionList *ml;
1567 bool found = false;
1568
1569 /* check if the alias is already in the queue */
9479c57a 1570 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1571 if (ml->mr == mr->alias && !ml->printed) {
1572 found = true;
1573 }
1574 }
1575
1576 if (!found) {
1577 ml = g_new(MemoryRegionList, 1);
1578 ml->mr = mr->alias;
1579 ml->printed = false;
9479c57a 1580 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1581 }
4896d74b
JK
1582 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1583 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1584 "-" TARGET_FMT_plx "\n",
314e2987 1585 base + mr->addr,
08dafab4
AK
1586 base + mr->addr
1587 + (target_phys_addr_t)int128_get64(mr->size) - 1,
4b474ba7 1588 mr->priority,
4896d74b
JK
1589 mr->readable ? 'R' : '-',
1590 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1591 : '-',
314e2987
BS
1592 mr->name,
1593 mr->alias->name,
1594 mr->alias_offset,
08dafab4
AK
1595 mr->alias_offset
1596 + (target_phys_addr_t)int128_get64(mr->size) - 1);
314e2987 1597 } else {
4896d74b
JK
1598 mon_printf(f,
1599 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1600 base + mr->addr,
08dafab4
AK
1601 base + mr->addr
1602 + (target_phys_addr_t)int128_get64(mr->size) - 1,
4b474ba7 1603 mr->priority,
4896d74b
JK
1604 mr->readable ? 'R' : '-',
1605 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1606 : '-',
314e2987
BS
1607 mr->name);
1608 }
9479c57a
JK
1609
1610 QTAILQ_INIT(&submr_print_queue);
1611
314e2987 1612 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1613 new_ml = g_new(MemoryRegionList, 1);
1614 new_ml->mr = submr;
1615 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1616 if (new_ml->mr->addr < ml->mr->addr ||
1617 (new_ml->mr->addr == ml->mr->addr &&
1618 new_ml->mr->priority > ml->mr->priority)) {
1619 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1620 new_ml = NULL;
1621 break;
1622 }
1623 }
1624 if (new_ml) {
1625 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1626 }
1627 }
1628
1629 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1630 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1631 alias_print_queue);
1632 }
1633
88365e47 1634 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1635 g_free(ml);
314e2987
BS
1636 }
1637}
1638
1639void mtree_info(fprintf_function mon_printf, void *f)
1640{
1641 MemoryRegionListHead ml_head;
1642 MemoryRegionList *ml, *ml2;
1643
1644 QTAILQ_INIT(&ml_head);
1645
1646 mon_printf(f, "memory\n");
1647 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1648
b9f9be88
BS
1649 if (address_space_io.root &&
1650 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1651 mon_printf(f, "I/O\n");
1652 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1653 }
1654
1655 mon_printf(f, "aliases\n");
314e2987
BS
1656 /* print aliased regions */
1657 QTAILQ_FOREACH(ml, &ml_head, queue) {
1658 if (!ml->printed) {
1659 mon_printf(f, "%s\n", ml->mr->name);
1660 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1661 }
1662 }
1663
1664 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1665 g_free(ml);
314e2987 1666 }
314e2987 1667}