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add a header file for atomic operations
[qemu.git] / memory.c
CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
1de7afc9 19#include "qemu/bitops.h"
2c9b15ca 20#include "qom/object.h"
9c17d615 21#include "sysemu/kvm.h"
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22#include <assert.h>
23
022c62cb 24#include "exec/memory-internal.h"
67d95c15 25
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26//#define DEBUG_UNASSIGNED
27
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28static unsigned memory_region_transaction_depth;
29static bool memory_region_update_pending;
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30static bool global_dirty_log = false;
31
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32static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
33 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 34
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35static QTAILQ_HEAD(, AddressSpace) address_spaces
36 = QTAILQ_HEAD_INITIALIZER(address_spaces);
37
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38typedef struct AddrRange AddrRange;
39
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40/*
41 * Note using signed integers limits us to physical addresses at most
42 * 63 bits wide. They are needed for negative offsetting in aliases
43 * (large MemoryRegion::alias_offset).
44 */
093bc2cd 45struct AddrRange {
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46 Int128 start;
47 Int128 size;
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48};
49
08dafab4 50static AddrRange addrrange_make(Int128 start, Int128 size)
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51{
52 return (AddrRange) { start, size };
53}
54
55static bool addrrange_equal(AddrRange r1, AddrRange r2)
56{
08dafab4 57 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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58}
59
08dafab4 60static Int128 addrrange_end(AddrRange r)
093bc2cd 61{
08dafab4 62 return int128_add(r.start, r.size);
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63}
64
08dafab4 65static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 66{
08dafab4 67 int128_addto(&range.start, delta);
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68 return range;
69}
70
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71static bool addrrange_contains(AddrRange range, Int128 addr)
72{
73 return int128_ge(addr, range.start)
74 && int128_lt(addr, addrrange_end(range));
75}
76
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77static bool addrrange_intersects(AddrRange r1, AddrRange r2)
78{
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79 return addrrange_contains(r1, r2.start)
80 || addrrange_contains(r2, r1.start);
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81}
82
83static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
84{
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85 Int128 start = int128_max(r1.start, r2.start);
86 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
87 return addrrange_make(start, int128_sub(end, start));
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88}
89
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90enum ListenerDirection { Forward, Reverse };
91
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92static bool memory_listener_match(MemoryListener *listener,
93 MemoryRegionSection *section)
94{
95 return !listener->address_space_filter
96 || listener->address_space_filter == section->address_space;
97}
98
99#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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100 do { \
101 MemoryListener *_listener; \
102 \
103 switch (_direction) { \
104 case Forward: \
105 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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106 if (_listener->_callback) { \
107 _listener->_callback(_listener, ##_args); \
108 } \
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109 } \
110 break; \
111 case Reverse: \
112 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
113 memory_listeners, link) { \
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114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
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117 } \
118 break; \
119 default: \
120 abort(); \
121 } \
122 } while (0)
123
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124#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
125 do { \
126 MemoryListener *_listener; \
127 \
128 switch (_direction) { \
129 case Forward: \
130 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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131 if (_listener->_callback \
132 && memory_listener_match(_listener, _section)) { \
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133 _listener->_callback(_listener, _section, ##_args); \
134 } \
135 } \
136 break; \
137 case Reverse: \
138 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
139 memory_listeners, link) { \
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140 if (_listener->_callback \
141 && memory_listener_match(_listener, _section)) { \
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142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 default: \
147 abort(); \
148 } \
149 } while (0)
150
dfde4e6e 151/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 152#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 153 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 154 .mr = (fr)->mr, \
f6790af6 155 .address_space = (as), \
0e0d36b4 156 .offset_within_region = (fr)->offset_in_region, \
052e87b0 157 .size = (fr)->addr.size, \
0e0d36b4 158 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 159 .readonly = (fr)->readonly, \
7376e582 160 }))
0e0d36b4 161
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162struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165};
166
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167struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
753d5e14 171 EventNotifier *e;
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172};
173
174static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
175 MemoryRegionIoeventfd b)
176{
08dafab4 177 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 178 return true;
08dafab4 179 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 180 return false;
08dafab4 181 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 182 return true;
08dafab4 183 } else if (int128_gt(a.addr.size, b.addr.size)) {
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184 return false;
185 } else if (a.match_data < b.match_data) {
186 return true;
187 } else if (a.match_data > b.match_data) {
188 return false;
189 } else if (a.match_data) {
190 if (a.data < b.data) {
191 return true;
192 } else if (a.data > b.data) {
193 return false;
194 }
195 }
753d5e14 196 if (a.e < b.e) {
3e9d69e7 197 return true;
753d5e14 198 } else if (a.e > b.e) {
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199 return false;
200 }
201 return false;
202}
203
204static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
205 MemoryRegionIoeventfd b)
206{
207 return !memory_region_ioeventfd_before(a, b)
208 && !memory_region_ioeventfd_before(b, a);
209}
210
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211typedef struct FlatRange FlatRange;
212typedef struct FlatView FlatView;
213
214/* Range of memory in the global map. Addresses are absolute. */
215struct FlatRange {
216 MemoryRegion *mr;
a8170e5e 217 hwaddr offset_in_region;
093bc2cd 218 AddrRange addr;
5a583347 219 uint8_t dirty_log_mask;
5f9a5ea1 220 bool romd_mode;
fb1cd6f9 221 bool readonly;
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222};
223
224/* Flattened global view of current active memory hierarchy. Kept in sorted
225 * order.
226 */
227struct FlatView {
228 FlatRange *ranges;
229 unsigned nr;
230 unsigned nr_allocated;
231};
232
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233typedef struct AddressSpaceOps AddressSpaceOps;
234
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235#define FOR_EACH_FLAT_RANGE(var, view) \
236 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
237
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238static bool flatrange_equal(FlatRange *a, FlatRange *b)
239{
240 return a->mr == b->mr
241 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 242 && a->offset_in_region == b->offset_in_region
5f9a5ea1 243 && a->romd_mode == b->romd_mode
fb1cd6f9 244 && a->readonly == b->readonly;
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245}
246
247static void flatview_init(FlatView *view)
248{
249 view->ranges = NULL;
250 view->nr = 0;
251 view->nr_allocated = 0;
252}
253
254/* Insert a range into a given position. Caller is responsible for maintaining
255 * sorting order.
256 */
257static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
258{
259 if (view->nr == view->nr_allocated) {
260 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 261 view->ranges = g_realloc(view->ranges,
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262 view->nr_allocated * sizeof(*view->ranges));
263 }
264 memmove(view->ranges + pos + 1, view->ranges + pos,
265 (view->nr - pos) * sizeof(FlatRange));
266 view->ranges[pos] = *range;
dfde4e6e 267 memory_region_ref(range->mr);
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268 ++view->nr;
269}
270
271static void flatview_destroy(FlatView *view)
272{
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273 int i;
274
275 for (i = 0; i < view->nr; i++) {
276 memory_region_unref(view->ranges[i].mr);
277 }
7267c094 278 g_free(view->ranges);
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279}
280
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281static bool can_merge(FlatRange *r1, FlatRange *r2)
282{
08dafab4 283 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 284 && r1->mr == r2->mr
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285 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
286 r1->addr.size),
287 int128_make64(r2->offset_in_region))
d0a9b5bc 288 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 289 && r1->romd_mode == r2->romd_mode
fb1cd6f9 290 && r1->readonly == r2->readonly;
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291}
292
8508e024 293/* Attempt to simplify a view by merging adjacent ranges */
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294static void flatview_simplify(FlatView *view)
295{
296 unsigned i, j;
297
298 i = 0;
299 while (i < view->nr) {
300 j = i + 1;
301 while (j < view->nr
302 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 303 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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304 ++j;
305 }
306 ++i;
307 memmove(&view->ranges[i], &view->ranges[j],
308 (view->nr - j) * sizeof(view->ranges[j]));
309 view->nr -= j - i;
310 }
311}
312
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313static void memory_region_oldmmio_read_accessor(void *opaque,
314 hwaddr addr,
315 uint64_t *value,
316 unsigned size,
317 unsigned shift,
318 uint64_t mask)
319{
320 MemoryRegion *mr = opaque;
321 uint64_t tmp;
322
323 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
324 *value |= (tmp & mask) << shift;
325}
326
164a4dcd 327static void memory_region_read_accessor(void *opaque,
a8170e5e 328 hwaddr addr,
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329 uint64_t *value,
330 unsigned size,
331 unsigned shift,
332 uint64_t mask)
333{
334 MemoryRegion *mr = opaque;
335 uint64_t tmp;
336
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337 if (mr->flush_coalesced_mmio) {
338 qemu_flush_coalesced_mmio_buffer();
339 }
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340 tmp = mr->ops->read(mr->opaque, addr, size);
341 *value |= (tmp & mask) << shift;
342}
343
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344static void memory_region_oldmmio_write_accessor(void *opaque,
345 hwaddr addr,
346 uint64_t *value,
347 unsigned size,
348 unsigned shift,
349 uint64_t mask)
350{
351 MemoryRegion *mr = opaque;
352 uint64_t tmp;
353
354 tmp = (*value >> shift) & mask;
355 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
356}
357
164a4dcd 358static void memory_region_write_accessor(void *opaque,
a8170e5e 359 hwaddr addr,
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360 uint64_t *value,
361 unsigned size,
362 unsigned shift,
363 uint64_t mask)
364{
365 MemoryRegion *mr = opaque;
366 uint64_t tmp;
367
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368 if (mr->flush_coalesced_mmio) {
369 qemu_flush_coalesced_mmio_buffer();
370 }
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371 tmp = (*value >> shift) & mask;
372 mr->ops->write(mr->opaque, addr, tmp, size);
373}
374
a8170e5e 375static void access_with_adjusted_size(hwaddr addr,
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376 uint64_t *value,
377 unsigned size,
378 unsigned access_size_min,
379 unsigned access_size_max,
380 void (*access)(void *opaque,
a8170e5e 381 hwaddr addr,
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382 uint64_t *value,
383 unsigned size,
384 unsigned shift,
385 uint64_t mask),
386 void *opaque)
387{
388 uint64_t access_mask;
389 unsigned access_size;
390 unsigned i;
391
392 if (!access_size_min) {
393 access_size_min = 1;
394 }
395 if (!access_size_max) {
396 access_size_max = 4;
397 }
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398
399 /* FIXME: support unaligned access? */
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400 access_size = MAX(MIN(size, access_size_max), access_size_min);
401 access_mask = -1ULL >> (64 - access_size * 8);
402 for (i = 0; i < size; i += access_size) {
08521e28
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403#ifdef TARGET_WORDS_BIGENDIAN
404 access(opaque, addr + i, value, access_size,
405 (size - access_size - i) * 8, access_mask);
406#else
164a4dcd 407 access(opaque, addr + i, value, access_size, i * 8, access_mask);
08521e28 408#endif
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409 }
410}
411
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412static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
413{
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414 AddressSpace *as;
415
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416 while (mr->parent) {
417 mr = mr->parent;
418 }
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419 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
420 if (mr == as->root) {
421 return as;
422 }
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423 }
424 abort();
425}
426
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427/* Render a memory region into the global view. Ranges in @view obscure
428 * ranges in @mr.
429 */
430static void render_memory_region(FlatView *view,
431 MemoryRegion *mr,
08dafab4 432 Int128 base,
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433 AddrRange clip,
434 bool readonly)
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435{
436 MemoryRegion *subregion;
437 unsigned i;
a8170e5e 438 hwaddr offset_in_region;
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439 Int128 remain;
440 Int128 now;
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441 FlatRange fr;
442 AddrRange tmp;
443
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444 if (!mr->enabled) {
445 return;
446 }
447
08dafab4 448 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 449 readonly |= mr->readonly;
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450
451 tmp = addrrange_make(base, mr->size);
452
453 if (!addrrange_intersects(tmp, clip)) {
454 return;
455 }
456
457 clip = addrrange_intersection(tmp, clip);
458
459 if (mr->alias) {
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460 int128_subfrom(&base, int128_make64(mr->alias->addr));
461 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 462 render_memory_region(view, mr->alias, base, clip, readonly);
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463 return;
464 }
465
466 /* Render subregions in priority order. */
467 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 468 render_memory_region(view, subregion, base, clip, readonly);
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469 }
470
14a3c10a 471 if (!mr->terminates) {
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472 return;
473 }
474
08dafab4 475 offset_in_region = int128_get64(int128_sub(clip.start, base));
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476 base = clip.start;
477 remain = clip.size;
478
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479 fr.mr = mr;
480 fr.dirty_log_mask = mr->dirty_log_mask;
481 fr.romd_mode = mr->romd_mode;
482 fr.readonly = readonly;
483
093bc2cd 484 /* Render the region itself into any gaps left by the current view. */
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485 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
486 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
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487 continue;
488 }
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489 if (int128_lt(base, view->ranges[i].addr.start)) {
490 now = int128_min(remain,
491 int128_sub(view->ranges[i].addr.start, base));
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492 fr.offset_in_region = offset_in_region;
493 fr.addr = addrrange_make(base, now);
494 flatview_insert(view, i, &fr);
495 ++i;
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496 int128_addto(&base, now);
497 offset_in_region += int128_get64(now);
498 int128_subfrom(&remain, now);
093bc2cd 499 }
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500 now = int128_sub(int128_min(int128_add(base, remain),
501 addrrange_end(view->ranges[i].addr)),
502 base);
503 int128_addto(&base, now);
504 offset_in_region += int128_get64(now);
505 int128_subfrom(&remain, now);
093bc2cd 506 }
08dafab4 507 if (int128_nz(remain)) {
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508 fr.offset_in_region = offset_in_region;
509 fr.addr = addrrange_make(base, remain);
510 flatview_insert(view, i, &fr);
511 }
512}
513
514/* Render a memory topology into a list of disjoint absolute ranges. */
515static FlatView generate_memory_topology(MemoryRegion *mr)
516{
517 FlatView view;
518
519 flatview_init(&view);
520
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521 if (mr) {
522 render_memory_region(&view, mr, int128_zero(),
523 addrrange_make(int128_zero(), int128_2_64()), false);
524 }
3d8e6bf9 525 flatview_simplify(&view);
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526
527 return view;
528}
529
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530static void address_space_add_del_ioeventfds(AddressSpace *as,
531 MemoryRegionIoeventfd *fds_new,
532 unsigned fds_new_nb,
533 MemoryRegionIoeventfd *fds_old,
534 unsigned fds_old_nb)
535{
536 unsigned iold, inew;
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537 MemoryRegionIoeventfd *fd;
538 MemoryRegionSection section;
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539
540 /* Generate a symmetric difference of the old and new fd sets, adding
541 * and deleting as necessary.
542 */
543
544 iold = inew = 0;
545 while (iold < fds_old_nb || inew < fds_new_nb) {
546 if (iold < fds_old_nb
547 && (inew == fds_new_nb
548 || memory_region_ioeventfd_before(fds_old[iold],
549 fds_new[inew]))) {
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550 fd = &fds_old[iold];
551 section = (MemoryRegionSection) {
f6790af6 552 .address_space = as,
80a1ea37 553 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 554 .size = fd->addr.size,
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555 };
556 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 557 fd->match_data, fd->data, fd->e);
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558 ++iold;
559 } else if (inew < fds_new_nb
560 && (iold == fds_old_nb
561 || memory_region_ioeventfd_before(fds_new[inew],
562 fds_old[iold]))) {
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563 fd = &fds_new[inew];
564 section = (MemoryRegionSection) {
f6790af6 565 .address_space = as,
80a1ea37 566 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 567 .size = fd->addr.size,
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568 };
569 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 570 fd->match_data, fd->data, fd->e);
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571 ++inew;
572 } else {
573 ++iold;
574 ++inew;
575 }
576 }
577}
578
579static void address_space_update_ioeventfds(AddressSpace *as)
580{
581 FlatRange *fr;
582 unsigned ioeventfd_nb = 0;
583 MemoryRegionIoeventfd *ioeventfds = NULL;
584 AddrRange tmp;
585 unsigned i;
586
8786db7c 587 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
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588 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
589 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
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590 int128_sub(fr->addr.start,
591 int128_make64(fr->offset_in_region)));
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592 if (addrrange_intersects(fr->addr, tmp)) {
593 ++ioeventfd_nb;
7267c094 594 ioeventfds = g_realloc(ioeventfds,
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595 ioeventfd_nb * sizeof(*ioeventfds));
596 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
597 ioeventfds[ioeventfd_nb-1].addr = tmp;
598 }
599 }
600 }
601
602 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
603 as->ioeventfds, as->ioeventfd_nb);
604
7267c094 605 g_free(as->ioeventfds);
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606 as->ioeventfds = ioeventfds;
607 as->ioeventfd_nb = ioeventfd_nb;
608}
609
b8af1afb
AK
610static void address_space_update_topology_pass(AddressSpace *as,
611 FlatView old_view,
612 FlatView new_view,
613 bool adding)
093bc2cd 614{
093bc2cd
AK
615 unsigned iold, inew;
616 FlatRange *frold, *frnew;
093bc2cd
AK
617
618 /* Generate a symmetric difference of the old and new memory maps.
619 * Kill ranges in the old map, and instantiate ranges in the new map.
620 */
621 iold = inew = 0;
622 while (iold < old_view.nr || inew < new_view.nr) {
623 if (iold < old_view.nr) {
624 frold = &old_view.ranges[iold];
625 } else {
626 frold = NULL;
627 }
628 if (inew < new_view.nr) {
629 frnew = &new_view.ranges[inew];
630 } else {
631 frnew = NULL;
632 }
633
634 if (frold
635 && (!frnew
08dafab4
AK
636 || int128_lt(frold->addr.start, frnew->addr.start)
637 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 638 && !flatrange_equal(frold, frnew)))) {
41a6e477 639 /* In old but not in new, or in both but attributes changed. */
093bc2cd 640
b8af1afb 641 if (!adding) {
72e22d2f 642 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
643 }
644
093bc2cd
AK
645 ++iold;
646 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 647 /* In both and unchanged (except logging may have changed) */
093bc2cd 648
b8af1afb 649 if (adding) {
50c1e149 650 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 651 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 652 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 653 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 654 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 655 }
5a583347
AK
656 }
657
093bc2cd
AK
658 ++iold;
659 ++inew;
093bc2cd
AK
660 } else {
661 /* In new */
662
b8af1afb 663 if (adding) {
72e22d2f 664 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
665 }
666
093bc2cd
AK
667 ++inew;
668 }
669 }
b8af1afb
AK
670}
671
672
673static void address_space_update_topology(AddressSpace *as)
674{
8786db7c 675 FlatView old_view = *as->current_map;
b8af1afb
AK
676 FlatView new_view = generate_memory_topology(as->root);
677
678 address_space_update_topology_pass(as, old_view, new_view, false);
679 address_space_update_topology_pass(as, old_view, new_view, true);
680
8786db7c 681 *as->current_map = new_view;
093bc2cd 682 flatview_destroy(&old_view);
3e9d69e7 683 address_space_update_ioeventfds(as);
093bc2cd
AK
684}
685
4ef4db86
AK
686void memory_region_transaction_begin(void)
687{
bb880ded 688 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
689 ++memory_region_transaction_depth;
690}
691
692void memory_region_transaction_commit(void)
693{
0d673e36
AK
694 AddressSpace *as;
695
4ef4db86
AK
696 assert(memory_region_transaction_depth);
697 --memory_region_transaction_depth;
22bde714
JK
698 if (!memory_region_transaction_depth && memory_region_update_pending) {
699 memory_region_update_pending = false;
02e2b95f
JK
700 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
701
0d673e36
AK
702 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
703 address_space_update_topology(as);
02e2b95f
JK
704 }
705
706 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 707 }
4ef4db86
AK
708}
709
545e92e0
AK
710static void memory_region_destructor_none(MemoryRegion *mr)
711{
712}
713
714static void memory_region_destructor_ram(MemoryRegion *mr)
715{
716 qemu_ram_free(mr->ram_addr);
717}
718
dfde4e6e
PB
719static void memory_region_destructor_alias(MemoryRegion *mr)
720{
721 memory_region_unref(mr->alias);
722}
723
545e92e0
AK
724static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
725{
726 qemu_ram_free_from_ptr(mr->ram_addr);
727}
728
d0a9b5bc
AK
729static void memory_region_destructor_rom_device(MemoryRegion *mr)
730{
731 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
732}
733
be675c97
AK
734static bool memory_region_wrong_endianness(MemoryRegion *mr)
735{
2c3579ab 736#ifdef TARGET_WORDS_BIGENDIAN
be675c97
AK
737 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
738#else
739 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
740#endif
741}
742
093bc2cd 743void memory_region_init(MemoryRegion *mr,
2c9b15ca 744 Object *owner,
093bc2cd
AK
745 const char *name,
746 uint64_t size)
747{
2cdfcf27
PB
748 mr->ops = &unassigned_mem_ops;
749 mr->opaque = NULL;
2c9b15ca 750 mr->owner = owner;
30951157 751 mr->iommu_ops = NULL;
093bc2cd 752 mr->parent = NULL;
803c0816 753 mr->owner = NULL;
08dafab4
AK
754 mr->size = int128_make64(size);
755 if (size == UINT64_MAX) {
756 mr->size = int128_2_64();
757 }
093bc2cd 758 mr->addr = 0;
b3b00c78 759 mr->subpage = false;
6bba19ba 760 mr->enabled = true;
14a3c10a 761 mr->terminates = false;
8ea9252a 762 mr->ram = false;
5f9a5ea1 763 mr->romd_mode = true;
fb1cd6f9 764 mr->readonly = false;
75c578dc 765 mr->rom_device = false;
545e92e0 766 mr->destructor = memory_region_destructor_none;
093bc2cd
AK
767 mr->priority = 0;
768 mr->may_overlap = false;
769 mr->alias = NULL;
770 QTAILQ_INIT(&mr->subregions);
771 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
772 QTAILQ_INIT(&mr->coalesced);
7267c094 773 mr->name = g_strdup(name);
5a583347 774 mr->dirty_log_mask = 0;
3e9d69e7
AK
775 mr->ioeventfd_nb = 0;
776 mr->ioeventfds = NULL;
d410515e 777 mr->flush_coalesced_mmio = false;
093bc2cd
AK
778}
779
b018ddf6
PB
780static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
781 unsigned size)
782{
783#ifdef DEBUG_UNASSIGNED
784 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
785#endif
c658b94f
AF
786 if (cpu_single_env != NULL) {
787 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
788 addr, false, false, 0, size);
789 }
b018ddf6
PB
790 return 0;
791}
792
793static void unassigned_mem_write(void *opaque, hwaddr addr,
794 uint64_t val, unsigned size)
795{
796#ifdef DEBUG_UNASSIGNED
797 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
798#endif
c658b94f
AF
799 if (cpu_single_env != NULL) {
800 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
801 addr, true, false, 0, size);
802 }
b018ddf6
PB
803}
804
d197063f
PB
805static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
806 unsigned size, bool is_write)
807{
808 return false;
809}
810
811const MemoryRegionOps unassigned_mem_ops = {
812 .valid.accepts = unassigned_mem_accepts,
813 .endianness = DEVICE_NATIVE_ENDIAN,
814};
815
d2702032
PB
816bool memory_region_access_valid(MemoryRegion *mr,
817 hwaddr addr,
818 unsigned size,
819 bool is_write)
093bc2cd 820{
a014ed07
PB
821 int access_size_min, access_size_max;
822 int access_size, i;
897fa7cf 823
093bc2cd
AK
824 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
825 return false;
826 }
827
a014ed07 828 if (!mr->ops->valid.accepts) {
093bc2cd
AK
829 return true;
830 }
831
a014ed07
PB
832 access_size_min = mr->ops->valid.min_access_size;
833 if (!mr->ops->valid.min_access_size) {
834 access_size_min = 1;
835 }
836
837 access_size_max = mr->ops->valid.max_access_size;
838 if (!mr->ops->valid.max_access_size) {
839 access_size_max = 4;
840 }
841
842 access_size = MAX(MIN(size, access_size_max), access_size_min);
843 for (i = 0; i < size; i += access_size) {
844 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
845 is_write)) {
846 return false;
847 }
093bc2cd 848 }
a014ed07 849
093bc2cd
AK
850 return true;
851}
852
a621f38d 853static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 854 hwaddr addr,
a621f38d 855 unsigned size)
093bc2cd 856{
164a4dcd 857 uint64_t data = 0;
093bc2cd 858
ce5d2f33
PB
859 if (mr->ops->read) {
860 access_with_adjusted_size(addr, &data, size,
861 mr->ops->impl.min_access_size,
862 mr->ops->impl.max_access_size,
863 memory_region_read_accessor, mr);
864 } else {
865 access_with_adjusted_size(addr, &data, size, 1, 4,
866 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
867 }
868
093bc2cd
AK
869 return data;
870}
871
a621f38d 872static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
093bc2cd 873{
a621f38d
AK
874 if (memory_region_wrong_endianness(mr)) {
875 switch (size) {
876 case 1:
877 break;
878 case 2:
879 *data = bswap16(*data);
880 break;
881 case 4:
882 *data = bswap32(*data);
1470a0cd 883 break;
968a5627
PB
884 case 8:
885 *data = bswap64(*data);
886 break;
a621f38d
AK
887 default:
888 abort();
889 }
890 }
891}
892
791af8c8
PB
893static bool memory_region_dispatch_read(MemoryRegion *mr,
894 hwaddr addr,
895 uint64_t *pval,
896 unsigned size)
a621f38d 897{
791af8c8
PB
898 if (!memory_region_access_valid(mr, addr, size, false)) {
899 *pval = unassigned_mem_read(mr, addr, size);
900 return true;
901 }
a621f38d 902
791af8c8
PB
903 *pval = memory_region_dispatch_read1(mr, addr, size);
904 adjust_endianness(mr, pval, size);
905 return false;
a621f38d 906}
093bc2cd 907
791af8c8 908static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 909 hwaddr addr,
a621f38d
AK
910 uint64_t data,
911 unsigned size)
912{
897fa7cf 913 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 914 unassigned_mem_write(mr, addr, data, size);
791af8c8 915 return true;
093bc2cd
AK
916 }
917
a621f38d
AK
918 adjust_endianness(mr, &data, size);
919
ce5d2f33
PB
920 if (mr->ops->write) {
921 access_with_adjusted_size(addr, &data, size,
922 mr->ops->impl.min_access_size,
923 mr->ops->impl.max_access_size,
924 memory_region_write_accessor, mr);
925 } else {
926 access_with_adjusted_size(addr, &data, size, 1, 4,
927 memory_region_oldmmio_write_accessor, mr);
74901c3b 928 }
791af8c8 929 return false;
093bc2cd
AK
930}
931
093bc2cd 932void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 933 Object *owner,
093bc2cd
AK
934 const MemoryRegionOps *ops,
935 void *opaque,
936 const char *name,
937 uint64_t size)
938{
2c9b15ca 939 memory_region_init(mr, owner, name, size);
093bc2cd
AK
940 mr->ops = ops;
941 mr->opaque = opaque;
14a3c10a 942 mr->terminates = true;
97161e17 943 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
944}
945
946void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 947 Object *owner,
093bc2cd
AK
948 const char *name,
949 uint64_t size)
950{
2c9b15ca 951 memory_region_init(mr, owner, name, size);
8ea9252a 952 mr->ram = true;
14a3c10a 953 mr->terminates = true;
545e92e0 954 mr->destructor = memory_region_destructor_ram;
c5705a77 955 mr->ram_addr = qemu_ram_alloc(size, mr);
093bc2cd
AK
956}
957
958void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 959 Object *owner,
093bc2cd
AK
960 const char *name,
961 uint64_t size,
962 void *ptr)
963{
2c9b15ca 964 memory_region_init(mr, owner, name, size);
8ea9252a 965 mr->ram = true;
14a3c10a 966 mr->terminates = true;
545e92e0 967 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 968 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
969}
970
971void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 972 Object *owner,
093bc2cd
AK
973 const char *name,
974 MemoryRegion *orig,
a8170e5e 975 hwaddr offset,
093bc2cd
AK
976 uint64_t size)
977{
2c9b15ca 978 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
979 memory_region_ref(orig);
980 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
981 mr->alias = orig;
982 mr->alias_offset = offset;
983}
984
d0a9b5bc 985void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 986 Object *owner,
d0a9b5bc 987 const MemoryRegionOps *ops,
75f5941c 988 void *opaque,
d0a9b5bc
AK
989 const char *name,
990 uint64_t size)
991{
2c9b15ca 992 memory_region_init(mr, owner, name, size);
7bc2b9cd 993 mr->ops = ops;
75f5941c 994 mr->opaque = opaque;
d0a9b5bc 995 mr->terminates = true;
75c578dc 996 mr->rom_device = true;
d0a9b5bc 997 mr->destructor = memory_region_destructor_rom_device;
c5705a77 998 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
999}
1000
30951157 1001void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1002 Object *owner,
30951157
AK
1003 const MemoryRegionIOMMUOps *ops,
1004 const char *name,
1005 uint64_t size)
1006{
2c9b15ca 1007 memory_region_init(mr, owner, name, size);
30951157
AK
1008 mr->iommu_ops = ops,
1009 mr->terminates = true; /* then re-forwards */
06866575 1010 notifier_list_init(&mr->iommu_notify);
30951157
AK
1011}
1012
1660e72d 1013void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1014 Object *owner,
1660e72d
JK
1015 const char *name,
1016 uint64_t size)
1017{
2c9b15ca 1018 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1019}
1020
093bc2cd
AK
1021void memory_region_destroy(MemoryRegion *mr)
1022{
1023 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1024 assert(memory_region_transaction_depth == 0);
545e92e0 1025 mr->destructor(mr);
093bc2cd 1026 memory_region_clear_coalescing(mr);
7267c094
AL
1027 g_free((char *)mr->name);
1028 g_free(mr->ioeventfds);
093bc2cd
AK
1029}
1030
803c0816
PB
1031Object *memory_region_owner(MemoryRegion *mr)
1032{
1033 return mr->owner;
1034}
1035
46637be2
PB
1036void memory_region_ref(MemoryRegion *mr)
1037{
1038 if (mr && mr->owner) {
1039 object_ref(mr->owner);
1040 }
1041}
1042
1043void memory_region_unref(MemoryRegion *mr)
1044{
1045 if (mr && mr->owner) {
1046 object_unref(mr->owner);
1047 }
1048}
1049
093bc2cd
AK
1050uint64_t memory_region_size(MemoryRegion *mr)
1051{
08dafab4
AK
1052 if (int128_eq(mr->size, int128_2_64())) {
1053 return UINT64_MAX;
1054 }
1055 return int128_get64(mr->size);
093bc2cd
AK
1056}
1057
8991c79b
AK
1058const char *memory_region_name(MemoryRegion *mr)
1059{
1060 return mr->name;
1061}
1062
8ea9252a
AK
1063bool memory_region_is_ram(MemoryRegion *mr)
1064{
1065 return mr->ram;
1066}
1067
55043ba3
AK
1068bool memory_region_is_logging(MemoryRegion *mr)
1069{
1070 return mr->dirty_log_mask;
1071}
1072
ce7923da
AK
1073bool memory_region_is_rom(MemoryRegion *mr)
1074{
1075 return mr->ram && mr->readonly;
1076}
1077
30951157
AK
1078bool memory_region_is_iommu(MemoryRegion *mr)
1079{
1080 return mr->iommu_ops;
1081}
1082
06866575
DG
1083void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1084{
1085 notifier_list_add(&mr->iommu_notify, n);
1086}
1087
1088void memory_region_unregister_iommu_notifier(Notifier *n)
1089{
1090 notifier_remove(n);
1091}
1092
1093void memory_region_notify_iommu(MemoryRegion *mr,
1094 IOMMUTLBEntry entry)
1095{
1096 assert(memory_region_is_iommu(mr));
1097 notifier_list_notify(&mr->iommu_notify, &entry);
1098}
1099
093bc2cd
AK
1100void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1101{
5a583347
AK
1102 uint8_t mask = 1 << client;
1103
59023ef4 1104 memory_region_transaction_begin();
5a583347 1105 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1106 memory_region_update_pending |= mr->enabled;
59023ef4 1107 memory_region_transaction_commit();
093bc2cd
AK
1108}
1109
a8170e5e
AK
1110bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1111 hwaddr size, unsigned client)
093bc2cd 1112{
14a3c10a 1113 assert(mr->terminates);
cd7a45c9
BS
1114 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1115 1 << client);
093bc2cd
AK
1116}
1117
a8170e5e
AK
1118void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1119 hwaddr size)
093bc2cd 1120{
14a3c10a 1121 assert(mr->terminates);
fd4aa979 1122 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
093bc2cd
AK
1123}
1124
6c279db8
JQ
1125bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1126 hwaddr size, unsigned client)
1127{
1128 bool ret;
1129 assert(mr->terminates);
1130 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1131 1 << client);
1132 if (ret) {
1133 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1134 mr->ram_addr + addr + size,
1135 1 << client);
1136 }
1137 return ret;
1138}
1139
1140
093bc2cd
AK
1141void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1142{
0d673e36 1143 AddressSpace *as;
5a583347
AK
1144 FlatRange *fr;
1145
0d673e36
AK
1146 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1147 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1148 if (fr->mr == mr) {
1149 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1150 }
5a583347
AK
1151 }
1152 }
093bc2cd
AK
1153}
1154
1155void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1156{
fb1cd6f9 1157 if (mr->readonly != readonly) {
59023ef4 1158 memory_region_transaction_begin();
fb1cd6f9 1159 mr->readonly = readonly;
22bde714 1160 memory_region_update_pending |= mr->enabled;
59023ef4 1161 memory_region_transaction_commit();
fb1cd6f9 1162 }
093bc2cd
AK
1163}
1164
5f9a5ea1 1165void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1166{
5f9a5ea1 1167 if (mr->romd_mode != romd_mode) {
59023ef4 1168 memory_region_transaction_begin();
5f9a5ea1 1169 mr->romd_mode = romd_mode;
22bde714 1170 memory_region_update_pending |= mr->enabled;
59023ef4 1171 memory_region_transaction_commit();
d0a9b5bc
AK
1172 }
1173}
1174
a8170e5e
AK
1175void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1176 hwaddr size, unsigned client)
093bc2cd 1177{
14a3c10a 1178 assert(mr->terminates);
5a583347
AK
1179 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1180 mr->ram_addr + addr + size,
1181 1 << client);
093bc2cd
AK
1182}
1183
1184void *memory_region_get_ram_ptr(MemoryRegion *mr)
1185{
1186 if (mr->alias) {
1187 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1188 }
1189
14a3c10a 1190 assert(mr->terminates);
093bc2cd 1191
021d26d1 1192 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1193}
1194
0d673e36 1195static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd
AK
1196{
1197 FlatRange *fr;
1198 CoalescedMemoryRange *cmr;
1199 AddrRange tmp;
95d2994a 1200 MemoryRegionSection section;
093bc2cd 1201
0d673e36 1202 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
093bc2cd 1203 if (fr->mr == mr) {
95d2994a 1204 section = (MemoryRegionSection) {
f6790af6 1205 .address_space = as,
95d2994a 1206 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1207 .size = fr->addr.size,
95d2994a
AK
1208 };
1209
1210 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1211 int128_get64(fr->addr.start),
1212 int128_get64(fr->addr.size));
093bc2cd
AK
1213 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1214 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1215 int128_sub(fr->addr.start,
1216 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1217 if (!addrrange_intersects(tmp, fr->addr)) {
1218 continue;
1219 }
1220 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1221 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1222 int128_get64(tmp.start),
1223 int128_get64(tmp.size));
093bc2cd
AK
1224 }
1225 }
1226 }
1227}
1228
0d673e36
AK
1229static void memory_region_update_coalesced_range(MemoryRegion *mr)
1230{
1231 AddressSpace *as;
1232
1233 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1234 memory_region_update_coalesced_range_as(mr, as);
1235 }
1236}
1237
093bc2cd
AK
1238void memory_region_set_coalescing(MemoryRegion *mr)
1239{
1240 memory_region_clear_coalescing(mr);
08dafab4 1241 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1242}
1243
1244void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1245 hwaddr offset,
093bc2cd
AK
1246 uint64_t size)
1247{
7267c094 1248 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1249
08dafab4 1250 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1251 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1252 memory_region_update_coalesced_range(mr);
d410515e 1253 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1254}
1255
1256void memory_region_clear_coalescing(MemoryRegion *mr)
1257{
1258 CoalescedMemoryRange *cmr;
1259
d410515e
JK
1260 qemu_flush_coalesced_mmio_buffer();
1261 mr->flush_coalesced_mmio = false;
1262
093bc2cd
AK
1263 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1264 cmr = QTAILQ_FIRST(&mr->coalesced);
1265 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1266 g_free(cmr);
093bc2cd
AK
1267 }
1268 memory_region_update_coalesced_range(mr);
1269}
1270
d410515e
JK
1271void memory_region_set_flush_coalesced(MemoryRegion *mr)
1272{
1273 mr->flush_coalesced_mmio = true;
1274}
1275
1276void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1277{
1278 qemu_flush_coalesced_mmio_buffer();
1279 if (QTAILQ_EMPTY(&mr->coalesced)) {
1280 mr->flush_coalesced_mmio = false;
1281 }
1282}
1283
3e9d69e7 1284void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1285 hwaddr addr,
3e9d69e7
AK
1286 unsigned size,
1287 bool match_data,
1288 uint64_t data,
753d5e14 1289 EventNotifier *e)
3e9d69e7
AK
1290{
1291 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1292 .addr.start = int128_make64(addr),
1293 .addr.size = int128_make64(size),
3e9d69e7
AK
1294 .match_data = match_data,
1295 .data = data,
753d5e14 1296 .e = e,
3e9d69e7
AK
1297 };
1298 unsigned i;
1299
28f362be 1300 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1301 memory_region_transaction_begin();
3e9d69e7
AK
1302 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1303 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1304 break;
1305 }
1306 }
1307 ++mr->ioeventfd_nb;
7267c094 1308 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1309 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1310 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1311 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1312 mr->ioeventfds[i] = mrfd;
22bde714 1313 memory_region_update_pending |= mr->enabled;
59023ef4 1314 memory_region_transaction_commit();
3e9d69e7
AK
1315}
1316
1317void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1318 hwaddr addr,
3e9d69e7
AK
1319 unsigned size,
1320 bool match_data,
1321 uint64_t data,
753d5e14 1322 EventNotifier *e)
3e9d69e7
AK
1323{
1324 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1325 .addr.start = int128_make64(addr),
1326 .addr.size = int128_make64(size),
3e9d69e7
AK
1327 .match_data = match_data,
1328 .data = data,
753d5e14 1329 .e = e,
3e9d69e7
AK
1330 };
1331 unsigned i;
1332
28f362be 1333 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1334 memory_region_transaction_begin();
3e9d69e7
AK
1335 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1336 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1337 break;
1338 }
1339 }
1340 assert(i != mr->ioeventfd_nb);
1341 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1342 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1343 --mr->ioeventfd_nb;
7267c094 1344 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1345 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
22bde714 1346 memory_region_update_pending |= mr->enabled;
59023ef4 1347 memory_region_transaction_commit();
3e9d69e7
AK
1348}
1349
093bc2cd 1350static void memory_region_add_subregion_common(MemoryRegion *mr,
a8170e5e 1351 hwaddr offset,
093bc2cd
AK
1352 MemoryRegion *subregion)
1353{
1354 MemoryRegion *other;
1355
59023ef4
JK
1356 memory_region_transaction_begin();
1357
093bc2cd 1358 assert(!subregion->parent);
dfde4e6e 1359 memory_region_ref(subregion);
093bc2cd
AK
1360 subregion->parent = mr;
1361 subregion->addr = offset;
1362 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1363 if (subregion->may_overlap || other->may_overlap) {
1364 continue;
1365 }
2c7cfd65 1366 if (int128_ge(int128_make64(offset),
08dafab4
AK
1367 int128_add(int128_make64(other->addr), other->size))
1368 || int128_le(int128_add(int128_make64(offset), subregion->size),
1369 int128_make64(other->addr))) {
093bc2cd
AK
1370 continue;
1371 }
a5e1cbc8 1372#if 0
860329b2
MW
1373 printf("warning: subregion collision %llx/%llx (%s) "
1374 "vs %llx/%llx (%s)\n",
093bc2cd 1375 (unsigned long long)offset,
08dafab4 1376 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1377 subregion->name,
1378 (unsigned long long)other->addr,
08dafab4 1379 (unsigned long long)int128_get64(other->size),
860329b2 1380 other->name);
a5e1cbc8 1381#endif
093bc2cd
AK
1382 }
1383 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1384 if (subregion->priority >= other->priority) {
1385 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1386 goto done;
1387 }
1388 }
1389 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1390done:
22bde714 1391 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1392 memory_region_transaction_commit();
093bc2cd
AK
1393}
1394
1395
1396void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1397 hwaddr offset,
093bc2cd
AK
1398 MemoryRegion *subregion)
1399{
1400 subregion->may_overlap = false;
1401 subregion->priority = 0;
1402 memory_region_add_subregion_common(mr, offset, subregion);
1403}
1404
1405void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1406 hwaddr offset,
093bc2cd
AK
1407 MemoryRegion *subregion,
1408 unsigned priority)
1409{
1410 subregion->may_overlap = true;
1411 subregion->priority = priority;
1412 memory_region_add_subregion_common(mr, offset, subregion);
1413}
1414
1415void memory_region_del_subregion(MemoryRegion *mr,
1416 MemoryRegion *subregion)
1417{
59023ef4 1418 memory_region_transaction_begin();
093bc2cd
AK
1419 assert(subregion->parent == mr);
1420 subregion->parent = NULL;
1421 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1422 memory_region_unref(subregion);
22bde714 1423 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1424 memory_region_transaction_commit();
6bba19ba
AK
1425}
1426
1427void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1428{
1429 if (enabled == mr->enabled) {
1430 return;
1431 }
59023ef4 1432 memory_region_transaction_begin();
6bba19ba 1433 mr->enabled = enabled;
22bde714 1434 memory_region_update_pending = true;
59023ef4 1435 memory_region_transaction_commit();
093bc2cd 1436}
1c0ffa58 1437
a8170e5e 1438void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2282e1af
AK
1439{
1440 MemoryRegion *parent = mr->parent;
1441 unsigned priority = mr->priority;
1442 bool may_overlap = mr->may_overlap;
1443
1444 if (addr == mr->addr || !parent) {
1445 mr->addr = addr;
1446 return;
1447 }
1448
1449 memory_region_transaction_begin();
dfde4e6e 1450 memory_region_ref(mr);
2282e1af
AK
1451 memory_region_del_subregion(parent, mr);
1452 if (may_overlap) {
1453 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1454 } else {
1455 memory_region_add_subregion(parent, addr, mr);
1456 }
dfde4e6e 1457 memory_region_unref(mr);
2282e1af
AK
1458 memory_region_transaction_commit();
1459}
1460
a8170e5e 1461void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1462{
4703359e 1463 assert(mr->alias);
4703359e 1464
59023ef4 1465 if (offset == mr->alias_offset) {
4703359e
AK
1466 return;
1467 }
1468
59023ef4
JK
1469 memory_region_transaction_begin();
1470 mr->alias_offset = offset;
22bde714 1471 memory_region_update_pending |= mr->enabled;
59023ef4 1472 memory_region_transaction_commit();
4703359e
AK
1473}
1474
e34911c4
AK
1475ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1476{
e34911c4
AK
1477 return mr->ram_addr;
1478}
1479
e2177955
AK
1480static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1481{
1482 const AddrRange *addr = addr_;
1483 const FlatRange *fr = fr_;
1484
1485 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1486 return -1;
1487 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1488 return 1;
1489 }
1490 return 0;
1491}
1492
1493static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1494{
8786db7c 1495 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
e2177955
AK
1496 sizeof(FlatRange), cmp_flatrange_addr);
1497}
1498
3ce10901
PB
1499bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1500{
1501 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1502 if (!mr) {
1503 return false;
1504 }
dfde4e6e 1505 memory_region_unref(mr);
3ce10901
PB
1506 return true;
1507}
1508
73034e9e 1509MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1510 hwaddr addr, uint64_t size)
e2177955 1511{
052e87b0 1512 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1513 MemoryRegion *root;
1514 AddressSpace *as;
1515 AddrRange range;
1516 FlatRange *fr;
1517
1518 addr += mr->addr;
1519 for (root = mr; root->parent; ) {
1520 root = root->parent;
1521 addr += root->addr;
1522 }
e2177955 1523
73034e9e
PB
1524 as = memory_region_to_address_space(root);
1525 range = addrrange_make(int128_make64(addr), int128_make64(size));
1526 fr = address_space_lookup(as, range);
e2177955
AK
1527 if (!fr) {
1528 return ret;
1529 }
1530
8786db7c 1531 while (fr > as->current_map->ranges
e2177955
AK
1532 && addrrange_intersects(fr[-1].addr, range)) {
1533 --fr;
1534 }
1535
1536 ret.mr = fr->mr;
73034e9e 1537 ret.address_space = as;
e2177955
AK
1538 range = addrrange_intersection(range, fr->addr);
1539 ret.offset_within_region = fr->offset_in_region;
1540 ret.offset_within_region += int128_get64(int128_sub(range.start,
1541 fr->addr.start));
052e87b0 1542 ret.size = range.size;
e2177955 1543 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1544 ret.readonly = fr->readonly;
dfde4e6e
PB
1545 memory_region_ref(ret.mr);
1546
e2177955
AK
1547 return ret;
1548}
1549
1d671369 1550void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1551{
7664e80c
AK
1552 FlatRange *fr;
1553
8786db7c 1554 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
72e22d2f 1555 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c
AK
1556 }
1557}
1558
1559void memory_global_dirty_log_start(void)
1560{
7664e80c 1561 global_dirty_log = true;
7376e582 1562 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1563}
1564
1565void memory_global_dirty_log_stop(void)
1566{
7664e80c 1567 global_dirty_log = false;
7376e582 1568 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1569}
1570
1571static void listener_add_address_space(MemoryListener *listener,
1572 AddressSpace *as)
1573{
1574 FlatRange *fr;
1575
221b3a3f 1576 if (listener->address_space_filter
f6790af6 1577 && listener->address_space_filter != as) {
221b3a3f
JG
1578 return;
1579 }
1580
7664e80c 1581 if (global_dirty_log) {
975aefe0
AK
1582 if (listener->log_global_start) {
1583 listener->log_global_start(listener);
1584 }
7664e80c 1585 }
975aefe0 1586
8786db7c 1587 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
7664e80c
AK
1588 MemoryRegionSection section = {
1589 .mr = fr->mr,
f6790af6 1590 .address_space = as,
7664e80c 1591 .offset_within_region = fr->offset_in_region,
052e87b0 1592 .size = fr->addr.size,
7664e80c 1593 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1594 .readonly = fr->readonly,
7664e80c 1595 };
975aefe0
AK
1596 if (listener->region_add) {
1597 listener->region_add(listener, &section);
1598 }
7664e80c
AK
1599 }
1600}
1601
f6790af6 1602void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1603{
72e22d2f 1604 MemoryListener *other = NULL;
0d673e36 1605 AddressSpace *as;
72e22d2f 1606
7376e582 1607 listener->address_space_filter = filter;
72e22d2f
AK
1608 if (QTAILQ_EMPTY(&memory_listeners)
1609 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1610 memory_listeners)->priority) {
1611 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1612 } else {
1613 QTAILQ_FOREACH(other, &memory_listeners, link) {
1614 if (listener->priority < other->priority) {
1615 break;
1616 }
1617 }
1618 QTAILQ_INSERT_BEFORE(other, listener, link);
1619 }
0d673e36
AK
1620
1621 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1622 listener_add_address_space(listener, as);
1623 }
7664e80c
AK
1624}
1625
1626void memory_listener_unregister(MemoryListener *listener)
1627{
72e22d2f 1628 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1629}
e2177955 1630
7dca8043 1631void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1632{
59023ef4 1633 memory_region_transaction_begin();
8786db7c
AK
1634 as->root = root;
1635 as->current_map = g_new(FlatView, 1);
1636 flatview_init(as->current_map);
4c19eb72
AK
1637 as->ioeventfd_nb = 0;
1638 as->ioeventfds = NULL;
0d673e36 1639 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1640 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1641 address_space_init_dispatch(as);
f43793c7
PB
1642 memory_region_update_pending |= root->enabled;
1643 memory_region_transaction_commit();
1c0ffa58 1644}
658b2224 1645
83f3c251
AK
1646void address_space_destroy(AddressSpace *as)
1647{
1648 /* Flush out anything from MemoryListeners listening in on this */
1649 memory_region_transaction_begin();
1650 as->root = NULL;
1651 memory_region_transaction_commit();
1652 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1653 address_space_destroy_dispatch(as);
1654 flatview_destroy(as->current_map);
7dca8043 1655 g_free(as->name);
83f3c251 1656 g_free(as->current_map);
4c19eb72 1657 g_free(as->ioeventfds);
83f3c251
AK
1658}
1659
791af8c8 1660bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1661{
791af8c8 1662 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1663}
1664
791af8c8 1665bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1666 uint64_t val, unsigned size)
1667{
791af8c8 1668 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1669}
1670
314e2987
BS
1671typedef struct MemoryRegionList MemoryRegionList;
1672
1673struct MemoryRegionList {
1674 const MemoryRegion *mr;
1675 bool printed;
1676 QTAILQ_ENTRY(MemoryRegionList) queue;
1677};
1678
1679typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1680
1681static void mtree_print_mr(fprintf_function mon_printf, void *f,
1682 const MemoryRegion *mr, unsigned int level,
a8170e5e 1683 hwaddr base,
9479c57a 1684 MemoryRegionListHead *alias_print_queue)
314e2987 1685{
9479c57a
JK
1686 MemoryRegionList *new_ml, *ml, *next_ml;
1687 MemoryRegionListHead submr_print_queue;
314e2987
BS
1688 const MemoryRegion *submr;
1689 unsigned int i;
1690
7ea692b2 1691 if (!mr || !mr->enabled) {
314e2987
BS
1692 return;
1693 }
1694
1695 for (i = 0; i < level; i++) {
1696 mon_printf(f, " ");
1697 }
1698
1699 if (mr->alias) {
1700 MemoryRegionList *ml;
1701 bool found = false;
1702
1703 /* check if the alias is already in the queue */
9479c57a 1704 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1705 if (ml->mr == mr->alias && !ml->printed) {
1706 found = true;
1707 }
1708 }
1709
1710 if (!found) {
1711 ml = g_new(MemoryRegionList, 1);
1712 ml->mr = mr->alias;
1713 ml->printed = false;
9479c57a 1714 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1715 }
4896d74b
JK
1716 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1717 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1718 "-" TARGET_FMT_plx "\n",
314e2987 1719 base + mr->addr,
08dafab4 1720 base + mr->addr
052e87b0 1721 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
4b474ba7 1722 mr->priority,
5f9a5ea1
JK
1723 mr->romd_mode ? 'R' : '-',
1724 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1725 : '-',
314e2987
BS
1726 mr->name,
1727 mr->alias->name,
1728 mr->alias_offset,
08dafab4 1729 mr->alias_offset
a8170e5e 1730 + (hwaddr)int128_get64(mr->size) - 1);
314e2987 1731 } else {
4896d74b
JK
1732 mon_printf(f,
1733 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1734 base + mr->addr,
08dafab4 1735 base + mr->addr
052e87b0 1736 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
4b474ba7 1737 mr->priority,
5f9a5ea1
JK
1738 mr->romd_mode ? 'R' : '-',
1739 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1740 : '-',
314e2987
BS
1741 mr->name);
1742 }
9479c57a
JK
1743
1744 QTAILQ_INIT(&submr_print_queue);
1745
314e2987 1746 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1747 new_ml = g_new(MemoryRegionList, 1);
1748 new_ml->mr = submr;
1749 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1750 if (new_ml->mr->addr < ml->mr->addr ||
1751 (new_ml->mr->addr == ml->mr->addr &&
1752 new_ml->mr->priority > ml->mr->priority)) {
1753 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1754 new_ml = NULL;
1755 break;
1756 }
1757 }
1758 if (new_ml) {
1759 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1760 }
1761 }
1762
1763 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1764 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1765 alias_print_queue);
1766 }
1767
88365e47 1768 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1769 g_free(ml);
314e2987
BS
1770 }
1771}
1772
1773void mtree_info(fprintf_function mon_printf, void *f)
1774{
1775 MemoryRegionListHead ml_head;
1776 MemoryRegionList *ml, *ml2;
0d673e36 1777 AddressSpace *as;
314e2987
BS
1778
1779 QTAILQ_INIT(&ml_head);
1780
0d673e36 1781 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
0d673e36
AK
1782 mon_printf(f, "%s\n", as->name);
1783 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
1784 }
1785
1786 mon_printf(f, "aliases\n");
314e2987
BS
1787 /* print aliased regions */
1788 QTAILQ_FOREACH(ml, &ml_head, queue) {
1789 if (!ml->printed) {
1790 mon_printf(f, "%s\n", ml->mr->name);
1791 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1792 }
1793 }
1794
1795 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1796 g_free(ml);
314e2987 1797 }
314e2987 1798}