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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
16 | #include "memory.h" | |
1c0ffa58 | 17 | #include "exec-memory.h" |
658b2224 | 18 | #include "ioport.h" |
74901c3b | 19 | #include "bitops.h" |
3e9d69e7 | 20 | #include "kvm.h" |
093bc2cd AK |
21 | #include <assert.h> |
22 | ||
67d95c15 AK |
23 | #define WANT_EXEC_OBSOLETE |
24 | #include "exec-obsolete.h" | |
25 | ||
4ef4db86 | 26 | unsigned memory_region_transaction_depth = 0; |
e87c099f | 27 | static bool memory_region_update_pending = false; |
7664e80c AK |
28 | static bool global_dirty_log = false; |
29 | ||
72e22d2f AK |
30 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
31 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 32 | |
093bc2cd AK |
33 | typedef struct AddrRange AddrRange; |
34 | ||
8417cebf AK |
35 | /* |
36 | * Note using signed integers limits us to physical addresses at most | |
37 | * 63 bits wide. They are needed for negative offsetting in aliases | |
38 | * (large MemoryRegion::alias_offset). | |
39 | */ | |
093bc2cd | 40 | struct AddrRange { |
08dafab4 AK |
41 | Int128 start; |
42 | Int128 size; | |
093bc2cd AK |
43 | }; |
44 | ||
08dafab4 | 45 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
46 | { |
47 | return (AddrRange) { start, size }; | |
48 | } | |
49 | ||
50 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
51 | { | |
08dafab4 | 52 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
53 | } |
54 | ||
08dafab4 | 55 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 56 | { |
08dafab4 | 57 | return int128_add(r.start, r.size); |
093bc2cd AK |
58 | } |
59 | ||
08dafab4 | 60 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 61 | { |
08dafab4 | 62 | int128_addto(&range.start, delta); |
093bc2cd AK |
63 | return range; |
64 | } | |
65 | ||
08dafab4 AK |
66 | static bool addrrange_contains(AddrRange range, Int128 addr) |
67 | { | |
68 | return int128_ge(addr, range.start) | |
69 | && int128_lt(addr, addrrange_end(range)); | |
70 | } | |
71 | ||
093bc2cd AK |
72 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
73 | { | |
08dafab4 AK |
74 | return addrrange_contains(r1, r2.start) |
75 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
76 | } |
77 | ||
78 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
79 | { | |
08dafab4 AK |
80 | Int128 start = int128_max(r1.start, r2.start); |
81 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
82 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
83 | } |
84 | ||
85 | struct CoalescedMemoryRange { | |
86 | AddrRange addr; | |
87 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
88 | }; | |
89 | ||
3e9d69e7 AK |
90 | struct MemoryRegionIoeventfd { |
91 | AddrRange addr; | |
92 | bool match_data; | |
93 | uint64_t data; | |
94 | int fd; | |
95 | }; | |
96 | ||
97 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
98 | MemoryRegionIoeventfd b) | |
99 | { | |
08dafab4 | 100 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 101 | return true; |
08dafab4 | 102 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 103 | return false; |
08dafab4 | 104 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 105 | return true; |
08dafab4 | 106 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
107 | return false; |
108 | } else if (a.match_data < b.match_data) { | |
109 | return true; | |
110 | } else if (a.match_data > b.match_data) { | |
111 | return false; | |
112 | } else if (a.match_data) { | |
113 | if (a.data < b.data) { | |
114 | return true; | |
115 | } else if (a.data > b.data) { | |
116 | return false; | |
117 | } | |
118 | } | |
119 | if (a.fd < b.fd) { | |
120 | return true; | |
121 | } else if (a.fd > b.fd) { | |
122 | return false; | |
123 | } | |
124 | return false; | |
125 | } | |
126 | ||
127 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
128 | MemoryRegionIoeventfd b) | |
129 | { | |
130 | return !memory_region_ioeventfd_before(a, b) | |
131 | && !memory_region_ioeventfd_before(b, a); | |
132 | } | |
133 | ||
093bc2cd AK |
134 | typedef struct FlatRange FlatRange; |
135 | typedef struct FlatView FlatView; | |
136 | ||
137 | /* Range of memory in the global map. Addresses are absolute. */ | |
138 | struct FlatRange { | |
139 | MemoryRegion *mr; | |
140 | target_phys_addr_t offset_in_region; | |
141 | AddrRange addr; | |
5a583347 | 142 | uint8_t dirty_log_mask; |
d0a9b5bc | 143 | bool readable; |
fb1cd6f9 | 144 | bool readonly; |
093bc2cd AK |
145 | }; |
146 | ||
147 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
148 | * order. | |
149 | */ | |
150 | struct FlatView { | |
151 | FlatRange *ranges; | |
152 | unsigned nr; | |
153 | unsigned nr_allocated; | |
154 | }; | |
155 | ||
cc31e6e7 AK |
156 | typedef struct AddressSpace AddressSpace; |
157 | typedef struct AddressSpaceOps AddressSpaceOps; | |
158 | ||
159 | /* A system address space - I/O, memory, etc. */ | |
160 | struct AddressSpace { | |
161 | const AddressSpaceOps *ops; | |
162 | MemoryRegion *root; | |
163 | FlatView current_map; | |
3e9d69e7 AK |
164 | int ioeventfd_nb; |
165 | MemoryRegionIoeventfd *ioeventfds; | |
cc31e6e7 AK |
166 | }; |
167 | ||
168 | struct AddressSpaceOps { | |
169 | void (*range_add)(AddressSpace *as, FlatRange *fr); | |
170 | void (*range_del)(AddressSpace *as, FlatRange *fr); | |
171 | void (*log_start)(AddressSpace *as, FlatRange *fr); | |
172 | void (*log_stop)(AddressSpace *as, FlatRange *fr); | |
3e9d69e7 AK |
173 | void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd); |
174 | void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd); | |
cc31e6e7 AK |
175 | }; |
176 | ||
093bc2cd AK |
177 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
178 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
179 | ||
093bc2cd AK |
180 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
181 | { | |
182 | return a->mr == b->mr | |
183 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 184 | && a->offset_in_region == b->offset_in_region |
fb1cd6f9 AK |
185 | && a->readable == b->readable |
186 | && a->readonly == b->readonly; | |
093bc2cd AK |
187 | } |
188 | ||
189 | static void flatview_init(FlatView *view) | |
190 | { | |
191 | view->ranges = NULL; | |
192 | view->nr = 0; | |
193 | view->nr_allocated = 0; | |
194 | } | |
195 | ||
196 | /* Insert a range into a given position. Caller is responsible for maintaining | |
197 | * sorting order. | |
198 | */ | |
199 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
200 | { | |
201 | if (view->nr == view->nr_allocated) { | |
202 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 203 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
204 | view->nr_allocated * sizeof(*view->ranges)); |
205 | } | |
206 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
207 | (view->nr - pos) * sizeof(FlatRange)); | |
208 | view->ranges[pos] = *range; | |
209 | ++view->nr; | |
210 | } | |
211 | ||
212 | static void flatview_destroy(FlatView *view) | |
213 | { | |
7267c094 | 214 | g_free(view->ranges); |
093bc2cd AK |
215 | } |
216 | ||
3d8e6bf9 AK |
217 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
218 | { | |
08dafab4 | 219 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 220 | && r1->mr == r2->mr |
08dafab4 AK |
221 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
222 | r1->addr.size), | |
223 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 224 | && r1->dirty_log_mask == r2->dirty_log_mask |
fb1cd6f9 AK |
225 | && r1->readable == r2->readable |
226 | && r1->readonly == r2->readonly; | |
3d8e6bf9 AK |
227 | } |
228 | ||
229 | /* Attempt to simplify a view by merging ajacent ranges */ | |
230 | static void flatview_simplify(FlatView *view) | |
231 | { | |
232 | unsigned i, j; | |
233 | ||
234 | i = 0; | |
235 | while (i < view->nr) { | |
236 | j = i + 1; | |
237 | while (j < view->nr | |
238 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 239 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
240 | ++j; |
241 | } | |
242 | ++i; | |
243 | memmove(&view->ranges[i], &view->ranges[j], | |
244 | (view->nr - j) * sizeof(view->ranges[j])); | |
245 | view->nr -= j - i; | |
246 | } | |
247 | } | |
248 | ||
164a4dcd AK |
249 | static void memory_region_read_accessor(void *opaque, |
250 | target_phys_addr_t addr, | |
251 | uint64_t *value, | |
252 | unsigned size, | |
253 | unsigned shift, | |
254 | uint64_t mask) | |
255 | { | |
256 | MemoryRegion *mr = opaque; | |
257 | uint64_t tmp; | |
258 | ||
259 | tmp = mr->ops->read(mr->opaque, addr, size); | |
260 | *value |= (tmp & mask) << shift; | |
261 | } | |
262 | ||
263 | static void memory_region_write_accessor(void *opaque, | |
264 | target_phys_addr_t addr, | |
265 | uint64_t *value, | |
266 | unsigned size, | |
267 | unsigned shift, | |
268 | uint64_t mask) | |
269 | { | |
270 | MemoryRegion *mr = opaque; | |
271 | uint64_t tmp; | |
272 | ||
273 | tmp = (*value >> shift) & mask; | |
274 | mr->ops->write(mr->opaque, addr, tmp, size); | |
275 | } | |
276 | ||
277 | static void access_with_adjusted_size(target_phys_addr_t addr, | |
278 | uint64_t *value, | |
279 | unsigned size, | |
280 | unsigned access_size_min, | |
281 | unsigned access_size_max, | |
282 | void (*access)(void *opaque, | |
283 | target_phys_addr_t addr, | |
284 | uint64_t *value, | |
285 | unsigned size, | |
286 | unsigned shift, | |
287 | uint64_t mask), | |
288 | void *opaque) | |
289 | { | |
290 | uint64_t access_mask; | |
291 | unsigned access_size; | |
292 | unsigned i; | |
293 | ||
294 | if (!access_size_min) { | |
295 | access_size_min = 1; | |
296 | } | |
297 | if (!access_size_max) { | |
298 | access_size_max = 4; | |
299 | } | |
300 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
301 | access_mask = -1ULL >> (64 - access_size * 8); | |
302 | for (i = 0; i < size; i += access_size) { | |
303 | /* FIXME: big-endian support */ | |
304 | access(opaque, addr + i, value, access_size, i * 8, access_mask); | |
305 | } | |
306 | } | |
307 | ||
cc31e6e7 AK |
308 | static void as_memory_range_add(AddressSpace *as, FlatRange *fr) |
309 | { | |
dd81124b AK |
310 | MemoryRegionSection section = { |
311 | .mr = fr->mr, | |
312 | .offset_within_address_space = int128_get64(fr->addr.start), | |
313 | .offset_within_region = fr->offset_in_region, | |
314 | .size = int128_get64(fr->addr.size), | |
315 | }; | |
316 | ||
317 | cpu_register_physical_memory_log(§ion, fr->readable, fr->readonly); | |
cc31e6e7 AK |
318 | } |
319 | ||
320 | static void as_memory_range_del(AddressSpace *as, FlatRange *fr) | |
321 | { | |
dd81124b AK |
322 | MemoryRegionSection section = { |
323 | .mr = &io_mem_unassigned, | |
324 | .offset_within_address_space = int128_get64(fr->addr.start), | |
325 | .offset_within_region = int128_get64(fr->addr.start), | |
326 | .size = int128_get64(fr->addr.size), | |
327 | }; | |
328 | ||
329 | cpu_register_physical_memory_log(§ion, true, false); | |
cc31e6e7 AK |
330 | } |
331 | ||
332 | static void as_memory_log_start(AddressSpace *as, FlatRange *fr) | |
333 | { | |
cc31e6e7 AK |
334 | } |
335 | ||
336 | static void as_memory_log_stop(AddressSpace *as, FlatRange *fr) | |
337 | { | |
cc31e6e7 AK |
338 | } |
339 | ||
3e9d69e7 AK |
340 | static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd) |
341 | { | |
342 | int r; | |
343 | ||
08dafab4 | 344 | assert(fd->match_data && int128_get64(fd->addr.size) == 4); |
3e9d69e7 | 345 | |
08dafab4 AK |
346 | r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start), |
347 | fd->data, true); | |
3e9d69e7 AK |
348 | if (r < 0) { |
349 | abort(); | |
350 | } | |
351 | } | |
352 | ||
353 | static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd) | |
354 | { | |
355 | int r; | |
356 | ||
08dafab4 AK |
357 | r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start), |
358 | fd->data, false); | |
3e9d69e7 AK |
359 | if (r < 0) { |
360 | abort(); | |
361 | } | |
362 | } | |
363 | ||
cc31e6e7 AK |
364 | static const AddressSpaceOps address_space_ops_memory = { |
365 | .range_add = as_memory_range_add, | |
366 | .range_del = as_memory_range_del, | |
367 | .log_start = as_memory_log_start, | |
368 | .log_stop = as_memory_log_stop, | |
3e9d69e7 AK |
369 | .ioeventfd_add = as_memory_ioeventfd_add, |
370 | .ioeventfd_del = as_memory_ioeventfd_del, | |
cc31e6e7 AK |
371 | }; |
372 | ||
373 | static AddressSpace address_space_memory = { | |
374 | .ops = &address_space_ops_memory, | |
375 | }; | |
376 | ||
627a0e90 AK |
377 | static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
378 | unsigned width, bool write) | |
379 | { | |
380 | const MemoryRegionPortio *mrp; | |
381 | ||
382 | for (mrp = mr->ops->old_portio; mrp->size; ++mrp) { | |
383 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len | |
384 | && width == mrp->size | |
385 | && (write ? (bool)mrp->write : (bool)mrp->read)) { | |
386 | return mrp; | |
387 | } | |
388 | } | |
389 | return NULL; | |
390 | } | |
391 | ||
658b2224 AK |
392 | static void memory_region_iorange_read(IORange *iorange, |
393 | uint64_t offset, | |
394 | unsigned width, | |
395 | uint64_t *data) | |
396 | { | |
397 | MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); | |
398 | ||
627a0e90 AK |
399 | if (mr->ops->old_portio) { |
400 | const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false); | |
401 | ||
402 | *data = ((uint64_t)1 << (width * 8)) - 1; | |
403 | if (mrp) { | |
2b50aa1f | 404 | *data = mrp->read(mr->opaque, offset); |
03808f58 JK |
405 | } else if (width == 2) { |
406 | mrp = find_portio(mr, offset, 1, false); | |
407 | assert(mrp); | |
2b50aa1f AK |
408 | *data = mrp->read(mr->opaque, offset) | |
409 | (mrp->read(mr->opaque, offset + 1) << 8); | |
627a0e90 AK |
410 | } |
411 | return; | |
412 | } | |
3a130f4e | 413 | *data = 0; |
2b50aa1f | 414 | access_with_adjusted_size(offset, data, width, |
3a130f4e AK |
415 | mr->ops->impl.min_access_size, |
416 | mr->ops->impl.max_access_size, | |
417 | memory_region_read_accessor, mr); | |
658b2224 AK |
418 | } |
419 | ||
420 | static void memory_region_iorange_write(IORange *iorange, | |
421 | uint64_t offset, | |
422 | unsigned width, | |
423 | uint64_t data) | |
424 | { | |
425 | MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); | |
426 | ||
627a0e90 AK |
427 | if (mr->ops->old_portio) { |
428 | const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true); | |
429 | ||
430 | if (mrp) { | |
2b50aa1f | 431 | mrp->write(mr->opaque, offset, data); |
03808f58 JK |
432 | } else if (width == 2) { |
433 | mrp = find_portio(mr, offset, 1, false); | |
434 | assert(mrp); | |
2b50aa1f AK |
435 | mrp->write(mr->opaque, offset, data & 0xff); |
436 | mrp->write(mr->opaque, offset + 1, data >> 8); | |
627a0e90 AK |
437 | } |
438 | return; | |
439 | } | |
2b50aa1f | 440 | access_with_adjusted_size(offset, &data, width, |
3a130f4e AK |
441 | mr->ops->impl.min_access_size, |
442 | mr->ops->impl.max_access_size, | |
443 | memory_region_write_accessor, mr); | |
658b2224 AK |
444 | } |
445 | ||
446 | static const IORangeOps memory_region_iorange_ops = { | |
447 | .read = memory_region_iorange_read, | |
448 | .write = memory_region_iorange_write, | |
449 | }; | |
450 | ||
451 | static void as_io_range_add(AddressSpace *as, FlatRange *fr) | |
452 | { | |
453 | iorange_init(&fr->mr->iorange, &memory_region_iorange_ops, | |
08dafab4 | 454 | int128_get64(fr->addr.start), int128_get64(fr->addr.size)); |
658b2224 AK |
455 | ioport_register(&fr->mr->iorange); |
456 | } | |
457 | ||
458 | static void as_io_range_del(AddressSpace *as, FlatRange *fr) | |
459 | { | |
08dafab4 AK |
460 | isa_unassign_ioport(int128_get64(fr->addr.start), |
461 | int128_get64(fr->addr.size)); | |
658b2224 AK |
462 | } |
463 | ||
3e9d69e7 AK |
464 | static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd) |
465 | { | |
466 | int r; | |
467 | ||
08dafab4 | 468 | assert(fd->match_data && int128_get64(fd->addr.size) == 2); |
3e9d69e7 | 469 | |
08dafab4 AK |
470 | r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start), |
471 | fd->data, true); | |
3e9d69e7 AK |
472 | if (r < 0) { |
473 | abort(); | |
474 | } | |
475 | } | |
476 | ||
477 | static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd) | |
478 | { | |
479 | int r; | |
480 | ||
08dafab4 AK |
481 | r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start), |
482 | fd->data, false); | |
3e9d69e7 AK |
483 | if (r < 0) { |
484 | abort(); | |
485 | } | |
486 | } | |
487 | ||
658b2224 AK |
488 | static const AddressSpaceOps address_space_ops_io = { |
489 | .range_add = as_io_range_add, | |
490 | .range_del = as_io_range_del, | |
3e9d69e7 AK |
491 | .ioeventfd_add = as_io_ioeventfd_add, |
492 | .ioeventfd_del = as_io_ioeventfd_del, | |
658b2224 AK |
493 | }; |
494 | ||
495 | static AddressSpace address_space_io = { | |
496 | .ops = &address_space_ops_io, | |
497 | }; | |
498 | ||
e2177955 AK |
499 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
500 | { | |
501 | while (mr->parent) { | |
502 | mr = mr->parent; | |
503 | } | |
504 | if (mr == address_space_memory.root) { | |
505 | return &address_space_memory; | |
506 | } | |
507 | if (mr == address_space_io.root) { | |
508 | return &address_space_io; | |
509 | } | |
510 | abort(); | |
511 | } | |
512 | ||
093bc2cd AK |
513 | /* Render a memory region into the global view. Ranges in @view obscure |
514 | * ranges in @mr. | |
515 | */ | |
516 | static void render_memory_region(FlatView *view, | |
517 | MemoryRegion *mr, | |
08dafab4 | 518 | Int128 base, |
fb1cd6f9 AK |
519 | AddrRange clip, |
520 | bool readonly) | |
093bc2cd AK |
521 | { |
522 | MemoryRegion *subregion; | |
523 | unsigned i; | |
524 | target_phys_addr_t offset_in_region; | |
08dafab4 AK |
525 | Int128 remain; |
526 | Int128 now; | |
093bc2cd AK |
527 | FlatRange fr; |
528 | AddrRange tmp; | |
529 | ||
6bba19ba AK |
530 | if (!mr->enabled) { |
531 | return; | |
532 | } | |
533 | ||
08dafab4 | 534 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 535 | readonly |= mr->readonly; |
093bc2cd AK |
536 | |
537 | tmp = addrrange_make(base, mr->size); | |
538 | ||
539 | if (!addrrange_intersects(tmp, clip)) { | |
540 | return; | |
541 | } | |
542 | ||
543 | clip = addrrange_intersection(tmp, clip); | |
544 | ||
545 | if (mr->alias) { | |
08dafab4 AK |
546 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
547 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 548 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
549 | return; |
550 | } | |
551 | ||
552 | /* Render subregions in priority order. */ | |
553 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 554 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
555 | } |
556 | ||
14a3c10a | 557 | if (!mr->terminates) { |
093bc2cd AK |
558 | return; |
559 | } | |
560 | ||
08dafab4 | 561 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
562 | base = clip.start; |
563 | remain = clip.size; | |
564 | ||
565 | /* Render the region itself into any gaps left by the current view. */ | |
08dafab4 AK |
566 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
567 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
568 | continue; |
569 | } | |
08dafab4 AK |
570 | if (int128_lt(base, view->ranges[i].addr.start)) { |
571 | now = int128_min(remain, | |
572 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
573 | fr.mr = mr; |
574 | fr.offset_in_region = offset_in_region; | |
575 | fr.addr = addrrange_make(base, now); | |
5a583347 | 576 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 577 | fr.readable = mr->readable; |
fb1cd6f9 | 578 | fr.readonly = readonly; |
093bc2cd AK |
579 | flatview_insert(view, i, &fr); |
580 | ++i; | |
08dafab4 AK |
581 | int128_addto(&base, now); |
582 | offset_in_region += int128_get64(now); | |
583 | int128_subfrom(&remain, now); | |
093bc2cd | 584 | } |
08dafab4 AK |
585 | if (int128_eq(base, view->ranges[i].addr.start)) { |
586 | now = int128_min(remain, view->ranges[i].addr.size); | |
587 | int128_addto(&base, now); | |
588 | offset_in_region += int128_get64(now); | |
589 | int128_subfrom(&remain, now); | |
093bc2cd AK |
590 | } |
591 | } | |
08dafab4 | 592 | if (int128_nz(remain)) { |
093bc2cd AK |
593 | fr.mr = mr; |
594 | fr.offset_in_region = offset_in_region; | |
595 | fr.addr = addrrange_make(base, remain); | |
5a583347 | 596 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 597 | fr.readable = mr->readable; |
fb1cd6f9 | 598 | fr.readonly = readonly; |
093bc2cd AK |
599 | flatview_insert(view, i, &fr); |
600 | } | |
601 | } | |
602 | ||
603 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
604 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
605 | { | |
606 | FlatView view; | |
607 | ||
608 | flatview_init(&view); | |
609 | ||
08dafab4 AK |
610 | render_memory_region(&view, mr, int128_zero(), |
611 | addrrange_make(int128_zero(), int128_2_64()), false); | |
3d8e6bf9 | 612 | flatview_simplify(&view); |
093bc2cd AK |
613 | |
614 | return view; | |
615 | } | |
616 | ||
3e9d69e7 AK |
617 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
618 | MemoryRegionIoeventfd *fds_new, | |
619 | unsigned fds_new_nb, | |
620 | MemoryRegionIoeventfd *fds_old, | |
621 | unsigned fds_old_nb) | |
622 | { | |
623 | unsigned iold, inew; | |
624 | ||
625 | /* Generate a symmetric difference of the old and new fd sets, adding | |
626 | * and deleting as necessary. | |
627 | */ | |
628 | ||
629 | iold = inew = 0; | |
630 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
631 | if (iold < fds_old_nb | |
632 | && (inew == fds_new_nb | |
633 | || memory_region_ioeventfd_before(fds_old[iold], | |
634 | fds_new[inew]))) { | |
635 | as->ops->ioeventfd_del(as, &fds_old[iold]); | |
636 | ++iold; | |
637 | } else if (inew < fds_new_nb | |
638 | && (iold == fds_old_nb | |
639 | || memory_region_ioeventfd_before(fds_new[inew], | |
640 | fds_old[iold]))) { | |
641 | as->ops->ioeventfd_add(as, &fds_new[inew]); | |
642 | ++inew; | |
643 | } else { | |
644 | ++iold; | |
645 | ++inew; | |
646 | } | |
647 | } | |
648 | } | |
649 | ||
650 | static void address_space_update_ioeventfds(AddressSpace *as) | |
651 | { | |
652 | FlatRange *fr; | |
653 | unsigned ioeventfd_nb = 0; | |
654 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
655 | AddrRange tmp; | |
656 | unsigned i; | |
657 | ||
658 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
659 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { | |
660 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
661 | int128_sub(fr->addr.start, |
662 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
663 | if (addrrange_intersects(fr->addr, tmp)) { |
664 | ++ioeventfd_nb; | |
7267c094 | 665 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
666 | ioeventfd_nb * sizeof(*ioeventfds)); |
667 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
668 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
669 | } | |
670 | } | |
671 | } | |
672 | ||
673 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
674 | as->ioeventfds, as->ioeventfd_nb); | |
675 | ||
7267c094 | 676 | g_free(as->ioeventfds); |
3e9d69e7 AK |
677 | as->ioeventfds = ioeventfds; |
678 | as->ioeventfd_nb = ioeventfd_nb; | |
679 | } | |
680 | ||
72e22d2f AK |
681 | enum ListenerDirection { Forward, Reverse }; |
682 | ||
683 | #define MEMORY_LISTENER_CALL(_callback, _direction, _args...) \ | |
684 | do { \ | |
685 | MemoryListener *_listener; \ | |
686 | \ | |
687 | switch (_direction) { \ | |
688 | case Forward: \ | |
689 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
690 | _listener->_callback(_listener, ##_args); \ | |
691 | } \ | |
692 | break; \ | |
693 | case Reverse: \ | |
694 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
695 | memory_listeners, link) { \ | |
696 | _listener->_callback(_listener, ##_args); \ | |
697 | } \ | |
698 | break; \ | |
699 | default: \ | |
700 | abort(); \ | |
701 | } \ | |
946996e9 AK |
702 | } while (0) |
703 | ||
72e22d2f AK |
704 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
705 | MEMORY_LISTENER_CALL(callback, dir, &(MemoryRegionSection) { \ | |
946996e9 AK |
706 | .mr = (fr)->mr, \ |
707 | .address_space = (as)->root, \ | |
708 | .offset_within_region = (fr)->offset_in_region, \ | |
709 | .size = int128_get64((fr)->addr.size), \ | |
710 | .offset_within_address_space = int128_get64((fr)->addr.start), \ | |
711 | }) | |
7664e80c | 712 | |
b8af1afb AK |
713 | static void address_space_update_topology_pass(AddressSpace *as, |
714 | FlatView old_view, | |
715 | FlatView new_view, | |
716 | bool adding) | |
093bc2cd | 717 | { |
093bc2cd AK |
718 | unsigned iold, inew; |
719 | FlatRange *frold, *frnew; | |
093bc2cd AK |
720 | |
721 | /* Generate a symmetric difference of the old and new memory maps. | |
722 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
723 | */ | |
724 | iold = inew = 0; | |
725 | while (iold < old_view.nr || inew < new_view.nr) { | |
726 | if (iold < old_view.nr) { | |
727 | frold = &old_view.ranges[iold]; | |
728 | } else { | |
729 | frold = NULL; | |
730 | } | |
731 | if (inew < new_view.nr) { | |
732 | frnew = &new_view.ranges[inew]; | |
733 | } else { | |
734 | frnew = NULL; | |
735 | } | |
736 | ||
737 | if (frold | |
738 | && (!frnew | |
08dafab4 AK |
739 | || int128_lt(frold->addr.start, frnew->addr.start) |
740 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd AK |
741 | && !flatrange_equal(frold, frnew)))) { |
742 | /* In old, but (not in new, or in new but attributes changed). */ | |
743 | ||
b8af1afb | 744 | if (!adding) { |
72e22d2f | 745 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
746 | as->ops->range_del(as, frold); |
747 | } | |
748 | ||
093bc2cd AK |
749 | ++iold; |
750 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
751 | /* In both (logging may have changed) */ | |
752 | ||
b8af1afb AK |
753 | if (adding) { |
754 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { | |
72e22d2f | 755 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb AK |
756 | as->ops->log_stop(as, frnew); |
757 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { | |
758 | as->ops->log_start(as, frnew); | |
72e22d2f | 759 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 760 | } |
5a583347 AK |
761 | } |
762 | ||
093bc2cd AK |
763 | ++iold; |
764 | ++inew; | |
093bc2cd AK |
765 | } else { |
766 | /* In new */ | |
767 | ||
b8af1afb AK |
768 | if (adding) { |
769 | as->ops->range_add(as, frnew); | |
72e22d2f | 770 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
771 | } |
772 | ||
093bc2cd AK |
773 | ++inew; |
774 | } | |
775 | } | |
b8af1afb AK |
776 | } |
777 | ||
778 | ||
779 | static void address_space_update_topology(AddressSpace *as) | |
780 | { | |
781 | FlatView old_view = as->current_map; | |
782 | FlatView new_view = generate_memory_topology(as->root); | |
783 | ||
784 | address_space_update_topology_pass(as, old_view, new_view, false); | |
785 | address_space_update_topology_pass(as, old_view, new_view, true); | |
786 | ||
cc31e6e7 | 787 | as->current_map = new_view; |
093bc2cd | 788 | flatview_destroy(&old_view); |
3e9d69e7 | 789 | address_space_update_ioeventfds(as); |
093bc2cd AK |
790 | } |
791 | ||
6bba19ba | 792 | static void memory_region_update_topology(MemoryRegion *mr) |
cc31e6e7 | 793 | { |
4ef4db86 | 794 | if (memory_region_transaction_depth) { |
e87c099f | 795 | memory_region_update_pending |= !mr || mr->enabled; |
4ef4db86 AK |
796 | return; |
797 | } | |
798 | ||
6bba19ba AK |
799 | if (mr && !mr->enabled) { |
800 | return; | |
801 | } | |
802 | ||
658b2224 AK |
803 | if (address_space_memory.root) { |
804 | address_space_update_topology(&address_space_memory); | |
805 | } | |
806 | if (address_space_io.root) { | |
807 | address_space_update_topology(&address_space_io); | |
808 | } | |
e87c099f AK |
809 | |
810 | memory_region_update_pending = false; | |
cc31e6e7 AK |
811 | } |
812 | ||
4ef4db86 AK |
813 | void memory_region_transaction_begin(void) |
814 | { | |
815 | ++memory_region_transaction_depth; | |
816 | } | |
817 | ||
818 | void memory_region_transaction_commit(void) | |
819 | { | |
820 | assert(memory_region_transaction_depth); | |
821 | --memory_region_transaction_depth; | |
e87c099f AK |
822 | if (!memory_region_transaction_depth && memory_region_update_pending) { |
823 | memory_region_update_topology(NULL); | |
824 | } | |
4ef4db86 AK |
825 | } |
826 | ||
545e92e0 AK |
827 | static void memory_region_destructor_none(MemoryRegion *mr) |
828 | { | |
829 | } | |
830 | ||
831 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
832 | { | |
833 | qemu_ram_free(mr->ram_addr); | |
834 | } | |
835 | ||
836 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
837 | { | |
838 | qemu_ram_free_from_ptr(mr->ram_addr); | |
839 | } | |
840 | ||
841 | static void memory_region_destructor_iomem(MemoryRegion *mr) | |
842 | { | |
843 | cpu_unregister_io_memory(mr->ram_addr); | |
844 | } | |
845 | ||
d0a9b5bc AK |
846 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
847 | { | |
848 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
75c578dc | 849 | cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK); |
d0a9b5bc AK |
850 | } |
851 | ||
be675c97 AK |
852 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
853 | { | |
2c3579ab | 854 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
855 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
856 | #else | |
857 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
858 | #endif | |
859 | } | |
860 | ||
093bc2cd AK |
861 | void memory_region_init(MemoryRegion *mr, |
862 | const char *name, | |
863 | uint64_t size) | |
864 | { | |
865 | mr->ops = NULL; | |
866 | mr->parent = NULL; | |
08dafab4 AK |
867 | mr->size = int128_make64(size); |
868 | if (size == UINT64_MAX) { | |
869 | mr->size = int128_2_64(); | |
870 | } | |
093bc2cd | 871 | mr->addr = 0; |
b3b00c78 | 872 | mr->subpage = false; |
6bba19ba | 873 | mr->enabled = true; |
14a3c10a | 874 | mr->terminates = false; |
8ea9252a | 875 | mr->ram = false; |
d0a9b5bc | 876 | mr->readable = true; |
fb1cd6f9 | 877 | mr->readonly = false; |
75c578dc | 878 | mr->rom_device = false; |
545e92e0 | 879 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
880 | mr->priority = 0; |
881 | mr->may_overlap = false; | |
882 | mr->alias = NULL; | |
883 | QTAILQ_INIT(&mr->subregions); | |
884 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
885 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 886 | mr->name = g_strdup(name); |
5a583347 | 887 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
888 | mr->ioeventfd_nb = 0; |
889 | mr->ioeventfds = NULL; | |
093bc2cd AK |
890 | } |
891 | ||
892 | static bool memory_region_access_valid(MemoryRegion *mr, | |
893 | target_phys_addr_t addr, | |
897fa7cf AK |
894 | unsigned size, |
895 | bool is_write) | |
093bc2cd | 896 | { |
897fa7cf AK |
897 | if (mr->ops->valid.accepts |
898 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) { | |
899 | return false; | |
900 | } | |
901 | ||
093bc2cd AK |
902 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
903 | return false; | |
904 | } | |
905 | ||
906 | /* Treat zero as compatibility all valid */ | |
907 | if (!mr->ops->valid.max_access_size) { | |
908 | return true; | |
909 | } | |
910 | ||
911 | if (size > mr->ops->valid.max_access_size | |
912 | || size < mr->ops->valid.min_access_size) { | |
913 | return false; | |
914 | } | |
915 | return true; | |
916 | } | |
917 | ||
a621f38d AK |
918 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
919 | target_phys_addr_t addr, | |
920 | unsigned size) | |
093bc2cd | 921 | { |
164a4dcd | 922 | uint64_t data = 0; |
093bc2cd | 923 | |
897fa7cf | 924 | if (!memory_region_access_valid(mr, addr, size, false)) { |
093bc2cd AK |
925 | return -1U; /* FIXME: better signalling */ |
926 | } | |
927 | ||
74901c3b AK |
928 | if (!mr->ops->read) { |
929 | return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr); | |
930 | } | |
931 | ||
093bc2cd | 932 | /* FIXME: support unaligned access */ |
2b50aa1f | 933 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
934 | mr->ops->impl.min_access_size, |
935 | mr->ops->impl.max_access_size, | |
936 | memory_region_read_accessor, mr); | |
093bc2cd AK |
937 | |
938 | return data; | |
939 | } | |
940 | ||
a621f38d | 941 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 942 | { |
a621f38d AK |
943 | if (memory_region_wrong_endianness(mr)) { |
944 | switch (size) { | |
945 | case 1: | |
946 | break; | |
947 | case 2: | |
948 | *data = bswap16(*data); | |
949 | break; | |
950 | case 4: | |
951 | *data = bswap32(*data); | |
1470a0cd | 952 | break; |
a621f38d AK |
953 | default: |
954 | abort(); | |
955 | } | |
956 | } | |
957 | } | |
958 | ||
959 | static uint64_t memory_region_dispatch_read(MemoryRegion *mr, | |
960 | target_phys_addr_t addr, | |
961 | unsigned size) | |
962 | { | |
963 | uint64_t ret; | |
964 | ||
965 | ret = memory_region_dispatch_read1(mr, addr, size); | |
966 | adjust_endianness(mr, &ret, size); | |
967 | return ret; | |
968 | } | |
093bc2cd | 969 | |
a621f38d AK |
970 | static void memory_region_dispatch_write(MemoryRegion *mr, |
971 | target_phys_addr_t addr, | |
972 | uint64_t data, | |
973 | unsigned size) | |
974 | { | |
897fa7cf | 975 | if (!memory_region_access_valid(mr, addr, size, true)) { |
093bc2cd AK |
976 | return; /* FIXME: better signalling */ |
977 | } | |
978 | ||
a621f38d AK |
979 | adjust_endianness(mr, &data, size); |
980 | ||
74901c3b AK |
981 | if (!mr->ops->write) { |
982 | mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data); | |
983 | return; | |
984 | } | |
985 | ||
093bc2cd | 986 | /* FIXME: support unaligned access */ |
2b50aa1f | 987 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
988 | mr->ops->impl.min_access_size, |
989 | mr->ops->impl.max_access_size, | |
990 | memory_region_write_accessor, mr); | |
093bc2cd AK |
991 | } |
992 | ||
093bc2cd AK |
993 | void memory_region_init_io(MemoryRegion *mr, |
994 | const MemoryRegionOps *ops, | |
995 | void *opaque, | |
996 | const char *name, | |
997 | uint64_t size) | |
998 | { | |
999 | memory_region_init(mr, name, size); | |
1000 | mr->ops = ops; | |
1001 | mr->opaque = opaque; | |
14a3c10a | 1002 | mr->terminates = true; |
26a83ad0 | 1003 | mr->destructor = memory_region_destructor_iomem; |
a621f38d | 1004 | mr->ram_addr = cpu_register_io_memory(mr); |
093bc2cd AK |
1005 | } |
1006 | ||
1007 | void memory_region_init_ram(MemoryRegion *mr, | |
093bc2cd AK |
1008 | const char *name, |
1009 | uint64_t size) | |
1010 | { | |
1011 | memory_region_init(mr, name, size); | |
8ea9252a | 1012 | mr->ram = true; |
14a3c10a | 1013 | mr->terminates = true; |
545e92e0 | 1014 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 1015 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
1016 | } |
1017 | ||
1018 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
093bc2cd AK |
1019 | const char *name, |
1020 | uint64_t size, | |
1021 | void *ptr) | |
1022 | { | |
1023 | memory_region_init(mr, name, size); | |
8ea9252a | 1024 | mr->ram = true; |
14a3c10a | 1025 | mr->terminates = true; |
545e92e0 | 1026 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 1027 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
1028 | } |
1029 | ||
1030 | void memory_region_init_alias(MemoryRegion *mr, | |
1031 | const char *name, | |
1032 | MemoryRegion *orig, | |
1033 | target_phys_addr_t offset, | |
1034 | uint64_t size) | |
1035 | { | |
1036 | memory_region_init(mr, name, size); | |
1037 | mr->alias = orig; | |
1038 | mr->alias_offset = offset; | |
1039 | } | |
1040 | ||
d0a9b5bc AK |
1041 | void memory_region_init_rom_device(MemoryRegion *mr, |
1042 | const MemoryRegionOps *ops, | |
75f5941c | 1043 | void *opaque, |
d0a9b5bc AK |
1044 | const char *name, |
1045 | uint64_t size) | |
1046 | { | |
1047 | memory_region_init(mr, name, size); | |
7bc2b9cd | 1048 | mr->ops = ops; |
75f5941c | 1049 | mr->opaque = opaque; |
d0a9b5bc | 1050 | mr->terminates = true; |
75c578dc | 1051 | mr->rom_device = true; |
d0a9b5bc | 1052 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1053 | mr->ram_addr = qemu_ram_alloc(size, mr); |
a621f38d | 1054 | mr->ram_addr |= cpu_register_io_memory(mr); |
d0a9b5bc AK |
1055 | } |
1056 | ||
1660e72d JK |
1057 | static uint64_t invalid_read(void *opaque, target_phys_addr_t addr, |
1058 | unsigned size) | |
1059 | { | |
1060 | MemoryRegion *mr = opaque; | |
1061 | ||
1062 | if (!mr->warning_printed) { | |
1063 | fprintf(stderr, "Invalid read from memory region %s\n", mr->name); | |
1064 | mr->warning_printed = true; | |
1065 | } | |
1066 | return -1U; | |
1067 | } | |
1068 | ||
1069 | static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data, | |
1070 | unsigned size) | |
1071 | { | |
1072 | MemoryRegion *mr = opaque; | |
1073 | ||
1074 | if (!mr->warning_printed) { | |
1075 | fprintf(stderr, "Invalid write to memory region %s\n", mr->name); | |
1076 | mr->warning_printed = true; | |
1077 | } | |
1078 | } | |
1079 | ||
1080 | static const MemoryRegionOps reservation_ops = { | |
1081 | .read = invalid_read, | |
1082 | .write = invalid_write, | |
1083 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1084 | }; | |
1085 | ||
1086 | void memory_region_init_reservation(MemoryRegion *mr, | |
1087 | const char *name, | |
1088 | uint64_t size) | |
1089 | { | |
1090 | memory_region_init_io(mr, &reservation_ops, mr, name, size); | |
1091 | } | |
1092 | ||
093bc2cd AK |
1093 | void memory_region_destroy(MemoryRegion *mr) |
1094 | { | |
1095 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
545e92e0 | 1096 | mr->destructor(mr); |
093bc2cd | 1097 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1098 | g_free((char *)mr->name); |
1099 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1100 | } |
1101 | ||
1102 | uint64_t memory_region_size(MemoryRegion *mr) | |
1103 | { | |
08dafab4 AK |
1104 | if (int128_eq(mr->size, int128_2_64())) { |
1105 | return UINT64_MAX; | |
1106 | } | |
1107 | return int128_get64(mr->size); | |
093bc2cd AK |
1108 | } |
1109 | ||
8991c79b AK |
1110 | const char *memory_region_name(MemoryRegion *mr) |
1111 | { | |
1112 | return mr->name; | |
1113 | } | |
1114 | ||
8ea9252a AK |
1115 | bool memory_region_is_ram(MemoryRegion *mr) |
1116 | { | |
1117 | return mr->ram; | |
1118 | } | |
1119 | ||
55043ba3 AK |
1120 | bool memory_region_is_logging(MemoryRegion *mr) |
1121 | { | |
1122 | return mr->dirty_log_mask; | |
1123 | } | |
1124 | ||
ce7923da AK |
1125 | bool memory_region_is_rom(MemoryRegion *mr) |
1126 | { | |
1127 | return mr->ram && mr->readonly; | |
1128 | } | |
1129 | ||
093bc2cd AK |
1130 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1131 | { | |
5a583347 AK |
1132 | uint8_t mask = 1 << client; |
1133 | ||
1134 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); | |
6bba19ba | 1135 | memory_region_update_topology(mr); |
093bc2cd AK |
1136 | } |
1137 | ||
1138 | bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr, | |
cd7a45c9 | 1139 | target_phys_addr_t size, unsigned client) |
093bc2cd | 1140 | { |
14a3c10a | 1141 | assert(mr->terminates); |
cd7a45c9 BS |
1142 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1143 | 1 << client); | |
093bc2cd AK |
1144 | } |
1145 | ||
fd4aa979 BS |
1146 | void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1147 | target_phys_addr_t size) | |
093bc2cd | 1148 | { |
14a3c10a | 1149 | assert(mr->terminates); |
fd4aa979 | 1150 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1151 | } |
1152 | ||
1153 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) | |
1154 | { | |
5a583347 AK |
1155 | FlatRange *fr; |
1156 | ||
cc31e6e7 | 1157 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
5a583347 | 1158 | if (fr->mr == mr) { |
72e22d2f AK |
1159 | MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, |
1160 | Forward, log_sync); | |
5a583347 AK |
1161 | } |
1162 | } | |
093bc2cd AK |
1163 | } |
1164 | ||
1165 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1166 | { | |
fb1cd6f9 AK |
1167 | if (mr->readonly != readonly) { |
1168 | mr->readonly = readonly; | |
6bba19ba | 1169 | memory_region_update_topology(mr); |
fb1cd6f9 | 1170 | } |
093bc2cd AK |
1171 | } |
1172 | ||
d0a9b5bc AK |
1173 | void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable) |
1174 | { | |
1175 | if (mr->readable != readable) { | |
1176 | mr->readable = readable; | |
6bba19ba | 1177 | memory_region_update_topology(mr); |
d0a9b5bc AK |
1178 | } |
1179 | } | |
1180 | ||
093bc2cd AK |
1181 | void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1182 | target_phys_addr_t size, unsigned client) | |
1183 | { | |
14a3c10a | 1184 | assert(mr->terminates); |
5a583347 AK |
1185 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1186 | mr->ram_addr + addr + size, | |
1187 | 1 << client); | |
093bc2cd AK |
1188 | } |
1189 | ||
1190 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1191 | { | |
1192 | if (mr->alias) { | |
1193 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1194 | } | |
1195 | ||
14a3c10a | 1196 | assert(mr->terminates); |
093bc2cd | 1197 | |
021d26d1 | 1198 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1199 | } |
1200 | ||
1201 | static void memory_region_update_coalesced_range(MemoryRegion *mr) | |
1202 | { | |
1203 | FlatRange *fr; | |
1204 | CoalescedMemoryRange *cmr; | |
1205 | AddrRange tmp; | |
1206 | ||
cc31e6e7 | 1207 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
093bc2cd | 1208 | if (fr->mr == mr) { |
08dafab4 AK |
1209 | qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start), |
1210 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1211 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1212 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1213 | int128_sub(fr->addr.start, |
1214 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1215 | if (!addrrange_intersects(tmp, fr->addr)) { |
1216 | continue; | |
1217 | } | |
1218 | tmp = addrrange_intersection(tmp, fr->addr); | |
08dafab4 AK |
1219 | qemu_register_coalesced_mmio(int128_get64(tmp.start), |
1220 | int128_get64(tmp.size)); | |
093bc2cd AK |
1221 | } |
1222 | } | |
1223 | } | |
1224 | } | |
1225 | ||
1226 | void memory_region_set_coalescing(MemoryRegion *mr) | |
1227 | { | |
1228 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1229 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1230 | } |
1231 | ||
1232 | void memory_region_add_coalescing(MemoryRegion *mr, | |
1233 | target_phys_addr_t offset, | |
1234 | uint64_t size) | |
1235 | { | |
7267c094 | 1236 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1237 | |
08dafab4 | 1238 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1239 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1240 | memory_region_update_coalesced_range(mr); | |
1241 | } | |
1242 | ||
1243 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1244 | { | |
1245 | CoalescedMemoryRange *cmr; | |
1246 | ||
1247 | while (!QTAILQ_EMPTY(&mr->coalesced)) { | |
1248 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1249 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1250 | g_free(cmr); |
093bc2cd AK |
1251 | } |
1252 | memory_region_update_coalesced_range(mr); | |
1253 | } | |
1254 | ||
3e9d69e7 AK |
1255 | void memory_region_add_eventfd(MemoryRegion *mr, |
1256 | target_phys_addr_t addr, | |
1257 | unsigned size, | |
1258 | bool match_data, | |
1259 | uint64_t data, | |
1260 | int fd) | |
1261 | { | |
1262 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1263 | .addr.start = int128_make64(addr), |
1264 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1265 | .match_data = match_data, |
1266 | .data = data, | |
1267 | .fd = fd, | |
1268 | }; | |
1269 | unsigned i; | |
1270 | ||
1271 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
1272 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1273 | break; | |
1274 | } | |
1275 | } | |
1276 | ++mr->ioeventfd_nb; | |
7267c094 | 1277 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1278 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1279 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1280 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1281 | mr->ioeventfds[i] = mrfd; | |
6bba19ba | 1282 | memory_region_update_topology(mr); |
3e9d69e7 AK |
1283 | } |
1284 | ||
1285 | void memory_region_del_eventfd(MemoryRegion *mr, | |
1286 | target_phys_addr_t addr, | |
1287 | unsigned size, | |
1288 | bool match_data, | |
1289 | uint64_t data, | |
1290 | int fd) | |
1291 | { | |
1292 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1293 | .addr.start = int128_make64(addr), |
1294 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1295 | .match_data = match_data, |
1296 | .data = data, | |
1297 | .fd = fd, | |
1298 | }; | |
1299 | unsigned i; | |
1300 | ||
1301 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
1302 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1303 | break; | |
1304 | } | |
1305 | } | |
1306 | assert(i != mr->ioeventfd_nb); | |
1307 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1308 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1309 | --mr->ioeventfd_nb; | |
7267c094 | 1310 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1311 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
6bba19ba | 1312 | memory_region_update_topology(mr); |
3e9d69e7 AK |
1313 | } |
1314 | ||
093bc2cd AK |
1315 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1316 | target_phys_addr_t offset, | |
1317 | MemoryRegion *subregion) | |
1318 | { | |
1319 | MemoryRegion *other; | |
1320 | ||
1321 | assert(!subregion->parent); | |
1322 | subregion->parent = mr; | |
1323 | subregion->addr = offset; | |
1324 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1325 | if (subregion->may_overlap || other->may_overlap) { | |
1326 | continue; | |
1327 | } | |
08dafab4 AK |
1328 | if (int128_gt(int128_make64(offset), |
1329 | int128_add(int128_make64(other->addr), other->size)) | |
1330 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1331 | int128_make64(other->addr))) { | |
093bc2cd AK |
1332 | continue; |
1333 | } | |
a5e1cbc8 | 1334 | #if 0 |
860329b2 MW |
1335 | printf("warning: subregion collision %llx/%llx (%s) " |
1336 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1337 | (unsigned long long)offset, |
08dafab4 | 1338 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1339 | subregion->name, |
1340 | (unsigned long long)other->addr, | |
08dafab4 | 1341 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1342 | other->name); |
a5e1cbc8 | 1343 | #endif |
093bc2cd AK |
1344 | } |
1345 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1346 | if (subregion->priority >= other->priority) { | |
1347 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1348 | goto done; | |
1349 | } | |
1350 | } | |
1351 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1352 | done: | |
6bba19ba | 1353 | memory_region_update_topology(mr); |
093bc2cd AK |
1354 | } |
1355 | ||
1356 | ||
1357 | void memory_region_add_subregion(MemoryRegion *mr, | |
1358 | target_phys_addr_t offset, | |
1359 | MemoryRegion *subregion) | |
1360 | { | |
1361 | subregion->may_overlap = false; | |
1362 | subregion->priority = 0; | |
1363 | memory_region_add_subregion_common(mr, offset, subregion); | |
1364 | } | |
1365 | ||
1366 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
1367 | target_phys_addr_t offset, | |
1368 | MemoryRegion *subregion, | |
1369 | unsigned priority) | |
1370 | { | |
1371 | subregion->may_overlap = true; | |
1372 | subregion->priority = priority; | |
1373 | memory_region_add_subregion_common(mr, offset, subregion); | |
1374 | } | |
1375 | ||
1376 | void memory_region_del_subregion(MemoryRegion *mr, | |
1377 | MemoryRegion *subregion) | |
1378 | { | |
1379 | assert(subregion->parent == mr); | |
1380 | subregion->parent = NULL; | |
1381 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
6bba19ba AK |
1382 | memory_region_update_topology(mr); |
1383 | } | |
1384 | ||
1385 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1386 | { | |
1387 | if (enabled == mr->enabled) { | |
1388 | return; | |
1389 | } | |
1390 | mr->enabled = enabled; | |
1391 | memory_region_update_topology(NULL); | |
093bc2cd | 1392 | } |
1c0ffa58 | 1393 | |
2282e1af AK |
1394 | void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr) |
1395 | { | |
1396 | MemoryRegion *parent = mr->parent; | |
1397 | unsigned priority = mr->priority; | |
1398 | bool may_overlap = mr->may_overlap; | |
1399 | ||
1400 | if (addr == mr->addr || !parent) { | |
1401 | mr->addr = addr; | |
1402 | return; | |
1403 | } | |
1404 | ||
1405 | memory_region_transaction_begin(); | |
1406 | memory_region_del_subregion(parent, mr); | |
1407 | if (may_overlap) { | |
1408 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1409 | } else { | |
1410 | memory_region_add_subregion(parent, addr, mr); | |
1411 | } | |
1412 | memory_region_transaction_commit(); | |
1413 | } | |
1414 | ||
4703359e AK |
1415 | void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset) |
1416 | { | |
1417 | target_phys_addr_t old_offset = mr->alias_offset; | |
1418 | ||
1419 | assert(mr->alias); | |
1420 | mr->alias_offset = offset; | |
1421 | ||
1422 | if (offset == old_offset || !mr->parent) { | |
1423 | return; | |
1424 | } | |
1425 | ||
1426 | memory_region_update_topology(mr); | |
1427 | } | |
1428 | ||
e34911c4 AK |
1429 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1430 | { | |
e34911c4 AK |
1431 | return mr->ram_addr; |
1432 | } | |
1433 | ||
e2177955 AK |
1434 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1435 | { | |
1436 | const AddrRange *addr = addr_; | |
1437 | const FlatRange *fr = fr_; | |
1438 | ||
1439 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1440 | return -1; | |
1441 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1442 | return 1; | |
1443 | } | |
1444 | return 0; | |
1445 | } | |
1446 | ||
1447 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1448 | { | |
1449 | return bsearch(&addr, as->current_map.ranges, as->current_map.nr, | |
1450 | sizeof(FlatRange), cmp_flatrange_addr); | |
1451 | } | |
1452 | ||
1453 | MemoryRegionSection memory_region_find(MemoryRegion *address_space, | |
1454 | target_phys_addr_t addr, uint64_t size) | |
1455 | { | |
1456 | AddressSpace *as = memory_region_to_address_space(address_space); | |
1457 | AddrRange range = addrrange_make(int128_make64(addr), | |
1458 | int128_make64(size)); | |
1459 | FlatRange *fr = address_space_lookup(as, range); | |
1460 | MemoryRegionSection ret = { .mr = NULL, .size = 0 }; | |
1461 | ||
1462 | if (!fr) { | |
1463 | return ret; | |
1464 | } | |
1465 | ||
1466 | while (fr > as->current_map.ranges | |
1467 | && addrrange_intersects(fr[-1].addr, range)) { | |
1468 | --fr; | |
1469 | } | |
1470 | ||
1471 | ret.mr = fr->mr; | |
1472 | range = addrrange_intersection(range, fr->addr); | |
1473 | ret.offset_within_region = fr->offset_in_region; | |
1474 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1475 | fr->addr.start)); | |
1476 | ret.size = int128_get64(range.size); | |
1477 | ret.offset_within_address_space = int128_get64(range.start); | |
1478 | return ret; | |
1479 | } | |
1480 | ||
86e775c6 AK |
1481 | void memory_global_sync_dirty_bitmap(MemoryRegion *address_space) |
1482 | { | |
7664e80c AK |
1483 | AddressSpace *as = memory_region_to_address_space(address_space); |
1484 | FlatRange *fr; | |
1485 | ||
7664e80c | 1486 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { |
72e22d2f | 1487 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1488 | } |
1489 | } | |
1490 | ||
1491 | void memory_global_dirty_log_start(void) | |
1492 | { | |
8f77558f | 1493 | cpu_physical_memory_set_dirty_tracking(1); |
7664e80c | 1494 | global_dirty_log = true; |
72e22d2f | 1495 | MEMORY_LISTENER_CALL(log_global_start, Forward); |
7664e80c AK |
1496 | } |
1497 | ||
1498 | void memory_global_dirty_log_stop(void) | |
1499 | { | |
7664e80c | 1500 | global_dirty_log = false; |
72e22d2f | 1501 | MEMORY_LISTENER_CALL(log_global_stop, Reverse); |
8f77558f | 1502 | cpu_physical_memory_set_dirty_tracking(0); |
7664e80c AK |
1503 | } |
1504 | ||
1505 | static void listener_add_address_space(MemoryListener *listener, | |
1506 | AddressSpace *as) | |
1507 | { | |
1508 | FlatRange *fr; | |
1509 | ||
1510 | if (global_dirty_log) { | |
1511 | listener->log_global_start(listener); | |
1512 | } | |
1513 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
1514 | MemoryRegionSection section = { | |
1515 | .mr = fr->mr, | |
1516 | .address_space = as->root, | |
1517 | .offset_within_region = fr->offset_in_region, | |
1518 | .size = int128_get64(fr->addr.size), | |
1519 | .offset_within_address_space = int128_get64(fr->addr.start), | |
1520 | }; | |
1521 | listener->region_add(listener, §ion); | |
1522 | } | |
1523 | } | |
1524 | ||
1525 | void memory_listener_register(MemoryListener *listener) | |
1526 | { | |
72e22d2f AK |
1527 | MemoryListener *other = NULL; |
1528 | ||
1529 | if (QTAILQ_EMPTY(&memory_listeners) | |
1530 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1531 | memory_listeners)->priority) { | |
1532 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1533 | } else { | |
1534 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1535 | if (listener->priority < other->priority) { | |
1536 | break; | |
1537 | } | |
1538 | } | |
1539 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1540 | } | |
7664e80c AK |
1541 | listener_add_address_space(listener, &address_space_memory); |
1542 | listener_add_address_space(listener, &address_space_io); | |
1543 | } | |
1544 | ||
1545 | void memory_listener_unregister(MemoryListener *listener) | |
1546 | { | |
72e22d2f | 1547 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1548 | } |
e2177955 | 1549 | |
1c0ffa58 AK |
1550 | void set_system_memory_map(MemoryRegion *mr) |
1551 | { | |
cc31e6e7 | 1552 | address_space_memory.root = mr; |
6bba19ba | 1553 | memory_region_update_topology(NULL); |
1c0ffa58 | 1554 | } |
658b2224 AK |
1555 | |
1556 | void set_system_io_map(MemoryRegion *mr) | |
1557 | { | |
1558 | address_space_io.root = mr; | |
6bba19ba | 1559 | memory_region_update_topology(NULL); |
658b2224 | 1560 | } |
314e2987 | 1561 | |
acbbec5d AK |
1562 | uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size) |
1563 | { | |
a621f38d | 1564 | return memory_region_dispatch_read(io_mem_region[io_index], addr, size); |
acbbec5d AK |
1565 | } |
1566 | ||
1567 | void io_mem_write(int io_index, target_phys_addr_t addr, | |
1568 | uint64_t val, unsigned size) | |
1569 | { | |
a621f38d | 1570 | memory_region_dispatch_write(io_mem_region[io_index], addr, val, size); |
acbbec5d AK |
1571 | } |
1572 | ||
314e2987 BS |
1573 | typedef struct MemoryRegionList MemoryRegionList; |
1574 | ||
1575 | struct MemoryRegionList { | |
1576 | const MemoryRegion *mr; | |
1577 | bool printed; | |
1578 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1579 | }; | |
1580 | ||
1581 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1582 | ||
1583 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1584 | const MemoryRegion *mr, unsigned int level, | |
1585 | target_phys_addr_t base, | |
9479c57a | 1586 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1587 | { |
9479c57a JK |
1588 | MemoryRegionList *new_ml, *ml, *next_ml; |
1589 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1590 | const MemoryRegion *submr; |
1591 | unsigned int i; | |
1592 | ||
314e2987 BS |
1593 | if (!mr) { |
1594 | return; | |
1595 | } | |
1596 | ||
1597 | for (i = 0; i < level; i++) { | |
1598 | mon_printf(f, " "); | |
1599 | } | |
1600 | ||
1601 | if (mr->alias) { | |
1602 | MemoryRegionList *ml; | |
1603 | bool found = false; | |
1604 | ||
1605 | /* check if the alias is already in the queue */ | |
9479c57a | 1606 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1607 | if (ml->mr == mr->alias && !ml->printed) { |
1608 | found = true; | |
1609 | } | |
1610 | } | |
1611 | ||
1612 | if (!found) { | |
1613 | ml = g_new(MemoryRegionList, 1); | |
1614 | ml->mr = mr->alias; | |
1615 | ml->printed = false; | |
9479c57a | 1616 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1617 | } |
4896d74b JK |
1618 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1619 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1620 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1621 | base + mr->addr, |
08dafab4 AK |
1622 | base + mr->addr |
1623 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1624 | mr->priority, |
4896d74b JK |
1625 | mr->readable ? 'R' : '-', |
1626 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1627 | : '-', | |
314e2987 BS |
1628 | mr->name, |
1629 | mr->alias->name, | |
1630 | mr->alias_offset, | |
08dafab4 AK |
1631 | mr->alias_offset |
1632 | + (target_phys_addr_t)int128_get64(mr->size) - 1); | |
314e2987 | 1633 | } else { |
4896d74b JK |
1634 | mon_printf(f, |
1635 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1636 | base + mr->addr, |
08dafab4 AK |
1637 | base + mr->addr |
1638 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1639 | mr->priority, |
4896d74b JK |
1640 | mr->readable ? 'R' : '-', |
1641 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1642 | : '-', | |
314e2987 BS |
1643 | mr->name); |
1644 | } | |
9479c57a JK |
1645 | |
1646 | QTAILQ_INIT(&submr_print_queue); | |
1647 | ||
314e2987 | 1648 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1649 | new_ml = g_new(MemoryRegionList, 1); |
1650 | new_ml->mr = submr; | |
1651 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1652 | if (new_ml->mr->addr < ml->mr->addr || | |
1653 | (new_ml->mr->addr == ml->mr->addr && | |
1654 | new_ml->mr->priority > ml->mr->priority)) { | |
1655 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1656 | new_ml = NULL; | |
1657 | break; | |
1658 | } | |
1659 | } | |
1660 | if (new_ml) { | |
1661 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1662 | } | |
1663 | } | |
1664 | ||
1665 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1666 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1667 | alias_print_queue); | |
1668 | } | |
1669 | ||
88365e47 | 1670 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1671 | g_free(ml); |
314e2987 BS |
1672 | } |
1673 | } | |
1674 | ||
1675 | void mtree_info(fprintf_function mon_printf, void *f) | |
1676 | { | |
1677 | MemoryRegionListHead ml_head; | |
1678 | MemoryRegionList *ml, *ml2; | |
1679 | ||
1680 | QTAILQ_INIT(&ml_head); | |
1681 | ||
1682 | mon_printf(f, "memory\n"); | |
1683 | mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head); | |
1684 | ||
1685 | /* print aliased regions */ | |
1686 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1687 | if (!ml->printed) { | |
1688 | mon_printf(f, "%s\n", ml->mr->name); | |
1689 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1690 | } | |
1691 | } | |
1692 | ||
1693 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1694 | g_free(ml); |
314e2987 BS |
1695 | } |
1696 | ||
06631810 JK |
1697 | if (address_space_io.root && |
1698 | !QTAILQ_EMPTY(&address_space_io.root->subregions)) { | |
1699 | QTAILQ_INIT(&ml_head); | |
1700 | mon_printf(f, "I/O\n"); | |
1701 | mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head); | |
1702 | } | |
314e2987 | 1703 | } |