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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
16 | #include "memory.h" | |
1c0ffa58 | 17 | #include "exec-memory.h" |
658b2224 | 18 | #include "ioport.h" |
74901c3b | 19 | #include "bitops.h" |
3e9d69e7 | 20 | #include "kvm.h" |
093bc2cd AK |
21 | #include <assert.h> |
22 | ||
67d95c15 AK |
23 | #define WANT_EXEC_OBSOLETE |
24 | #include "exec-obsolete.h" | |
25 | ||
4ef4db86 | 26 | unsigned memory_region_transaction_depth = 0; |
e87c099f | 27 | static bool memory_region_update_pending = false; |
7664e80c AK |
28 | static bool global_dirty_log = false; |
29 | ||
72e22d2f AK |
30 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
31 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 32 | |
093bc2cd AK |
33 | typedef struct AddrRange AddrRange; |
34 | ||
8417cebf AK |
35 | /* |
36 | * Note using signed integers limits us to physical addresses at most | |
37 | * 63 bits wide. They are needed for negative offsetting in aliases | |
38 | * (large MemoryRegion::alias_offset). | |
39 | */ | |
093bc2cd | 40 | struct AddrRange { |
08dafab4 AK |
41 | Int128 start; |
42 | Int128 size; | |
093bc2cd AK |
43 | }; |
44 | ||
08dafab4 | 45 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
46 | { |
47 | return (AddrRange) { start, size }; | |
48 | } | |
49 | ||
50 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
51 | { | |
08dafab4 | 52 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
53 | } |
54 | ||
08dafab4 | 55 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 56 | { |
08dafab4 | 57 | return int128_add(r.start, r.size); |
093bc2cd AK |
58 | } |
59 | ||
08dafab4 | 60 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 61 | { |
08dafab4 | 62 | int128_addto(&range.start, delta); |
093bc2cd AK |
63 | return range; |
64 | } | |
65 | ||
08dafab4 AK |
66 | static bool addrrange_contains(AddrRange range, Int128 addr) |
67 | { | |
68 | return int128_ge(addr, range.start) | |
69 | && int128_lt(addr, addrrange_end(range)); | |
70 | } | |
71 | ||
093bc2cd AK |
72 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
73 | { | |
08dafab4 AK |
74 | return addrrange_contains(r1, r2.start) |
75 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
76 | } |
77 | ||
78 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
79 | { | |
08dafab4 AK |
80 | Int128 start = int128_max(r1.start, r2.start); |
81 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
82 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
83 | } |
84 | ||
0e0d36b4 AK |
85 | enum ListenerDirection { Forward, Reverse }; |
86 | ||
87 | #define MEMORY_LISTENER_CALL(_callback, _direction, _args...) \ | |
88 | do { \ | |
89 | MemoryListener *_listener; \ | |
90 | \ | |
91 | switch (_direction) { \ | |
92 | case Forward: \ | |
93 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
94 | _listener->_callback(_listener, ##_args); \ | |
95 | } \ | |
96 | break; \ | |
97 | case Reverse: \ | |
98 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
99 | memory_listeners, link) { \ | |
100 | _listener->_callback(_listener, ##_args); \ | |
101 | } \ | |
102 | break; \ | |
103 | default: \ | |
104 | abort(); \ | |
105 | } \ | |
106 | } while (0) | |
107 | ||
108 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ | |
109 | MEMORY_LISTENER_CALL(callback, dir, &(MemoryRegionSection) { \ | |
110 | .mr = (fr)->mr, \ | |
111 | .address_space = (as)->root, \ | |
112 | .offset_within_region = (fr)->offset_in_region, \ | |
113 | .size = int128_get64((fr)->addr.size), \ | |
114 | .offset_within_address_space = int128_get64((fr)->addr.start), \ | |
115 | }) | |
116 | ||
093bc2cd AK |
117 | struct CoalescedMemoryRange { |
118 | AddrRange addr; | |
119 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
120 | }; | |
121 | ||
3e9d69e7 AK |
122 | struct MemoryRegionIoeventfd { |
123 | AddrRange addr; | |
124 | bool match_data; | |
125 | uint64_t data; | |
126 | int fd; | |
127 | }; | |
128 | ||
129 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
130 | MemoryRegionIoeventfd b) | |
131 | { | |
08dafab4 | 132 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 133 | return true; |
08dafab4 | 134 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 135 | return false; |
08dafab4 | 136 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 137 | return true; |
08dafab4 | 138 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
139 | return false; |
140 | } else if (a.match_data < b.match_data) { | |
141 | return true; | |
142 | } else if (a.match_data > b.match_data) { | |
143 | return false; | |
144 | } else if (a.match_data) { | |
145 | if (a.data < b.data) { | |
146 | return true; | |
147 | } else if (a.data > b.data) { | |
148 | return false; | |
149 | } | |
150 | } | |
151 | if (a.fd < b.fd) { | |
152 | return true; | |
153 | } else if (a.fd > b.fd) { | |
154 | return false; | |
155 | } | |
156 | return false; | |
157 | } | |
158 | ||
159 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
160 | MemoryRegionIoeventfd b) | |
161 | { | |
162 | return !memory_region_ioeventfd_before(a, b) | |
163 | && !memory_region_ioeventfd_before(b, a); | |
164 | } | |
165 | ||
093bc2cd AK |
166 | typedef struct FlatRange FlatRange; |
167 | typedef struct FlatView FlatView; | |
168 | ||
169 | /* Range of memory in the global map. Addresses are absolute. */ | |
170 | struct FlatRange { | |
171 | MemoryRegion *mr; | |
172 | target_phys_addr_t offset_in_region; | |
173 | AddrRange addr; | |
5a583347 | 174 | uint8_t dirty_log_mask; |
d0a9b5bc | 175 | bool readable; |
fb1cd6f9 | 176 | bool readonly; |
093bc2cd AK |
177 | }; |
178 | ||
179 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
180 | * order. | |
181 | */ | |
182 | struct FlatView { | |
183 | FlatRange *ranges; | |
184 | unsigned nr; | |
185 | unsigned nr_allocated; | |
186 | }; | |
187 | ||
cc31e6e7 AK |
188 | typedef struct AddressSpace AddressSpace; |
189 | typedef struct AddressSpaceOps AddressSpaceOps; | |
190 | ||
191 | /* A system address space - I/O, memory, etc. */ | |
192 | struct AddressSpace { | |
193 | const AddressSpaceOps *ops; | |
194 | MemoryRegion *root; | |
195 | FlatView current_map; | |
3e9d69e7 AK |
196 | int ioeventfd_nb; |
197 | MemoryRegionIoeventfd *ioeventfds; | |
cc31e6e7 AK |
198 | }; |
199 | ||
200 | struct AddressSpaceOps { | |
201 | void (*range_add)(AddressSpace *as, FlatRange *fr); | |
202 | void (*range_del)(AddressSpace *as, FlatRange *fr); | |
203 | void (*log_start)(AddressSpace *as, FlatRange *fr); | |
204 | void (*log_stop)(AddressSpace *as, FlatRange *fr); | |
205 | }; | |
206 | ||
093bc2cd AK |
207 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
208 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
209 | ||
093bc2cd AK |
210 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
211 | { | |
212 | return a->mr == b->mr | |
213 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 214 | && a->offset_in_region == b->offset_in_region |
fb1cd6f9 AK |
215 | && a->readable == b->readable |
216 | && a->readonly == b->readonly; | |
093bc2cd AK |
217 | } |
218 | ||
219 | static void flatview_init(FlatView *view) | |
220 | { | |
221 | view->ranges = NULL; | |
222 | view->nr = 0; | |
223 | view->nr_allocated = 0; | |
224 | } | |
225 | ||
226 | /* Insert a range into a given position. Caller is responsible for maintaining | |
227 | * sorting order. | |
228 | */ | |
229 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
230 | { | |
231 | if (view->nr == view->nr_allocated) { | |
232 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 233 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
234 | view->nr_allocated * sizeof(*view->ranges)); |
235 | } | |
236 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
237 | (view->nr - pos) * sizeof(FlatRange)); | |
238 | view->ranges[pos] = *range; | |
239 | ++view->nr; | |
240 | } | |
241 | ||
242 | static void flatview_destroy(FlatView *view) | |
243 | { | |
7267c094 | 244 | g_free(view->ranges); |
093bc2cd AK |
245 | } |
246 | ||
3d8e6bf9 AK |
247 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
248 | { | |
08dafab4 | 249 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 250 | && r1->mr == r2->mr |
08dafab4 AK |
251 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
252 | r1->addr.size), | |
253 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 254 | && r1->dirty_log_mask == r2->dirty_log_mask |
fb1cd6f9 AK |
255 | && r1->readable == r2->readable |
256 | && r1->readonly == r2->readonly; | |
3d8e6bf9 AK |
257 | } |
258 | ||
259 | /* Attempt to simplify a view by merging ajacent ranges */ | |
260 | static void flatview_simplify(FlatView *view) | |
261 | { | |
262 | unsigned i, j; | |
263 | ||
264 | i = 0; | |
265 | while (i < view->nr) { | |
266 | j = i + 1; | |
267 | while (j < view->nr | |
268 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 269 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
270 | ++j; |
271 | } | |
272 | ++i; | |
273 | memmove(&view->ranges[i], &view->ranges[j], | |
274 | (view->nr - j) * sizeof(view->ranges[j])); | |
275 | view->nr -= j - i; | |
276 | } | |
277 | } | |
278 | ||
164a4dcd AK |
279 | static void memory_region_read_accessor(void *opaque, |
280 | target_phys_addr_t addr, | |
281 | uint64_t *value, | |
282 | unsigned size, | |
283 | unsigned shift, | |
284 | uint64_t mask) | |
285 | { | |
286 | MemoryRegion *mr = opaque; | |
287 | uint64_t tmp; | |
288 | ||
289 | tmp = mr->ops->read(mr->opaque, addr, size); | |
290 | *value |= (tmp & mask) << shift; | |
291 | } | |
292 | ||
293 | static void memory_region_write_accessor(void *opaque, | |
294 | target_phys_addr_t addr, | |
295 | uint64_t *value, | |
296 | unsigned size, | |
297 | unsigned shift, | |
298 | uint64_t mask) | |
299 | { | |
300 | MemoryRegion *mr = opaque; | |
301 | uint64_t tmp; | |
302 | ||
303 | tmp = (*value >> shift) & mask; | |
304 | mr->ops->write(mr->opaque, addr, tmp, size); | |
305 | } | |
306 | ||
307 | static void access_with_adjusted_size(target_phys_addr_t addr, | |
308 | uint64_t *value, | |
309 | unsigned size, | |
310 | unsigned access_size_min, | |
311 | unsigned access_size_max, | |
312 | void (*access)(void *opaque, | |
313 | target_phys_addr_t addr, | |
314 | uint64_t *value, | |
315 | unsigned size, | |
316 | unsigned shift, | |
317 | uint64_t mask), | |
318 | void *opaque) | |
319 | { | |
320 | uint64_t access_mask; | |
321 | unsigned access_size; | |
322 | unsigned i; | |
323 | ||
324 | if (!access_size_min) { | |
325 | access_size_min = 1; | |
326 | } | |
327 | if (!access_size_max) { | |
328 | access_size_max = 4; | |
329 | } | |
330 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
331 | access_mask = -1ULL >> (64 - access_size * 8); | |
332 | for (i = 0; i < size; i += access_size) { | |
333 | /* FIXME: big-endian support */ | |
334 | access(opaque, addr + i, value, access_size, i * 8, access_mask); | |
335 | } | |
336 | } | |
337 | ||
cc31e6e7 AK |
338 | static void as_memory_range_add(AddressSpace *as, FlatRange *fr) |
339 | { | |
dd81124b AK |
340 | MemoryRegionSection section = { |
341 | .mr = fr->mr, | |
342 | .offset_within_address_space = int128_get64(fr->addr.start), | |
343 | .offset_within_region = fr->offset_in_region, | |
344 | .size = int128_get64(fr->addr.size), | |
345 | }; | |
346 | ||
347 | cpu_register_physical_memory_log(§ion, fr->readable, fr->readonly); | |
cc31e6e7 AK |
348 | } |
349 | ||
350 | static void as_memory_range_del(AddressSpace *as, FlatRange *fr) | |
351 | { | |
dd81124b AK |
352 | MemoryRegionSection section = { |
353 | .mr = &io_mem_unassigned, | |
354 | .offset_within_address_space = int128_get64(fr->addr.start), | |
355 | .offset_within_region = int128_get64(fr->addr.start), | |
356 | .size = int128_get64(fr->addr.size), | |
357 | }; | |
358 | ||
359 | cpu_register_physical_memory_log(§ion, true, false); | |
cc31e6e7 AK |
360 | } |
361 | ||
362 | static void as_memory_log_start(AddressSpace *as, FlatRange *fr) | |
363 | { | |
cc31e6e7 AK |
364 | } |
365 | ||
366 | static void as_memory_log_stop(AddressSpace *as, FlatRange *fr) | |
367 | { | |
cc31e6e7 AK |
368 | } |
369 | ||
370 | static const AddressSpaceOps address_space_ops_memory = { | |
371 | .range_add = as_memory_range_add, | |
372 | .range_del = as_memory_range_del, | |
373 | .log_start = as_memory_log_start, | |
374 | .log_stop = as_memory_log_stop, | |
375 | }; | |
376 | ||
377 | static AddressSpace address_space_memory = { | |
378 | .ops = &address_space_ops_memory, | |
379 | }; | |
380 | ||
627a0e90 AK |
381 | static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
382 | unsigned width, bool write) | |
383 | { | |
384 | const MemoryRegionPortio *mrp; | |
385 | ||
386 | for (mrp = mr->ops->old_portio; mrp->size; ++mrp) { | |
387 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len | |
388 | && width == mrp->size | |
389 | && (write ? (bool)mrp->write : (bool)mrp->read)) { | |
390 | return mrp; | |
391 | } | |
392 | } | |
393 | return NULL; | |
394 | } | |
395 | ||
658b2224 AK |
396 | static void memory_region_iorange_read(IORange *iorange, |
397 | uint64_t offset, | |
398 | unsigned width, | |
399 | uint64_t *data) | |
400 | { | |
401 | MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); | |
402 | ||
627a0e90 AK |
403 | if (mr->ops->old_portio) { |
404 | const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false); | |
405 | ||
406 | *data = ((uint64_t)1 << (width * 8)) - 1; | |
407 | if (mrp) { | |
2b50aa1f | 408 | *data = mrp->read(mr->opaque, offset); |
03808f58 JK |
409 | } else if (width == 2) { |
410 | mrp = find_portio(mr, offset, 1, false); | |
411 | assert(mrp); | |
2b50aa1f AK |
412 | *data = mrp->read(mr->opaque, offset) | |
413 | (mrp->read(mr->opaque, offset + 1) << 8); | |
627a0e90 AK |
414 | } |
415 | return; | |
416 | } | |
3a130f4e | 417 | *data = 0; |
2b50aa1f | 418 | access_with_adjusted_size(offset, data, width, |
3a130f4e AK |
419 | mr->ops->impl.min_access_size, |
420 | mr->ops->impl.max_access_size, | |
421 | memory_region_read_accessor, mr); | |
658b2224 AK |
422 | } |
423 | ||
424 | static void memory_region_iorange_write(IORange *iorange, | |
425 | uint64_t offset, | |
426 | unsigned width, | |
427 | uint64_t data) | |
428 | { | |
429 | MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); | |
430 | ||
627a0e90 AK |
431 | if (mr->ops->old_portio) { |
432 | const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true); | |
433 | ||
434 | if (mrp) { | |
2b50aa1f | 435 | mrp->write(mr->opaque, offset, data); |
03808f58 JK |
436 | } else if (width == 2) { |
437 | mrp = find_portio(mr, offset, 1, false); | |
438 | assert(mrp); | |
2b50aa1f AK |
439 | mrp->write(mr->opaque, offset, data & 0xff); |
440 | mrp->write(mr->opaque, offset + 1, data >> 8); | |
627a0e90 AK |
441 | } |
442 | return; | |
443 | } | |
2b50aa1f | 444 | access_with_adjusted_size(offset, &data, width, |
3a130f4e AK |
445 | mr->ops->impl.min_access_size, |
446 | mr->ops->impl.max_access_size, | |
447 | memory_region_write_accessor, mr); | |
658b2224 AK |
448 | } |
449 | ||
450 | static const IORangeOps memory_region_iorange_ops = { | |
451 | .read = memory_region_iorange_read, | |
452 | .write = memory_region_iorange_write, | |
453 | }; | |
454 | ||
455 | static void as_io_range_add(AddressSpace *as, FlatRange *fr) | |
456 | { | |
457 | iorange_init(&fr->mr->iorange, &memory_region_iorange_ops, | |
08dafab4 | 458 | int128_get64(fr->addr.start), int128_get64(fr->addr.size)); |
658b2224 AK |
459 | ioport_register(&fr->mr->iorange); |
460 | } | |
461 | ||
462 | static void as_io_range_del(AddressSpace *as, FlatRange *fr) | |
463 | { | |
08dafab4 AK |
464 | isa_unassign_ioport(int128_get64(fr->addr.start), |
465 | int128_get64(fr->addr.size)); | |
658b2224 AK |
466 | } |
467 | ||
468 | static const AddressSpaceOps address_space_ops_io = { | |
469 | .range_add = as_io_range_add, | |
470 | .range_del = as_io_range_del, | |
471 | }; | |
472 | ||
473 | static AddressSpace address_space_io = { | |
474 | .ops = &address_space_ops_io, | |
475 | }; | |
476 | ||
e2177955 AK |
477 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
478 | { | |
479 | while (mr->parent) { | |
480 | mr = mr->parent; | |
481 | } | |
482 | if (mr == address_space_memory.root) { | |
483 | return &address_space_memory; | |
484 | } | |
485 | if (mr == address_space_io.root) { | |
486 | return &address_space_io; | |
487 | } | |
488 | abort(); | |
489 | } | |
490 | ||
093bc2cd AK |
491 | /* Render a memory region into the global view. Ranges in @view obscure |
492 | * ranges in @mr. | |
493 | */ | |
494 | static void render_memory_region(FlatView *view, | |
495 | MemoryRegion *mr, | |
08dafab4 | 496 | Int128 base, |
fb1cd6f9 AK |
497 | AddrRange clip, |
498 | bool readonly) | |
093bc2cd AK |
499 | { |
500 | MemoryRegion *subregion; | |
501 | unsigned i; | |
502 | target_phys_addr_t offset_in_region; | |
08dafab4 AK |
503 | Int128 remain; |
504 | Int128 now; | |
093bc2cd AK |
505 | FlatRange fr; |
506 | AddrRange tmp; | |
507 | ||
6bba19ba AK |
508 | if (!mr->enabled) { |
509 | return; | |
510 | } | |
511 | ||
08dafab4 | 512 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 513 | readonly |= mr->readonly; |
093bc2cd AK |
514 | |
515 | tmp = addrrange_make(base, mr->size); | |
516 | ||
517 | if (!addrrange_intersects(tmp, clip)) { | |
518 | return; | |
519 | } | |
520 | ||
521 | clip = addrrange_intersection(tmp, clip); | |
522 | ||
523 | if (mr->alias) { | |
08dafab4 AK |
524 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
525 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 526 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
527 | return; |
528 | } | |
529 | ||
530 | /* Render subregions in priority order. */ | |
531 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 532 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
533 | } |
534 | ||
14a3c10a | 535 | if (!mr->terminates) { |
093bc2cd AK |
536 | return; |
537 | } | |
538 | ||
08dafab4 | 539 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
540 | base = clip.start; |
541 | remain = clip.size; | |
542 | ||
543 | /* Render the region itself into any gaps left by the current view. */ | |
08dafab4 AK |
544 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
545 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
546 | continue; |
547 | } | |
08dafab4 AK |
548 | if (int128_lt(base, view->ranges[i].addr.start)) { |
549 | now = int128_min(remain, | |
550 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
551 | fr.mr = mr; |
552 | fr.offset_in_region = offset_in_region; | |
553 | fr.addr = addrrange_make(base, now); | |
5a583347 | 554 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 555 | fr.readable = mr->readable; |
fb1cd6f9 | 556 | fr.readonly = readonly; |
093bc2cd AK |
557 | flatview_insert(view, i, &fr); |
558 | ++i; | |
08dafab4 AK |
559 | int128_addto(&base, now); |
560 | offset_in_region += int128_get64(now); | |
561 | int128_subfrom(&remain, now); | |
093bc2cd | 562 | } |
08dafab4 AK |
563 | if (int128_eq(base, view->ranges[i].addr.start)) { |
564 | now = int128_min(remain, view->ranges[i].addr.size); | |
565 | int128_addto(&base, now); | |
566 | offset_in_region += int128_get64(now); | |
567 | int128_subfrom(&remain, now); | |
093bc2cd AK |
568 | } |
569 | } | |
08dafab4 | 570 | if (int128_nz(remain)) { |
093bc2cd AK |
571 | fr.mr = mr; |
572 | fr.offset_in_region = offset_in_region; | |
573 | fr.addr = addrrange_make(base, remain); | |
5a583347 | 574 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 575 | fr.readable = mr->readable; |
fb1cd6f9 | 576 | fr.readonly = readonly; |
093bc2cd AK |
577 | flatview_insert(view, i, &fr); |
578 | } | |
579 | } | |
580 | ||
581 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
582 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
583 | { | |
584 | FlatView view; | |
585 | ||
586 | flatview_init(&view); | |
587 | ||
08dafab4 AK |
588 | render_memory_region(&view, mr, int128_zero(), |
589 | addrrange_make(int128_zero(), int128_2_64()), false); | |
3d8e6bf9 | 590 | flatview_simplify(&view); |
093bc2cd AK |
591 | |
592 | return view; | |
593 | } | |
594 | ||
3e9d69e7 AK |
595 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
596 | MemoryRegionIoeventfd *fds_new, | |
597 | unsigned fds_new_nb, | |
598 | MemoryRegionIoeventfd *fds_old, | |
599 | unsigned fds_old_nb) | |
600 | { | |
601 | unsigned iold, inew; | |
80a1ea37 AK |
602 | MemoryRegionIoeventfd *fd; |
603 | MemoryRegionSection section; | |
3e9d69e7 AK |
604 | |
605 | /* Generate a symmetric difference of the old and new fd sets, adding | |
606 | * and deleting as necessary. | |
607 | */ | |
608 | ||
609 | iold = inew = 0; | |
610 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
611 | if (iold < fds_old_nb | |
612 | && (inew == fds_new_nb | |
613 | || memory_region_ioeventfd_before(fds_old[iold], | |
614 | fds_new[inew]))) { | |
80a1ea37 AK |
615 | fd = &fds_old[iold]; |
616 | section = (MemoryRegionSection) { | |
617 | .address_space = as->root, | |
618 | .offset_within_address_space = int128_get64(fd->addr.start), | |
619 | .size = int128_get64(fd->addr.size), | |
620 | }; | |
621 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
622 | fd->match_data, fd->data, fd->fd); | |
3e9d69e7 AK |
623 | ++iold; |
624 | } else if (inew < fds_new_nb | |
625 | && (iold == fds_old_nb | |
626 | || memory_region_ioeventfd_before(fds_new[inew], | |
627 | fds_old[iold]))) { | |
80a1ea37 AK |
628 | fd = &fds_new[inew]; |
629 | section = (MemoryRegionSection) { | |
630 | .address_space = as->root, | |
631 | .offset_within_address_space = int128_get64(fd->addr.start), | |
632 | .size = int128_get64(fd->addr.size), | |
633 | }; | |
634 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
635 | fd->match_data, fd->data, fd->fd); | |
3e9d69e7 AK |
636 | ++inew; |
637 | } else { | |
638 | ++iold; | |
639 | ++inew; | |
640 | } | |
641 | } | |
642 | } | |
643 | ||
644 | static void address_space_update_ioeventfds(AddressSpace *as) | |
645 | { | |
646 | FlatRange *fr; | |
647 | unsigned ioeventfd_nb = 0; | |
648 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
649 | AddrRange tmp; | |
650 | unsigned i; | |
651 | ||
652 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
653 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { | |
654 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
655 | int128_sub(fr->addr.start, |
656 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
657 | if (addrrange_intersects(fr->addr, tmp)) { |
658 | ++ioeventfd_nb; | |
7267c094 | 659 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
660 | ioeventfd_nb * sizeof(*ioeventfds)); |
661 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
662 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
663 | } | |
664 | } | |
665 | } | |
666 | ||
667 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
668 | as->ioeventfds, as->ioeventfd_nb); | |
669 | ||
7267c094 | 670 | g_free(as->ioeventfds); |
3e9d69e7 AK |
671 | as->ioeventfds = ioeventfds; |
672 | as->ioeventfd_nb = ioeventfd_nb; | |
673 | } | |
674 | ||
b8af1afb AK |
675 | static void address_space_update_topology_pass(AddressSpace *as, |
676 | FlatView old_view, | |
677 | FlatView new_view, | |
678 | bool adding) | |
093bc2cd | 679 | { |
093bc2cd AK |
680 | unsigned iold, inew; |
681 | FlatRange *frold, *frnew; | |
093bc2cd AK |
682 | |
683 | /* Generate a symmetric difference of the old and new memory maps. | |
684 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
685 | */ | |
686 | iold = inew = 0; | |
687 | while (iold < old_view.nr || inew < new_view.nr) { | |
688 | if (iold < old_view.nr) { | |
689 | frold = &old_view.ranges[iold]; | |
690 | } else { | |
691 | frold = NULL; | |
692 | } | |
693 | if (inew < new_view.nr) { | |
694 | frnew = &new_view.ranges[inew]; | |
695 | } else { | |
696 | frnew = NULL; | |
697 | } | |
698 | ||
699 | if (frold | |
700 | && (!frnew | |
08dafab4 AK |
701 | || int128_lt(frold->addr.start, frnew->addr.start) |
702 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd AK |
703 | && !flatrange_equal(frold, frnew)))) { |
704 | /* In old, but (not in new, or in new but attributes changed). */ | |
705 | ||
b8af1afb | 706 | if (!adding) { |
72e22d2f | 707 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
708 | as->ops->range_del(as, frold); |
709 | } | |
710 | ||
093bc2cd AK |
711 | ++iold; |
712 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
713 | /* In both (logging may have changed) */ | |
714 | ||
b8af1afb AK |
715 | if (adding) { |
716 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { | |
72e22d2f | 717 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb AK |
718 | as->ops->log_stop(as, frnew); |
719 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { | |
720 | as->ops->log_start(as, frnew); | |
72e22d2f | 721 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 722 | } |
5a583347 AK |
723 | } |
724 | ||
093bc2cd AK |
725 | ++iold; |
726 | ++inew; | |
093bc2cd AK |
727 | } else { |
728 | /* In new */ | |
729 | ||
b8af1afb AK |
730 | if (adding) { |
731 | as->ops->range_add(as, frnew); | |
72e22d2f | 732 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
733 | } |
734 | ||
093bc2cd AK |
735 | ++inew; |
736 | } | |
737 | } | |
b8af1afb AK |
738 | } |
739 | ||
740 | ||
741 | static void address_space_update_topology(AddressSpace *as) | |
742 | { | |
743 | FlatView old_view = as->current_map; | |
744 | FlatView new_view = generate_memory_topology(as->root); | |
745 | ||
746 | address_space_update_topology_pass(as, old_view, new_view, false); | |
747 | address_space_update_topology_pass(as, old_view, new_view, true); | |
748 | ||
cc31e6e7 | 749 | as->current_map = new_view; |
093bc2cd | 750 | flatview_destroy(&old_view); |
3e9d69e7 | 751 | address_space_update_ioeventfds(as); |
093bc2cd AK |
752 | } |
753 | ||
6bba19ba | 754 | static void memory_region_update_topology(MemoryRegion *mr) |
cc31e6e7 | 755 | { |
4ef4db86 | 756 | if (memory_region_transaction_depth) { |
e87c099f | 757 | memory_region_update_pending |= !mr || mr->enabled; |
4ef4db86 AK |
758 | return; |
759 | } | |
760 | ||
6bba19ba AK |
761 | if (mr && !mr->enabled) { |
762 | return; | |
763 | } | |
764 | ||
658b2224 AK |
765 | if (address_space_memory.root) { |
766 | address_space_update_topology(&address_space_memory); | |
767 | } | |
768 | if (address_space_io.root) { | |
769 | address_space_update_topology(&address_space_io); | |
770 | } | |
e87c099f AK |
771 | |
772 | memory_region_update_pending = false; | |
cc31e6e7 AK |
773 | } |
774 | ||
4ef4db86 AK |
775 | void memory_region_transaction_begin(void) |
776 | { | |
777 | ++memory_region_transaction_depth; | |
778 | } | |
779 | ||
780 | void memory_region_transaction_commit(void) | |
781 | { | |
782 | assert(memory_region_transaction_depth); | |
783 | --memory_region_transaction_depth; | |
e87c099f AK |
784 | if (!memory_region_transaction_depth && memory_region_update_pending) { |
785 | memory_region_update_topology(NULL); | |
786 | } | |
4ef4db86 AK |
787 | } |
788 | ||
545e92e0 AK |
789 | static void memory_region_destructor_none(MemoryRegion *mr) |
790 | { | |
791 | } | |
792 | ||
793 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
794 | { | |
795 | qemu_ram_free(mr->ram_addr); | |
796 | } | |
797 | ||
798 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
799 | { | |
800 | qemu_ram_free_from_ptr(mr->ram_addr); | |
801 | } | |
802 | ||
803 | static void memory_region_destructor_iomem(MemoryRegion *mr) | |
804 | { | |
805 | cpu_unregister_io_memory(mr->ram_addr); | |
806 | } | |
807 | ||
d0a9b5bc AK |
808 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
809 | { | |
810 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
75c578dc | 811 | cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK); |
d0a9b5bc AK |
812 | } |
813 | ||
be675c97 AK |
814 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
815 | { | |
2c3579ab | 816 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
817 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
818 | #else | |
819 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
820 | #endif | |
821 | } | |
822 | ||
093bc2cd AK |
823 | void memory_region_init(MemoryRegion *mr, |
824 | const char *name, | |
825 | uint64_t size) | |
826 | { | |
827 | mr->ops = NULL; | |
828 | mr->parent = NULL; | |
08dafab4 AK |
829 | mr->size = int128_make64(size); |
830 | if (size == UINT64_MAX) { | |
831 | mr->size = int128_2_64(); | |
832 | } | |
093bc2cd | 833 | mr->addr = 0; |
b3b00c78 | 834 | mr->subpage = false; |
6bba19ba | 835 | mr->enabled = true; |
14a3c10a | 836 | mr->terminates = false; |
8ea9252a | 837 | mr->ram = false; |
d0a9b5bc | 838 | mr->readable = true; |
fb1cd6f9 | 839 | mr->readonly = false; |
75c578dc | 840 | mr->rom_device = false; |
545e92e0 | 841 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
842 | mr->priority = 0; |
843 | mr->may_overlap = false; | |
844 | mr->alias = NULL; | |
845 | QTAILQ_INIT(&mr->subregions); | |
846 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
847 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 848 | mr->name = g_strdup(name); |
5a583347 | 849 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
850 | mr->ioeventfd_nb = 0; |
851 | mr->ioeventfds = NULL; | |
093bc2cd AK |
852 | } |
853 | ||
854 | static bool memory_region_access_valid(MemoryRegion *mr, | |
855 | target_phys_addr_t addr, | |
897fa7cf AK |
856 | unsigned size, |
857 | bool is_write) | |
093bc2cd | 858 | { |
897fa7cf AK |
859 | if (mr->ops->valid.accepts |
860 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) { | |
861 | return false; | |
862 | } | |
863 | ||
093bc2cd AK |
864 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
865 | return false; | |
866 | } | |
867 | ||
868 | /* Treat zero as compatibility all valid */ | |
869 | if (!mr->ops->valid.max_access_size) { | |
870 | return true; | |
871 | } | |
872 | ||
873 | if (size > mr->ops->valid.max_access_size | |
874 | || size < mr->ops->valid.min_access_size) { | |
875 | return false; | |
876 | } | |
877 | return true; | |
878 | } | |
879 | ||
a621f38d AK |
880 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
881 | target_phys_addr_t addr, | |
882 | unsigned size) | |
093bc2cd | 883 | { |
164a4dcd | 884 | uint64_t data = 0; |
093bc2cd | 885 | |
897fa7cf | 886 | if (!memory_region_access_valid(mr, addr, size, false)) { |
093bc2cd AK |
887 | return -1U; /* FIXME: better signalling */ |
888 | } | |
889 | ||
74901c3b AK |
890 | if (!mr->ops->read) { |
891 | return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr); | |
892 | } | |
893 | ||
093bc2cd | 894 | /* FIXME: support unaligned access */ |
2b50aa1f | 895 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
896 | mr->ops->impl.min_access_size, |
897 | mr->ops->impl.max_access_size, | |
898 | memory_region_read_accessor, mr); | |
093bc2cd AK |
899 | |
900 | return data; | |
901 | } | |
902 | ||
a621f38d | 903 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 904 | { |
a621f38d AK |
905 | if (memory_region_wrong_endianness(mr)) { |
906 | switch (size) { | |
907 | case 1: | |
908 | break; | |
909 | case 2: | |
910 | *data = bswap16(*data); | |
911 | break; | |
912 | case 4: | |
913 | *data = bswap32(*data); | |
1470a0cd | 914 | break; |
a621f38d AK |
915 | default: |
916 | abort(); | |
917 | } | |
918 | } | |
919 | } | |
920 | ||
921 | static uint64_t memory_region_dispatch_read(MemoryRegion *mr, | |
922 | target_phys_addr_t addr, | |
923 | unsigned size) | |
924 | { | |
925 | uint64_t ret; | |
926 | ||
927 | ret = memory_region_dispatch_read1(mr, addr, size); | |
928 | adjust_endianness(mr, &ret, size); | |
929 | return ret; | |
930 | } | |
093bc2cd | 931 | |
a621f38d AK |
932 | static void memory_region_dispatch_write(MemoryRegion *mr, |
933 | target_phys_addr_t addr, | |
934 | uint64_t data, | |
935 | unsigned size) | |
936 | { | |
897fa7cf | 937 | if (!memory_region_access_valid(mr, addr, size, true)) { |
093bc2cd AK |
938 | return; /* FIXME: better signalling */ |
939 | } | |
940 | ||
a621f38d AK |
941 | adjust_endianness(mr, &data, size); |
942 | ||
74901c3b AK |
943 | if (!mr->ops->write) { |
944 | mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data); | |
945 | return; | |
946 | } | |
947 | ||
093bc2cd | 948 | /* FIXME: support unaligned access */ |
2b50aa1f | 949 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
950 | mr->ops->impl.min_access_size, |
951 | mr->ops->impl.max_access_size, | |
952 | memory_region_write_accessor, mr); | |
093bc2cd AK |
953 | } |
954 | ||
093bc2cd AK |
955 | void memory_region_init_io(MemoryRegion *mr, |
956 | const MemoryRegionOps *ops, | |
957 | void *opaque, | |
958 | const char *name, | |
959 | uint64_t size) | |
960 | { | |
961 | memory_region_init(mr, name, size); | |
962 | mr->ops = ops; | |
963 | mr->opaque = opaque; | |
14a3c10a | 964 | mr->terminates = true; |
26a83ad0 | 965 | mr->destructor = memory_region_destructor_iomem; |
a621f38d | 966 | mr->ram_addr = cpu_register_io_memory(mr); |
093bc2cd AK |
967 | } |
968 | ||
969 | void memory_region_init_ram(MemoryRegion *mr, | |
093bc2cd AK |
970 | const char *name, |
971 | uint64_t size) | |
972 | { | |
973 | memory_region_init(mr, name, size); | |
8ea9252a | 974 | mr->ram = true; |
14a3c10a | 975 | mr->terminates = true; |
545e92e0 | 976 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 977 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
978 | } |
979 | ||
980 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
093bc2cd AK |
981 | const char *name, |
982 | uint64_t size, | |
983 | void *ptr) | |
984 | { | |
985 | memory_region_init(mr, name, size); | |
8ea9252a | 986 | mr->ram = true; |
14a3c10a | 987 | mr->terminates = true; |
545e92e0 | 988 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 989 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
990 | } |
991 | ||
992 | void memory_region_init_alias(MemoryRegion *mr, | |
993 | const char *name, | |
994 | MemoryRegion *orig, | |
995 | target_phys_addr_t offset, | |
996 | uint64_t size) | |
997 | { | |
998 | memory_region_init(mr, name, size); | |
999 | mr->alias = orig; | |
1000 | mr->alias_offset = offset; | |
1001 | } | |
1002 | ||
d0a9b5bc AK |
1003 | void memory_region_init_rom_device(MemoryRegion *mr, |
1004 | const MemoryRegionOps *ops, | |
75f5941c | 1005 | void *opaque, |
d0a9b5bc AK |
1006 | const char *name, |
1007 | uint64_t size) | |
1008 | { | |
1009 | memory_region_init(mr, name, size); | |
7bc2b9cd | 1010 | mr->ops = ops; |
75f5941c | 1011 | mr->opaque = opaque; |
d0a9b5bc | 1012 | mr->terminates = true; |
75c578dc | 1013 | mr->rom_device = true; |
d0a9b5bc | 1014 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1015 | mr->ram_addr = qemu_ram_alloc(size, mr); |
a621f38d | 1016 | mr->ram_addr |= cpu_register_io_memory(mr); |
d0a9b5bc AK |
1017 | } |
1018 | ||
1660e72d JK |
1019 | static uint64_t invalid_read(void *opaque, target_phys_addr_t addr, |
1020 | unsigned size) | |
1021 | { | |
1022 | MemoryRegion *mr = opaque; | |
1023 | ||
1024 | if (!mr->warning_printed) { | |
1025 | fprintf(stderr, "Invalid read from memory region %s\n", mr->name); | |
1026 | mr->warning_printed = true; | |
1027 | } | |
1028 | return -1U; | |
1029 | } | |
1030 | ||
1031 | static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data, | |
1032 | unsigned size) | |
1033 | { | |
1034 | MemoryRegion *mr = opaque; | |
1035 | ||
1036 | if (!mr->warning_printed) { | |
1037 | fprintf(stderr, "Invalid write to memory region %s\n", mr->name); | |
1038 | mr->warning_printed = true; | |
1039 | } | |
1040 | } | |
1041 | ||
1042 | static const MemoryRegionOps reservation_ops = { | |
1043 | .read = invalid_read, | |
1044 | .write = invalid_write, | |
1045 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1046 | }; | |
1047 | ||
1048 | void memory_region_init_reservation(MemoryRegion *mr, | |
1049 | const char *name, | |
1050 | uint64_t size) | |
1051 | { | |
1052 | memory_region_init_io(mr, &reservation_ops, mr, name, size); | |
1053 | } | |
1054 | ||
093bc2cd AK |
1055 | void memory_region_destroy(MemoryRegion *mr) |
1056 | { | |
1057 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
545e92e0 | 1058 | mr->destructor(mr); |
093bc2cd | 1059 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1060 | g_free((char *)mr->name); |
1061 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1062 | } |
1063 | ||
1064 | uint64_t memory_region_size(MemoryRegion *mr) | |
1065 | { | |
08dafab4 AK |
1066 | if (int128_eq(mr->size, int128_2_64())) { |
1067 | return UINT64_MAX; | |
1068 | } | |
1069 | return int128_get64(mr->size); | |
093bc2cd AK |
1070 | } |
1071 | ||
8991c79b AK |
1072 | const char *memory_region_name(MemoryRegion *mr) |
1073 | { | |
1074 | return mr->name; | |
1075 | } | |
1076 | ||
8ea9252a AK |
1077 | bool memory_region_is_ram(MemoryRegion *mr) |
1078 | { | |
1079 | return mr->ram; | |
1080 | } | |
1081 | ||
55043ba3 AK |
1082 | bool memory_region_is_logging(MemoryRegion *mr) |
1083 | { | |
1084 | return mr->dirty_log_mask; | |
1085 | } | |
1086 | ||
ce7923da AK |
1087 | bool memory_region_is_rom(MemoryRegion *mr) |
1088 | { | |
1089 | return mr->ram && mr->readonly; | |
1090 | } | |
1091 | ||
093bc2cd AK |
1092 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1093 | { | |
5a583347 AK |
1094 | uint8_t mask = 1 << client; |
1095 | ||
1096 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); | |
6bba19ba | 1097 | memory_region_update_topology(mr); |
093bc2cd AK |
1098 | } |
1099 | ||
1100 | bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr, | |
cd7a45c9 | 1101 | target_phys_addr_t size, unsigned client) |
093bc2cd | 1102 | { |
14a3c10a | 1103 | assert(mr->terminates); |
cd7a45c9 BS |
1104 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1105 | 1 << client); | |
093bc2cd AK |
1106 | } |
1107 | ||
fd4aa979 BS |
1108 | void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1109 | target_phys_addr_t size) | |
093bc2cd | 1110 | { |
14a3c10a | 1111 | assert(mr->terminates); |
fd4aa979 | 1112 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1113 | } |
1114 | ||
1115 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) | |
1116 | { | |
5a583347 AK |
1117 | FlatRange *fr; |
1118 | ||
cc31e6e7 | 1119 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
5a583347 | 1120 | if (fr->mr == mr) { |
72e22d2f AK |
1121 | MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, |
1122 | Forward, log_sync); | |
5a583347 AK |
1123 | } |
1124 | } | |
093bc2cd AK |
1125 | } |
1126 | ||
1127 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1128 | { | |
fb1cd6f9 AK |
1129 | if (mr->readonly != readonly) { |
1130 | mr->readonly = readonly; | |
6bba19ba | 1131 | memory_region_update_topology(mr); |
fb1cd6f9 | 1132 | } |
093bc2cd AK |
1133 | } |
1134 | ||
d0a9b5bc AK |
1135 | void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable) |
1136 | { | |
1137 | if (mr->readable != readable) { | |
1138 | mr->readable = readable; | |
6bba19ba | 1139 | memory_region_update_topology(mr); |
d0a9b5bc AK |
1140 | } |
1141 | } | |
1142 | ||
093bc2cd AK |
1143 | void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1144 | target_phys_addr_t size, unsigned client) | |
1145 | { | |
14a3c10a | 1146 | assert(mr->terminates); |
5a583347 AK |
1147 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1148 | mr->ram_addr + addr + size, | |
1149 | 1 << client); | |
093bc2cd AK |
1150 | } |
1151 | ||
1152 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1153 | { | |
1154 | if (mr->alias) { | |
1155 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1156 | } | |
1157 | ||
14a3c10a | 1158 | assert(mr->terminates); |
093bc2cd | 1159 | |
021d26d1 | 1160 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1161 | } |
1162 | ||
1163 | static void memory_region_update_coalesced_range(MemoryRegion *mr) | |
1164 | { | |
1165 | FlatRange *fr; | |
1166 | CoalescedMemoryRange *cmr; | |
1167 | AddrRange tmp; | |
1168 | ||
cc31e6e7 | 1169 | FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
093bc2cd | 1170 | if (fr->mr == mr) { |
08dafab4 AK |
1171 | qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start), |
1172 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1173 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1174 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1175 | int128_sub(fr->addr.start, |
1176 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1177 | if (!addrrange_intersects(tmp, fr->addr)) { |
1178 | continue; | |
1179 | } | |
1180 | tmp = addrrange_intersection(tmp, fr->addr); | |
08dafab4 AK |
1181 | qemu_register_coalesced_mmio(int128_get64(tmp.start), |
1182 | int128_get64(tmp.size)); | |
093bc2cd AK |
1183 | } |
1184 | } | |
1185 | } | |
1186 | } | |
1187 | ||
1188 | void memory_region_set_coalescing(MemoryRegion *mr) | |
1189 | { | |
1190 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1191 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1192 | } |
1193 | ||
1194 | void memory_region_add_coalescing(MemoryRegion *mr, | |
1195 | target_phys_addr_t offset, | |
1196 | uint64_t size) | |
1197 | { | |
7267c094 | 1198 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1199 | |
08dafab4 | 1200 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1201 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1202 | memory_region_update_coalesced_range(mr); | |
1203 | } | |
1204 | ||
1205 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1206 | { | |
1207 | CoalescedMemoryRange *cmr; | |
1208 | ||
1209 | while (!QTAILQ_EMPTY(&mr->coalesced)) { | |
1210 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1211 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1212 | g_free(cmr); |
093bc2cd AK |
1213 | } |
1214 | memory_region_update_coalesced_range(mr); | |
1215 | } | |
1216 | ||
3e9d69e7 AK |
1217 | void memory_region_add_eventfd(MemoryRegion *mr, |
1218 | target_phys_addr_t addr, | |
1219 | unsigned size, | |
1220 | bool match_data, | |
1221 | uint64_t data, | |
1222 | int fd) | |
1223 | { | |
1224 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1225 | .addr.start = int128_make64(addr), |
1226 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1227 | .match_data = match_data, |
1228 | .data = data, | |
1229 | .fd = fd, | |
1230 | }; | |
1231 | unsigned i; | |
1232 | ||
1233 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
1234 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1235 | break; | |
1236 | } | |
1237 | } | |
1238 | ++mr->ioeventfd_nb; | |
7267c094 | 1239 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1240 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1241 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1242 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1243 | mr->ioeventfds[i] = mrfd; | |
6bba19ba | 1244 | memory_region_update_topology(mr); |
3e9d69e7 AK |
1245 | } |
1246 | ||
1247 | void memory_region_del_eventfd(MemoryRegion *mr, | |
1248 | target_phys_addr_t addr, | |
1249 | unsigned size, | |
1250 | bool match_data, | |
1251 | uint64_t data, | |
1252 | int fd) | |
1253 | { | |
1254 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1255 | .addr.start = int128_make64(addr), |
1256 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1257 | .match_data = match_data, |
1258 | .data = data, | |
1259 | .fd = fd, | |
1260 | }; | |
1261 | unsigned i; | |
1262 | ||
1263 | for (i = 0; i < mr->ioeventfd_nb; ++i) { | |
1264 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1265 | break; | |
1266 | } | |
1267 | } | |
1268 | assert(i != mr->ioeventfd_nb); | |
1269 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1270 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1271 | --mr->ioeventfd_nb; | |
7267c094 | 1272 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1273 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
6bba19ba | 1274 | memory_region_update_topology(mr); |
3e9d69e7 AK |
1275 | } |
1276 | ||
093bc2cd AK |
1277 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1278 | target_phys_addr_t offset, | |
1279 | MemoryRegion *subregion) | |
1280 | { | |
1281 | MemoryRegion *other; | |
1282 | ||
1283 | assert(!subregion->parent); | |
1284 | subregion->parent = mr; | |
1285 | subregion->addr = offset; | |
1286 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1287 | if (subregion->may_overlap || other->may_overlap) { | |
1288 | continue; | |
1289 | } | |
08dafab4 AK |
1290 | if (int128_gt(int128_make64(offset), |
1291 | int128_add(int128_make64(other->addr), other->size)) | |
1292 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1293 | int128_make64(other->addr))) { | |
093bc2cd AK |
1294 | continue; |
1295 | } | |
a5e1cbc8 | 1296 | #if 0 |
860329b2 MW |
1297 | printf("warning: subregion collision %llx/%llx (%s) " |
1298 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1299 | (unsigned long long)offset, |
08dafab4 | 1300 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1301 | subregion->name, |
1302 | (unsigned long long)other->addr, | |
08dafab4 | 1303 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1304 | other->name); |
a5e1cbc8 | 1305 | #endif |
093bc2cd AK |
1306 | } |
1307 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1308 | if (subregion->priority >= other->priority) { | |
1309 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1310 | goto done; | |
1311 | } | |
1312 | } | |
1313 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1314 | done: | |
6bba19ba | 1315 | memory_region_update_topology(mr); |
093bc2cd AK |
1316 | } |
1317 | ||
1318 | ||
1319 | void memory_region_add_subregion(MemoryRegion *mr, | |
1320 | target_phys_addr_t offset, | |
1321 | MemoryRegion *subregion) | |
1322 | { | |
1323 | subregion->may_overlap = false; | |
1324 | subregion->priority = 0; | |
1325 | memory_region_add_subregion_common(mr, offset, subregion); | |
1326 | } | |
1327 | ||
1328 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
1329 | target_phys_addr_t offset, | |
1330 | MemoryRegion *subregion, | |
1331 | unsigned priority) | |
1332 | { | |
1333 | subregion->may_overlap = true; | |
1334 | subregion->priority = priority; | |
1335 | memory_region_add_subregion_common(mr, offset, subregion); | |
1336 | } | |
1337 | ||
1338 | void memory_region_del_subregion(MemoryRegion *mr, | |
1339 | MemoryRegion *subregion) | |
1340 | { | |
1341 | assert(subregion->parent == mr); | |
1342 | subregion->parent = NULL; | |
1343 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
6bba19ba AK |
1344 | memory_region_update_topology(mr); |
1345 | } | |
1346 | ||
1347 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1348 | { | |
1349 | if (enabled == mr->enabled) { | |
1350 | return; | |
1351 | } | |
1352 | mr->enabled = enabled; | |
1353 | memory_region_update_topology(NULL); | |
093bc2cd | 1354 | } |
1c0ffa58 | 1355 | |
2282e1af AK |
1356 | void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr) |
1357 | { | |
1358 | MemoryRegion *parent = mr->parent; | |
1359 | unsigned priority = mr->priority; | |
1360 | bool may_overlap = mr->may_overlap; | |
1361 | ||
1362 | if (addr == mr->addr || !parent) { | |
1363 | mr->addr = addr; | |
1364 | return; | |
1365 | } | |
1366 | ||
1367 | memory_region_transaction_begin(); | |
1368 | memory_region_del_subregion(parent, mr); | |
1369 | if (may_overlap) { | |
1370 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1371 | } else { | |
1372 | memory_region_add_subregion(parent, addr, mr); | |
1373 | } | |
1374 | memory_region_transaction_commit(); | |
1375 | } | |
1376 | ||
4703359e AK |
1377 | void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset) |
1378 | { | |
1379 | target_phys_addr_t old_offset = mr->alias_offset; | |
1380 | ||
1381 | assert(mr->alias); | |
1382 | mr->alias_offset = offset; | |
1383 | ||
1384 | if (offset == old_offset || !mr->parent) { | |
1385 | return; | |
1386 | } | |
1387 | ||
1388 | memory_region_update_topology(mr); | |
1389 | } | |
1390 | ||
e34911c4 AK |
1391 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1392 | { | |
e34911c4 AK |
1393 | return mr->ram_addr; |
1394 | } | |
1395 | ||
e2177955 AK |
1396 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1397 | { | |
1398 | const AddrRange *addr = addr_; | |
1399 | const FlatRange *fr = fr_; | |
1400 | ||
1401 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1402 | return -1; | |
1403 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1404 | return 1; | |
1405 | } | |
1406 | return 0; | |
1407 | } | |
1408 | ||
1409 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1410 | { | |
1411 | return bsearch(&addr, as->current_map.ranges, as->current_map.nr, | |
1412 | sizeof(FlatRange), cmp_flatrange_addr); | |
1413 | } | |
1414 | ||
1415 | MemoryRegionSection memory_region_find(MemoryRegion *address_space, | |
1416 | target_phys_addr_t addr, uint64_t size) | |
1417 | { | |
1418 | AddressSpace *as = memory_region_to_address_space(address_space); | |
1419 | AddrRange range = addrrange_make(int128_make64(addr), | |
1420 | int128_make64(size)); | |
1421 | FlatRange *fr = address_space_lookup(as, range); | |
1422 | MemoryRegionSection ret = { .mr = NULL, .size = 0 }; | |
1423 | ||
1424 | if (!fr) { | |
1425 | return ret; | |
1426 | } | |
1427 | ||
1428 | while (fr > as->current_map.ranges | |
1429 | && addrrange_intersects(fr[-1].addr, range)) { | |
1430 | --fr; | |
1431 | } | |
1432 | ||
1433 | ret.mr = fr->mr; | |
1434 | range = addrrange_intersection(range, fr->addr); | |
1435 | ret.offset_within_region = fr->offset_in_region; | |
1436 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1437 | fr->addr.start)); | |
1438 | ret.size = int128_get64(range.size); | |
1439 | ret.offset_within_address_space = int128_get64(range.start); | |
1440 | return ret; | |
1441 | } | |
1442 | ||
86e775c6 AK |
1443 | void memory_global_sync_dirty_bitmap(MemoryRegion *address_space) |
1444 | { | |
7664e80c AK |
1445 | AddressSpace *as = memory_region_to_address_space(address_space); |
1446 | FlatRange *fr; | |
1447 | ||
7664e80c | 1448 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { |
72e22d2f | 1449 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1450 | } |
1451 | } | |
1452 | ||
1453 | void memory_global_dirty_log_start(void) | |
1454 | { | |
8f77558f | 1455 | cpu_physical_memory_set_dirty_tracking(1); |
7664e80c | 1456 | global_dirty_log = true; |
72e22d2f | 1457 | MEMORY_LISTENER_CALL(log_global_start, Forward); |
7664e80c AK |
1458 | } |
1459 | ||
1460 | void memory_global_dirty_log_stop(void) | |
1461 | { | |
7664e80c | 1462 | global_dirty_log = false; |
72e22d2f | 1463 | MEMORY_LISTENER_CALL(log_global_stop, Reverse); |
8f77558f | 1464 | cpu_physical_memory_set_dirty_tracking(0); |
7664e80c AK |
1465 | } |
1466 | ||
1467 | static void listener_add_address_space(MemoryListener *listener, | |
1468 | AddressSpace *as) | |
1469 | { | |
1470 | FlatRange *fr; | |
1471 | ||
1472 | if (global_dirty_log) { | |
1473 | listener->log_global_start(listener); | |
1474 | } | |
1475 | FOR_EACH_FLAT_RANGE(fr, &as->current_map) { | |
1476 | MemoryRegionSection section = { | |
1477 | .mr = fr->mr, | |
1478 | .address_space = as->root, | |
1479 | .offset_within_region = fr->offset_in_region, | |
1480 | .size = int128_get64(fr->addr.size), | |
1481 | .offset_within_address_space = int128_get64(fr->addr.start), | |
1482 | }; | |
1483 | listener->region_add(listener, §ion); | |
1484 | } | |
1485 | } | |
1486 | ||
1487 | void memory_listener_register(MemoryListener *listener) | |
1488 | { | |
72e22d2f AK |
1489 | MemoryListener *other = NULL; |
1490 | ||
1491 | if (QTAILQ_EMPTY(&memory_listeners) | |
1492 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1493 | memory_listeners)->priority) { | |
1494 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1495 | } else { | |
1496 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1497 | if (listener->priority < other->priority) { | |
1498 | break; | |
1499 | } | |
1500 | } | |
1501 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1502 | } | |
7664e80c AK |
1503 | listener_add_address_space(listener, &address_space_memory); |
1504 | listener_add_address_space(listener, &address_space_io); | |
1505 | } | |
1506 | ||
1507 | void memory_listener_unregister(MemoryListener *listener) | |
1508 | { | |
72e22d2f | 1509 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1510 | } |
e2177955 | 1511 | |
1c0ffa58 AK |
1512 | void set_system_memory_map(MemoryRegion *mr) |
1513 | { | |
cc31e6e7 | 1514 | address_space_memory.root = mr; |
6bba19ba | 1515 | memory_region_update_topology(NULL); |
1c0ffa58 | 1516 | } |
658b2224 AK |
1517 | |
1518 | void set_system_io_map(MemoryRegion *mr) | |
1519 | { | |
1520 | address_space_io.root = mr; | |
6bba19ba | 1521 | memory_region_update_topology(NULL); |
658b2224 | 1522 | } |
314e2987 | 1523 | |
acbbec5d AK |
1524 | uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size) |
1525 | { | |
a621f38d | 1526 | return memory_region_dispatch_read(io_mem_region[io_index], addr, size); |
acbbec5d AK |
1527 | } |
1528 | ||
1529 | void io_mem_write(int io_index, target_phys_addr_t addr, | |
1530 | uint64_t val, unsigned size) | |
1531 | { | |
a621f38d | 1532 | memory_region_dispatch_write(io_mem_region[io_index], addr, val, size); |
acbbec5d AK |
1533 | } |
1534 | ||
314e2987 BS |
1535 | typedef struct MemoryRegionList MemoryRegionList; |
1536 | ||
1537 | struct MemoryRegionList { | |
1538 | const MemoryRegion *mr; | |
1539 | bool printed; | |
1540 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1541 | }; | |
1542 | ||
1543 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1544 | ||
1545 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1546 | const MemoryRegion *mr, unsigned int level, | |
1547 | target_phys_addr_t base, | |
9479c57a | 1548 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1549 | { |
9479c57a JK |
1550 | MemoryRegionList *new_ml, *ml, *next_ml; |
1551 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1552 | const MemoryRegion *submr; |
1553 | unsigned int i; | |
1554 | ||
314e2987 BS |
1555 | if (!mr) { |
1556 | return; | |
1557 | } | |
1558 | ||
1559 | for (i = 0; i < level; i++) { | |
1560 | mon_printf(f, " "); | |
1561 | } | |
1562 | ||
1563 | if (mr->alias) { | |
1564 | MemoryRegionList *ml; | |
1565 | bool found = false; | |
1566 | ||
1567 | /* check if the alias is already in the queue */ | |
9479c57a | 1568 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1569 | if (ml->mr == mr->alias && !ml->printed) { |
1570 | found = true; | |
1571 | } | |
1572 | } | |
1573 | ||
1574 | if (!found) { | |
1575 | ml = g_new(MemoryRegionList, 1); | |
1576 | ml->mr = mr->alias; | |
1577 | ml->printed = false; | |
9479c57a | 1578 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1579 | } |
4896d74b JK |
1580 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1581 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1582 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1583 | base + mr->addr, |
08dafab4 AK |
1584 | base + mr->addr |
1585 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1586 | mr->priority, |
4896d74b JK |
1587 | mr->readable ? 'R' : '-', |
1588 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1589 | : '-', | |
314e2987 BS |
1590 | mr->name, |
1591 | mr->alias->name, | |
1592 | mr->alias_offset, | |
08dafab4 AK |
1593 | mr->alias_offset |
1594 | + (target_phys_addr_t)int128_get64(mr->size) - 1); | |
314e2987 | 1595 | } else { |
4896d74b JK |
1596 | mon_printf(f, |
1597 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1598 | base + mr->addr, |
08dafab4 AK |
1599 | base + mr->addr |
1600 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1601 | mr->priority, |
4896d74b JK |
1602 | mr->readable ? 'R' : '-', |
1603 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1604 | : '-', | |
314e2987 BS |
1605 | mr->name); |
1606 | } | |
9479c57a JK |
1607 | |
1608 | QTAILQ_INIT(&submr_print_queue); | |
1609 | ||
314e2987 | 1610 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1611 | new_ml = g_new(MemoryRegionList, 1); |
1612 | new_ml->mr = submr; | |
1613 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1614 | if (new_ml->mr->addr < ml->mr->addr || | |
1615 | (new_ml->mr->addr == ml->mr->addr && | |
1616 | new_ml->mr->priority > ml->mr->priority)) { | |
1617 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1618 | new_ml = NULL; | |
1619 | break; | |
1620 | } | |
1621 | } | |
1622 | if (new_ml) { | |
1623 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1624 | } | |
1625 | } | |
1626 | ||
1627 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1628 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1629 | alias_print_queue); | |
1630 | } | |
1631 | ||
88365e47 | 1632 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1633 | g_free(ml); |
314e2987 BS |
1634 | } |
1635 | } | |
1636 | ||
1637 | void mtree_info(fprintf_function mon_printf, void *f) | |
1638 | { | |
1639 | MemoryRegionListHead ml_head; | |
1640 | MemoryRegionList *ml, *ml2; | |
1641 | ||
1642 | QTAILQ_INIT(&ml_head); | |
1643 | ||
1644 | mon_printf(f, "memory\n"); | |
1645 | mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head); | |
1646 | ||
1647 | /* print aliased regions */ | |
1648 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1649 | if (!ml->printed) { | |
1650 | mon_printf(f, "%s\n", ml->mr->name); | |
1651 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1652 | } | |
1653 | } | |
1654 | ||
1655 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1656 | g_free(ml); |
314e2987 BS |
1657 | } |
1658 | ||
06631810 JK |
1659 | if (address_space_io.root && |
1660 | !QTAILQ_EMPTY(&address_space_io.root->subregions)) { | |
1661 | QTAILQ_INIT(&ml_head); | |
1662 | mon_printf(f, "I/O\n"); | |
1663 | mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head); | |
1664 | } | |
314e2987 | 1665 | } |