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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
16 | #include "memory.h" | |
1c0ffa58 | 17 | #include "exec-memory.h" |
658b2224 | 18 | #include "ioport.h" |
74901c3b | 19 | #include "bitops.h" |
3e9d69e7 | 20 | #include "kvm.h" |
093bc2cd AK |
21 | #include <assert.h> |
22 | ||
7762c2c1 | 23 | #include "memory-internal.h" |
67d95c15 | 24 | |
4ef4db86 | 25 | unsigned memory_region_transaction_depth = 0; |
7664e80c AK |
26 | static bool global_dirty_log = false; |
27 | ||
72e22d2f AK |
28 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
29 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 30 | |
093bc2cd AK |
31 | typedef struct AddrRange AddrRange; |
32 | ||
8417cebf AK |
33 | /* |
34 | * Note using signed integers limits us to physical addresses at most | |
35 | * 63 bits wide. They are needed for negative offsetting in aliases | |
36 | * (large MemoryRegion::alias_offset). | |
37 | */ | |
093bc2cd | 38 | struct AddrRange { |
08dafab4 AK |
39 | Int128 start; |
40 | Int128 size; | |
093bc2cd AK |
41 | }; |
42 | ||
08dafab4 | 43 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
44 | { |
45 | return (AddrRange) { start, size }; | |
46 | } | |
47 | ||
48 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
49 | { | |
08dafab4 | 50 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
51 | } |
52 | ||
08dafab4 | 53 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 54 | { |
08dafab4 | 55 | return int128_add(r.start, r.size); |
093bc2cd AK |
56 | } |
57 | ||
08dafab4 | 58 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 59 | { |
08dafab4 | 60 | int128_addto(&range.start, delta); |
093bc2cd AK |
61 | return range; |
62 | } | |
63 | ||
08dafab4 AK |
64 | static bool addrrange_contains(AddrRange range, Int128 addr) |
65 | { | |
66 | return int128_ge(addr, range.start) | |
67 | && int128_lt(addr, addrrange_end(range)); | |
68 | } | |
69 | ||
093bc2cd AK |
70 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
71 | { | |
08dafab4 AK |
72 | return addrrange_contains(r1, r2.start) |
73 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
74 | } |
75 | ||
76 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
77 | { | |
08dafab4 AK |
78 | Int128 start = int128_max(r1.start, r2.start); |
79 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
80 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
81 | } |
82 | ||
0e0d36b4 AK |
83 | enum ListenerDirection { Forward, Reverse }; |
84 | ||
7376e582 AK |
85 | static bool memory_listener_match(MemoryListener *listener, |
86 | MemoryRegionSection *section) | |
87 | { | |
88 | return !listener->address_space_filter | |
89 | || listener->address_space_filter == section->address_space; | |
90 | } | |
91 | ||
92 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
93 | do { \ |
94 | MemoryListener *_listener; \ | |
95 | \ | |
96 | switch (_direction) { \ | |
97 | case Forward: \ | |
98 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
99 | _listener->_callback(_listener, ##_args); \ | |
100 | } \ | |
101 | break; \ | |
102 | case Reverse: \ | |
103 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
104 | memory_listeners, link) { \ | |
105 | _listener->_callback(_listener, ##_args); \ | |
106 | } \ | |
107 | break; \ | |
108 | default: \ | |
109 | abort(); \ | |
110 | } \ | |
111 | } while (0) | |
112 | ||
7376e582 AK |
113 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
114 | do { \ | |
115 | MemoryListener *_listener; \ | |
116 | \ | |
117 | switch (_direction) { \ | |
118 | case Forward: \ | |
119 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
120 | if (memory_listener_match(_listener, _section)) { \ | |
121 | _listener->_callback(_listener, _section, ##_args); \ | |
122 | } \ | |
123 | } \ | |
124 | break; \ | |
125 | case Reverse: \ | |
126 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
127 | memory_listeners, link) { \ | |
128 | if (memory_listener_match(_listener, _section)) { \ | |
129 | _listener->_callback(_listener, _section, ##_args); \ | |
130 | } \ | |
131 | } \ | |
132 | break; \ | |
133 | default: \ | |
134 | abort(); \ | |
135 | } \ | |
136 | } while (0) | |
137 | ||
0e0d36b4 | 138 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 139 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 AK |
140 | .mr = (fr)->mr, \ |
141 | .address_space = (as)->root, \ | |
142 | .offset_within_region = (fr)->offset_in_region, \ | |
143 | .size = int128_get64((fr)->addr.size), \ | |
144 | .offset_within_address_space = int128_get64((fr)->addr.start), \ | |
7a8499e8 | 145 | .readonly = (fr)->readonly, \ |
7376e582 | 146 | })) |
0e0d36b4 | 147 | |
093bc2cd AK |
148 | struct CoalescedMemoryRange { |
149 | AddrRange addr; | |
150 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
151 | }; | |
152 | ||
3e9d69e7 AK |
153 | struct MemoryRegionIoeventfd { |
154 | AddrRange addr; | |
155 | bool match_data; | |
156 | uint64_t data; | |
753d5e14 | 157 | EventNotifier *e; |
3e9d69e7 AK |
158 | }; |
159 | ||
160 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
161 | MemoryRegionIoeventfd b) | |
162 | { | |
08dafab4 | 163 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 164 | return true; |
08dafab4 | 165 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 166 | return false; |
08dafab4 | 167 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 168 | return true; |
08dafab4 | 169 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
170 | return false; |
171 | } else if (a.match_data < b.match_data) { | |
172 | return true; | |
173 | } else if (a.match_data > b.match_data) { | |
174 | return false; | |
175 | } else if (a.match_data) { | |
176 | if (a.data < b.data) { | |
177 | return true; | |
178 | } else if (a.data > b.data) { | |
179 | return false; | |
180 | } | |
181 | } | |
753d5e14 | 182 | if (a.e < b.e) { |
3e9d69e7 | 183 | return true; |
753d5e14 | 184 | } else if (a.e > b.e) { |
3e9d69e7 AK |
185 | return false; |
186 | } | |
187 | return false; | |
188 | } | |
189 | ||
190 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
191 | MemoryRegionIoeventfd b) | |
192 | { | |
193 | return !memory_region_ioeventfd_before(a, b) | |
194 | && !memory_region_ioeventfd_before(b, a); | |
195 | } | |
196 | ||
093bc2cd AK |
197 | typedef struct FlatRange FlatRange; |
198 | typedef struct FlatView FlatView; | |
199 | ||
200 | /* Range of memory in the global map. Addresses are absolute. */ | |
201 | struct FlatRange { | |
202 | MemoryRegion *mr; | |
203 | target_phys_addr_t offset_in_region; | |
204 | AddrRange addr; | |
5a583347 | 205 | uint8_t dirty_log_mask; |
d0a9b5bc | 206 | bool readable; |
fb1cd6f9 | 207 | bool readonly; |
093bc2cd AK |
208 | }; |
209 | ||
210 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
211 | * order. | |
212 | */ | |
213 | struct FlatView { | |
214 | FlatRange *ranges; | |
215 | unsigned nr; | |
216 | unsigned nr_allocated; | |
217 | }; | |
218 | ||
cc31e6e7 AK |
219 | typedef struct AddressSpace AddressSpace; |
220 | typedef struct AddressSpaceOps AddressSpaceOps; | |
221 | ||
222 | /* A system address space - I/O, memory, etc. */ | |
223 | struct AddressSpace { | |
cc31e6e7 | 224 | MemoryRegion *root; |
8786db7c | 225 | FlatView *current_map; |
3e9d69e7 AK |
226 | int ioeventfd_nb; |
227 | MemoryRegionIoeventfd *ioeventfds; | |
cc31e6e7 AK |
228 | }; |
229 | ||
093bc2cd AK |
230 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
231 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
232 | ||
093bc2cd AK |
233 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
234 | { | |
235 | return a->mr == b->mr | |
236 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 237 | && a->offset_in_region == b->offset_in_region |
fb1cd6f9 AK |
238 | && a->readable == b->readable |
239 | && a->readonly == b->readonly; | |
093bc2cd AK |
240 | } |
241 | ||
242 | static void flatview_init(FlatView *view) | |
243 | { | |
244 | view->ranges = NULL; | |
245 | view->nr = 0; | |
246 | view->nr_allocated = 0; | |
247 | } | |
248 | ||
249 | /* Insert a range into a given position. Caller is responsible for maintaining | |
250 | * sorting order. | |
251 | */ | |
252 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
253 | { | |
254 | if (view->nr == view->nr_allocated) { | |
255 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 256 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
257 | view->nr_allocated * sizeof(*view->ranges)); |
258 | } | |
259 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
260 | (view->nr - pos) * sizeof(FlatRange)); | |
261 | view->ranges[pos] = *range; | |
262 | ++view->nr; | |
263 | } | |
264 | ||
265 | static void flatview_destroy(FlatView *view) | |
266 | { | |
7267c094 | 267 | g_free(view->ranges); |
093bc2cd AK |
268 | } |
269 | ||
3d8e6bf9 AK |
270 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
271 | { | |
08dafab4 | 272 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 273 | && r1->mr == r2->mr |
08dafab4 AK |
274 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
275 | r1->addr.size), | |
276 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 277 | && r1->dirty_log_mask == r2->dirty_log_mask |
fb1cd6f9 AK |
278 | && r1->readable == r2->readable |
279 | && r1->readonly == r2->readonly; | |
3d8e6bf9 AK |
280 | } |
281 | ||
282 | /* Attempt to simplify a view by merging ajacent ranges */ | |
283 | static void flatview_simplify(FlatView *view) | |
284 | { | |
285 | unsigned i, j; | |
286 | ||
287 | i = 0; | |
288 | while (i < view->nr) { | |
289 | j = i + 1; | |
290 | while (j < view->nr | |
291 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 292 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
293 | ++j; |
294 | } | |
295 | ++i; | |
296 | memmove(&view->ranges[i], &view->ranges[j], | |
297 | (view->nr - j) * sizeof(view->ranges[j])); | |
298 | view->nr -= j - i; | |
299 | } | |
300 | } | |
301 | ||
164a4dcd AK |
302 | static void memory_region_read_accessor(void *opaque, |
303 | target_phys_addr_t addr, | |
304 | uint64_t *value, | |
305 | unsigned size, | |
306 | unsigned shift, | |
307 | uint64_t mask) | |
308 | { | |
309 | MemoryRegion *mr = opaque; | |
310 | uint64_t tmp; | |
311 | ||
d410515e JK |
312 | if (mr->flush_coalesced_mmio) { |
313 | qemu_flush_coalesced_mmio_buffer(); | |
314 | } | |
164a4dcd AK |
315 | tmp = mr->ops->read(mr->opaque, addr, size); |
316 | *value |= (tmp & mask) << shift; | |
317 | } | |
318 | ||
319 | static void memory_region_write_accessor(void *opaque, | |
320 | target_phys_addr_t addr, | |
321 | uint64_t *value, | |
322 | unsigned size, | |
323 | unsigned shift, | |
324 | uint64_t mask) | |
325 | { | |
326 | MemoryRegion *mr = opaque; | |
327 | uint64_t tmp; | |
328 | ||
d410515e JK |
329 | if (mr->flush_coalesced_mmio) { |
330 | qemu_flush_coalesced_mmio_buffer(); | |
331 | } | |
164a4dcd AK |
332 | tmp = (*value >> shift) & mask; |
333 | mr->ops->write(mr->opaque, addr, tmp, size); | |
334 | } | |
335 | ||
336 | static void access_with_adjusted_size(target_phys_addr_t addr, | |
337 | uint64_t *value, | |
338 | unsigned size, | |
339 | unsigned access_size_min, | |
340 | unsigned access_size_max, | |
341 | void (*access)(void *opaque, | |
342 | target_phys_addr_t addr, | |
343 | uint64_t *value, | |
344 | unsigned size, | |
345 | unsigned shift, | |
346 | uint64_t mask), | |
347 | void *opaque) | |
348 | { | |
349 | uint64_t access_mask; | |
350 | unsigned access_size; | |
351 | unsigned i; | |
352 | ||
353 | if (!access_size_min) { | |
354 | access_size_min = 1; | |
355 | } | |
356 | if (!access_size_max) { | |
357 | access_size_max = 4; | |
358 | } | |
359 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
360 | access_mask = -1ULL >> (64 - access_size * 8); | |
361 | for (i = 0; i < size; i += access_size) { | |
362 | /* FIXME: big-endian support */ | |
363 | access(opaque, addr + i, value, access_size, i * 8, access_mask); | |
364 | } | |
365 | } | |
366 | ||
8df8a843 | 367 | static AddressSpace address_space_memory; |
cc31e6e7 | 368 | |
627a0e90 AK |
369 | static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
370 | unsigned width, bool write) | |
371 | { | |
372 | const MemoryRegionPortio *mrp; | |
373 | ||
374 | for (mrp = mr->ops->old_portio; mrp->size; ++mrp) { | |
375 | if (offset >= mrp->offset && offset < mrp->offset + mrp->len | |
376 | && width == mrp->size | |
377 | && (write ? (bool)mrp->write : (bool)mrp->read)) { | |
378 | return mrp; | |
379 | } | |
380 | } | |
381 | return NULL; | |
382 | } | |
383 | ||
658b2224 AK |
384 | static void memory_region_iorange_read(IORange *iorange, |
385 | uint64_t offset, | |
386 | unsigned width, | |
387 | uint64_t *data) | |
388 | { | |
a2d33521 AK |
389 | MemoryRegionIORange *mrio |
390 | = container_of(iorange, MemoryRegionIORange, iorange); | |
391 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 392 | |
a2d33521 | 393 | offset += mrio->offset; |
627a0e90 | 394 | if (mr->ops->old_portio) { |
a2d33521 AK |
395 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
396 | width, false); | |
627a0e90 AK |
397 | |
398 | *data = ((uint64_t)1 << (width * 8)) - 1; | |
399 | if (mrp) { | |
2b50aa1f | 400 | *data = mrp->read(mr->opaque, offset); |
03808f58 | 401 | } else if (width == 2) { |
a2d33521 | 402 | mrp = find_portio(mr, offset - mrio->offset, 1, false); |
03808f58 | 403 | assert(mrp); |
2b50aa1f AK |
404 | *data = mrp->read(mr->opaque, offset) | |
405 | (mrp->read(mr->opaque, offset + 1) << 8); | |
627a0e90 AK |
406 | } |
407 | return; | |
408 | } | |
3a130f4e | 409 | *data = 0; |
2b50aa1f | 410 | access_with_adjusted_size(offset, data, width, |
3a130f4e AK |
411 | mr->ops->impl.min_access_size, |
412 | mr->ops->impl.max_access_size, | |
413 | memory_region_read_accessor, mr); | |
658b2224 AK |
414 | } |
415 | ||
416 | static void memory_region_iorange_write(IORange *iorange, | |
417 | uint64_t offset, | |
418 | unsigned width, | |
419 | uint64_t data) | |
420 | { | |
a2d33521 AK |
421 | MemoryRegionIORange *mrio |
422 | = container_of(iorange, MemoryRegionIORange, iorange); | |
423 | MemoryRegion *mr = mrio->mr; | |
658b2224 | 424 | |
a2d33521 | 425 | offset += mrio->offset; |
627a0e90 | 426 | if (mr->ops->old_portio) { |
a2d33521 AK |
427 | const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset, |
428 | width, true); | |
627a0e90 AK |
429 | |
430 | if (mrp) { | |
2b50aa1f | 431 | mrp->write(mr->opaque, offset, data); |
03808f58 | 432 | } else if (width == 2) { |
7e2a62d8 | 433 | mrp = find_portio(mr, offset - mrio->offset, 1, true); |
03808f58 | 434 | assert(mrp); |
2b50aa1f AK |
435 | mrp->write(mr->opaque, offset, data & 0xff); |
436 | mrp->write(mr->opaque, offset + 1, data >> 8); | |
627a0e90 AK |
437 | } |
438 | return; | |
439 | } | |
2b50aa1f | 440 | access_with_adjusted_size(offset, &data, width, |
3a130f4e AK |
441 | mr->ops->impl.min_access_size, |
442 | mr->ops->impl.max_access_size, | |
443 | memory_region_write_accessor, mr); | |
658b2224 AK |
444 | } |
445 | ||
a2d33521 AK |
446 | static void memory_region_iorange_destructor(IORange *iorange) |
447 | { | |
448 | g_free(container_of(iorange, MemoryRegionIORange, iorange)); | |
449 | } | |
450 | ||
93632747 | 451 | const IORangeOps memory_region_iorange_ops = { |
658b2224 AK |
452 | .read = memory_region_iorange_read, |
453 | .write = memory_region_iorange_write, | |
a2d33521 | 454 | .destructor = memory_region_iorange_destructor, |
658b2224 AK |
455 | }; |
456 | ||
8df8a843 | 457 | static AddressSpace address_space_io; |
658b2224 | 458 | |
e2177955 AK |
459 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
460 | { | |
461 | while (mr->parent) { | |
462 | mr = mr->parent; | |
463 | } | |
464 | if (mr == address_space_memory.root) { | |
465 | return &address_space_memory; | |
466 | } | |
467 | if (mr == address_space_io.root) { | |
468 | return &address_space_io; | |
469 | } | |
470 | abort(); | |
471 | } | |
472 | ||
093bc2cd AK |
473 | /* Render a memory region into the global view. Ranges in @view obscure |
474 | * ranges in @mr. | |
475 | */ | |
476 | static void render_memory_region(FlatView *view, | |
477 | MemoryRegion *mr, | |
08dafab4 | 478 | Int128 base, |
fb1cd6f9 AK |
479 | AddrRange clip, |
480 | bool readonly) | |
093bc2cd AK |
481 | { |
482 | MemoryRegion *subregion; | |
483 | unsigned i; | |
484 | target_phys_addr_t offset_in_region; | |
08dafab4 AK |
485 | Int128 remain; |
486 | Int128 now; | |
093bc2cd AK |
487 | FlatRange fr; |
488 | AddrRange tmp; | |
489 | ||
6bba19ba AK |
490 | if (!mr->enabled) { |
491 | return; | |
492 | } | |
493 | ||
08dafab4 | 494 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 495 | readonly |= mr->readonly; |
093bc2cd AK |
496 | |
497 | tmp = addrrange_make(base, mr->size); | |
498 | ||
499 | if (!addrrange_intersects(tmp, clip)) { | |
500 | return; | |
501 | } | |
502 | ||
503 | clip = addrrange_intersection(tmp, clip); | |
504 | ||
505 | if (mr->alias) { | |
08dafab4 AK |
506 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
507 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 508 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
509 | return; |
510 | } | |
511 | ||
512 | /* Render subregions in priority order. */ | |
513 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 514 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
515 | } |
516 | ||
14a3c10a | 517 | if (!mr->terminates) { |
093bc2cd AK |
518 | return; |
519 | } | |
520 | ||
08dafab4 | 521 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
522 | base = clip.start; |
523 | remain = clip.size; | |
524 | ||
525 | /* Render the region itself into any gaps left by the current view. */ | |
08dafab4 AK |
526 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
527 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
528 | continue; |
529 | } | |
08dafab4 AK |
530 | if (int128_lt(base, view->ranges[i].addr.start)) { |
531 | now = int128_min(remain, | |
532 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
533 | fr.mr = mr; |
534 | fr.offset_in_region = offset_in_region; | |
535 | fr.addr = addrrange_make(base, now); | |
5a583347 | 536 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 537 | fr.readable = mr->readable; |
fb1cd6f9 | 538 | fr.readonly = readonly; |
093bc2cd AK |
539 | flatview_insert(view, i, &fr); |
540 | ++i; | |
08dafab4 AK |
541 | int128_addto(&base, now); |
542 | offset_in_region += int128_get64(now); | |
543 | int128_subfrom(&remain, now); | |
093bc2cd | 544 | } |
08dafab4 AK |
545 | if (int128_eq(base, view->ranges[i].addr.start)) { |
546 | now = int128_min(remain, view->ranges[i].addr.size); | |
547 | int128_addto(&base, now); | |
548 | offset_in_region += int128_get64(now); | |
549 | int128_subfrom(&remain, now); | |
093bc2cd AK |
550 | } |
551 | } | |
08dafab4 | 552 | if (int128_nz(remain)) { |
093bc2cd AK |
553 | fr.mr = mr; |
554 | fr.offset_in_region = offset_in_region; | |
555 | fr.addr = addrrange_make(base, remain); | |
5a583347 | 556 | fr.dirty_log_mask = mr->dirty_log_mask; |
d0a9b5bc | 557 | fr.readable = mr->readable; |
fb1cd6f9 | 558 | fr.readonly = readonly; |
093bc2cd AK |
559 | flatview_insert(view, i, &fr); |
560 | } | |
561 | } | |
562 | ||
563 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
564 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
565 | { | |
566 | FlatView view; | |
567 | ||
568 | flatview_init(&view); | |
569 | ||
08dafab4 AK |
570 | render_memory_region(&view, mr, int128_zero(), |
571 | addrrange_make(int128_zero(), int128_2_64()), false); | |
3d8e6bf9 | 572 | flatview_simplify(&view); |
093bc2cd AK |
573 | |
574 | return view; | |
575 | } | |
576 | ||
3e9d69e7 AK |
577 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
578 | MemoryRegionIoeventfd *fds_new, | |
579 | unsigned fds_new_nb, | |
580 | MemoryRegionIoeventfd *fds_old, | |
581 | unsigned fds_old_nb) | |
582 | { | |
583 | unsigned iold, inew; | |
80a1ea37 AK |
584 | MemoryRegionIoeventfd *fd; |
585 | MemoryRegionSection section; | |
3e9d69e7 AK |
586 | |
587 | /* Generate a symmetric difference of the old and new fd sets, adding | |
588 | * and deleting as necessary. | |
589 | */ | |
590 | ||
591 | iold = inew = 0; | |
592 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
593 | if (iold < fds_old_nb | |
594 | && (inew == fds_new_nb | |
595 | || memory_region_ioeventfd_before(fds_old[iold], | |
596 | fds_new[inew]))) { | |
80a1ea37 AK |
597 | fd = &fds_old[iold]; |
598 | section = (MemoryRegionSection) { | |
599 | .address_space = as->root, | |
600 | .offset_within_address_space = int128_get64(fd->addr.start), | |
601 | .size = int128_get64(fd->addr.size), | |
602 | }; | |
603 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 604 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
605 | ++iold; |
606 | } else if (inew < fds_new_nb | |
607 | && (iold == fds_old_nb | |
608 | || memory_region_ioeventfd_before(fds_new[inew], | |
609 | fds_old[iold]))) { | |
80a1ea37 AK |
610 | fd = &fds_new[inew]; |
611 | section = (MemoryRegionSection) { | |
612 | .address_space = as->root, | |
613 | .offset_within_address_space = int128_get64(fd->addr.start), | |
614 | .size = int128_get64(fd->addr.size), | |
615 | }; | |
616 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 617 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
618 | ++inew; |
619 | } else { | |
620 | ++iold; | |
621 | ++inew; | |
622 | } | |
623 | } | |
624 | } | |
625 | ||
626 | static void address_space_update_ioeventfds(AddressSpace *as) | |
627 | { | |
628 | FlatRange *fr; | |
629 | unsigned ioeventfd_nb = 0; | |
630 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
631 | AddrRange tmp; | |
632 | unsigned i; | |
633 | ||
8786db7c | 634 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
3e9d69e7 AK |
635 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
636 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
637 | int128_sub(fr->addr.start, |
638 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
639 | if (addrrange_intersects(fr->addr, tmp)) { |
640 | ++ioeventfd_nb; | |
7267c094 | 641 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
642 | ioeventfd_nb * sizeof(*ioeventfds)); |
643 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
644 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
645 | } | |
646 | } | |
647 | } | |
648 | ||
649 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
650 | as->ioeventfds, as->ioeventfd_nb); | |
651 | ||
7267c094 | 652 | g_free(as->ioeventfds); |
3e9d69e7 AK |
653 | as->ioeventfds = ioeventfds; |
654 | as->ioeventfd_nb = ioeventfd_nb; | |
655 | } | |
656 | ||
b8af1afb AK |
657 | static void address_space_update_topology_pass(AddressSpace *as, |
658 | FlatView old_view, | |
659 | FlatView new_view, | |
660 | bool adding) | |
093bc2cd | 661 | { |
093bc2cd AK |
662 | unsigned iold, inew; |
663 | FlatRange *frold, *frnew; | |
093bc2cd AK |
664 | |
665 | /* Generate a symmetric difference of the old and new memory maps. | |
666 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
667 | */ | |
668 | iold = inew = 0; | |
669 | while (iold < old_view.nr || inew < new_view.nr) { | |
670 | if (iold < old_view.nr) { | |
671 | frold = &old_view.ranges[iold]; | |
672 | } else { | |
673 | frold = NULL; | |
674 | } | |
675 | if (inew < new_view.nr) { | |
676 | frnew = &new_view.ranges[inew]; | |
677 | } else { | |
678 | frnew = NULL; | |
679 | } | |
680 | ||
681 | if (frold | |
682 | && (!frnew | |
08dafab4 AK |
683 | || int128_lt(frold->addr.start, frnew->addr.start) |
684 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd AK |
685 | && !flatrange_equal(frold, frnew)))) { |
686 | /* In old, but (not in new, or in new but attributes changed). */ | |
687 | ||
b8af1afb | 688 | if (!adding) { |
72e22d2f | 689 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
690 | } |
691 | ||
093bc2cd AK |
692 | ++iold; |
693 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
694 | /* In both (logging may have changed) */ | |
695 | ||
b8af1afb | 696 | if (adding) { |
50c1e149 | 697 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 698 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 699 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 700 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 701 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 702 | } |
5a583347 AK |
703 | } |
704 | ||
093bc2cd AK |
705 | ++iold; |
706 | ++inew; | |
093bc2cd AK |
707 | } else { |
708 | /* In new */ | |
709 | ||
b8af1afb | 710 | if (adding) { |
72e22d2f | 711 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
712 | } |
713 | ||
093bc2cd AK |
714 | ++inew; |
715 | } | |
716 | } | |
b8af1afb AK |
717 | } |
718 | ||
719 | ||
720 | static void address_space_update_topology(AddressSpace *as) | |
721 | { | |
8786db7c | 722 | FlatView old_view = *as->current_map; |
b8af1afb AK |
723 | FlatView new_view = generate_memory_topology(as->root); |
724 | ||
725 | address_space_update_topology_pass(as, old_view, new_view, false); | |
726 | address_space_update_topology_pass(as, old_view, new_view, true); | |
727 | ||
8786db7c | 728 | *as->current_map = new_view; |
093bc2cd | 729 | flatview_destroy(&old_view); |
3e9d69e7 | 730 | address_space_update_ioeventfds(as); |
093bc2cd AK |
731 | } |
732 | ||
4ef4db86 AK |
733 | void memory_region_transaction_begin(void) |
734 | { | |
bb880ded | 735 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
736 | ++memory_region_transaction_depth; |
737 | } | |
738 | ||
739 | void memory_region_transaction_commit(void) | |
740 | { | |
741 | assert(memory_region_transaction_depth); | |
742 | --memory_region_transaction_depth; | |
02e2b95f JK |
743 | if (!memory_region_transaction_depth) { |
744 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
745 | ||
746 | if (address_space_memory.root) { | |
747 | address_space_update_topology(&address_space_memory); | |
748 | } | |
749 | if (address_space_io.root) { | |
750 | address_space_update_topology(&address_space_io); | |
751 | } | |
752 | ||
753 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
e87c099f | 754 | } |
4ef4db86 AK |
755 | } |
756 | ||
545e92e0 AK |
757 | static void memory_region_destructor_none(MemoryRegion *mr) |
758 | { | |
759 | } | |
760 | ||
761 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
762 | { | |
763 | qemu_ram_free(mr->ram_addr); | |
764 | } | |
765 | ||
766 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) | |
767 | { | |
768 | qemu_ram_free_from_ptr(mr->ram_addr); | |
769 | } | |
770 | ||
771 | static void memory_region_destructor_iomem(MemoryRegion *mr) | |
772 | { | |
545e92e0 AK |
773 | } |
774 | ||
d0a9b5bc AK |
775 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
776 | { | |
777 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
778 | } |
779 | ||
be675c97 AK |
780 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
781 | { | |
2c3579ab | 782 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
783 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
784 | #else | |
785 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
786 | #endif | |
787 | } | |
788 | ||
093bc2cd AK |
789 | void memory_region_init(MemoryRegion *mr, |
790 | const char *name, | |
791 | uint64_t size) | |
792 | { | |
793 | mr->ops = NULL; | |
794 | mr->parent = NULL; | |
08dafab4 AK |
795 | mr->size = int128_make64(size); |
796 | if (size == UINT64_MAX) { | |
797 | mr->size = int128_2_64(); | |
798 | } | |
093bc2cd | 799 | mr->addr = 0; |
b3b00c78 | 800 | mr->subpage = false; |
6bba19ba | 801 | mr->enabled = true; |
14a3c10a | 802 | mr->terminates = false; |
8ea9252a | 803 | mr->ram = false; |
d0a9b5bc | 804 | mr->readable = true; |
fb1cd6f9 | 805 | mr->readonly = false; |
75c578dc | 806 | mr->rom_device = false; |
545e92e0 | 807 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
808 | mr->priority = 0; |
809 | mr->may_overlap = false; | |
810 | mr->alias = NULL; | |
811 | QTAILQ_INIT(&mr->subregions); | |
812 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
813 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 814 | mr->name = g_strdup(name); |
5a583347 | 815 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
816 | mr->ioeventfd_nb = 0; |
817 | mr->ioeventfds = NULL; | |
d410515e | 818 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
819 | } |
820 | ||
821 | static bool memory_region_access_valid(MemoryRegion *mr, | |
822 | target_phys_addr_t addr, | |
897fa7cf AK |
823 | unsigned size, |
824 | bool is_write) | |
093bc2cd | 825 | { |
897fa7cf AK |
826 | if (mr->ops->valid.accepts |
827 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) { | |
828 | return false; | |
829 | } | |
830 | ||
093bc2cd AK |
831 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
832 | return false; | |
833 | } | |
834 | ||
835 | /* Treat zero as compatibility all valid */ | |
836 | if (!mr->ops->valid.max_access_size) { | |
837 | return true; | |
838 | } | |
839 | ||
840 | if (size > mr->ops->valid.max_access_size | |
841 | || size < mr->ops->valid.min_access_size) { | |
842 | return false; | |
843 | } | |
844 | return true; | |
845 | } | |
846 | ||
a621f38d AK |
847 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
848 | target_phys_addr_t addr, | |
849 | unsigned size) | |
093bc2cd | 850 | { |
164a4dcd | 851 | uint64_t data = 0; |
093bc2cd | 852 | |
897fa7cf | 853 | if (!memory_region_access_valid(mr, addr, size, false)) { |
093bc2cd AK |
854 | return -1U; /* FIXME: better signalling */ |
855 | } | |
856 | ||
74901c3b AK |
857 | if (!mr->ops->read) { |
858 | return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr); | |
859 | } | |
860 | ||
093bc2cd | 861 | /* FIXME: support unaligned access */ |
2b50aa1f | 862 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
863 | mr->ops->impl.min_access_size, |
864 | mr->ops->impl.max_access_size, | |
865 | memory_region_read_accessor, mr); | |
093bc2cd AK |
866 | |
867 | return data; | |
868 | } | |
869 | ||
a621f38d | 870 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 871 | { |
a621f38d AK |
872 | if (memory_region_wrong_endianness(mr)) { |
873 | switch (size) { | |
874 | case 1: | |
875 | break; | |
876 | case 2: | |
877 | *data = bswap16(*data); | |
878 | break; | |
879 | case 4: | |
880 | *data = bswap32(*data); | |
1470a0cd | 881 | break; |
a621f38d AK |
882 | default: |
883 | abort(); | |
884 | } | |
885 | } | |
886 | } | |
887 | ||
888 | static uint64_t memory_region_dispatch_read(MemoryRegion *mr, | |
889 | target_phys_addr_t addr, | |
890 | unsigned size) | |
891 | { | |
892 | uint64_t ret; | |
893 | ||
894 | ret = memory_region_dispatch_read1(mr, addr, size); | |
895 | adjust_endianness(mr, &ret, size); | |
896 | return ret; | |
897 | } | |
093bc2cd | 898 | |
a621f38d AK |
899 | static void memory_region_dispatch_write(MemoryRegion *mr, |
900 | target_phys_addr_t addr, | |
901 | uint64_t data, | |
902 | unsigned size) | |
903 | { | |
897fa7cf | 904 | if (!memory_region_access_valid(mr, addr, size, true)) { |
093bc2cd AK |
905 | return; /* FIXME: better signalling */ |
906 | } | |
907 | ||
a621f38d AK |
908 | adjust_endianness(mr, &data, size); |
909 | ||
74901c3b AK |
910 | if (!mr->ops->write) { |
911 | mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data); | |
912 | return; | |
913 | } | |
914 | ||
093bc2cd | 915 | /* FIXME: support unaligned access */ |
2b50aa1f | 916 | access_with_adjusted_size(addr, &data, size, |
164a4dcd AK |
917 | mr->ops->impl.min_access_size, |
918 | mr->ops->impl.max_access_size, | |
919 | memory_region_write_accessor, mr); | |
093bc2cd AK |
920 | } |
921 | ||
093bc2cd AK |
922 | void memory_region_init_io(MemoryRegion *mr, |
923 | const MemoryRegionOps *ops, | |
924 | void *opaque, | |
925 | const char *name, | |
926 | uint64_t size) | |
927 | { | |
928 | memory_region_init(mr, name, size); | |
929 | mr->ops = ops; | |
930 | mr->opaque = opaque; | |
14a3c10a | 931 | mr->terminates = true; |
26a83ad0 | 932 | mr->destructor = memory_region_destructor_iomem; |
97161e17 | 933 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
934 | } |
935 | ||
936 | void memory_region_init_ram(MemoryRegion *mr, | |
093bc2cd AK |
937 | const char *name, |
938 | uint64_t size) | |
939 | { | |
940 | memory_region_init(mr, name, size); | |
8ea9252a | 941 | mr->ram = true; |
14a3c10a | 942 | mr->terminates = true; |
545e92e0 | 943 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 944 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
945 | } |
946 | ||
947 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
093bc2cd AK |
948 | const char *name, |
949 | uint64_t size, | |
950 | void *ptr) | |
951 | { | |
952 | memory_region_init(mr, name, size); | |
8ea9252a | 953 | mr->ram = true; |
14a3c10a | 954 | mr->terminates = true; |
545e92e0 | 955 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 956 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
957 | } |
958 | ||
959 | void memory_region_init_alias(MemoryRegion *mr, | |
960 | const char *name, | |
961 | MemoryRegion *orig, | |
962 | target_phys_addr_t offset, | |
963 | uint64_t size) | |
964 | { | |
965 | memory_region_init(mr, name, size); | |
966 | mr->alias = orig; | |
967 | mr->alias_offset = offset; | |
968 | } | |
969 | ||
d0a9b5bc AK |
970 | void memory_region_init_rom_device(MemoryRegion *mr, |
971 | const MemoryRegionOps *ops, | |
75f5941c | 972 | void *opaque, |
d0a9b5bc AK |
973 | const char *name, |
974 | uint64_t size) | |
975 | { | |
976 | memory_region_init(mr, name, size); | |
7bc2b9cd | 977 | mr->ops = ops; |
75f5941c | 978 | mr->opaque = opaque; |
d0a9b5bc | 979 | mr->terminates = true; |
75c578dc | 980 | mr->rom_device = true; |
d0a9b5bc | 981 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 982 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
983 | } |
984 | ||
1660e72d JK |
985 | static uint64_t invalid_read(void *opaque, target_phys_addr_t addr, |
986 | unsigned size) | |
987 | { | |
988 | MemoryRegion *mr = opaque; | |
989 | ||
990 | if (!mr->warning_printed) { | |
991 | fprintf(stderr, "Invalid read from memory region %s\n", mr->name); | |
992 | mr->warning_printed = true; | |
993 | } | |
994 | return -1U; | |
995 | } | |
996 | ||
997 | static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data, | |
998 | unsigned size) | |
999 | { | |
1000 | MemoryRegion *mr = opaque; | |
1001 | ||
1002 | if (!mr->warning_printed) { | |
1003 | fprintf(stderr, "Invalid write to memory region %s\n", mr->name); | |
1004 | mr->warning_printed = true; | |
1005 | } | |
1006 | } | |
1007 | ||
1008 | static const MemoryRegionOps reservation_ops = { | |
1009 | .read = invalid_read, | |
1010 | .write = invalid_write, | |
1011 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1012 | }; | |
1013 | ||
1014 | void memory_region_init_reservation(MemoryRegion *mr, | |
1015 | const char *name, | |
1016 | uint64_t size) | |
1017 | { | |
1018 | memory_region_init_io(mr, &reservation_ops, mr, name, size); | |
1019 | } | |
1020 | ||
093bc2cd AK |
1021 | void memory_region_destroy(MemoryRegion *mr) |
1022 | { | |
1023 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
545e92e0 | 1024 | mr->destructor(mr); |
093bc2cd | 1025 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1026 | g_free((char *)mr->name); |
1027 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1028 | } |
1029 | ||
1030 | uint64_t memory_region_size(MemoryRegion *mr) | |
1031 | { | |
08dafab4 AK |
1032 | if (int128_eq(mr->size, int128_2_64())) { |
1033 | return UINT64_MAX; | |
1034 | } | |
1035 | return int128_get64(mr->size); | |
093bc2cd AK |
1036 | } |
1037 | ||
8991c79b AK |
1038 | const char *memory_region_name(MemoryRegion *mr) |
1039 | { | |
1040 | return mr->name; | |
1041 | } | |
1042 | ||
8ea9252a AK |
1043 | bool memory_region_is_ram(MemoryRegion *mr) |
1044 | { | |
1045 | return mr->ram; | |
1046 | } | |
1047 | ||
55043ba3 AK |
1048 | bool memory_region_is_logging(MemoryRegion *mr) |
1049 | { | |
1050 | return mr->dirty_log_mask; | |
1051 | } | |
1052 | ||
ce7923da AK |
1053 | bool memory_region_is_rom(MemoryRegion *mr) |
1054 | { | |
1055 | return mr->ram && mr->readonly; | |
1056 | } | |
1057 | ||
093bc2cd AK |
1058 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1059 | { | |
5a583347 AK |
1060 | uint8_t mask = 1 << client; |
1061 | ||
59023ef4 | 1062 | memory_region_transaction_begin(); |
5a583347 | 1063 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
59023ef4 | 1064 | memory_region_transaction_commit(); |
093bc2cd AK |
1065 | } |
1066 | ||
1067 | bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr, | |
cd7a45c9 | 1068 | target_phys_addr_t size, unsigned client) |
093bc2cd | 1069 | { |
14a3c10a | 1070 | assert(mr->terminates); |
cd7a45c9 BS |
1071 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1072 | 1 << client); | |
093bc2cd AK |
1073 | } |
1074 | ||
fd4aa979 BS |
1075 | void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1076 | target_phys_addr_t size) | |
093bc2cd | 1077 | { |
14a3c10a | 1078 | assert(mr->terminates); |
fd4aa979 | 1079 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1080 | } |
1081 | ||
1082 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) | |
1083 | { | |
5a583347 AK |
1084 | FlatRange *fr; |
1085 | ||
8786db7c | 1086 | FOR_EACH_FLAT_RANGE(fr, address_space_memory.current_map) { |
5a583347 | 1087 | if (fr->mr == mr) { |
72e22d2f AK |
1088 | MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, |
1089 | Forward, log_sync); | |
5a583347 AK |
1090 | } |
1091 | } | |
093bc2cd AK |
1092 | } |
1093 | ||
1094 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1095 | { | |
fb1cd6f9 | 1096 | if (mr->readonly != readonly) { |
59023ef4 | 1097 | memory_region_transaction_begin(); |
fb1cd6f9 | 1098 | mr->readonly = readonly; |
59023ef4 | 1099 | memory_region_transaction_commit(); |
fb1cd6f9 | 1100 | } |
093bc2cd AK |
1101 | } |
1102 | ||
d0a9b5bc AK |
1103 | void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable) |
1104 | { | |
1105 | if (mr->readable != readable) { | |
59023ef4 | 1106 | memory_region_transaction_begin(); |
d0a9b5bc | 1107 | mr->readable = readable; |
59023ef4 | 1108 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1109 | } |
1110 | } | |
1111 | ||
093bc2cd AK |
1112 | void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr, |
1113 | target_phys_addr_t size, unsigned client) | |
1114 | { | |
14a3c10a | 1115 | assert(mr->terminates); |
5a583347 AK |
1116 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1117 | mr->ram_addr + addr + size, | |
1118 | 1 << client); | |
093bc2cd AK |
1119 | } |
1120 | ||
1121 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1122 | { | |
1123 | if (mr->alias) { | |
1124 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1125 | } | |
1126 | ||
14a3c10a | 1127 | assert(mr->terminates); |
093bc2cd | 1128 | |
021d26d1 | 1129 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1130 | } |
1131 | ||
1132 | static void memory_region_update_coalesced_range(MemoryRegion *mr) | |
1133 | { | |
1134 | FlatRange *fr; | |
1135 | CoalescedMemoryRange *cmr; | |
1136 | AddrRange tmp; | |
1137 | ||
8786db7c | 1138 | FOR_EACH_FLAT_RANGE(fr, address_space_memory.current_map) { |
093bc2cd | 1139 | if (fr->mr == mr) { |
08dafab4 AK |
1140 | qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start), |
1141 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1142 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1143 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1144 | int128_sub(fr->addr.start, |
1145 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1146 | if (!addrrange_intersects(tmp, fr->addr)) { |
1147 | continue; | |
1148 | } | |
1149 | tmp = addrrange_intersection(tmp, fr->addr); | |
08dafab4 AK |
1150 | qemu_register_coalesced_mmio(int128_get64(tmp.start), |
1151 | int128_get64(tmp.size)); | |
093bc2cd AK |
1152 | } |
1153 | } | |
1154 | } | |
1155 | } | |
1156 | ||
1157 | void memory_region_set_coalescing(MemoryRegion *mr) | |
1158 | { | |
1159 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1160 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1161 | } |
1162 | ||
1163 | void memory_region_add_coalescing(MemoryRegion *mr, | |
1164 | target_phys_addr_t offset, | |
1165 | uint64_t size) | |
1166 | { | |
7267c094 | 1167 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1168 | |
08dafab4 | 1169 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1170 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1171 | memory_region_update_coalesced_range(mr); | |
d410515e | 1172 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1173 | } |
1174 | ||
1175 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1176 | { | |
1177 | CoalescedMemoryRange *cmr; | |
1178 | ||
d410515e JK |
1179 | qemu_flush_coalesced_mmio_buffer(); |
1180 | mr->flush_coalesced_mmio = false; | |
1181 | ||
093bc2cd AK |
1182 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1183 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1184 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1185 | g_free(cmr); |
093bc2cd AK |
1186 | } |
1187 | memory_region_update_coalesced_range(mr); | |
1188 | } | |
1189 | ||
d410515e JK |
1190 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1191 | { | |
1192 | mr->flush_coalesced_mmio = true; | |
1193 | } | |
1194 | ||
1195 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1196 | { | |
1197 | qemu_flush_coalesced_mmio_buffer(); | |
1198 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1199 | mr->flush_coalesced_mmio = false; | |
1200 | } | |
1201 | } | |
1202 | ||
3e9d69e7 AK |
1203 | void memory_region_add_eventfd(MemoryRegion *mr, |
1204 | target_phys_addr_t addr, | |
1205 | unsigned size, | |
1206 | bool match_data, | |
1207 | uint64_t data, | |
753d5e14 | 1208 | EventNotifier *e) |
3e9d69e7 AK |
1209 | { |
1210 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1211 | .addr.start = int128_make64(addr), |
1212 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1213 | .match_data = match_data, |
1214 | .data = data, | |
753d5e14 | 1215 | .e = e, |
3e9d69e7 AK |
1216 | }; |
1217 | unsigned i; | |
1218 | ||
59023ef4 | 1219 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1220 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1221 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1222 | break; | |
1223 | } | |
1224 | } | |
1225 | ++mr->ioeventfd_nb; | |
7267c094 | 1226 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1227 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1228 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1229 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1230 | mr->ioeventfds[i] = mrfd; | |
59023ef4 | 1231 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1232 | } |
1233 | ||
1234 | void memory_region_del_eventfd(MemoryRegion *mr, | |
1235 | target_phys_addr_t addr, | |
1236 | unsigned size, | |
1237 | bool match_data, | |
1238 | uint64_t data, | |
753d5e14 | 1239 | EventNotifier *e) |
3e9d69e7 AK |
1240 | { |
1241 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1242 | .addr.start = int128_make64(addr), |
1243 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1244 | .match_data = match_data, |
1245 | .data = data, | |
753d5e14 | 1246 | .e = e, |
3e9d69e7 AK |
1247 | }; |
1248 | unsigned i; | |
1249 | ||
59023ef4 | 1250 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1251 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1252 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1253 | break; | |
1254 | } | |
1255 | } | |
1256 | assert(i != mr->ioeventfd_nb); | |
1257 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1258 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1259 | --mr->ioeventfd_nb; | |
7267c094 | 1260 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1261 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
59023ef4 | 1262 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1263 | } |
1264 | ||
093bc2cd AK |
1265 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1266 | target_phys_addr_t offset, | |
1267 | MemoryRegion *subregion) | |
1268 | { | |
1269 | MemoryRegion *other; | |
1270 | ||
59023ef4 JK |
1271 | memory_region_transaction_begin(); |
1272 | ||
093bc2cd AK |
1273 | assert(!subregion->parent); |
1274 | subregion->parent = mr; | |
1275 | subregion->addr = offset; | |
1276 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1277 | if (subregion->may_overlap || other->may_overlap) { | |
1278 | continue; | |
1279 | } | |
08dafab4 AK |
1280 | if (int128_gt(int128_make64(offset), |
1281 | int128_add(int128_make64(other->addr), other->size)) | |
1282 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1283 | int128_make64(other->addr))) { | |
093bc2cd AK |
1284 | continue; |
1285 | } | |
a5e1cbc8 | 1286 | #if 0 |
860329b2 MW |
1287 | printf("warning: subregion collision %llx/%llx (%s) " |
1288 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1289 | (unsigned long long)offset, |
08dafab4 | 1290 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1291 | subregion->name, |
1292 | (unsigned long long)other->addr, | |
08dafab4 | 1293 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1294 | other->name); |
a5e1cbc8 | 1295 | #endif |
093bc2cd AK |
1296 | } |
1297 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1298 | if (subregion->priority >= other->priority) { | |
1299 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1300 | goto done; | |
1301 | } | |
1302 | } | |
1303 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1304 | done: | |
59023ef4 | 1305 | memory_region_transaction_commit(); |
093bc2cd AK |
1306 | } |
1307 | ||
1308 | ||
1309 | void memory_region_add_subregion(MemoryRegion *mr, | |
1310 | target_phys_addr_t offset, | |
1311 | MemoryRegion *subregion) | |
1312 | { | |
1313 | subregion->may_overlap = false; | |
1314 | subregion->priority = 0; | |
1315 | memory_region_add_subregion_common(mr, offset, subregion); | |
1316 | } | |
1317 | ||
1318 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
1319 | target_phys_addr_t offset, | |
1320 | MemoryRegion *subregion, | |
1321 | unsigned priority) | |
1322 | { | |
1323 | subregion->may_overlap = true; | |
1324 | subregion->priority = priority; | |
1325 | memory_region_add_subregion_common(mr, offset, subregion); | |
1326 | } | |
1327 | ||
1328 | void memory_region_del_subregion(MemoryRegion *mr, | |
1329 | MemoryRegion *subregion) | |
1330 | { | |
59023ef4 | 1331 | memory_region_transaction_begin(); |
093bc2cd AK |
1332 | assert(subregion->parent == mr); |
1333 | subregion->parent = NULL; | |
1334 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
59023ef4 | 1335 | memory_region_transaction_commit(); |
6bba19ba AK |
1336 | } |
1337 | ||
1338 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1339 | { | |
1340 | if (enabled == mr->enabled) { | |
1341 | return; | |
1342 | } | |
59023ef4 | 1343 | memory_region_transaction_begin(); |
6bba19ba | 1344 | mr->enabled = enabled; |
59023ef4 | 1345 | memory_region_transaction_commit(); |
093bc2cd | 1346 | } |
1c0ffa58 | 1347 | |
2282e1af AK |
1348 | void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr) |
1349 | { | |
1350 | MemoryRegion *parent = mr->parent; | |
1351 | unsigned priority = mr->priority; | |
1352 | bool may_overlap = mr->may_overlap; | |
1353 | ||
1354 | if (addr == mr->addr || !parent) { | |
1355 | mr->addr = addr; | |
1356 | return; | |
1357 | } | |
1358 | ||
1359 | memory_region_transaction_begin(); | |
1360 | memory_region_del_subregion(parent, mr); | |
1361 | if (may_overlap) { | |
1362 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1363 | } else { | |
1364 | memory_region_add_subregion(parent, addr, mr); | |
1365 | } | |
1366 | memory_region_transaction_commit(); | |
1367 | } | |
1368 | ||
4703359e AK |
1369 | void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset) |
1370 | { | |
4703359e | 1371 | assert(mr->alias); |
4703359e | 1372 | |
59023ef4 | 1373 | if (offset == mr->alias_offset) { |
4703359e AK |
1374 | return; |
1375 | } | |
1376 | ||
59023ef4 JK |
1377 | memory_region_transaction_begin(); |
1378 | mr->alias_offset = offset; | |
1379 | memory_region_transaction_commit(); | |
4703359e AK |
1380 | } |
1381 | ||
e34911c4 AK |
1382 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1383 | { | |
e34911c4 AK |
1384 | return mr->ram_addr; |
1385 | } | |
1386 | ||
e2177955 AK |
1387 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1388 | { | |
1389 | const AddrRange *addr = addr_; | |
1390 | const FlatRange *fr = fr_; | |
1391 | ||
1392 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1393 | return -1; | |
1394 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1395 | return 1; | |
1396 | } | |
1397 | return 0; | |
1398 | } | |
1399 | ||
1400 | static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr) | |
1401 | { | |
8786db7c | 1402 | return bsearch(&addr, as->current_map->ranges, as->current_map->nr, |
e2177955 AK |
1403 | sizeof(FlatRange), cmp_flatrange_addr); |
1404 | } | |
1405 | ||
1406 | MemoryRegionSection memory_region_find(MemoryRegion *address_space, | |
1407 | target_phys_addr_t addr, uint64_t size) | |
1408 | { | |
1409 | AddressSpace *as = memory_region_to_address_space(address_space); | |
1410 | AddrRange range = addrrange_make(int128_make64(addr), | |
1411 | int128_make64(size)); | |
1412 | FlatRange *fr = address_space_lookup(as, range); | |
1413 | MemoryRegionSection ret = { .mr = NULL, .size = 0 }; | |
1414 | ||
1415 | if (!fr) { | |
1416 | return ret; | |
1417 | } | |
1418 | ||
8786db7c | 1419 | while (fr > as->current_map->ranges |
e2177955 AK |
1420 | && addrrange_intersects(fr[-1].addr, range)) { |
1421 | --fr; | |
1422 | } | |
1423 | ||
1424 | ret.mr = fr->mr; | |
1425 | range = addrrange_intersection(range, fr->addr); | |
1426 | ret.offset_within_region = fr->offset_in_region; | |
1427 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1428 | fr->addr.start)); | |
1429 | ret.size = int128_get64(range.size); | |
1430 | ret.offset_within_address_space = int128_get64(range.start); | |
7a8499e8 | 1431 | ret.readonly = fr->readonly; |
e2177955 AK |
1432 | return ret; |
1433 | } | |
1434 | ||
86e775c6 AK |
1435 | void memory_global_sync_dirty_bitmap(MemoryRegion *address_space) |
1436 | { | |
7664e80c AK |
1437 | AddressSpace *as = memory_region_to_address_space(address_space); |
1438 | FlatRange *fr; | |
1439 | ||
8786db7c | 1440 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
72e22d2f | 1441 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1442 | } |
1443 | } | |
1444 | ||
1445 | void memory_global_dirty_log_start(void) | |
1446 | { | |
7664e80c | 1447 | global_dirty_log = true; |
7376e582 | 1448 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1449 | } |
1450 | ||
1451 | void memory_global_dirty_log_stop(void) | |
1452 | { | |
7664e80c | 1453 | global_dirty_log = false; |
7376e582 | 1454 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1455 | } |
1456 | ||
1457 | static void listener_add_address_space(MemoryListener *listener, | |
1458 | AddressSpace *as) | |
1459 | { | |
1460 | FlatRange *fr; | |
1461 | ||
8786db7c AK |
1462 | if (!as->root) { |
1463 | return; | |
1464 | } | |
1465 | ||
221b3a3f JG |
1466 | if (listener->address_space_filter |
1467 | && listener->address_space_filter != as->root) { | |
1468 | return; | |
1469 | } | |
1470 | ||
7664e80c AK |
1471 | if (global_dirty_log) { |
1472 | listener->log_global_start(listener); | |
1473 | } | |
8786db7c | 1474 | FOR_EACH_FLAT_RANGE(fr, as->current_map) { |
7664e80c AK |
1475 | MemoryRegionSection section = { |
1476 | .mr = fr->mr, | |
1477 | .address_space = as->root, | |
1478 | .offset_within_region = fr->offset_in_region, | |
1479 | .size = int128_get64(fr->addr.size), | |
1480 | .offset_within_address_space = int128_get64(fr->addr.start), | |
7a8499e8 | 1481 | .readonly = fr->readonly, |
7664e80c AK |
1482 | }; |
1483 | listener->region_add(listener, §ion); | |
1484 | } | |
1485 | } | |
1486 | ||
7376e582 | 1487 | void memory_listener_register(MemoryListener *listener, MemoryRegion *filter) |
7664e80c | 1488 | { |
72e22d2f AK |
1489 | MemoryListener *other = NULL; |
1490 | ||
7376e582 | 1491 | listener->address_space_filter = filter; |
72e22d2f AK |
1492 | if (QTAILQ_EMPTY(&memory_listeners) |
1493 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1494 | memory_listeners)->priority) { | |
1495 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1496 | } else { | |
1497 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1498 | if (listener->priority < other->priority) { | |
1499 | break; | |
1500 | } | |
1501 | } | |
1502 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1503 | } | |
7664e80c AK |
1504 | listener_add_address_space(listener, &address_space_memory); |
1505 | listener_add_address_space(listener, &address_space_io); | |
1506 | } | |
1507 | ||
1508 | void memory_listener_unregister(MemoryListener *listener) | |
1509 | { | |
72e22d2f | 1510 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1511 | } |
e2177955 | 1512 | |
8786db7c | 1513 | static void address_space_init(AddressSpace *as, MemoryRegion *root) |
1c0ffa58 | 1514 | { |
59023ef4 | 1515 | memory_region_transaction_begin(); |
8786db7c AK |
1516 | as->root = root; |
1517 | as->current_map = g_new(FlatView, 1); | |
1518 | flatview_init(as->current_map); | |
59023ef4 | 1519 | memory_region_transaction_commit(); |
1c0ffa58 | 1520 | } |
658b2224 | 1521 | |
8786db7c AK |
1522 | void set_system_memory_map(MemoryRegion *mr) |
1523 | { | |
1524 | address_space_init(&address_space_memory, mr); | |
1525 | } | |
1526 | ||
658b2224 AK |
1527 | void set_system_io_map(MemoryRegion *mr) |
1528 | { | |
8786db7c | 1529 | address_space_init(&address_space_io, mr); |
658b2224 | 1530 | } |
314e2987 | 1531 | |
37ec01d4 | 1532 | uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size) |
acbbec5d | 1533 | { |
37ec01d4 | 1534 | return memory_region_dispatch_read(mr, addr, size); |
acbbec5d AK |
1535 | } |
1536 | ||
37ec01d4 | 1537 | void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr, |
acbbec5d AK |
1538 | uint64_t val, unsigned size) |
1539 | { | |
37ec01d4 | 1540 | memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1541 | } |
1542 | ||
314e2987 BS |
1543 | typedef struct MemoryRegionList MemoryRegionList; |
1544 | ||
1545 | struct MemoryRegionList { | |
1546 | const MemoryRegion *mr; | |
1547 | bool printed; | |
1548 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1549 | }; | |
1550 | ||
1551 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1552 | ||
1553 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1554 | const MemoryRegion *mr, unsigned int level, | |
1555 | target_phys_addr_t base, | |
9479c57a | 1556 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1557 | { |
9479c57a JK |
1558 | MemoryRegionList *new_ml, *ml, *next_ml; |
1559 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1560 | const MemoryRegion *submr; |
1561 | unsigned int i; | |
1562 | ||
314e2987 BS |
1563 | if (!mr) { |
1564 | return; | |
1565 | } | |
1566 | ||
1567 | for (i = 0; i < level; i++) { | |
1568 | mon_printf(f, " "); | |
1569 | } | |
1570 | ||
1571 | if (mr->alias) { | |
1572 | MemoryRegionList *ml; | |
1573 | bool found = false; | |
1574 | ||
1575 | /* check if the alias is already in the queue */ | |
9479c57a | 1576 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1577 | if (ml->mr == mr->alias && !ml->printed) { |
1578 | found = true; | |
1579 | } | |
1580 | } | |
1581 | ||
1582 | if (!found) { | |
1583 | ml = g_new(MemoryRegionList, 1); | |
1584 | ml->mr = mr->alias; | |
1585 | ml->printed = false; | |
9479c57a | 1586 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1587 | } |
4896d74b JK |
1588 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1589 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1590 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1591 | base + mr->addr, |
08dafab4 AK |
1592 | base + mr->addr |
1593 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1594 | mr->priority, |
4896d74b JK |
1595 | mr->readable ? 'R' : '-', |
1596 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1597 | : '-', | |
314e2987 BS |
1598 | mr->name, |
1599 | mr->alias->name, | |
1600 | mr->alias_offset, | |
08dafab4 AK |
1601 | mr->alias_offset |
1602 | + (target_phys_addr_t)int128_get64(mr->size) - 1); | |
314e2987 | 1603 | } else { |
4896d74b JK |
1604 | mon_printf(f, |
1605 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1606 | base + mr->addr, |
08dafab4 AK |
1607 | base + mr->addr |
1608 | + (target_phys_addr_t)int128_get64(mr->size) - 1, | |
4b474ba7 | 1609 | mr->priority, |
4896d74b JK |
1610 | mr->readable ? 'R' : '-', |
1611 | !mr->readonly && !(mr->rom_device && mr->readable) ? 'W' | |
1612 | : '-', | |
314e2987 BS |
1613 | mr->name); |
1614 | } | |
9479c57a JK |
1615 | |
1616 | QTAILQ_INIT(&submr_print_queue); | |
1617 | ||
314e2987 | 1618 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1619 | new_ml = g_new(MemoryRegionList, 1); |
1620 | new_ml->mr = submr; | |
1621 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1622 | if (new_ml->mr->addr < ml->mr->addr || | |
1623 | (new_ml->mr->addr == ml->mr->addr && | |
1624 | new_ml->mr->priority > ml->mr->priority)) { | |
1625 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1626 | new_ml = NULL; | |
1627 | break; | |
1628 | } | |
1629 | } | |
1630 | if (new_ml) { | |
1631 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1632 | } | |
1633 | } | |
1634 | ||
1635 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1636 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1637 | alias_print_queue); | |
1638 | } | |
1639 | ||
88365e47 | 1640 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1641 | g_free(ml); |
314e2987 BS |
1642 | } |
1643 | } | |
1644 | ||
1645 | void mtree_info(fprintf_function mon_printf, void *f) | |
1646 | { | |
1647 | MemoryRegionListHead ml_head; | |
1648 | MemoryRegionList *ml, *ml2; | |
1649 | ||
1650 | QTAILQ_INIT(&ml_head); | |
1651 | ||
1652 | mon_printf(f, "memory\n"); | |
1653 | mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head); | |
1654 | ||
b9f9be88 BS |
1655 | if (address_space_io.root && |
1656 | !QTAILQ_EMPTY(&address_space_io.root->subregions)) { | |
1657 | mon_printf(f, "I/O\n"); | |
1658 | mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head); | |
1659 | } | |
1660 | ||
1661 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1662 | /* print aliased regions */ |
1663 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1664 | if (!ml->printed) { | |
1665 | mon_printf(f, "%s\n", ml->mr->name); | |
1666 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1667 | } | |
1668 | } | |
1669 | ||
1670 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1671 | g_free(ml); |
314e2987 | 1672 | } |
314e2987 | 1673 | } |