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memory: add shorthand for invoking a callback on all listeners
[qemu.git] / memory.c
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
16#include "memory.h"
1c0ffa58 17#include "exec-memory.h"
658b2224 18#include "ioport.h"
74901c3b 19#include "bitops.h"
3e9d69e7 20#include "kvm.h"
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21#include <assert.h>
22
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23#define WANT_EXEC_OBSOLETE
24#include "exec-obsolete.h"
25
4ef4db86 26unsigned memory_region_transaction_depth = 0;
e87c099f 27static bool memory_region_update_pending = false;
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28static bool global_dirty_log = false;
29
30static QLIST_HEAD(, MemoryListener) memory_listeners
31 = QLIST_HEAD_INITIALIZER(memory_listeners);
4ef4db86 32
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33typedef struct AddrRange AddrRange;
34
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35/*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
093bc2cd 40struct AddrRange {
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41 Int128 start;
42 Int128 size;
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43};
44
08dafab4 45static AddrRange addrrange_make(Int128 start, Int128 size)
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46{
47 return (AddrRange) { start, size };
48}
49
50static bool addrrange_equal(AddrRange r1, AddrRange r2)
51{
08dafab4 52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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53}
54
08dafab4 55static Int128 addrrange_end(AddrRange r)
093bc2cd 56{
08dafab4 57 return int128_add(r.start, r.size);
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58}
59
08dafab4 60static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 61{
08dafab4 62 int128_addto(&range.start, delta);
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63 return range;
64}
65
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66static bool addrrange_contains(AddrRange range, Int128 addr)
67{
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70}
71
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72static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73{
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74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
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76}
77
78static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79{
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80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
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83}
84
85struct CoalescedMemoryRange {
86 AddrRange addr;
87 QTAILQ_ENTRY(CoalescedMemoryRange) link;
88};
89
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90struct MemoryRegionIoeventfd {
91 AddrRange addr;
92 bool match_data;
93 uint64_t data;
94 int fd;
95};
96
97static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
98 MemoryRegionIoeventfd b)
99{
08dafab4 100 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 101 return true;
08dafab4 102 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 103 return false;
08dafab4 104 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 105 return true;
08dafab4 106 } else if (int128_gt(a.addr.size, b.addr.size)) {
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107 return false;
108 } else if (a.match_data < b.match_data) {
109 return true;
110 } else if (a.match_data > b.match_data) {
111 return false;
112 } else if (a.match_data) {
113 if (a.data < b.data) {
114 return true;
115 } else if (a.data > b.data) {
116 return false;
117 }
118 }
119 if (a.fd < b.fd) {
120 return true;
121 } else if (a.fd > b.fd) {
122 return false;
123 }
124 return false;
125}
126
127static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
128 MemoryRegionIoeventfd b)
129{
130 return !memory_region_ioeventfd_before(a, b)
131 && !memory_region_ioeventfd_before(b, a);
132}
133
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134typedef struct FlatRange FlatRange;
135typedef struct FlatView FlatView;
136
137/* Range of memory in the global map. Addresses are absolute. */
138struct FlatRange {
139 MemoryRegion *mr;
140 target_phys_addr_t offset_in_region;
141 AddrRange addr;
5a583347 142 uint8_t dirty_log_mask;
d0a9b5bc 143 bool readable;
fb1cd6f9 144 bool readonly;
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145};
146
147/* Flattened global view of current active memory hierarchy. Kept in sorted
148 * order.
149 */
150struct FlatView {
151 FlatRange *ranges;
152 unsigned nr;
153 unsigned nr_allocated;
154};
155
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156typedef struct AddressSpace AddressSpace;
157typedef struct AddressSpaceOps AddressSpaceOps;
158
159/* A system address space - I/O, memory, etc. */
160struct AddressSpace {
161 const AddressSpaceOps *ops;
162 MemoryRegion *root;
163 FlatView current_map;
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164 int ioeventfd_nb;
165 MemoryRegionIoeventfd *ioeventfds;
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166};
167
168struct AddressSpaceOps {
169 void (*range_add)(AddressSpace *as, FlatRange *fr);
170 void (*range_del)(AddressSpace *as, FlatRange *fr);
171 void (*log_start)(AddressSpace *as, FlatRange *fr);
172 void (*log_stop)(AddressSpace *as, FlatRange *fr);
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173 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
174 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
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175};
176
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177#define FOR_EACH_FLAT_RANGE(var, view) \
178 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
179
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180static bool flatrange_equal(FlatRange *a, FlatRange *b)
181{
182 return a->mr == b->mr
183 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 184 && a->offset_in_region == b->offset_in_region
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185 && a->readable == b->readable
186 && a->readonly == b->readonly;
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187}
188
189static void flatview_init(FlatView *view)
190{
191 view->ranges = NULL;
192 view->nr = 0;
193 view->nr_allocated = 0;
194}
195
196/* Insert a range into a given position. Caller is responsible for maintaining
197 * sorting order.
198 */
199static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
200{
201 if (view->nr == view->nr_allocated) {
202 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 203 view->ranges = g_realloc(view->ranges,
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204 view->nr_allocated * sizeof(*view->ranges));
205 }
206 memmove(view->ranges + pos + 1, view->ranges + pos,
207 (view->nr - pos) * sizeof(FlatRange));
208 view->ranges[pos] = *range;
209 ++view->nr;
210}
211
212static void flatview_destroy(FlatView *view)
213{
7267c094 214 g_free(view->ranges);
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215}
216
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217static bool can_merge(FlatRange *r1, FlatRange *r2)
218{
08dafab4 219 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 220 && r1->mr == r2->mr
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221 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
222 r1->addr.size),
223 int128_make64(r2->offset_in_region))
d0a9b5bc 224 && r1->dirty_log_mask == r2->dirty_log_mask
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225 && r1->readable == r2->readable
226 && r1->readonly == r2->readonly;
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227}
228
229/* Attempt to simplify a view by merging ajacent ranges */
230static void flatview_simplify(FlatView *view)
231{
232 unsigned i, j;
233
234 i = 0;
235 while (i < view->nr) {
236 j = i + 1;
237 while (j < view->nr
238 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 239 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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240 ++j;
241 }
242 ++i;
243 memmove(&view->ranges[i], &view->ranges[j],
244 (view->nr - j) * sizeof(view->ranges[j]));
245 view->nr -= j - i;
246 }
247}
248
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249static void memory_region_read_accessor(void *opaque,
250 target_phys_addr_t addr,
251 uint64_t *value,
252 unsigned size,
253 unsigned shift,
254 uint64_t mask)
255{
256 MemoryRegion *mr = opaque;
257 uint64_t tmp;
258
259 tmp = mr->ops->read(mr->opaque, addr, size);
260 *value |= (tmp & mask) << shift;
261}
262
263static void memory_region_write_accessor(void *opaque,
264 target_phys_addr_t addr,
265 uint64_t *value,
266 unsigned size,
267 unsigned shift,
268 uint64_t mask)
269{
270 MemoryRegion *mr = opaque;
271 uint64_t tmp;
272
273 tmp = (*value >> shift) & mask;
274 mr->ops->write(mr->opaque, addr, tmp, size);
275}
276
277static void access_with_adjusted_size(target_phys_addr_t addr,
278 uint64_t *value,
279 unsigned size,
280 unsigned access_size_min,
281 unsigned access_size_max,
282 void (*access)(void *opaque,
283 target_phys_addr_t addr,
284 uint64_t *value,
285 unsigned size,
286 unsigned shift,
287 uint64_t mask),
288 void *opaque)
289{
290 uint64_t access_mask;
291 unsigned access_size;
292 unsigned i;
293
294 if (!access_size_min) {
295 access_size_min = 1;
296 }
297 if (!access_size_max) {
298 access_size_max = 4;
299 }
300 access_size = MAX(MIN(size, access_size_max), access_size_min);
301 access_mask = -1ULL >> (64 - access_size * 8);
302 for (i = 0; i < size; i += access_size) {
303 /* FIXME: big-endian support */
304 access(opaque, addr + i, value, access_size, i * 8, access_mask);
305 }
306}
307
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308static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
309{
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310 MemoryRegionSection section = {
311 .mr = fr->mr,
312 .offset_within_address_space = int128_get64(fr->addr.start),
313 .offset_within_region = fr->offset_in_region,
314 .size = int128_get64(fr->addr.size),
315 };
316
317 cpu_register_physical_memory_log(&section, fr->readable, fr->readonly);
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318}
319
320static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
321{
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322 MemoryRegionSection section = {
323 .mr = &io_mem_unassigned,
324 .offset_within_address_space = int128_get64(fr->addr.start),
325 .offset_within_region = int128_get64(fr->addr.start),
326 .size = int128_get64(fr->addr.size),
327 };
328
329 cpu_register_physical_memory_log(&section, true, false);
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330}
331
332static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
333{
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334}
335
336static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
337{
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338}
339
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340static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
341{
342 int r;
343
08dafab4 344 assert(fd->match_data && int128_get64(fd->addr.size) == 4);
3e9d69e7 345
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346 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
347 fd->data, true);
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348 if (r < 0) {
349 abort();
350 }
351}
352
353static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
354{
355 int r;
356
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357 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
358 fd->data, false);
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359 if (r < 0) {
360 abort();
361 }
362}
363
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364static const AddressSpaceOps address_space_ops_memory = {
365 .range_add = as_memory_range_add,
366 .range_del = as_memory_range_del,
367 .log_start = as_memory_log_start,
368 .log_stop = as_memory_log_stop,
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369 .ioeventfd_add = as_memory_ioeventfd_add,
370 .ioeventfd_del = as_memory_ioeventfd_del,
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371};
372
373static AddressSpace address_space_memory = {
374 .ops = &address_space_ops_memory,
375};
376
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377static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
378 unsigned width, bool write)
379{
380 const MemoryRegionPortio *mrp;
381
382 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
383 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
384 && width == mrp->size
385 && (write ? (bool)mrp->write : (bool)mrp->read)) {
386 return mrp;
387 }
388 }
389 return NULL;
390}
391
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392static void memory_region_iorange_read(IORange *iorange,
393 uint64_t offset,
394 unsigned width,
395 uint64_t *data)
396{
397 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
398
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399 if (mr->ops->old_portio) {
400 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
401
402 *data = ((uint64_t)1 << (width * 8)) - 1;
403 if (mrp) {
2b50aa1f 404 *data = mrp->read(mr->opaque, offset);
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405 } else if (width == 2) {
406 mrp = find_portio(mr, offset, 1, false);
407 assert(mrp);
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408 *data = mrp->read(mr->opaque, offset) |
409 (mrp->read(mr->opaque, offset + 1) << 8);
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410 }
411 return;
412 }
3a130f4e 413 *data = 0;
2b50aa1f 414 access_with_adjusted_size(offset, data, width,
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415 mr->ops->impl.min_access_size,
416 mr->ops->impl.max_access_size,
417 memory_region_read_accessor, mr);
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418}
419
420static void memory_region_iorange_write(IORange *iorange,
421 uint64_t offset,
422 unsigned width,
423 uint64_t data)
424{
425 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
426
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427 if (mr->ops->old_portio) {
428 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
429
430 if (mrp) {
2b50aa1f 431 mrp->write(mr->opaque, offset, data);
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432 } else if (width == 2) {
433 mrp = find_portio(mr, offset, 1, false);
434 assert(mrp);
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435 mrp->write(mr->opaque, offset, data & 0xff);
436 mrp->write(mr->opaque, offset + 1, data >> 8);
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437 }
438 return;
439 }
2b50aa1f 440 access_with_adjusted_size(offset, &data, width,
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441 mr->ops->impl.min_access_size,
442 mr->ops->impl.max_access_size,
443 memory_region_write_accessor, mr);
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444}
445
446static const IORangeOps memory_region_iorange_ops = {
447 .read = memory_region_iorange_read,
448 .write = memory_region_iorange_write,
449};
450
451static void as_io_range_add(AddressSpace *as, FlatRange *fr)
452{
453 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
08dafab4 454 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
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455 ioport_register(&fr->mr->iorange);
456}
457
458static void as_io_range_del(AddressSpace *as, FlatRange *fr)
459{
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460 isa_unassign_ioport(int128_get64(fr->addr.start),
461 int128_get64(fr->addr.size));
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462}
463
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464static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
465{
466 int r;
467
08dafab4 468 assert(fd->match_data && int128_get64(fd->addr.size) == 2);
3e9d69e7 469
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470 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
471 fd->data, true);
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472 if (r < 0) {
473 abort();
474 }
475}
476
477static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
478{
479 int r;
480
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481 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
482 fd->data, false);
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483 if (r < 0) {
484 abort();
485 }
486}
487
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488static const AddressSpaceOps address_space_ops_io = {
489 .range_add = as_io_range_add,
490 .range_del = as_io_range_del,
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491 .ioeventfd_add = as_io_ioeventfd_add,
492 .ioeventfd_del = as_io_ioeventfd_del,
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493};
494
495static AddressSpace address_space_io = {
496 .ops = &address_space_ops_io,
497};
498
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499static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
500{
501 while (mr->parent) {
502 mr = mr->parent;
503 }
504 if (mr == address_space_memory.root) {
505 return &address_space_memory;
506 }
507 if (mr == address_space_io.root) {
508 return &address_space_io;
509 }
510 abort();
511}
512
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513/* Render a memory region into the global view. Ranges in @view obscure
514 * ranges in @mr.
515 */
516static void render_memory_region(FlatView *view,
517 MemoryRegion *mr,
08dafab4 518 Int128 base,
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519 AddrRange clip,
520 bool readonly)
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521{
522 MemoryRegion *subregion;
523 unsigned i;
524 target_phys_addr_t offset_in_region;
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525 Int128 remain;
526 Int128 now;
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527 FlatRange fr;
528 AddrRange tmp;
529
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530 if (!mr->enabled) {
531 return;
532 }
533
08dafab4 534 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 535 readonly |= mr->readonly;
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536
537 tmp = addrrange_make(base, mr->size);
538
539 if (!addrrange_intersects(tmp, clip)) {
540 return;
541 }
542
543 clip = addrrange_intersection(tmp, clip);
544
545 if (mr->alias) {
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546 int128_subfrom(&base, int128_make64(mr->alias->addr));
547 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 548 render_memory_region(view, mr->alias, base, clip, readonly);
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549 return;
550 }
551
552 /* Render subregions in priority order. */
553 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 554 render_memory_region(view, subregion, base, clip, readonly);
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555 }
556
14a3c10a 557 if (!mr->terminates) {
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558 return;
559 }
560
08dafab4 561 offset_in_region = int128_get64(int128_sub(clip.start, base));
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562 base = clip.start;
563 remain = clip.size;
564
565 /* Render the region itself into any gaps left by the current view. */
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566 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
567 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
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568 continue;
569 }
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570 if (int128_lt(base, view->ranges[i].addr.start)) {
571 now = int128_min(remain,
572 int128_sub(view->ranges[i].addr.start, base));
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573 fr.mr = mr;
574 fr.offset_in_region = offset_in_region;
575 fr.addr = addrrange_make(base, now);
5a583347 576 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 577 fr.readable = mr->readable;
fb1cd6f9 578 fr.readonly = readonly;
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579 flatview_insert(view, i, &fr);
580 ++i;
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581 int128_addto(&base, now);
582 offset_in_region += int128_get64(now);
583 int128_subfrom(&remain, now);
093bc2cd 584 }
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585 if (int128_eq(base, view->ranges[i].addr.start)) {
586 now = int128_min(remain, view->ranges[i].addr.size);
587 int128_addto(&base, now);
588 offset_in_region += int128_get64(now);
589 int128_subfrom(&remain, now);
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590 }
591 }
08dafab4 592 if (int128_nz(remain)) {
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593 fr.mr = mr;
594 fr.offset_in_region = offset_in_region;
595 fr.addr = addrrange_make(base, remain);
5a583347 596 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 597 fr.readable = mr->readable;
fb1cd6f9 598 fr.readonly = readonly;
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599 flatview_insert(view, i, &fr);
600 }
601}
602
603/* Render a memory topology into a list of disjoint absolute ranges. */
604static FlatView generate_memory_topology(MemoryRegion *mr)
605{
606 FlatView view;
607
608 flatview_init(&view);
609
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610 render_memory_region(&view, mr, int128_zero(),
611 addrrange_make(int128_zero(), int128_2_64()), false);
3d8e6bf9 612 flatview_simplify(&view);
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613
614 return view;
615}
616
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617static void address_space_add_del_ioeventfds(AddressSpace *as,
618 MemoryRegionIoeventfd *fds_new,
619 unsigned fds_new_nb,
620 MemoryRegionIoeventfd *fds_old,
621 unsigned fds_old_nb)
622{
623 unsigned iold, inew;
624
625 /* Generate a symmetric difference of the old and new fd sets, adding
626 * and deleting as necessary.
627 */
628
629 iold = inew = 0;
630 while (iold < fds_old_nb || inew < fds_new_nb) {
631 if (iold < fds_old_nb
632 && (inew == fds_new_nb
633 || memory_region_ioeventfd_before(fds_old[iold],
634 fds_new[inew]))) {
635 as->ops->ioeventfd_del(as, &fds_old[iold]);
636 ++iold;
637 } else if (inew < fds_new_nb
638 && (iold == fds_old_nb
639 || memory_region_ioeventfd_before(fds_new[inew],
640 fds_old[iold]))) {
641 as->ops->ioeventfd_add(as, &fds_new[inew]);
642 ++inew;
643 } else {
644 ++iold;
645 ++inew;
646 }
647 }
648}
649
650static void address_space_update_ioeventfds(AddressSpace *as)
651{
652 FlatRange *fr;
653 unsigned ioeventfd_nb = 0;
654 MemoryRegionIoeventfd *ioeventfds = NULL;
655 AddrRange tmp;
656 unsigned i;
657
658 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
659 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
660 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
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661 int128_sub(fr->addr.start,
662 int128_make64(fr->offset_in_region)));
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663 if (addrrange_intersects(fr->addr, tmp)) {
664 ++ioeventfd_nb;
7267c094 665 ioeventfds = g_realloc(ioeventfds,
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666 ioeventfd_nb * sizeof(*ioeventfds));
667 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
668 ioeventfds[ioeventfd_nb-1].addr = tmp;
669 }
670 }
671 }
672
673 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
674 as->ioeventfds, as->ioeventfd_nb);
675
7267c094 676 g_free(as->ioeventfds);
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677 as->ioeventfds = ioeventfds;
678 as->ioeventfd_nb = ioeventfd_nb;
679}
680
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681#define MEMORY_LISTENER_CALL(_callback, _args...) \
682 do { \
683 MemoryListener *_listener; \
684 \
685 QLIST_FOREACH(_listener, &memory_listeners, link) { \
686 _listener->_callback(_listener, ##_args); \
687 } \
688 } while (0)
689
690#define MEMORY_LISTENER_UPDATE_REGION(fr, as, callback) \
691 MEMORY_LISTENER_CALL(callback, &(MemoryRegionSection) { \
692 .mr = (fr)->mr, \
693 .address_space = (as)->root, \
694 .offset_within_region = (fr)->offset_in_region, \
695 .size = int128_get64((fr)->addr.size), \
696 .offset_within_address_space = int128_get64((fr)->addr.start), \
697 })
7664e80c 698
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699static void address_space_update_topology_pass(AddressSpace *as,
700 FlatView old_view,
701 FlatView new_view,
702 bool adding)
093bc2cd 703{
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704 unsigned iold, inew;
705 FlatRange *frold, *frnew;
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706
707 /* Generate a symmetric difference of the old and new memory maps.
708 * Kill ranges in the old map, and instantiate ranges in the new map.
709 */
710 iold = inew = 0;
711 while (iold < old_view.nr || inew < new_view.nr) {
712 if (iold < old_view.nr) {
713 frold = &old_view.ranges[iold];
714 } else {
715 frold = NULL;
716 }
717 if (inew < new_view.nr) {
718 frnew = &new_view.ranges[inew];
719 } else {
720 frnew = NULL;
721 }
722
723 if (frold
724 && (!frnew
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725 || int128_lt(frold->addr.start, frnew->addr.start)
726 || (int128_eq(frold->addr.start, frnew->addr.start)
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727 && !flatrange_equal(frold, frnew)))) {
728 /* In old, but (not in new, or in new but attributes changed). */
729
b8af1afb 730 if (!adding) {
7664e80c 731 MEMORY_LISTENER_UPDATE_REGION(frold, as, region_del);
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732 as->ops->range_del(as, frold);
733 }
734
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735 ++iold;
736 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
737 /* In both (logging may have changed) */
738
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739 if (adding) {
740 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
9f213ed9 741 MEMORY_LISTENER_UPDATE_REGION(frnew, as, log_stop);
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742 as->ops->log_stop(as, frnew);
743 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
744 as->ops->log_start(as, frnew);
9f213ed9 745 MEMORY_LISTENER_UPDATE_REGION(frnew, as, log_start);
b8af1afb 746 }
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747 }
748
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749 ++iold;
750 ++inew;
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751 } else {
752 /* In new */
753
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754 if (adding) {
755 as->ops->range_add(as, frnew);
9f213ed9 756 MEMORY_LISTENER_UPDATE_REGION(frnew, as, region_add);
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757 }
758
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759 ++inew;
760 }
761 }
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762}
763
764
765static void address_space_update_topology(AddressSpace *as)
766{
767 FlatView old_view = as->current_map;
768 FlatView new_view = generate_memory_topology(as->root);
769
770 address_space_update_topology_pass(as, old_view, new_view, false);
771 address_space_update_topology_pass(as, old_view, new_view, true);
772
cc31e6e7 773 as->current_map = new_view;
093bc2cd 774 flatview_destroy(&old_view);
3e9d69e7 775 address_space_update_ioeventfds(as);
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776}
777
6bba19ba 778static void memory_region_update_topology(MemoryRegion *mr)
cc31e6e7 779{
4ef4db86 780 if (memory_region_transaction_depth) {
e87c099f 781 memory_region_update_pending |= !mr || mr->enabled;
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782 return;
783 }
784
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785 if (mr && !mr->enabled) {
786 return;
787 }
788
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789 if (address_space_memory.root) {
790 address_space_update_topology(&address_space_memory);
791 }
792 if (address_space_io.root) {
793 address_space_update_topology(&address_space_io);
794 }
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795
796 memory_region_update_pending = false;
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797}
798
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799void memory_region_transaction_begin(void)
800{
801 ++memory_region_transaction_depth;
802}
803
804void memory_region_transaction_commit(void)
805{
806 assert(memory_region_transaction_depth);
807 --memory_region_transaction_depth;
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808 if (!memory_region_transaction_depth && memory_region_update_pending) {
809 memory_region_update_topology(NULL);
810 }
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811}
812
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813static void memory_region_destructor_none(MemoryRegion *mr)
814{
815}
816
817static void memory_region_destructor_ram(MemoryRegion *mr)
818{
819 qemu_ram_free(mr->ram_addr);
820}
821
822static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
823{
824 qemu_ram_free_from_ptr(mr->ram_addr);
825}
826
827static void memory_region_destructor_iomem(MemoryRegion *mr)
828{
829 cpu_unregister_io_memory(mr->ram_addr);
830}
831
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832static void memory_region_destructor_rom_device(MemoryRegion *mr)
833{
834 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
75c578dc 835 cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
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836}
837
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838static bool memory_region_wrong_endianness(MemoryRegion *mr)
839{
2c3579ab 840#ifdef TARGET_WORDS_BIGENDIAN
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841 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
842#else
843 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
844#endif
845}
846
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847void memory_region_init(MemoryRegion *mr,
848 const char *name,
849 uint64_t size)
850{
851 mr->ops = NULL;
852 mr->parent = NULL;
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853 mr->size = int128_make64(size);
854 if (size == UINT64_MAX) {
855 mr->size = int128_2_64();
856 }
093bc2cd 857 mr->addr = 0;
b3b00c78 858 mr->subpage = false;
6bba19ba 859 mr->enabled = true;
14a3c10a 860 mr->terminates = false;
8ea9252a 861 mr->ram = false;
d0a9b5bc 862 mr->readable = true;
fb1cd6f9 863 mr->readonly = false;
75c578dc 864 mr->rom_device = false;
545e92e0 865 mr->destructor = memory_region_destructor_none;
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866 mr->priority = 0;
867 mr->may_overlap = false;
868 mr->alias = NULL;
869 QTAILQ_INIT(&mr->subregions);
870 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
871 QTAILQ_INIT(&mr->coalesced);
7267c094 872 mr->name = g_strdup(name);
5a583347 873 mr->dirty_log_mask = 0;
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874 mr->ioeventfd_nb = 0;
875 mr->ioeventfds = NULL;
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876}
877
878static bool memory_region_access_valid(MemoryRegion *mr,
879 target_phys_addr_t addr,
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880 unsigned size,
881 bool is_write)
093bc2cd 882{
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883 if (mr->ops->valid.accepts
884 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
885 return false;
886 }
887
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888 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
889 return false;
890 }
891
892 /* Treat zero as compatibility all valid */
893 if (!mr->ops->valid.max_access_size) {
894 return true;
895 }
896
897 if (size > mr->ops->valid.max_access_size
898 || size < mr->ops->valid.min_access_size) {
899 return false;
900 }
901 return true;
902}
903
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904static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
905 target_phys_addr_t addr,
906 unsigned size)
093bc2cd 907{
164a4dcd 908 uint64_t data = 0;
093bc2cd 909
897fa7cf 910 if (!memory_region_access_valid(mr, addr, size, false)) {
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911 return -1U; /* FIXME: better signalling */
912 }
913
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914 if (!mr->ops->read) {
915 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
916 }
917
093bc2cd 918 /* FIXME: support unaligned access */
2b50aa1f 919 access_with_adjusted_size(addr, &data, size,
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920 mr->ops->impl.min_access_size,
921 mr->ops->impl.max_access_size,
922 memory_region_read_accessor, mr);
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923
924 return data;
925}
926
a621f38d 927static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
093bc2cd 928{
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929 if (memory_region_wrong_endianness(mr)) {
930 switch (size) {
931 case 1:
932 break;
933 case 2:
934 *data = bswap16(*data);
935 break;
936 case 4:
937 *data = bswap32(*data);
1470a0cd 938 break;
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939 default:
940 abort();
941 }
942 }
943}
944
945static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
946 target_phys_addr_t addr,
947 unsigned size)
948{
949 uint64_t ret;
950
951 ret = memory_region_dispatch_read1(mr, addr, size);
952 adjust_endianness(mr, &ret, size);
953 return ret;
954}
093bc2cd 955
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956static void memory_region_dispatch_write(MemoryRegion *mr,
957 target_phys_addr_t addr,
958 uint64_t data,
959 unsigned size)
960{
897fa7cf 961 if (!memory_region_access_valid(mr, addr, size, true)) {
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962 return; /* FIXME: better signalling */
963 }
964
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965 adjust_endianness(mr, &data, size);
966
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967 if (!mr->ops->write) {
968 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
969 return;
970 }
971
093bc2cd 972 /* FIXME: support unaligned access */
2b50aa1f 973 access_with_adjusted_size(addr, &data, size,
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974 mr->ops->impl.min_access_size,
975 mr->ops->impl.max_access_size,
976 memory_region_write_accessor, mr);
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977}
978
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979void memory_region_init_io(MemoryRegion *mr,
980 const MemoryRegionOps *ops,
981 void *opaque,
982 const char *name,
983 uint64_t size)
984{
985 memory_region_init(mr, name, size);
986 mr->ops = ops;
987 mr->opaque = opaque;
14a3c10a 988 mr->terminates = true;
26a83ad0 989 mr->destructor = memory_region_destructor_iomem;
a621f38d 990 mr->ram_addr = cpu_register_io_memory(mr);
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991}
992
993void memory_region_init_ram(MemoryRegion *mr,
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994 const char *name,
995 uint64_t size)
996{
997 memory_region_init(mr, name, size);
8ea9252a 998 mr->ram = true;
14a3c10a 999 mr->terminates = true;
545e92e0 1000 mr->destructor = memory_region_destructor_ram;
c5705a77 1001 mr->ram_addr = qemu_ram_alloc(size, mr);
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1002}
1003
1004void memory_region_init_ram_ptr(MemoryRegion *mr,
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1005 const char *name,
1006 uint64_t size,
1007 void *ptr)
1008{
1009 memory_region_init(mr, name, size);
8ea9252a 1010 mr->ram = true;
14a3c10a 1011 mr->terminates = true;
545e92e0 1012 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1013 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
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1014}
1015
1016void memory_region_init_alias(MemoryRegion *mr,
1017 const char *name,
1018 MemoryRegion *orig,
1019 target_phys_addr_t offset,
1020 uint64_t size)
1021{
1022 memory_region_init(mr, name, size);
1023 mr->alias = orig;
1024 mr->alias_offset = offset;
1025}
1026
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1027void memory_region_init_rom_device(MemoryRegion *mr,
1028 const MemoryRegionOps *ops,
75f5941c 1029 void *opaque,
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1030 const char *name,
1031 uint64_t size)
1032{
1033 memory_region_init(mr, name, size);
7bc2b9cd 1034 mr->ops = ops;
75f5941c 1035 mr->opaque = opaque;
d0a9b5bc 1036 mr->terminates = true;
75c578dc 1037 mr->rom_device = true;
d0a9b5bc 1038 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1039 mr->ram_addr = qemu_ram_alloc(size, mr);
a621f38d 1040 mr->ram_addr |= cpu_register_io_memory(mr);
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1041}
1042
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1043static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
1044 unsigned size)
1045{
1046 MemoryRegion *mr = opaque;
1047
1048 if (!mr->warning_printed) {
1049 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
1050 mr->warning_printed = true;
1051 }
1052 return -1U;
1053}
1054
1055static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
1056 unsigned size)
1057{
1058 MemoryRegion *mr = opaque;
1059
1060 if (!mr->warning_printed) {
1061 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1062 mr->warning_printed = true;
1063 }
1064}
1065
1066static const MemoryRegionOps reservation_ops = {
1067 .read = invalid_read,
1068 .write = invalid_write,
1069 .endianness = DEVICE_NATIVE_ENDIAN,
1070};
1071
1072void memory_region_init_reservation(MemoryRegion *mr,
1073 const char *name,
1074 uint64_t size)
1075{
1076 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1077}
1078
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1079void memory_region_destroy(MemoryRegion *mr)
1080{
1081 assert(QTAILQ_EMPTY(&mr->subregions));
545e92e0 1082 mr->destructor(mr);
093bc2cd 1083 memory_region_clear_coalescing(mr);
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1084 g_free((char *)mr->name);
1085 g_free(mr->ioeventfds);
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1086}
1087
1088uint64_t memory_region_size(MemoryRegion *mr)
1089{
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1090 if (int128_eq(mr->size, int128_2_64())) {
1091 return UINT64_MAX;
1092 }
1093 return int128_get64(mr->size);
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1094}
1095
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1096const char *memory_region_name(MemoryRegion *mr)
1097{
1098 return mr->name;
1099}
1100
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1101bool memory_region_is_ram(MemoryRegion *mr)
1102{
1103 return mr->ram;
1104}
1105
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1106bool memory_region_is_logging(MemoryRegion *mr)
1107{
1108 return mr->dirty_log_mask;
1109}
1110
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1111bool memory_region_is_rom(MemoryRegion *mr)
1112{
1113 return mr->ram && mr->readonly;
1114}
1115
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1116void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1117{
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1118 uint8_t mask = 1 << client;
1119
1120 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
6bba19ba 1121 memory_region_update_topology(mr);
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1122}
1123
1124bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
cd7a45c9 1125 target_phys_addr_t size, unsigned client)
093bc2cd 1126{
14a3c10a 1127 assert(mr->terminates);
cd7a45c9
BS
1128 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1129 1 << client);
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1130}
1131
fd4aa979
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1132void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1133 target_phys_addr_t size)
093bc2cd 1134{
14a3c10a 1135 assert(mr->terminates);
fd4aa979 1136 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
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1137}
1138
1139void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1140{
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1141 FlatRange *fr;
1142
cc31e6e7 1143 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
5a583347 1144 if (fr->mr == mr) {
7664e80c 1145 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, log_sync);
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1146 }
1147 }
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1148}
1149
1150void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1151{
fb1cd6f9
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1152 if (mr->readonly != readonly) {
1153 mr->readonly = readonly;
6bba19ba 1154 memory_region_update_topology(mr);
fb1cd6f9 1155 }
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1156}
1157
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1158void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1159{
1160 if (mr->readable != readable) {
1161 mr->readable = readable;
6bba19ba 1162 memory_region_update_topology(mr);
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1163 }
1164}
1165
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1166void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1167 target_phys_addr_t size, unsigned client)
1168{
14a3c10a 1169 assert(mr->terminates);
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1170 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1171 mr->ram_addr + addr + size,
1172 1 << client);
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1173}
1174
1175void *memory_region_get_ram_ptr(MemoryRegion *mr)
1176{
1177 if (mr->alias) {
1178 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1179 }
1180
14a3c10a 1181 assert(mr->terminates);
093bc2cd 1182
021d26d1 1183 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
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1184}
1185
1186static void memory_region_update_coalesced_range(MemoryRegion *mr)
1187{
1188 FlatRange *fr;
1189 CoalescedMemoryRange *cmr;
1190 AddrRange tmp;
1191
cc31e6e7 1192 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
093bc2cd 1193 if (fr->mr == mr) {
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1194 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1195 int128_get64(fr->addr.size));
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1196 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1197 tmp = addrrange_shift(cmr->addr,
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1198 int128_sub(fr->addr.start,
1199 int128_make64(fr->offset_in_region)));
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1200 if (!addrrange_intersects(tmp, fr->addr)) {
1201 continue;
1202 }
1203 tmp = addrrange_intersection(tmp, fr->addr);
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1204 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1205 int128_get64(tmp.size));
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1206 }
1207 }
1208 }
1209}
1210
1211void memory_region_set_coalescing(MemoryRegion *mr)
1212{
1213 memory_region_clear_coalescing(mr);
08dafab4 1214 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
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1215}
1216
1217void memory_region_add_coalescing(MemoryRegion *mr,
1218 target_phys_addr_t offset,
1219 uint64_t size)
1220{
7267c094 1221 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1222
08dafab4 1223 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
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1224 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1225 memory_region_update_coalesced_range(mr);
1226}
1227
1228void memory_region_clear_coalescing(MemoryRegion *mr)
1229{
1230 CoalescedMemoryRange *cmr;
1231
1232 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1233 cmr = QTAILQ_FIRST(&mr->coalesced);
1234 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1235 g_free(cmr);
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1236 }
1237 memory_region_update_coalesced_range(mr);
1238}
1239
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1240void memory_region_add_eventfd(MemoryRegion *mr,
1241 target_phys_addr_t addr,
1242 unsigned size,
1243 bool match_data,
1244 uint64_t data,
1245 int fd)
1246{
1247 MemoryRegionIoeventfd mrfd = {
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1248 .addr.start = int128_make64(addr),
1249 .addr.size = int128_make64(size),
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1250 .match_data = match_data,
1251 .data = data,
1252 .fd = fd,
1253 };
1254 unsigned i;
1255
1256 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1257 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1258 break;
1259 }
1260 }
1261 ++mr->ioeventfd_nb;
7267c094 1262 mr->ioeventfds = g_realloc(mr->ioeventfds,
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1263 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1264 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1265 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1266 mr->ioeventfds[i] = mrfd;
6bba19ba 1267 memory_region_update_topology(mr);
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1268}
1269
1270void memory_region_del_eventfd(MemoryRegion *mr,
1271 target_phys_addr_t addr,
1272 unsigned size,
1273 bool match_data,
1274 uint64_t data,
1275 int fd)
1276{
1277 MemoryRegionIoeventfd mrfd = {
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1278 .addr.start = int128_make64(addr),
1279 .addr.size = int128_make64(size),
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1280 .match_data = match_data,
1281 .data = data,
1282 .fd = fd,
1283 };
1284 unsigned i;
1285
1286 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1287 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1288 break;
1289 }
1290 }
1291 assert(i != mr->ioeventfd_nb);
1292 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1293 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1294 --mr->ioeventfd_nb;
7267c094 1295 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1296 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
6bba19ba 1297 memory_region_update_topology(mr);
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1298}
1299
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1300static void memory_region_add_subregion_common(MemoryRegion *mr,
1301 target_phys_addr_t offset,
1302 MemoryRegion *subregion)
1303{
1304 MemoryRegion *other;
1305
1306 assert(!subregion->parent);
1307 subregion->parent = mr;
1308 subregion->addr = offset;
1309 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1310 if (subregion->may_overlap || other->may_overlap) {
1311 continue;
1312 }
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1313 if (int128_gt(int128_make64(offset),
1314 int128_add(int128_make64(other->addr), other->size))
1315 || int128_le(int128_add(int128_make64(offset), subregion->size),
1316 int128_make64(other->addr))) {
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1317 continue;
1318 }
a5e1cbc8 1319#if 0
860329b2
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1320 printf("warning: subregion collision %llx/%llx (%s) "
1321 "vs %llx/%llx (%s)\n",
093bc2cd 1322 (unsigned long long)offset,
08dafab4 1323 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1324 subregion->name,
1325 (unsigned long long)other->addr,
08dafab4 1326 (unsigned long long)int128_get64(other->size),
860329b2 1327 other->name);
a5e1cbc8 1328#endif
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1329 }
1330 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1331 if (subregion->priority >= other->priority) {
1332 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1333 goto done;
1334 }
1335 }
1336 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1337done:
6bba19ba 1338 memory_region_update_topology(mr);
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1339}
1340
1341
1342void memory_region_add_subregion(MemoryRegion *mr,
1343 target_phys_addr_t offset,
1344 MemoryRegion *subregion)
1345{
1346 subregion->may_overlap = false;
1347 subregion->priority = 0;
1348 memory_region_add_subregion_common(mr, offset, subregion);
1349}
1350
1351void memory_region_add_subregion_overlap(MemoryRegion *mr,
1352 target_phys_addr_t offset,
1353 MemoryRegion *subregion,
1354 unsigned priority)
1355{
1356 subregion->may_overlap = true;
1357 subregion->priority = priority;
1358 memory_region_add_subregion_common(mr, offset, subregion);
1359}
1360
1361void memory_region_del_subregion(MemoryRegion *mr,
1362 MemoryRegion *subregion)
1363{
1364 assert(subregion->parent == mr);
1365 subregion->parent = NULL;
1366 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
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1367 memory_region_update_topology(mr);
1368}
1369
1370void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1371{
1372 if (enabled == mr->enabled) {
1373 return;
1374 }
1375 mr->enabled = enabled;
1376 memory_region_update_topology(NULL);
093bc2cd 1377}
1c0ffa58 1378
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1379void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1380{
1381 MemoryRegion *parent = mr->parent;
1382 unsigned priority = mr->priority;
1383 bool may_overlap = mr->may_overlap;
1384
1385 if (addr == mr->addr || !parent) {
1386 mr->addr = addr;
1387 return;
1388 }
1389
1390 memory_region_transaction_begin();
1391 memory_region_del_subregion(parent, mr);
1392 if (may_overlap) {
1393 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1394 } else {
1395 memory_region_add_subregion(parent, addr, mr);
1396 }
1397 memory_region_transaction_commit();
1398}
1399
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1400void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1401{
1402 target_phys_addr_t old_offset = mr->alias_offset;
1403
1404 assert(mr->alias);
1405 mr->alias_offset = offset;
1406
1407 if (offset == old_offset || !mr->parent) {
1408 return;
1409 }
1410
1411 memory_region_update_topology(mr);
1412}
1413
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1414ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1415{
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1416 return mr->ram_addr;
1417}
1418
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1419static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1420{
1421 const AddrRange *addr = addr_;
1422 const FlatRange *fr = fr_;
1423
1424 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1425 return -1;
1426 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1427 return 1;
1428 }
1429 return 0;
1430}
1431
1432static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1433{
1434 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1435 sizeof(FlatRange), cmp_flatrange_addr);
1436}
1437
1438MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1439 target_phys_addr_t addr, uint64_t size)
1440{
1441 AddressSpace *as = memory_region_to_address_space(address_space);
1442 AddrRange range = addrrange_make(int128_make64(addr),
1443 int128_make64(size));
1444 FlatRange *fr = address_space_lookup(as, range);
1445 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1446
1447 if (!fr) {
1448 return ret;
1449 }
1450
1451 while (fr > as->current_map.ranges
1452 && addrrange_intersects(fr[-1].addr, range)) {
1453 --fr;
1454 }
1455
1456 ret.mr = fr->mr;
1457 range = addrrange_intersection(range, fr->addr);
1458 ret.offset_within_region = fr->offset_in_region;
1459 ret.offset_within_region += int128_get64(int128_sub(range.start,
1460 fr->addr.start));
1461 ret.size = int128_get64(range.size);
1462 ret.offset_within_address_space = int128_get64(range.start);
1463 return ret;
1464}
1465
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1466void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1467{
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1468 AddressSpace *as = memory_region_to_address_space(address_space);
1469 FlatRange *fr;
1470
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1471 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1472 MEMORY_LISTENER_UPDATE_REGION(fr, as, log_sync);
1473 }
1474}
1475
1476void memory_global_dirty_log_start(void)
1477{
8f77558f 1478 cpu_physical_memory_set_dirty_tracking(1);
7664e80c 1479 global_dirty_log = true;
946996e9 1480 MEMORY_LISTENER_CALL(log_global_start);
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1481}
1482
1483void memory_global_dirty_log_stop(void)
1484{
7664e80c 1485 global_dirty_log = false;
946996e9 1486 MEMORY_LISTENER_CALL(log_global_stop);
8f77558f 1487 cpu_physical_memory_set_dirty_tracking(0);
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1488}
1489
1490static void listener_add_address_space(MemoryListener *listener,
1491 AddressSpace *as)
1492{
1493 FlatRange *fr;
1494
1495 if (global_dirty_log) {
1496 listener->log_global_start(listener);
1497 }
1498 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1499 MemoryRegionSection section = {
1500 .mr = fr->mr,
1501 .address_space = as->root,
1502 .offset_within_region = fr->offset_in_region,
1503 .size = int128_get64(fr->addr.size),
1504 .offset_within_address_space = int128_get64(fr->addr.start),
1505 };
1506 listener->region_add(listener, &section);
1507 }
1508}
1509
1510void memory_listener_register(MemoryListener *listener)
1511{
1512 QLIST_INSERT_HEAD(&memory_listeners, listener, link);
1513 listener_add_address_space(listener, &address_space_memory);
1514 listener_add_address_space(listener, &address_space_io);
1515}
1516
1517void memory_listener_unregister(MemoryListener *listener)
1518{
1519 QLIST_REMOVE(listener, link);
86e775c6 1520}
e2177955 1521
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1522void set_system_memory_map(MemoryRegion *mr)
1523{
cc31e6e7 1524 address_space_memory.root = mr;
6bba19ba 1525 memory_region_update_topology(NULL);
1c0ffa58 1526}
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1527
1528void set_system_io_map(MemoryRegion *mr)
1529{
1530 address_space_io.root = mr;
6bba19ba 1531 memory_region_update_topology(NULL);
658b2224 1532}
314e2987 1533
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1534uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1535{
a621f38d 1536 return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
acbbec5d
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1537}
1538
1539void io_mem_write(int io_index, target_phys_addr_t addr,
1540 uint64_t val, unsigned size)
1541{
a621f38d 1542 memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
acbbec5d
AK
1543}
1544
314e2987
BS
1545typedef struct MemoryRegionList MemoryRegionList;
1546
1547struct MemoryRegionList {
1548 const MemoryRegion *mr;
1549 bool printed;
1550 QTAILQ_ENTRY(MemoryRegionList) queue;
1551};
1552
1553typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1554
1555static void mtree_print_mr(fprintf_function mon_printf, void *f,
1556 const MemoryRegion *mr, unsigned int level,
1557 target_phys_addr_t base,
9479c57a 1558 MemoryRegionListHead *alias_print_queue)
314e2987 1559{
9479c57a
JK
1560 MemoryRegionList *new_ml, *ml, *next_ml;
1561 MemoryRegionListHead submr_print_queue;
314e2987
BS
1562 const MemoryRegion *submr;
1563 unsigned int i;
1564
314e2987
BS
1565 if (!mr) {
1566 return;
1567 }
1568
1569 for (i = 0; i < level; i++) {
1570 mon_printf(f, " ");
1571 }
1572
1573 if (mr->alias) {
1574 MemoryRegionList *ml;
1575 bool found = false;
1576
1577 /* check if the alias is already in the queue */
9479c57a 1578 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1579 if (ml->mr == mr->alias && !ml->printed) {
1580 found = true;
1581 }
1582 }
1583
1584 if (!found) {
1585 ml = g_new(MemoryRegionList, 1);
1586 ml->mr = mr->alias;
1587 ml->printed = false;
9479c57a 1588 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1589 }
4896d74b
JK
1590 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1591 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1592 "-" TARGET_FMT_plx "\n",
314e2987 1593 base + mr->addr,
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1594 base + mr->addr
1595 + (target_phys_addr_t)int128_get64(mr->size) - 1,
4b474ba7 1596 mr->priority,
4896d74b
JK
1597 mr->readable ? 'R' : '-',
1598 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1599 : '-',
314e2987
BS
1600 mr->name,
1601 mr->alias->name,
1602 mr->alias_offset,
08dafab4
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1603 mr->alias_offset
1604 + (target_phys_addr_t)int128_get64(mr->size) - 1);
314e2987 1605 } else {
4896d74b
JK
1606 mon_printf(f,
1607 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1608 base + mr->addr,
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1609 base + mr->addr
1610 + (target_phys_addr_t)int128_get64(mr->size) - 1,
4b474ba7 1611 mr->priority,
4896d74b
JK
1612 mr->readable ? 'R' : '-',
1613 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1614 : '-',
314e2987
BS
1615 mr->name);
1616 }
9479c57a
JK
1617
1618 QTAILQ_INIT(&submr_print_queue);
1619
314e2987 1620 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1621 new_ml = g_new(MemoryRegionList, 1);
1622 new_ml->mr = submr;
1623 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1624 if (new_ml->mr->addr < ml->mr->addr ||
1625 (new_ml->mr->addr == ml->mr->addr &&
1626 new_ml->mr->priority > ml->mr->priority)) {
1627 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1628 new_ml = NULL;
1629 break;
1630 }
1631 }
1632 if (new_ml) {
1633 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1634 }
1635 }
1636
1637 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1638 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1639 alias_print_queue);
1640 }
1641
88365e47 1642 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1643 g_free(ml);
314e2987
BS
1644 }
1645}
1646
1647void mtree_info(fprintf_function mon_printf, void *f)
1648{
1649 MemoryRegionListHead ml_head;
1650 MemoryRegionList *ml, *ml2;
1651
1652 QTAILQ_INIT(&ml_head);
1653
1654 mon_printf(f, "memory\n");
1655 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1656
1657 /* print aliased regions */
1658 QTAILQ_FOREACH(ml, &ml_head, queue) {
1659 if (!ml->printed) {
1660 mon_printf(f, "%s\n", ml->mr->name);
1661 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1662 }
1663 }
1664
1665 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1666 g_free(ml);
314e2987
BS
1667 }
1668
06631810
JK
1669 if (address_space_io.root &&
1670 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1671 QTAILQ_INIT(&ml_head);
1672 mon_printf(f, "I/O\n");
1673 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1674 }
314e2987 1675}