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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
022c62cb PB |
16 | #include "exec/memory.h" |
17 | #include "exec/address-spaces.h" | |
18 | #include "exec/ioport.h" | |
1de7afc9 | 19 | #include "qemu/bitops.h" |
2c9b15ca | 20 | #include "qom/object.h" |
55d5d048 | 21 | #include "trace.h" |
093bc2cd AK |
22 | #include <assert.h> |
23 | ||
022c62cb | 24 | #include "exec/memory-internal.h" |
220c3ebd | 25 | #include "exec/ram_addr.h" |
e1c57ab8 | 26 | #include "sysemu/sysemu.h" |
67d95c15 | 27 | |
d197063f PB |
28 | //#define DEBUG_UNASSIGNED |
29 | ||
22bde714 JK |
30 | static unsigned memory_region_transaction_depth; |
31 | static bool memory_region_update_pending; | |
4dc56152 | 32 | static bool ioeventfd_update_pending; |
7664e80c AK |
33 | static bool global_dirty_log = false; |
34 | ||
856d7245 PB |
35 | /* flat_view_mutex is taken around reading as->current_map; the critical |
36 | * section is extremely short, so I'm using a single mutex for every AS. | |
37 | * We could also RCU for the read-side. | |
38 | * | |
39 | * The BQL is taken around transaction commits, hence both locks are taken | |
40 | * while writing to as->current_map (with the BQL taken outside). | |
41 | */ | |
42 | static QemuMutex flat_view_mutex; | |
43 | ||
72e22d2f AK |
44 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
45 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 46 | |
0d673e36 AK |
47 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
48 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
49 | ||
856d7245 PB |
50 | static void memory_init(void) |
51 | { | |
52 | qemu_mutex_init(&flat_view_mutex); | |
53 | } | |
54 | ||
093bc2cd AK |
55 | typedef struct AddrRange AddrRange; |
56 | ||
8417cebf AK |
57 | /* |
58 | * Note using signed integers limits us to physical addresses at most | |
59 | * 63 bits wide. They are needed for negative offsetting in aliases | |
60 | * (large MemoryRegion::alias_offset). | |
61 | */ | |
093bc2cd | 62 | struct AddrRange { |
08dafab4 AK |
63 | Int128 start; |
64 | Int128 size; | |
093bc2cd AK |
65 | }; |
66 | ||
08dafab4 | 67 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
68 | { |
69 | return (AddrRange) { start, size }; | |
70 | } | |
71 | ||
72 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
73 | { | |
08dafab4 | 74 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
75 | } |
76 | ||
08dafab4 | 77 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 78 | { |
08dafab4 | 79 | return int128_add(r.start, r.size); |
093bc2cd AK |
80 | } |
81 | ||
08dafab4 | 82 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 83 | { |
08dafab4 | 84 | int128_addto(&range.start, delta); |
093bc2cd AK |
85 | return range; |
86 | } | |
87 | ||
08dafab4 AK |
88 | static bool addrrange_contains(AddrRange range, Int128 addr) |
89 | { | |
90 | return int128_ge(addr, range.start) | |
91 | && int128_lt(addr, addrrange_end(range)); | |
92 | } | |
93 | ||
093bc2cd AK |
94 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
95 | { | |
08dafab4 AK |
96 | return addrrange_contains(r1, r2.start) |
97 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
98 | } |
99 | ||
100 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
101 | { | |
08dafab4 AK |
102 | Int128 start = int128_max(r1.start, r2.start); |
103 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
104 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
105 | } |
106 | ||
0e0d36b4 AK |
107 | enum ListenerDirection { Forward, Reverse }; |
108 | ||
7376e582 AK |
109 | static bool memory_listener_match(MemoryListener *listener, |
110 | MemoryRegionSection *section) | |
111 | { | |
112 | return !listener->address_space_filter | |
113 | || listener->address_space_filter == section->address_space; | |
114 | } | |
115 | ||
116 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
117 | do { \ |
118 | MemoryListener *_listener; \ | |
119 | \ | |
120 | switch (_direction) { \ | |
121 | case Forward: \ | |
122 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
123 | if (_listener->_callback) { \ |
124 | _listener->_callback(_listener, ##_args); \ | |
125 | } \ | |
0e0d36b4 AK |
126 | } \ |
127 | break; \ | |
128 | case Reverse: \ | |
129 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
130 | memory_listeners, link) { \ | |
975aefe0 AK |
131 | if (_listener->_callback) { \ |
132 | _listener->_callback(_listener, ##_args); \ | |
133 | } \ | |
0e0d36b4 AK |
134 | } \ |
135 | break; \ | |
136 | default: \ | |
137 | abort(); \ | |
138 | } \ | |
139 | } while (0) | |
140 | ||
7376e582 AK |
141 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
142 | do { \ | |
143 | MemoryListener *_listener; \ | |
144 | \ | |
145 | switch (_direction) { \ | |
146 | case Forward: \ | |
147 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
148 | if (_listener->_callback \ |
149 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
150 | _listener->_callback(_listener, _section, ##_args); \ |
151 | } \ | |
152 | } \ | |
153 | break; \ | |
154 | case Reverse: \ | |
155 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
156 | memory_listeners, link) { \ | |
975aefe0 AK |
157 | if (_listener->_callback \ |
158 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
159 | _listener->_callback(_listener, _section, ##_args); \ |
160 | } \ | |
161 | } \ | |
162 | break; \ | |
163 | default: \ | |
164 | abort(); \ | |
165 | } \ | |
166 | } while (0) | |
167 | ||
dfde4e6e | 168 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
0e0d36b4 | 169 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 170 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 171 | .mr = (fr)->mr, \ |
f6790af6 | 172 | .address_space = (as), \ |
0e0d36b4 | 173 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 174 | .size = (fr)->addr.size, \ |
0e0d36b4 | 175 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 176 | .readonly = (fr)->readonly, \ |
7376e582 | 177 | })) |
0e0d36b4 | 178 | |
093bc2cd AK |
179 | struct CoalescedMemoryRange { |
180 | AddrRange addr; | |
181 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
182 | }; | |
183 | ||
3e9d69e7 AK |
184 | struct MemoryRegionIoeventfd { |
185 | AddrRange addr; | |
186 | bool match_data; | |
187 | uint64_t data; | |
753d5e14 | 188 | EventNotifier *e; |
3e9d69e7 AK |
189 | }; |
190 | ||
191 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
192 | MemoryRegionIoeventfd b) | |
193 | { | |
08dafab4 | 194 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 195 | return true; |
08dafab4 | 196 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 197 | return false; |
08dafab4 | 198 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 199 | return true; |
08dafab4 | 200 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
201 | return false; |
202 | } else if (a.match_data < b.match_data) { | |
203 | return true; | |
204 | } else if (a.match_data > b.match_data) { | |
205 | return false; | |
206 | } else if (a.match_data) { | |
207 | if (a.data < b.data) { | |
208 | return true; | |
209 | } else if (a.data > b.data) { | |
210 | return false; | |
211 | } | |
212 | } | |
753d5e14 | 213 | if (a.e < b.e) { |
3e9d69e7 | 214 | return true; |
753d5e14 | 215 | } else if (a.e > b.e) { |
3e9d69e7 AK |
216 | return false; |
217 | } | |
218 | return false; | |
219 | } | |
220 | ||
221 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
222 | MemoryRegionIoeventfd b) | |
223 | { | |
224 | return !memory_region_ioeventfd_before(a, b) | |
225 | && !memory_region_ioeventfd_before(b, a); | |
226 | } | |
227 | ||
093bc2cd AK |
228 | typedef struct FlatRange FlatRange; |
229 | typedef struct FlatView FlatView; | |
230 | ||
231 | /* Range of memory in the global map. Addresses are absolute. */ | |
232 | struct FlatRange { | |
233 | MemoryRegion *mr; | |
a8170e5e | 234 | hwaddr offset_in_region; |
093bc2cd | 235 | AddrRange addr; |
5a583347 | 236 | uint8_t dirty_log_mask; |
5f9a5ea1 | 237 | bool romd_mode; |
fb1cd6f9 | 238 | bool readonly; |
093bc2cd AK |
239 | }; |
240 | ||
241 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
242 | * order. | |
243 | */ | |
244 | struct FlatView { | |
856d7245 | 245 | unsigned ref; |
093bc2cd AK |
246 | FlatRange *ranges; |
247 | unsigned nr; | |
248 | unsigned nr_allocated; | |
249 | }; | |
250 | ||
cc31e6e7 AK |
251 | typedef struct AddressSpaceOps AddressSpaceOps; |
252 | ||
093bc2cd AK |
253 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
254 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
255 | ||
093bc2cd AK |
256 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
257 | { | |
258 | return a->mr == b->mr | |
259 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 260 | && a->offset_in_region == b->offset_in_region |
5f9a5ea1 | 261 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 262 | && a->readonly == b->readonly; |
093bc2cd AK |
263 | } |
264 | ||
265 | static void flatview_init(FlatView *view) | |
266 | { | |
856d7245 | 267 | view->ref = 1; |
093bc2cd AK |
268 | view->ranges = NULL; |
269 | view->nr = 0; | |
270 | view->nr_allocated = 0; | |
271 | } | |
272 | ||
273 | /* Insert a range into a given position. Caller is responsible for maintaining | |
274 | * sorting order. | |
275 | */ | |
276 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
277 | { | |
278 | if (view->nr == view->nr_allocated) { | |
279 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 280 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
281 | view->nr_allocated * sizeof(*view->ranges)); |
282 | } | |
283 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
284 | (view->nr - pos) * sizeof(FlatRange)); | |
285 | view->ranges[pos] = *range; | |
dfde4e6e | 286 | memory_region_ref(range->mr); |
093bc2cd AK |
287 | ++view->nr; |
288 | } | |
289 | ||
290 | static void flatview_destroy(FlatView *view) | |
291 | { | |
dfde4e6e PB |
292 | int i; |
293 | ||
294 | for (i = 0; i < view->nr; i++) { | |
295 | memory_region_unref(view->ranges[i].mr); | |
296 | } | |
7267c094 | 297 | g_free(view->ranges); |
a9a0c06d | 298 | g_free(view); |
093bc2cd AK |
299 | } |
300 | ||
856d7245 PB |
301 | static void flatview_ref(FlatView *view) |
302 | { | |
303 | atomic_inc(&view->ref); | |
304 | } | |
305 | ||
306 | static void flatview_unref(FlatView *view) | |
307 | { | |
308 | if (atomic_fetch_dec(&view->ref) == 1) { | |
309 | flatview_destroy(view); | |
310 | } | |
311 | } | |
312 | ||
3d8e6bf9 AK |
313 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
314 | { | |
08dafab4 | 315 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 316 | && r1->mr == r2->mr |
08dafab4 AK |
317 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
318 | r1->addr.size), | |
319 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 320 | && r1->dirty_log_mask == r2->dirty_log_mask |
5f9a5ea1 | 321 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 322 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
323 | } |
324 | ||
8508e024 | 325 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
326 | static void flatview_simplify(FlatView *view) |
327 | { | |
328 | unsigned i, j; | |
329 | ||
330 | i = 0; | |
331 | while (i < view->nr) { | |
332 | j = i + 1; | |
333 | while (j < view->nr | |
334 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 335 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
336 | ++j; |
337 | } | |
338 | ++i; | |
339 | memmove(&view->ranges[i], &view->ranges[j], | |
340 | (view->nr - j) * sizeof(view->ranges[j])); | |
341 | view->nr -= j - i; | |
342 | } | |
343 | } | |
344 | ||
e7342aa3 PB |
345 | static bool memory_region_big_endian(MemoryRegion *mr) |
346 | { | |
347 | #ifdef TARGET_WORDS_BIGENDIAN | |
348 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
349 | #else | |
350 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
351 | #endif | |
352 | } | |
353 | ||
e11ef3d1 PB |
354 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
355 | { | |
356 | #ifdef TARGET_WORDS_BIGENDIAN | |
357 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
358 | #else | |
359 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
360 | #endif | |
361 | } | |
362 | ||
363 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
364 | { | |
365 | if (memory_region_wrong_endianness(mr)) { | |
366 | switch (size) { | |
367 | case 1: | |
368 | break; | |
369 | case 2: | |
370 | *data = bswap16(*data); | |
371 | break; | |
372 | case 4: | |
373 | *data = bswap32(*data); | |
374 | break; | |
375 | case 8: | |
376 | *data = bswap64(*data); | |
377 | break; | |
378 | default: | |
379 | abort(); | |
380 | } | |
381 | } | |
382 | } | |
383 | ||
547e9201 | 384 | static void memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
ce5d2f33 PB |
385 | hwaddr addr, |
386 | uint64_t *value, | |
387 | unsigned size, | |
388 | unsigned shift, | |
389 | uint64_t mask) | |
390 | { | |
ce5d2f33 PB |
391 | uint64_t tmp; |
392 | ||
393 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
55d5d048 | 394 | trace_memory_region_ops_read(mr, addr, tmp, size); |
ce5d2f33 PB |
395 | *value |= (tmp & mask) << shift; |
396 | } | |
397 | ||
547e9201 | 398 | static void memory_region_read_accessor(MemoryRegion *mr, |
a8170e5e | 399 | hwaddr addr, |
164a4dcd AK |
400 | uint64_t *value, |
401 | unsigned size, | |
402 | unsigned shift, | |
403 | uint64_t mask) | |
404 | { | |
164a4dcd AK |
405 | uint64_t tmp; |
406 | ||
d410515e JK |
407 | if (mr->flush_coalesced_mmio) { |
408 | qemu_flush_coalesced_mmio_buffer(); | |
409 | } | |
164a4dcd | 410 | tmp = mr->ops->read(mr->opaque, addr, size); |
55d5d048 | 411 | trace_memory_region_ops_read(mr, addr, tmp, size); |
164a4dcd AK |
412 | *value |= (tmp & mask) << shift; |
413 | } | |
414 | ||
547e9201 | 415 | static void memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
ce5d2f33 PB |
416 | hwaddr addr, |
417 | uint64_t *value, | |
418 | unsigned size, | |
419 | unsigned shift, | |
420 | uint64_t mask) | |
421 | { | |
ce5d2f33 PB |
422 | uint64_t tmp; |
423 | ||
424 | tmp = (*value >> shift) & mask; | |
55d5d048 | 425 | trace_memory_region_ops_write(mr, addr, tmp, size); |
ce5d2f33 PB |
426 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
427 | } | |
428 | ||
547e9201 | 429 | static void memory_region_write_accessor(MemoryRegion *mr, |
a8170e5e | 430 | hwaddr addr, |
164a4dcd AK |
431 | uint64_t *value, |
432 | unsigned size, | |
433 | unsigned shift, | |
434 | uint64_t mask) | |
435 | { | |
164a4dcd AK |
436 | uint64_t tmp; |
437 | ||
d410515e JK |
438 | if (mr->flush_coalesced_mmio) { |
439 | qemu_flush_coalesced_mmio_buffer(); | |
440 | } | |
164a4dcd | 441 | tmp = (*value >> shift) & mask; |
55d5d048 | 442 | trace_memory_region_ops_write(mr, addr, tmp, size); |
164a4dcd AK |
443 | mr->ops->write(mr->opaque, addr, tmp, size); |
444 | } | |
445 | ||
a8170e5e | 446 | static void access_with_adjusted_size(hwaddr addr, |
164a4dcd AK |
447 | uint64_t *value, |
448 | unsigned size, | |
449 | unsigned access_size_min, | |
450 | unsigned access_size_max, | |
547e9201 | 451 | void (*access)(MemoryRegion *mr, |
a8170e5e | 452 | hwaddr addr, |
164a4dcd AK |
453 | uint64_t *value, |
454 | unsigned size, | |
455 | unsigned shift, | |
456 | uint64_t mask), | |
547e9201 | 457 | MemoryRegion *mr) |
164a4dcd AK |
458 | { |
459 | uint64_t access_mask; | |
460 | unsigned access_size; | |
461 | unsigned i; | |
462 | ||
463 | if (!access_size_min) { | |
464 | access_size_min = 1; | |
465 | } | |
466 | if (!access_size_max) { | |
467 | access_size_max = 4; | |
468 | } | |
ce5d2f33 PB |
469 | |
470 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
471 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
472 | access_mask = -1ULL >> (64 - access_size * 8); | |
e7342aa3 PB |
473 | if (memory_region_big_endian(mr)) { |
474 | for (i = 0; i < size; i += access_size) { | |
475 | access(mr, addr + i, value, access_size, | |
476 | (size - access_size - i) * 8, access_mask); | |
477 | } | |
478 | } else { | |
479 | for (i = 0; i < size; i += access_size) { | |
480 | access(mr, addr + i, value, access_size, i * 8, access_mask); | |
481 | } | |
164a4dcd AK |
482 | } |
483 | } | |
484 | ||
e2177955 AK |
485 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
486 | { | |
0d673e36 AK |
487 | AddressSpace *as; |
488 | ||
feca4ac1 PB |
489 | while (mr->container) { |
490 | mr = mr->container; | |
e2177955 | 491 | } |
0d673e36 AK |
492 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
493 | if (mr == as->root) { | |
494 | return as; | |
495 | } | |
e2177955 | 496 | } |
eed2bacf | 497 | return NULL; |
e2177955 AK |
498 | } |
499 | ||
093bc2cd AK |
500 | /* Render a memory region into the global view. Ranges in @view obscure |
501 | * ranges in @mr. | |
502 | */ | |
503 | static void render_memory_region(FlatView *view, | |
504 | MemoryRegion *mr, | |
08dafab4 | 505 | Int128 base, |
fb1cd6f9 AK |
506 | AddrRange clip, |
507 | bool readonly) | |
093bc2cd AK |
508 | { |
509 | MemoryRegion *subregion; | |
510 | unsigned i; | |
a8170e5e | 511 | hwaddr offset_in_region; |
08dafab4 AK |
512 | Int128 remain; |
513 | Int128 now; | |
093bc2cd AK |
514 | FlatRange fr; |
515 | AddrRange tmp; | |
516 | ||
6bba19ba AK |
517 | if (!mr->enabled) { |
518 | return; | |
519 | } | |
520 | ||
08dafab4 | 521 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 522 | readonly |= mr->readonly; |
093bc2cd AK |
523 | |
524 | tmp = addrrange_make(base, mr->size); | |
525 | ||
526 | if (!addrrange_intersects(tmp, clip)) { | |
527 | return; | |
528 | } | |
529 | ||
530 | clip = addrrange_intersection(tmp, clip); | |
531 | ||
532 | if (mr->alias) { | |
08dafab4 AK |
533 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
534 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 535 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
536 | return; |
537 | } | |
538 | ||
539 | /* Render subregions in priority order. */ | |
540 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 541 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
542 | } |
543 | ||
14a3c10a | 544 | if (!mr->terminates) { |
093bc2cd AK |
545 | return; |
546 | } | |
547 | ||
08dafab4 | 548 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
549 | base = clip.start; |
550 | remain = clip.size; | |
551 | ||
2eb74e1a PC |
552 | fr.mr = mr; |
553 | fr.dirty_log_mask = mr->dirty_log_mask; | |
554 | fr.romd_mode = mr->romd_mode; | |
555 | fr.readonly = readonly; | |
556 | ||
093bc2cd | 557 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
558 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
559 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
560 | continue; |
561 | } | |
08dafab4 AK |
562 | if (int128_lt(base, view->ranges[i].addr.start)) { |
563 | now = int128_min(remain, | |
564 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
565 | fr.offset_in_region = offset_in_region; |
566 | fr.addr = addrrange_make(base, now); | |
567 | flatview_insert(view, i, &fr); | |
568 | ++i; | |
08dafab4 AK |
569 | int128_addto(&base, now); |
570 | offset_in_region += int128_get64(now); | |
571 | int128_subfrom(&remain, now); | |
093bc2cd | 572 | } |
d26a8cae AK |
573 | now = int128_sub(int128_min(int128_add(base, remain), |
574 | addrrange_end(view->ranges[i].addr)), | |
575 | base); | |
576 | int128_addto(&base, now); | |
577 | offset_in_region += int128_get64(now); | |
578 | int128_subfrom(&remain, now); | |
093bc2cd | 579 | } |
08dafab4 | 580 | if (int128_nz(remain)) { |
093bc2cd AK |
581 | fr.offset_in_region = offset_in_region; |
582 | fr.addr = addrrange_make(base, remain); | |
583 | flatview_insert(view, i, &fr); | |
584 | } | |
585 | } | |
586 | ||
587 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 588 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 589 | { |
a9a0c06d | 590 | FlatView *view; |
093bc2cd | 591 | |
a9a0c06d PB |
592 | view = g_new(FlatView, 1); |
593 | flatview_init(view); | |
093bc2cd | 594 | |
83f3c251 | 595 | if (mr) { |
a9a0c06d | 596 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
597 | addrrange_make(int128_zero(), int128_2_64()), false); |
598 | } | |
a9a0c06d | 599 | flatview_simplify(view); |
093bc2cd AK |
600 | |
601 | return view; | |
602 | } | |
603 | ||
3e9d69e7 AK |
604 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
605 | MemoryRegionIoeventfd *fds_new, | |
606 | unsigned fds_new_nb, | |
607 | MemoryRegionIoeventfd *fds_old, | |
608 | unsigned fds_old_nb) | |
609 | { | |
610 | unsigned iold, inew; | |
80a1ea37 AK |
611 | MemoryRegionIoeventfd *fd; |
612 | MemoryRegionSection section; | |
3e9d69e7 AK |
613 | |
614 | /* Generate a symmetric difference of the old and new fd sets, adding | |
615 | * and deleting as necessary. | |
616 | */ | |
617 | ||
618 | iold = inew = 0; | |
619 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
620 | if (iold < fds_old_nb | |
621 | && (inew == fds_new_nb | |
622 | || memory_region_ioeventfd_before(fds_old[iold], | |
623 | fds_new[inew]))) { | |
80a1ea37 AK |
624 | fd = &fds_old[iold]; |
625 | section = (MemoryRegionSection) { | |
f6790af6 | 626 | .address_space = as, |
80a1ea37 | 627 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 628 | .size = fd->addr.size, |
80a1ea37 AK |
629 | }; |
630 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 631 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
632 | ++iold; |
633 | } else if (inew < fds_new_nb | |
634 | && (iold == fds_old_nb | |
635 | || memory_region_ioeventfd_before(fds_new[inew], | |
636 | fds_old[iold]))) { | |
80a1ea37 AK |
637 | fd = &fds_new[inew]; |
638 | section = (MemoryRegionSection) { | |
f6790af6 | 639 | .address_space = as, |
80a1ea37 | 640 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 641 | .size = fd->addr.size, |
80a1ea37 AK |
642 | }; |
643 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 644 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
645 | ++inew; |
646 | } else { | |
647 | ++iold; | |
648 | ++inew; | |
649 | } | |
650 | } | |
651 | } | |
652 | ||
856d7245 PB |
653 | static FlatView *address_space_get_flatview(AddressSpace *as) |
654 | { | |
655 | FlatView *view; | |
656 | ||
657 | qemu_mutex_lock(&flat_view_mutex); | |
658 | view = as->current_map; | |
659 | flatview_ref(view); | |
660 | qemu_mutex_unlock(&flat_view_mutex); | |
661 | return view; | |
662 | } | |
663 | ||
3e9d69e7 AK |
664 | static void address_space_update_ioeventfds(AddressSpace *as) |
665 | { | |
99e86347 | 666 | FlatView *view; |
3e9d69e7 AK |
667 | FlatRange *fr; |
668 | unsigned ioeventfd_nb = 0; | |
669 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
670 | AddrRange tmp; | |
671 | unsigned i; | |
672 | ||
856d7245 | 673 | view = address_space_get_flatview(as); |
99e86347 | 674 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
675 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
676 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
677 | int128_sub(fr->addr.start, |
678 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
679 | if (addrrange_intersects(fr->addr, tmp)) { |
680 | ++ioeventfd_nb; | |
7267c094 | 681 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
682 | ioeventfd_nb * sizeof(*ioeventfds)); |
683 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
684 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
685 | } | |
686 | } | |
687 | } | |
688 | ||
689 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
690 | as->ioeventfds, as->ioeventfd_nb); | |
691 | ||
7267c094 | 692 | g_free(as->ioeventfds); |
3e9d69e7 AK |
693 | as->ioeventfds = ioeventfds; |
694 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 695 | flatview_unref(view); |
3e9d69e7 AK |
696 | } |
697 | ||
b8af1afb | 698 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
699 | const FlatView *old_view, |
700 | const FlatView *new_view, | |
b8af1afb | 701 | bool adding) |
093bc2cd | 702 | { |
093bc2cd AK |
703 | unsigned iold, inew; |
704 | FlatRange *frold, *frnew; | |
093bc2cd AK |
705 | |
706 | /* Generate a symmetric difference of the old and new memory maps. | |
707 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
708 | */ | |
709 | iold = inew = 0; | |
a9a0c06d PB |
710 | while (iold < old_view->nr || inew < new_view->nr) { |
711 | if (iold < old_view->nr) { | |
712 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
713 | } else { |
714 | frold = NULL; | |
715 | } | |
a9a0c06d PB |
716 | if (inew < new_view->nr) { |
717 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
718 | } else { |
719 | frnew = NULL; | |
720 | } | |
721 | ||
722 | if (frold | |
723 | && (!frnew | |
08dafab4 AK |
724 | || int128_lt(frold->addr.start, frnew->addr.start) |
725 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 726 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 727 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 728 | |
b8af1afb | 729 | if (!adding) { |
72e22d2f | 730 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
731 | } |
732 | ||
093bc2cd AK |
733 | ++iold; |
734 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 735 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 736 | |
b8af1afb | 737 | if (adding) { |
50c1e149 | 738 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 739 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 740 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 741 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 742 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 743 | } |
5a583347 AK |
744 | } |
745 | ||
093bc2cd AK |
746 | ++iold; |
747 | ++inew; | |
093bc2cd AK |
748 | } else { |
749 | /* In new */ | |
750 | ||
b8af1afb | 751 | if (adding) { |
72e22d2f | 752 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
753 | } |
754 | ||
093bc2cd AK |
755 | ++inew; |
756 | } | |
757 | } | |
b8af1afb AK |
758 | } |
759 | ||
760 | ||
761 | static void address_space_update_topology(AddressSpace *as) | |
762 | { | |
856d7245 | 763 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 764 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
765 | |
766 | address_space_update_topology_pass(as, old_view, new_view, false); | |
767 | address_space_update_topology_pass(as, old_view, new_view, true); | |
768 | ||
856d7245 PB |
769 | qemu_mutex_lock(&flat_view_mutex); |
770 | flatview_unref(as->current_map); | |
a9a0c06d | 771 | as->current_map = new_view; |
856d7245 PB |
772 | qemu_mutex_unlock(&flat_view_mutex); |
773 | ||
774 | /* Note that all the old MemoryRegions are still alive up to this | |
775 | * point. This relieves most MemoryListeners from the need to | |
776 | * ref/unref the MemoryRegions they get---unless they use them | |
777 | * outside the iothread mutex, in which case precise reference | |
778 | * counting is necessary. | |
779 | */ | |
780 | flatview_unref(old_view); | |
781 | ||
3e9d69e7 | 782 | address_space_update_ioeventfds(as); |
093bc2cd AK |
783 | } |
784 | ||
4ef4db86 AK |
785 | void memory_region_transaction_begin(void) |
786 | { | |
bb880ded | 787 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
788 | ++memory_region_transaction_depth; |
789 | } | |
790 | ||
4dc56152 GA |
791 | static void memory_region_clear_pending(void) |
792 | { | |
793 | memory_region_update_pending = false; | |
794 | ioeventfd_update_pending = false; | |
795 | } | |
796 | ||
4ef4db86 AK |
797 | void memory_region_transaction_commit(void) |
798 | { | |
0d673e36 AK |
799 | AddressSpace *as; |
800 | ||
4ef4db86 AK |
801 | assert(memory_region_transaction_depth); |
802 | --memory_region_transaction_depth; | |
4dc56152 GA |
803 | if (!memory_region_transaction_depth) { |
804 | if (memory_region_update_pending) { | |
805 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
02e2b95f | 806 | |
4dc56152 GA |
807 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
808 | address_space_update_topology(as); | |
809 | } | |
02e2b95f | 810 | |
4dc56152 GA |
811 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
812 | } else if (ioeventfd_update_pending) { | |
813 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
814 | address_space_update_ioeventfds(as); | |
815 | } | |
816 | } | |
817 | memory_region_clear_pending(); | |
818 | } | |
4ef4db86 AK |
819 | } |
820 | ||
545e92e0 AK |
821 | static void memory_region_destructor_none(MemoryRegion *mr) |
822 | { | |
823 | } | |
824 | ||
825 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
826 | { | |
827 | qemu_ram_free(mr->ram_addr); | |
828 | } | |
829 | ||
dfde4e6e PB |
830 | static void memory_region_destructor_alias(MemoryRegion *mr) |
831 | { | |
832 | memory_region_unref(mr->alias); | |
833 | } | |
834 | ||
545e92e0 AK |
835 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) |
836 | { | |
837 | qemu_ram_free_from_ptr(mr->ram_addr); | |
838 | } | |
839 | ||
d0a9b5bc AK |
840 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
841 | { | |
842 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
843 | } |
844 | ||
b4fefef9 PC |
845 | static bool memory_region_need_escape(char c) |
846 | { | |
847 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
848 | } | |
849 | ||
850 | static char *memory_region_escape_name(const char *name) | |
851 | { | |
852 | const char *p; | |
853 | char *escaped, *q; | |
854 | uint8_t c; | |
855 | size_t bytes = 0; | |
856 | ||
857 | for (p = name; *p; p++) { | |
858 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
859 | } | |
860 | if (bytes == p - name) { | |
861 | return g_memdup(name, bytes + 1); | |
862 | } | |
863 | ||
864 | escaped = g_malloc(bytes + 1); | |
865 | for (p = name, q = escaped; *p; p++) { | |
866 | c = *p; | |
867 | if (unlikely(memory_region_need_escape(c))) { | |
868 | *q++ = '\\'; | |
869 | *q++ = 'x'; | |
870 | *q++ = "0123456789abcdef"[c >> 4]; | |
871 | c = "0123456789abcdef"[c & 15]; | |
872 | } | |
873 | *q++ = c; | |
874 | } | |
875 | *q = 0; | |
876 | return escaped; | |
877 | } | |
878 | ||
879 | static void object_property_add_child_array(Object *owner, | |
880 | const char *name, | |
881 | Object *child) | |
882 | { | |
883 | int i; | |
884 | char *base_name = memory_region_escape_name(name); | |
885 | ||
886 | for (i = 0; ; i++) { | |
887 | char *full_name = g_strdup_printf("%s[%d]", base_name, i); | |
888 | Error *local_err = NULL; | |
889 | ||
890 | object_property_add_child(owner, full_name, child, &local_err); | |
891 | g_free(full_name); | |
892 | if (!local_err) { | |
893 | break; | |
894 | } | |
895 | ||
896 | error_free(local_err); | |
897 | } | |
898 | ||
899 | g_free(base_name); | |
900 | } | |
901 | ||
902 | ||
093bc2cd | 903 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 904 | Object *owner, |
093bc2cd AK |
905 | const char *name, |
906 | uint64_t size) | |
907 | { | |
b4fefef9 PC |
908 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); |
909 | ||
b5c2c3d0 | 910 | mr->owner = owner ? owner : qdev_get_machine(); |
08dafab4 AK |
911 | mr->size = int128_make64(size); |
912 | if (size == UINT64_MAX) { | |
913 | mr->size = int128_2_64(); | |
914 | } | |
b4fefef9 PC |
915 | mr->name = g_strdup(name); |
916 | ||
917 | if (name) { | |
918 | object_property_add_child_array(mr->owner, name, OBJECT(mr)); | |
919 | object_unref(OBJECT(mr)); | |
920 | } | |
921 | } | |
922 | ||
923 | static void memory_region_initfn(Object *obj) | |
924 | { | |
925 | MemoryRegion *mr = MEMORY_REGION(obj); | |
926 | ||
927 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 928 | mr->enabled = true; |
5f9a5ea1 | 929 | mr->romd_mode = true; |
545e92e0 | 930 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 931 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 932 | QTAILQ_INIT(&mr->coalesced); |
093bc2cd AK |
933 | } |
934 | ||
b018ddf6 PB |
935 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
936 | unsigned size) | |
937 | { | |
938 | #ifdef DEBUG_UNASSIGNED | |
939 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
940 | #endif | |
4917cf44 AF |
941 | if (current_cpu != NULL) { |
942 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 943 | } |
68a7439a | 944 | return 0; |
b018ddf6 PB |
945 | } |
946 | ||
947 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
948 | uint64_t val, unsigned size) | |
949 | { | |
950 | #ifdef DEBUG_UNASSIGNED | |
951 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
952 | #endif | |
4917cf44 AF |
953 | if (current_cpu != NULL) { |
954 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 955 | } |
b018ddf6 PB |
956 | } |
957 | ||
d197063f PB |
958 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
959 | unsigned size, bool is_write) | |
960 | { | |
961 | return false; | |
962 | } | |
963 | ||
964 | const MemoryRegionOps unassigned_mem_ops = { | |
965 | .valid.accepts = unassigned_mem_accepts, | |
966 | .endianness = DEVICE_NATIVE_ENDIAN, | |
967 | }; | |
968 | ||
d2702032 PB |
969 | bool memory_region_access_valid(MemoryRegion *mr, |
970 | hwaddr addr, | |
971 | unsigned size, | |
972 | bool is_write) | |
093bc2cd | 973 | { |
a014ed07 PB |
974 | int access_size_min, access_size_max; |
975 | int access_size, i; | |
897fa7cf | 976 | |
093bc2cd AK |
977 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
978 | return false; | |
979 | } | |
980 | ||
a014ed07 | 981 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
982 | return true; |
983 | } | |
984 | ||
a014ed07 PB |
985 | access_size_min = mr->ops->valid.min_access_size; |
986 | if (!mr->ops->valid.min_access_size) { | |
987 | access_size_min = 1; | |
988 | } | |
989 | ||
990 | access_size_max = mr->ops->valid.max_access_size; | |
991 | if (!mr->ops->valid.max_access_size) { | |
992 | access_size_max = 4; | |
993 | } | |
994 | ||
995 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
996 | for (i = 0; i < size; i += access_size) { | |
997 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
998 | is_write)) { | |
999 | return false; | |
1000 | } | |
093bc2cd | 1001 | } |
a014ed07 | 1002 | |
093bc2cd AK |
1003 | return true; |
1004 | } | |
1005 | ||
a621f38d | 1006 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
a8170e5e | 1007 | hwaddr addr, |
a621f38d | 1008 | unsigned size) |
093bc2cd | 1009 | { |
164a4dcd | 1010 | uint64_t data = 0; |
093bc2cd | 1011 | |
ce5d2f33 PB |
1012 | if (mr->ops->read) { |
1013 | access_with_adjusted_size(addr, &data, size, | |
1014 | mr->ops->impl.min_access_size, | |
1015 | mr->ops->impl.max_access_size, | |
1016 | memory_region_read_accessor, mr); | |
1017 | } else { | |
1018 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
1019 | memory_region_oldmmio_read_accessor, mr); | |
74901c3b AK |
1020 | } |
1021 | ||
093bc2cd AK |
1022 | return data; |
1023 | } | |
1024 | ||
791af8c8 PB |
1025 | static bool memory_region_dispatch_read(MemoryRegion *mr, |
1026 | hwaddr addr, | |
1027 | uint64_t *pval, | |
1028 | unsigned size) | |
a621f38d | 1029 | { |
791af8c8 PB |
1030 | if (!memory_region_access_valid(mr, addr, size, false)) { |
1031 | *pval = unassigned_mem_read(mr, addr, size); | |
1032 | return true; | |
1033 | } | |
a621f38d | 1034 | |
791af8c8 PB |
1035 | *pval = memory_region_dispatch_read1(mr, addr, size); |
1036 | adjust_endianness(mr, pval, size); | |
1037 | return false; | |
a621f38d | 1038 | } |
093bc2cd | 1039 | |
791af8c8 | 1040 | static bool memory_region_dispatch_write(MemoryRegion *mr, |
a8170e5e | 1041 | hwaddr addr, |
a621f38d AK |
1042 | uint64_t data, |
1043 | unsigned size) | |
1044 | { | |
897fa7cf | 1045 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 1046 | unassigned_mem_write(mr, addr, data, size); |
791af8c8 | 1047 | return true; |
093bc2cd AK |
1048 | } |
1049 | ||
a621f38d AK |
1050 | adjust_endianness(mr, &data, size); |
1051 | ||
ce5d2f33 PB |
1052 | if (mr->ops->write) { |
1053 | access_with_adjusted_size(addr, &data, size, | |
1054 | mr->ops->impl.min_access_size, | |
1055 | mr->ops->impl.max_access_size, | |
1056 | memory_region_write_accessor, mr); | |
1057 | } else { | |
1058 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
1059 | memory_region_oldmmio_write_accessor, mr); | |
74901c3b | 1060 | } |
791af8c8 | 1061 | return false; |
093bc2cd AK |
1062 | } |
1063 | ||
093bc2cd | 1064 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1065 | Object *owner, |
093bc2cd AK |
1066 | const MemoryRegionOps *ops, |
1067 | void *opaque, | |
1068 | const char *name, | |
1069 | uint64_t size) | |
1070 | { | |
2c9b15ca | 1071 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1072 | mr->ops = ops; |
1073 | mr->opaque = opaque; | |
14a3c10a | 1074 | mr->terminates = true; |
97161e17 | 1075 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
1076 | } |
1077 | ||
1078 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 1079 | Object *owner, |
093bc2cd AK |
1080 | const char *name, |
1081 | uint64_t size) | |
1082 | { | |
2c9b15ca | 1083 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1084 | mr->ram = true; |
14a3c10a | 1085 | mr->terminates = true; |
545e92e0 | 1086 | mr->destructor = memory_region_destructor_ram; |
0b183fc8 PB |
1087 | mr->ram_addr = qemu_ram_alloc(size, mr); |
1088 | } | |
1089 | ||
1090 | #ifdef __linux__ | |
1091 | void memory_region_init_ram_from_file(MemoryRegion *mr, | |
1092 | struct Object *owner, | |
1093 | const char *name, | |
1094 | uint64_t size, | |
dbcb8981 | 1095 | bool share, |
7f56e740 PB |
1096 | const char *path, |
1097 | Error **errp) | |
0b183fc8 PB |
1098 | { |
1099 | memory_region_init(mr, owner, name, size); | |
1100 | mr->ram = true; | |
1101 | mr->terminates = true; | |
1102 | mr->destructor = memory_region_destructor_ram; | |
dbcb8981 | 1103 | mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp); |
093bc2cd | 1104 | } |
0b183fc8 | 1105 | #endif |
093bc2cd AK |
1106 | |
1107 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1108 | Object *owner, |
093bc2cd AK |
1109 | const char *name, |
1110 | uint64_t size, | |
1111 | void *ptr) | |
1112 | { | |
2c9b15ca | 1113 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1114 | mr->ram = true; |
14a3c10a | 1115 | mr->terminates = true; |
545e92e0 | 1116 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 1117 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
1118 | } |
1119 | ||
1120 | void memory_region_init_alias(MemoryRegion *mr, | |
2c9b15ca | 1121 | Object *owner, |
093bc2cd AK |
1122 | const char *name, |
1123 | MemoryRegion *orig, | |
a8170e5e | 1124 | hwaddr offset, |
093bc2cd AK |
1125 | uint64_t size) |
1126 | { | |
2c9b15ca | 1127 | memory_region_init(mr, owner, name, size); |
dfde4e6e PB |
1128 | memory_region_ref(orig); |
1129 | mr->destructor = memory_region_destructor_alias; | |
093bc2cd AK |
1130 | mr->alias = orig; |
1131 | mr->alias_offset = offset; | |
1132 | } | |
1133 | ||
d0a9b5bc | 1134 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 1135 | Object *owner, |
d0a9b5bc | 1136 | const MemoryRegionOps *ops, |
75f5941c | 1137 | void *opaque, |
d0a9b5bc AK |
1138 | const char *name, |
1139 | uint64_t size) | |
1140 | { | |
2c9b15ca | 1141 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1142 | mr->ops = ops; |
75f5941c | 1143 | mr->opaque = opaque; |
d0a9b5bc | 1144 | mr->terminates = true; |
75c578dc | 1145 | mr->rom_device = true; |
d0a9b5bc | 1146 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1147 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
1148 | } |
1149 | ||
30951157 | 1150 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1151 | Object *owner, |
30951157 AK |
1152 | const MemoryRegionIOMMUOps *ops, |
1153 | const char *name, | |
1154 | uint64_t size) | |
1155 | { | |
2c9b15ca | 1156 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1157 | mr->iommu_ops = ops, |
1158 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1159 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1160 | } |
1161 | ||
1660e72d | 1162 | void memory_region_init_reservation(MemoryRegion *mr, |
2c9b15ca | 1163 | Object *owner, |
1660e72d JK |
1164 | const char *name, |
1165 | uint64_t size) | |
1166 | { | |
2c9b15ca | 1167 | memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size); |
1660e72d JK |
1168 | } |
1169 | ||
b4fefef9 | 1170 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1171 | { |
b4fefef9 PC |
1172 | MemoryRegion *mr = MEMORY_REGION(obj); |
1173 | ||
093bc2cd | 1174 | assert(QTAILQ_EMPTY(&mr->subregions)); |
2be0e25f | 1175 | assert(memory_region_transaction_depth == 0); |
545e92e0 | 1176 | mr->destructor(mr); |
093bc2cd | 1177 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1178 | g_free((char *)mr->name); |
1179 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1180 | } |
1181 | ||
b4fefef9 PC |
1182 | void memory_region_destroy(MemoryRegion *mr) |
1183 | { | |
1184 | object_unparent(OBJECT(mr)); | |
1185 | } | |
1186 | ||
1187 | ||
803c0816 PB |
1188 | Object *memory_region_owner(MemoryRegion *mr) |
1189 | { | |
1190 | return mr->owner; | |
1191 | } | |
1192 | ||
46637be2 PB |
1193 | void memory_region_ref(MemoryRegion *mr) |
1194 | { | |
1195 | if (mr && mr->owner) { | |
1196 | object_ref(mr->owner); | |
b4fefef9 PC |
1197 | } else { |
1198 | object_ref(OBJECT(mr)); | |
46637be2 PB |
1199 | } |
1200 | } | |
1201 | ||
1202 | void memory_region_unref(MemoryRegion *mr) | |
1203 | { | |
1204 | if (mr && mr->owner) { | |
1205 | object_unref(mr->owner); | |
b4fefef9 PC |
1206 | } else { |
1207 | object_unref(OBJECT(mr)); | |
46637be2 PB |
1208 | } |
1209 | } | |
1210 | ||
093bc2cd AK |
1211 | uint64_t memory_region_size(MemoryRegion *mr) |
1212 | { | |
08dafab4 AK |
1213 | if (int128_eq(mr->size, int128_2_64())) { |
1214 | return UINT64_MAX; | |
1215 | } | |
1216 | return int128_get64(mr->size); | |
093bc2cd AK |
1217 | } |
1218 | ||
8991c79b AK |
1219 | const char *memory_region_name(MemoryRegion *mr) |
1220 | { | |
1221 | return mr->name; | |
1222 | } | |
1223 | ||
8ea9252a AK |
1224 | bool memory_region_is_ram(MemoryRegion *mr) |
1225 | { | |
1226 | return mr->ram; | |
1227 | } | |
1228 | ||
55043ba3 AK |
1229 | bool memory_region_is_logging(MemoryRegion *mr) |
1230 | { | |
1231 | return mr->dirty_log_mask; | |
1232 | } | |
1233 | ||
ce7923da AK |
1234 | bool memory_region_is_rom(MemoryRegion *mr) |
1235 | { | |
1236 | return mr->ram && mr->readonly; | |
1237 | } | |
1238 | ||
30951157 AK |
1239 | bool memory_region_is_iommu(MemoryRegion *mr) |
1240 | { | |
1241 | return mr->iommu_ops; | |
1242 | } | |
1243 | ||
06866575 DG |
1244 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1245 | { | |
1246 | notifier_list_add(&mr->iommu_notify, n); | |
1247 | } | |
1248 | ||
1249 | void memory_region_unregister_iommu_notifier(Notifier *n) | |
1250 | { | |
1251 | notifier_remove(n); | |
1252 | } | |
1253 | ||
1254 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1255 | IOMMUTLBEntry entry) | |
1256 | { | |
1257 | assert(memory_region_is_iommu(mr)); | |
1258 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1259 | } | |
1260 | ||
093bc2cd AK |
1261 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1262 | { | |
5a583347 AK |
1263 | uint8_t mask = 1 << client; |
1264 | ||
59023ef4 | 1265 | memory_region_transaction_begin(); |
5a583347 | 1266 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1267 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1268 | memory_region_transaction_commit(); |
093bc2cd AK |
1269 | } |
1270 | ||
a8170e5e AK |
1271 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1272 | hwaddr size, unsigned client) | |
093bc2cd | 1273 | { |
14a3c10a | 1274 | assert(mr->terminates); |
52159192 | 1275 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client); |
093bc2cd AK |
1276 | } |
1277 | ||
a8170e5e AK |
1278 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1279 | hwaddr size) | |
093bc2cd | 1280 | { |
14a3c10a | 1281 | assert(mr->terminates); |
75218e7f | 1282 | cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size); |
093bc2cd AK |
1283 | } |
1284 | ||
6c279db8 JQ |
1285 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1286 | hwaddr size, unsigned client) | |
1287 | { | |
1288 | bool ret; | |
1289 | assert(mr->terminates); | |
52159192 | 1290 | ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client); |
6c279db8 | 1291 | if (ret) { |
a2f4d5be | 1292 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client); |
6c279db8 JQ |
1293 | } |
1294 | return ret; | |
1295 | } | |
1296 | ||
1297 | ||
093bc2cd AK |
1298 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1299 | { | |
0d673e36 | 1300 | AddressSpace *as; |
5a583347 AK |
1301 | FlatRange *fr; |
1302 | ||
0d673e36 | 1303 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
856d7245 | 1304 | FlatView *view = address_space_get_flatview(as); |
99e86347 | 1305 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 AK |
1306 | if (fr->mr == mr) { |
1307 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1308 | } | |
5a583347 | 1309 | } |
856d7245 | 1310 | flatview_unref(view); |
5a583347 | 1311 | } |
093bc2cd AK |
1312 | } |
1313 | ||
1314 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1315 | { | |
fb1cd6f9 | 1316 | if (mr->readonly != readonly) { |
59023ef4 | 1317 | memory_region_transaction_begin(); |
fb1cd6f9 | 1318 | mr->readonly = readonly; |
22bde714 | 1319 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1320 | memory_region_transaction_commit(); |
fb1cd6f9 | 1321 | } |
093bc2cd AK |
1322 | } |
1323 | ||
5f9a5ea1 | 1324 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1325 | { |
5f9a5ea1 | 1326 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1327 | memory_region_transaction_begin(); |
5f9a5ea1 | 1328 | mr->romd_mode = romd_mode; |
22bde714 | 1329 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1330 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1331 | } |
1332 | } | |
1333 | ||
a8170e5e AK |
1334 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1335 | hwaddr size, unsigned client) | |
093bc2cd | 1336 | { |
14a3c10a | 1337 | assert(mr->terminates); |
a2f4d5be | 1338 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client); |
093bc2cd AK |
1339 | } |
1340 | ||
a35ba7be PB |
1341 | int memory_region_get_fd(MemoryRegion *mr) |
1342 | { | |
1343 | if (mr->alias) { | |
1344 | return memory_region_get_fd(mr->alias); | |
1345 | } | |
1346 | ||
1347 | assert(mr->terminates); | |
1348 | ||
1349 | return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK); | |
1350 | } | |
1351 | ||
093bc2cd AK |
1352 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
1353 | { | |
1354 | if (mr->alias) { | |
1355 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1356 | } | |
1357 | ||
14a3c10a | 1358 | assert(mr->terminates); |
093bc2cd | 1359 | |
021d26d1 | 1360 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1361 | } |
1362 | ||
0d673e36 | 1363 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1364 | { |
99e86347 | 1365 | FlatView *view; |
093bc2cd AK |
1366 | FlatRange *fr; |
1367 | CoalescedMemoryRange *cmr; | |
1368 | AddrRange tmp; | |
95d2994a | 1369 | MemoryRegionSection section; |
093bc2cd | 1370 | |
856d7245 | 1371 | view = address_space_get_flatview(as); |
99e86347 | 1372 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1373 | if (fr->mr == mr) { |
95d2994a | 1374 | section = (MemoryRegionSection) { |
f6790af6 | 1375 | .address_space = as, |
95d2994a | 1376 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1377 | .size = fr->addr.size, |
95d2994a AK |
1378 | }; |
1379 | ||
1380 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1381 | int128_get64(fr->addr.start), | |
1382 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1383 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1384 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1385 | int128_sub(fr->addr.start, |
1386 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1387 | if (!addrrange_intersects(tmp, fr->addr)) { |
1388 | continue; | |
1389 | } | |
1390 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1391 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1392 | int128_get64(tmp.start), | |
1393 | int128_get64(tmp.size)); | |
093bc2cd AK |
1394 | } |
1395 | } | |
1396 | } | |
856d7245 | 1397 | flatview_unref(view); |
093bc2cd AK |
1398 | } |
1399 | ||
0d673e36 AK |
1400 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1401 | { | |
1402 | AddressSpace *as; | |
1403 | ||
1404 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1405 | memory_region_update_coalesced_range_as(mr, as); | |
1406 | } | |
1407 | } | |
1408 | ||
093bc2cd AK |
1409 | void memory_region_set_coalescing(MemoryRegion *mr) |
1410 | { | |
1411 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1412 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1413 | } |
1414 | ||
1415 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1416 | hwaddr offset, |
093bc2cd AK |
1417 | uint64_t size) |
1418 | { | |
7267c094 | 1419 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1420 | |
08dafab4 | 1421 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1422 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1423 | memory_region_update_coalesced_range(mr); | |
d410515e | 1424 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1425 | } |
1426 | ||
1427 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1428 | { | |
1429 | CoalescedMemoryRange *cmr; | |
ab5b3db5 | 1430 | bool updated = false; |
093bc2cd | 1431 | |
d410515e JK |
1432 | qemu_flush_coalesced_mmio_buffer(); |
1433 | mr->flush_coalesced_mmio = false; | |
1434 | ||
093bc2cd AK |
1435 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1436 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1437 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1438 | g_free(cmr); |
ab5b3db5 FZ |
1439 | updated = true; |
1440 | } | |
1441 | ||
1442 | if (updated) { | |
1443 | memory_region_update_coalesced_range(mr); | |
093bc2cd | 1444 | } |
093bc2cd AK |
1445 | } |
1446 | ||
d410515e JK |
1447 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1448 | { | |
1449 | mr->flush_coalesced_mmio = true; | |
1450 | } | |
1451 | ||
1452 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1453 | { | |
1454 | qemu_flush_coalesced_mmio_buffer(); | |
1455 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1456 | mr->flush_coalesced_mmio = false; | |
1457 | } | |
1458 | } | |
1459 | ||
3e9d69e7 | 1460 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1461 | hwaddr addr, |
3e9d69e7 AK |
1462 | unsigned size, |
1463 | bool match_data, | |
1464 | uint64_t data, | |
753d5e14 | 1465 | EventNotifier *e) |
3e9d69e7 AK |
1466 | { |
1467 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1468 | .addr.start = int128_make64(addr), |
1469 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1470 | .match_data = match_data, |
1471 | .data = data, | |
753d5e14 | 1472 | .e = e, |
3e9d69e7 AK |
1473 | }; |
1474 | unsigned i; | |
1475 | ||
28f362be | 1476 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1477 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1478 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1479 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1480 | break; | |
1481 | } | |
1482 | } | |
1483 | ++mr->ioeventfd_nb; | |
7267c094 | 1484 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1485 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1486 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1487 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1488 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 1489 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1490 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1491 | } |
1492 | ||
1493 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1494 | hwaddr addr, |
3e9d69e7 AK |
1495 | unsigned size, |
1496 | bool match_data, | |
1497 | uint64_t data, | |
753d5e14 | 1498 | EventNotifier *e) |
3e9d69e7 AK |
1499 | { |
1500 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1501 | .addr.start = int128_make64(addr), |
1502 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1503 | .match_data = match_data, |
1504 | .data = data, | |
753d5e14 | 1505 | .e = e, |
3e9d69e7 AK |
1506 | }; |
1507 | unsigned i; | |
1508 | ||
28f362be | 1509 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1510 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1511 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1512 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1513 | break; | |
1514 | } | |
1515 | } | |
1516 | assert(i != mr->ioeventfd_nb); | |
1517 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1518 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1519 | --mr->ioeventfd_nb; | |
7267c094 | 1520 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1521 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 1522 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1523 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1524 | } |
1525 | ||
feca4ac1 | 1526 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 1527 | { |
0598701a | 1528 | hwaddr offset = subregion->addr; |
feca4ac1 | 1529 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
1530 | MemoryRegion *other; |
1531 | ||
59023ef4 JK |
1532 | memory_region_transaction_begin(); |
1533 | ||
dfde4e6e | 1534 | memory_region_ref(subregion); |
093bc2cd AK |
1535 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1536 | if (subregion->may_overlap || other->may_overlap) { | |
1537 | continue; | |
1538 | } | |
2c7cfd65 | 1539 | if (int128_ge(int128_make64(offset), |
08dafab4 AK |
1540 | int128_add(int128_make64(other->addr), other->size)) |
1541 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1542 | int128_make64(other->addr))) { | |
093bc2cd AK |
1543 | continue; |
1544 | } | |
a5e1cbc8 | 1545 | #if 0 |
860329b2 MW |
1546 | printf("warning: subregion collision %llx/%llx (%s) " |
1547 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1548 | (unsigned long long)offset, |
08dafab4 | 1549 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1550 | subregion->name, |
1551 | (unsigned long long)other->addr, | |
08dafab4 | 1552 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1553 | other->name); |
a5e1cbc8 | 1554 | #endif |
093bc2cd AK |
1555 | } |
1556 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1557 | if (subregion->priority >= other->priority) { | |
1558 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1559 | goto done; | |
1560 | } | |
1561 | } | |
1562 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1563 | done: | |
22bde714 | 1564 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1565 | memory_region_transaction_commit(); |
093bc2cd AK |
1566 | } |
1567 | ||
0598701a PC |
1568 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1569 | hwaddr offset, | |
1570 | MemoryRegion *subregion) | |
1571 | { | |
feca4ac1 PB |
1572 | assert(!subregion->container); |
1573 | subregion->container = mr; | |
0598701a | 1574 | subregion->addr = offset; |
feca4ac1 | 1575 | memory_region_update_container_subregions(subregion); |
0598701a | 1576 | } |
093bc2cd AK |
1577 | |
1578 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1579 | hwaddr offset, |
093bc2cd AK |
1580 | MemoryRegion *subregion) |
1581 | { | |
1582 | subregion->may_overlap = false; | |
1583 | subregion->priority = 0; | |
1584 | memory_region_add_subregion_common(mr, offset, subregion); | |
1585 | } | |
1586 | ||
1587 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1588 | hwaddr offset, |
093bc2cd | 1589 | MemoryRegion *subregion, |
a1ff8ae0 | 1590 | int priority) |
093bc2cd AK |
1591 | { |
1592 | subregion->may_overlap = true; | |
1593 | subregion->priority = priority; | |
1594 | memory_region_add_subregion_common(mr, offset, subregion); | |
1595 | } | |
1596 | ||
1597 | void memory_region_del_subregion(MemoryRegion *mr, | |
1598 | MemoryRegion *subregion) | |
1599 | { | |
59023ef4 | 1600 | memory_region_transaction_begin(); |
feca4ac1 PB |
1601 | assert(subregion->container == mr); |
1602 | subregion->container = NULL; | |
093bc2cd | 1603 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 1604 | memory_region_unref(subregion); |
22bde714 | 1605 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1606 | memory_region_transaction_commit(); |
6bba19ba AK |
1607 | } |
1608 | ||
1609 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1610 | { | |
1611 | if (enabled == mr->enabled) { | |
1612 | return; | |
1613 | } | |
59023ef4 | 1614 | memory_region_transaction_begin(); |
6bba19ba | 1615 | mr->enabled = enabled; |
22bde714 | 1616 | memory_region_update_pending = true; |
59023ef4 | 1617 | memory_region_transaction_commit(); |
093bc2cd | 1618 | } |
1c0ffa58 | 1619 | |
67891b8a | 1620 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 1621 | { |
feca4ac1 | 1622 | MemoryRegion *container = mr->container; |
2282e1af | 1623 | |
feca4ac1 | 1624 | if (container) { |
67891b8a PC |
1625 | memory_region_transaction_begin(); |
1626 | memory_region_ref(mr); | |
feca4ac1 PB |
1627 | memory_region_del_subregion(container, mr); |
1628 | mr->container = container; | |
1629 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
1630 | memory_region_unref(mr); |
1631 | memory_region_transaction_commit(); | |
2282e1af | 1632 | } |
67891b8a | 1633 | } |
2282e1af | 1634 | |
67891b8a PC |
1635 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
1636 | { | |
1637 | if (addr != mr->addr) { | |
1638 | mr->addr = addr; | |
1639 | memory_region_readd_subregion(mr); | |
1640 | } | |
2282e1af AK |
1641 | } |
1642 | ||
a8170e5e | 1643 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1644 | { |
4703359e | 1645 | assert(mr->alias); |
4703359e | 1646 | |
59023ef4 | 1647 | if (offset == mr->alias_offset) { |
4703359e AK |
1648 | return; |
1649 | } | |
1650 | ||
59023ef4 JK |
1651 | memory_region_transaction_begin(); |
1652 | mr->alias_offset = offset; | |
22bde714 | 1653 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1654 | memory_region_transaction_commit(); |
4703359e AK |
1655 | } |
1656 | ||
e34911c4 AK |
1657 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1658 | { | |
e34911c4 AK |
1659 | return mr->ram_addr; |
1660 | } | |
1661 | ||
e2177955 AK |
1662 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1663 | { | |
1664 | const AddrRange *addr = addr_; | |
1665 | const FlatRange *fr = fr_; | |
1666 | ||
1667 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1668 | return -1; | |
1669 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1670 | return 1; | |
1671 | } | |
1672 | return 0; | |
1673 | } | |
1674 | ||
99e86347 | 1675 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 1676 | { |
99e86347 | 1677 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
1678 | sizeof(FlatRange), cmp_flatrange_addr); |
1679 | } | |
1680 | ||
feca4ac1 | 1681 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
3ce10901 | 1682 | { |
feca4ac1 PB |
1683 | MemoryRegion *mr = memory_region_find(container, addr, 1).mr; |
1684 | if (!mr || (mr == container)) { | |
3ce10901 PB |
1685 | return false; |
1686 | } | |
dfde4e6e | 1687 | memory_region_unref(mr); |
3ce10901 PB |
1688 | return true; |
1689 | } | |
1690 | ||
eed2bacf IM |
1691 | bool memory_region_is_mapped(MemoryRegion *mr) |
1692 | { | |
1693 | return mr->container ? true : false; | |
1694 | } | |
1695 | ||
73034e9e | 1696 | MemoryRegionSection memory_region_find(MemoryRegion *mr, |
a8170e5e | 1697 | hwaddr addr, uint64_t size) |
e2177955 | 1698 | { |
052e87b0 | 1699 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
1700 | MemoryRegion *root; |
1701 | AddressSpace *as; | |
1702 | AddrRange range; | |
99e86347 | 1703 | FlatView *view; |
73034e9e PB |
1704 | FlatRange *fr; |
1705 | ||
1706 | addr += mr->addr; | |
feca4ac1 PB |
1707 | for (root = mr; root->container; ) { |
1708 | root = root->container; | |
73034e9e PB |
1709 | addr += root->addr; |
1710 | } | |
e2177955 | 1711 | |
73034e9e | 1712 | as = memory_region_to_address_space(root); |
eed2bacf IM |
1713 | if (!as) { |
1714 | return ret; | |
1715 | } | |
73034e9e | 1716 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 1717 | |
856d7245 | 1718 | view = address_space_get_flatview(as); |
99e86347 | 1719 | fr = flatview_lookup(view, range); |
e2177955 | 1720 | if (!fr) { |
6307d974 | 1721 | flatview_unref(view); |
e2177955 AK |
1722 | return ret; |
1723 | } | |
1724 | ||
99e86347 | 1725 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
1726 | --fr; |
1727 | } | |
1728 | ||
1729 | ret.mr = fr->mr; | |
73034e9e | 1730 | ret.address_space = as; |
e2177955 AK |
1731 | range = addrrange_intersection(range, fr->addr); |
1732 | ret.offset_within_region = fr->offset_in_region; | |
1733 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1734 | fr->addr.start)); | |
052e87b0 | 1735 | ret.size = range.size; |
e2177955 | 1736 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 1737 | ret.readonly = fr->readonly; |
dfde4e6e PB |
1738 | memory_region_ref(ret.mr); |
1739 | ||
856d7245 | 1740 | flatview_unref(view); |
e2177955 AK |
1741 | return ret; |
1742 | } | |
1743 | ||
1d671369 | 1744 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 1745 | { |
99e86347 | 1746 | FlatView *view; |
7664e80c AK |
1747 | FlatRange *fr; |
1748 | ||
856d7245 | 1749 | view = address_space_get_flatview(as); |
99e86347 | 1750 | FOR_EACH_FLAT_RANGE(fr, view) { |
72e22d2f | 1751 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c | 1752 | } |
856d7245 | 1753 | flatview_unref(view); |
7664e80c AK |
1754 | } |
1755 | ||
1756 | void memory_global_dirty_log_start(void) | |
1757 | { | |
7664e80c | 1758 | global_dirty_log = true; |
7376e582 | 1759 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1760 | } |
1761 | ||
1762 | void memory_global_dirty_log_stop(void) | |
1763 | { | |
7664e80c | 1764 | global_dirty_log = false; |
7376e582 | 1765 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1766 | } |
1767 | ||
1768 | static void listener_add_address_space(MemoryListener *listener, | |
1769 | AddressSpace *as) | |
1770 | { | |
99e86347 | 1771 | FlatView *view; |
7664e80c AK |
1772 | FlatRange *fr; |
1773 | ||
221b3a3f | 1774 | if (listener->address_space_filter |
f6790af6 | 1775 | && listener->address_space_filter != as) { |
221b3a3f JG |
1776 | return; |
1777 | } | |
1778 | ||
7664e80c | 1779 | if (global_dirty_log) { |
975aefe0 AK |
1780 | if (listener->log_global_start) { |
1781 | listener->log_global_start(listener); | |
1782 | } | |
7664e80c | 1783 | } |
975aefe0 | 1784 | |
856d7245 | 1785 | view = address_space_get_flatview(as); |
99e86347 | 1786 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
1787 | MemoryRegionSection section = { |
1788 | .mr = fr->mr, | |
f6790af6 | 1789 | .address_space = as, |
7664e80c | 1790 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 1791 | .size = fr->addr.size, |
7664e80c | 1792 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 1793 | .readonly = fr->readonly, |
7664e80c | 1794 | }; |
975aefe0 AK |
1795 | if (listener->region_add) { |
1796 | listener->region_add(listener, §ion); | |
1797 | } | |
7664e80c | 1798 | } |
856d7245 | 1799 | flatview_unref(view); |
7664e80c AK |
1800 | } |
1801 | ||
f6790af6 | 1802 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 1803 | { |
72e22d2f | 1804 | MemoryListener *other = NULL; |
0d673e36 | 1805 | AddressSpace *as; |
72e22d2f | 1806 | |
7376e582 | 1807 | listener->address_space_filter = filter; |
72e22d2f AK |
1808 | if (QTAILQ_EMPTY(&memory_listeners) |
1809 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1810 | memory_listeners)->priority) { | |
1811 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1812 | } else { | |
1813 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1814 | if (listener->priority < other->priority) { | |
1815 | break; | |
1816 | } | |
1817 | } | |
1818 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1819 | } | |
0d673e36 AK |
1820 | |
1821 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1822 | listener_add_address_space(listener, as); | |
1823 | } | |
7664e80c AK |
1824 | } |
1825 | ||
1826 | void memory_listener_unregister(MemoryListener *listener) | |
1827 | { | |
72e22d2f | 1828 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1829 | } |
e2177955 | 1830 | |
7dca8043 | 1831 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 1832 | { |
856d7245 PB |
1833 | if (QTAILQ_EMPTY(&address_spaces)) { |
1834 | memory_init(); | |
1835 | } | |
1836 | ||
59023ef4 | 1837 | memory_region_transaction_begin(); |
8786db7c AK |
1838 | as->root = root; |
1839 | as->current_map = g_new(FlatView, 1); | |
1840 | flatview_init(as->current_map); | |
4c19eb72 AK |
1841 | as->ioeventfd_nb = 0; |
1842 | as->ioeventfds = NULL; | |
0d673e36 | 1843 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 1844 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 1845 | address_space_init_dispatch(as); |
f43793c7 PB |
1846 | memory_region_update_pending |= root->enabled; |
1847 | memory_region_transaction_commit(); | |
1c0ffa58 | 1848 | } |
658b2224 | 1849 | |
83f3c251 AK |
1850 | void address_space_destroy(AddressSpace *as) |
1851 | { | |
078c44f4 DG |
1852 | MemoryListener *listener; |
1853 | ||
83f3c251 AK |
1854 | /* Flush out anything from MemoryListeners listening in on this */ |
1855 | memory_region_transaction_begin(); | |
1856 | as->root = NULL; | |
1857 | memory_region_transaction_commit(); | |
1858 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
1859 | address_space_destroy_dispatch(as); | |
078c44f4 DG |
1860 | |
1861 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
1862 | assert(listener->address_space_filter != as); | |
1863 | } | |
1864 | ||
856d7245 | 1865 | flatview_unref(as->current_map); |
7dca8043 | 1866 | g_free(as->name); |
4c19eb72 | 1867 | g_free(as->ioeventfds); |
83f3c251 AK |
1868 | } |
1869 | ||
791af8c8 | 1870 | bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size) |
acbbec5d | 1871 | { |
791af8c8 | 1872 | return memory_region_dispatch_read(mr, addr, pval, size); |
acbbec5d AK |
1873 | } |
1874 | ||
791af8c8 | 1875 | bool io_mem_write(MemoryRegion *mr, hwaddr addr, |
acbbec5d AK |
1876 | uint64_t val, unsigned size) |
1877 | { | |
791af8c8 | 1878 | return memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1879 | } |
1880 | ||
314e2987 BS |
1881 | typedef struct MemoryRegionList MemoryRegionList; |
1882 | ||
1883 | struct MemoryRegionList { | |
1884 | const MemoryRegion *mr; | |
1885 | bool printed; | |
1886 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1887 | }; | |
1888 | ||
1889 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1890 | ||
1891 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1892 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 1893 | hwaddr base, |
9479c57a | 1894 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1895 | { |
9479c57a JK |
1896 | MemoryRegionList *new_ml, *ml, *next_ml; |
1897 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1898 | const MemoryRegion *submr; |
1899 | unsigned int i; | |
1900 | ||
7ea692b2 | 1901 | if (!mr || !mr->enabled) { |
314e2987 BS |
1902 | return; |
1903 | } | |
1904 | ||
1905 | for (i = 0; i < level; i++) { | |
1906 | mon_printf(f, " "); | |
1907 | } | |
1908 | ||
1909 | if (mr->alias) { | |
1910 | MemoryRegionList *ml; | |
1911 | bool found = false; | |
1912 | ||
1913 | /* check if the alias is already in the queue */ | |
9479c57a | 1914 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1915 | if (ml->mr == mr->alias && !ml->printed) { |
1916 | found = true; | |
1917 | } | |
1918 | } | |
1919 | ||
1920 | if (!found) { | |
1921 | ml = g_new(MemoryRegionList, 1); | |
1922 | ml->mr = mr->alias; | |
1923 | ml->printed = false; | |
9479c57a | 1924 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1925 | } |
4896d74b JK |
1926 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1927 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1928 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1929 | base + mr->addr, |
08dafab4 | 1930 | base + mr->addr |
fd1d9926 AW |
1931 | + (int128_nz(mr->size) ? |
1932 | (hwaddr)int128_get64(int128_sub(mr->size, | |
1933 | int128_one())) : 0), | |
4b474ba7 | 1934 | mr->priority, |
5f9a5ea1 JK |
1935 | mr->romd_mode ? 'R' : '-', |
1936 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1937 | : '-', | |
314e2987 BS |
1938 | mr->name, |
1939 | mr->alias->name, | |
1940 | mr->alias_offset, | |
08dafab4 | 1941 | mr->alias_offset |
a66670c7 AK |
1942 | + (int128_nz(mr->size) ? |
1943 | (hwaddr)int128_get64(int128_sub(mr->size, | |
1944 | int128_one())) : 0)); | |
314e2987 | 1945 | } else { |
4896d74b JK |
1946 | mon_printf(f, |
1947 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1948 | base + mr->addr, |
08dafab4 | 1949 | base + mr->addr |
fd1d9926 AW |
1950 | + (int128_nz(mr->size) ? |
1951 | (hwaddr)int128_get64(int128_sub(mr->size, | |
1952 | int128_one())) : 0), | |
4b474ba7 | 1953 | mr->priority, |
5f9a5ea1 JK |
1954 | mr->romd_mode ? 'R' : '-', |
1955 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1956 | : '-', | |
314e2987 BS |
1957 | mr->name); |
1958 | } | |
9479c57a JK |
1959 | |
1960 | QTAILQ_INIT(&submr_print_queue); | |
1961 | ||
314e2987 | 1962 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1963 | new_ml = g_new(MemoryRegionList, 1); |
1964 | new_ml->mr = submr; | |
1965 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1966 | if (new_ml->mr->addr < ml->mr->addr || | |
1967 | (new_ml->mr->addr == ml->mr->addr && | |
1968 | new_ml->mr->priority > ml->mr->priority)) { | |
1969 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1970 | new_ml = NULL; | |
1971 | break; | |
1972 | } | |
1973 | } | |
1974 | if (new_ml) { | |
1975 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1976 | } | |
1977 | } | |
1978 | ||
1979 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1980 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1981 | alias_print_queue); | |
1982 | } | |
1983 | ||
88365e47 | 1984 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1985 | g_free(ml); |
314e2987 BS |
1986 | } |
1987 | } | |
1988 | ||
1989 | void mtree_info(fprintf_function mon_printf, void *f) | |
1990 | { | |
1991 | MemoryRegionListHead ml_head; | |
1992 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 1993 | AddressSpace *as; |
314e2987 BS |
1994 | |
1995 | QTAILQ_INIT(&ml_head); | |
1996 | ||
0d673e36 | 1997 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
0d673e36 AK |
1998 | mon_printf(f, "%s\n", as->name); |
1999 | mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); | |
b9f9be88 BS |
2000 | } |
2001 | ||
2002 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
2003 | /* print aliased regions */ |
2004 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
2005 | if (!ml->printed) { | |
2006 | mon_printf(f, "%s\n", ml->mr->name); | |
2007 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
2008 | } | |
2009 | } | |
2010 | ||
2011 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 2012 | g_free(ml); |
314e2987 | 2013 | } |
314e2987 | 2014 | } |
b4fefef9 PC |
2015 | |
2016 | static const TypeInfo memory_region_info = { | |
2017 | .parent = TYPE_OBJECT, | |
2018 | .name = TYPE_MEMORY_REGION, | |
2019 | .instance_size = sizeof(MemoryRegion), | |
2020 | .instance_init = memory_region_initfn, | |
2021 | .instance_finalize = memory_region_finalize, | |
2022 | }; | |
2023 | ||
2024 | static void memory_register_types(void) | |
2025 | { | |
2026 | type_register_static(&memory_region_info); | |
2027 | } | |
2028 | ||
2029 | type_init(memory_register_types) |