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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
022c62cb PB |
16 | #include "exec/memory.h" |
17 | #include "exec/address-spaces.h" | |
18 | #include "exec/ioport.h" | |
1de7afc9 | 19 | #include "qemu/bitops.h" |
2c9b15ca | 20 | #include "qom/object.h" |
9c17d615 | 21 | #include "sysemu/kvm.h" |
093bc2cd AK |
22 | #include <assert.h> |
23 | ||
022c62cb | 24 | #include "exec/memory-internal.h" |
67d95c15 | 25 | |
d197063f PB |
26 | //#define DEBUG_UNASSIGNED |
27 | ||
22bde714 JK |
28 | static unsigned memory_region_transaction_depth; |
29 | static bool memory_region_update_pending; | |
7664e80c AK |
30 | static bool global_dirty_log = false; |
31 | ||
72e22d2f AK |
32 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
33 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 34 | |
0d673e36 AK |
35 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
36 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
37 | ||
093bc2cd AK |
38 | typedef struct AddrRange AddrRange; |
39 | ||
8417cebf AK |
40 | /* |
41 | * Note using signed integers limits us to physical addresses at most | |
42 | * 63 bits wide. They are needed for negative offsetting in aliases | |
43 | * (large MemoryRegion::alias_offset). | |
44 | */ | |
093bc2cd | 45 | struct AddrRange { |
08dafab4 AK |
46 | Int128 start; |
47 | Int128 size; | |
093bc2cd AK |
48 | }; |
49 | ||
08dafab4 | 50 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
51 | { |
52 | return (AddrRange) { start, size }; | |
53 | } | |
54 | ||
55 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
56 | { | |
08dafab4 | 57 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
58 | } |
59 | ||
08dafab4 | 60 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 61 | { |
08dafab4 | 62 | return int128_add(r.start, r.size); |
093bc2cd AK |
63 | } |
64 | ||
08dafab4 | 65 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 66 | { |
08dafab4 | 67 | int128_addto(&range.start, delta); |
093bc2cd AK |
68 | return range; |
69 | } | |
70 | ||
08dafab4 AK |
71 | static bool addrrange_contains(AddrRange range, Int128 addr) |
72 | { | |
73 | return int128_ge(addr, range.start) | |
74 | && int128_lt(addr, addrrange_end(range)); | |
75 | } | |
76 | ||
093bc2cd AK |
77 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
78 | { | |
08dafab4 AK |
79 | return addrrange_contains(r1, r2.start) |
80 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
81 | } |
82 | ||
83 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
84 | { | |
08dafab4 AK |
85 | Int128 start = int128_max(r1.start, r2.start); |
86 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
87 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
88 | } |
89 | ||
0e0d36b4 AK |
90 | enum ListenerDirection { Forward, Reverse }; |
91 | ||
7376e582 AK |
92 | static bool memory_listener_match(MemoryListener *listener, |
93 | MemoryRegionSection *section) | |
94 | { | |
95 | return !listener->address_space_filter | |
96 | || listener->address_space_filter == section->address_space; | |
97 | } | |
98 | ||
99 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
100 | do { \ |
101 | MemoryListener *_listener; \ | |
102 | \ | |
103 | switch (_direction) { \ | |
104 | case Forward: \ | |
105 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
106 | if (_listener->_callback) { \ |
107 | _listener->_callback(_listener, ##_args); \ | |
108 | } \ | |
0e0d36b4 AK |
109 | } \ |
110 | break; \ | |
111 | case Reverse: \ | |
112 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
113 | memory_listeners, link) { \ | |
975aefe0 AK |
114 | if (_listener->_callback) { \ |
115 | _listener->_callback(_listener, ##_args); \ | |
116 | } \ | |
0e0d36b4 AK |
117 | } \ |
118 | break; \ | |
119 | default: \ | |
120 | abort(); \ | |
121 | } \ | |
122 | } while (0) | |
123 | ||
7376e582 AK |
124 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
125 | do { \ | |
126 | MemoryListener *_listener; \ | |
127 | \ | |
128 | switch (_direction) { \ | |
129 | case Forward: \ | |
130 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
131 | if (_listener->_callback \ |
132 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
133 | _listener->_callback(_listener, _section, ##_args); \ |
134 | } \ | |
135 | } \ | |
136 | break; \ | |
137 | case Reverse: \ | |
138 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
139 | memory_listeners, link) { \ | |
975aefe0 AK |
140 | if (_listener->_callback \ |
141 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
142 | _listener->_callback(_listener, _section, ##_args); \ |
143 | } \ | |
144 | } \ | |
145 | break; \ | |
146 | default: \ | |
147 | abort(); \ | |
148 | } \ | |
149 | } while (0) | |
150 | ||
dfde4e6e | 151 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
0e0d36b4 | 152 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 153 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 154 | .mr = (fr)->mr, \ |
f6790af6 | 155 | .address_space = (as), \ |
0e0d36b4 | 156 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 157 | .size = (fr)->addr.size, \ |
0e0d36b4 | 158 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 159 | .readonly = (fr)->readonly, \ |
7376e582 | 160 | })) |
0e0d36b4 | 161 | |
093bc2cd AK |
162 | struct CoalescedMemoryRange { |
163 | AddrRange addr; | |
164 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
165 | }; | |
166 | ||
3e9d69e7 AK |
167 | struct MemoryRegionIoeventfd { |
168 | AddrRange addr; | |
169 | bool match_data; | |
170 | uint64_t data; | |
753d5e14 | 171 | EventNotifier *e; |
3e9d69e7 AK |
172 | }; |
173 | ||
174 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
175 | MemoryRegionIoeventfd b) | |
176 | { | |
08dafab4 | 177 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 178 | return true; |
08dafab4 | 179 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 180 | return false; |
08dafab4 | 181 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 182 | return true; |
08dafab4 | 183 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
184 | return false; |
185 | } else if (a.match_data < b.match_data) { | |
186 | return true; | |
187 | } else if (a.match_data > b.match_data) { | |
188 | return false; | |
189 | } else if (a.match_data) { | |
190 | if (a.data < b.data) { | |
191 | return true; | |
192 | } else if (a.data > b.data) { | |
193 | return false; | |
194 | } | |
195 | } | |
753d5e14 | 196 | if (a.e < b.e) { |
3e9d69e7 | 197 | return true; |
753d5e14 | 198 | } else if (a.e > b.e) { |
3e9d69e7 AK |
199 | return false; |
200 | } | |
201 | return false; | |
202 | } | |
203 | ||
204 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
205 | MemoryRegionIoeventfd b) | |
206 | { | |
207 | return !memory_region_ioeventfd_before(a, b) | |
208 | && !memory_region_ioeventfd_before(b, a); | |
209 | } | |
210 | ||
093bc2cd AK |
211 | typedef struct FlatRange FlatRange; |
212 | typedef struct FlatView FlatView; | |
213 | ||
214 | /* Range of memory in the global map. Addresses are absolute. */ | |
215 | struct FlatRange { | |
216 | MemoryRegion *mr; | |
a8170e5e | 217 | hwaddr offset_in_region; |
093bc2cd | 218 | AddrRange addr; |
5a583347 | 219 | uint8_t dirty_log_mask; |
5f9a5ea1 | 220 | bool romd_mode; |
fb1cd6f9 | 221 | bool readonly; |
093bc2cd AK |
222 | }; |
223 | ||
224 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
225 | * order. | |
226 | */ | |
227 | struct FlatView { | |
228 | FlatRange *ranges; | |
229 | unsigned nr; | |
230 | unsigned nr_allocated; | |
231 | }; | |
232 | ||
cc31e6e7 AK |
233 | typedef struct AddressSpaceOps AddressSpaceOps; |
234 | ||
093bc2cd AK |
235 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
236 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
237 | ||
093bc2cd AK |
238 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
239 | { | |
240 | return a->mr == b->mr | |
241 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 242 | && a->offset_in_region == b->offset_in_region |
5f9a5ea1 | 243 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 244 | && a->readonly == b->readonly; |
093bc2cd AK |
245 | } |
246 | ||
247 | static void flatview_init(FlatView *view) | |
248 | { | |
249 | view->ranges = NULL; | |
250 | view->nr = 0; | |
251 | view->nr_allocated = 0; | |
252 | } | |
253 | ||
254 | /* Insert a range into a given position. Caller is responsible for maintaining | |
255 | * sorting order. | |
256 | */ | |
257 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
258 | { | |
259 | if (view->nr == view->nr_allocated) { | |
260 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 261 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
262 | view->nr_allocated * sizeof(*view->ranges)); |
263 | } | |
264 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
265 | (view->nr - pos) * sizeof(FlatRange)); | |
266 | view->ranges[pos] = *range; | |
dfde4e6e | 267 | memory_region_ref(range->mr); |
093bc2cd AK |
268 | ++view->nr; |
269 | } | |
270 | ||
271 | static void flatview_destroy(FlatView *view) | |
272 | { | |
dfde4e6e PB |
273 | int i; |
274 | ||
275 | for (i = 0; i < view->nr; i++) { | |
276 | memory_region_unref(view->ranges[i].mr); | |
277 | } | |
7267c094 | 278 | g_free(view->ranges); |
093bc2cd AK |
279 | } |
280 | ||
3d8e6bf9 AK |
281 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
282 | { | |
08dafab4 | 283 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 284 | && r1->mr == r2->mr |
08dafab4 AK |
285 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
286 | r1->addr.size), | |
287 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 288 | && r1->dirty_log_mask == r2->dirty_log_mask |
5f9a5ea1 | 289 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 290 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
291 | } |
292 | ||
8508e024 | 293 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
294 | static void flatview_simplify(FlatView *view) |
295 | { | |
296 | unsigned i, j; | |
297 | ||
298 | i = 0; | |
299 | while (i < view->nr) { | |
300 | j = i + 1; | |
301 | while (j < view->nr | |
302 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 303 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
304 | ++j; |
305 | } | |
306 | ++i; | |
307 | memmove(&view->ranges[i], &view->ranges[j], | |
308 | (view->nr - j) * sizeof(view->ranges[j])); | |
309 | view->nr -= j - i; | |
310 | } | |
311 | } | |
312 | ||
ce5d2f33 PB |
313 | static void memory_region_oldmmio_read_accessor(void *opaque, |
314 | hwaddr addr, | |
315 | uint64_t *value, | |
316 | unsigned size, | |
317 | unsigned shift, | |
318 | uint64_t mask) | |
319 | { | |
320 | MemoryRegion *mr = opaque; | |
321 | uint64_t tmp; | |
322 | ||
323 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
324 | *value |= (tmp & mask) << shift; | |
325 | } | |
326 | ||
164a4dcd | 327 | static void memory_region_read_accessor(void *opaque, |
a8170e5e | 328 | hwaddr addr, |
164a4dcd AK |
329 | uint64_t *value, |
330 | unsigned size, | |
331 | unsigned shift, | |
332 | uint64_t mask) | |
333 | { | |
334 | MemoryRegion *mr = opaque; | |
335 | uint64_t tmp; | |
336 | ||
d410515e JK |
337 | if (mr->flush_coalesced_mmio) { |
338 | qemu_flush_coalesced_mmio_buffer(); | |
339 | } | |
164a4dcd AK |
340 | tmp = mr->ops->read(mr->opaque, addr, size); |
341 | *value |= (tmp & mask) << shift; | |
342 | } | |
343 | ||
ce5d2f33 PB |
344 | static void memory_region_oldmmio_write_accessor(void *opaque, |
345 | hwaddr addr, | |
346 | uint64_t *value, | |
347 | unsigned size, | |
348 | unsigned shift, | |
349 | uint64_t mask) | |
350 | { | |
351 | MemoryRegion *mr = opaque; | |
352 | uint64_t tmp; | |
353 | ||
354 | tmp = (*value >> shift) & mask; | |
355 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); | |
356 | } | |
357 | ||
164a4dcd | 358 | static void memory_region_write_accessor(void *opaque, |
a8170e5e | 359 | hwaddr addr, |
164a4dcd AK |
360 | uint64_t *value, |
361 | unsigned size, | |
362 | unsigned shift, | |
363 | uint64_t mask) | |
364 | { | |
365 | MemoryRegion *mr = opaque; | |
366 | uint64_t tmp; | |
367 | ||
d410515e JK |
368 | if (mr->flush_coalesced_mmio) { |
369 | qemu_flush_coalesced_mmio_buffer(); | |
370 | } | |
164a4dcd AK |
371 | tmp = (*value >> shift) & mask; |
372 | mr->ops->write(mr->opaque, addr, tmp, size); | |
373 | } | |
374 | ||
a8170e5e | 375 | static void access_with_adjusted_size(hwaddr addr, |
164a4dcd AK |
376 | uint64_t *value, |
377 | unsigned size, | |
378 | unsigned access_size_min, | |
379 | unsigned access_size_max, | |
380 | void (*access)(void *opaque, | |
a8170e5e | 381 | hwaddr addr, |
164a4dcd AK |
382 | uint64_t *value, |
383 | unsigned size, | |
384 | unsigned shift, | |
385 | uint64_t mask), | |
386 | void *opaque) | |
387 | { | |
388 | uint64_t access_mask; | |
389 | unsigned access_size; | |
390 | unsigned i; | |
391 | ||
392 | if (!access_size_min) { | |
393 | access_size_min = 1; | |
394 | } | |
395 | if (!access_size_max) { | |
396 | access_size_max = 4; | |
397 | } | |
ce5d2f33 PB |
398 | |
399 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
400 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
401 | access_mask = -1ULL >> (64 - access_size * 8); | |
402 | for (i = 0; i < size; i += access_size) { | |
08521e28 PB |
403 | #ifdef TARGET_WORDS_BIGENDIAN |
404 | access(opaque, addr + i, value, access_size, | |
405 | (size - access_size - i) * 8, access_mask); | |
406 | #else | |
164a4dcd | 407 | access(opaque, addr + i, value, access_size, i * 8, access_mask); |
08521e28 | 408 | #endif |
164a4dcd AK |
409 | } |
410 | } | |
411 | ||
e2177955 AK |
412 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
413 | { | |
0d673e36 AK |
414 | AddressSpace *as; |
415 | ||
e2177955 AK |
416 | while (mr->parent) { |
417 | mr = mr->parent; | |
418 | } | |
0d673e36 AK |
419 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
420 | if (mr == as->root) { | |
421 | return as; | |
422 | } | |
e2177955 AK |
423 | } |
424 | abort(); | |
425 | } | |
426 | ||
093bc2cd AK |
427 | /* Render a memory region into the global view. Ranges in @view obscure |
428 | * ranges in @mr. | |
429 | */ | |
430 | static void render_memory_region(FlatView *view, | |
431 | MemoryRegion *mr, | |
08dafab4 | 432 | Int128 base, |
fb1cd6f9 AK |
433 | AddrRange clip, |
434 | bool readonly) | |
093bc2cd AK |
435 | { |
436 | MemoryRegion *subregion; | |
437 | unsigned i; | |
a8170e5e | 438 | hwaddr offset_in_region; |
08dafab4 AK |
439 | Int128 remain; |
440 | Int128 now; | |
093bc2cd AK |
441 | FlatRange fr; |
442 | AddrRange tmp; | |
443 | ||
6bba19ba AK |
444 | if (!mr->enabled) { |
445 | return; | |
446 | } | |
447 | ||
08dafab4 | 448 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 449 | readonly |= mr->readonly; |
093bc2cd AK |
450 | |
451 | tmp = addrrange_make(base, mr->size); | |
452 | ||
453 | if (!addrrange_intersects(tmp, clip)) { | |
454 | return; | |
455 | } | |
456 | ||
457 | clip = addrrange_intersection(tmp, clip); | |
458 | ||
459 | if (mr->alias) { | |
08dafab4 AK |
460 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
461 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 462 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
463 | return; |
464 | } | |
465 | ||
466 | /* Render subregions in priority order. */ | |
467 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 468 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
469 | } |
470 | ||
14a3c10a | 471 | if (!mr->terminates) { |
093bc2cd AK |
472 | return; |
473 | } | |
474 | ||
08dafab4 | 475 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
476 | base = clip.start; |
477 | remain = clip.size; | |
478 | ||
2eb74e1a PC |
479 | fr.mr = mr; |
480 | fr.dirty_log_mask = mr->dirty_log_mask; | |
481 | fr.romd_mode = mr->romd_mode; | |
482 | fr.readonly = readonly; | |
483 | ||
093bc2cd | 484 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
485 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
486 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
487 | continue; |
488 | } | |
08dafab4 AK |
489 | if (int128_lt(base, view->ranges[i].addr.start)) { |
490 | now = int128_min(remain, | |
491 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
492 | fr.offset_in_region = offset_in_region; |
493 | fr.addr = addrrange_make(base, now); | |
494 | flatview_insert(view, i, &fr); | |
495 | ++i; | |
08dafab4 AK |
496 | int128_addto(&base, now); |
497 | offset_in_region += int128_get64(now); | |
498 | int128_subfrom(&remain, now); | |
093bc2cd | 499 | } |
d26a8cae AK |
500 | now = int128_sub(int128_min(int128_add(base, remain), |
501 | addrrange_end(view->ranges[i].addr)), | |
502 | base); | |
503 | int128_addto(&base, now); | |
504 | offset_in_region += int128_get64(now); | |
505 | int128_subfrom(&remain, now); | |
093bc2cd | 506 | } |
08dafab4 | 507 | if (int128_nz(remain)) { |
093bc2cd AK |
508 | fr.offset_in_region = offset_in_region; |
509 | fr.addr = addrrange_make(base, remain); | |
510 | flatview_insert(view, i, &fr); | |
511 | } | |
512 | } | |
513 | ||
514 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
515 | static FlatView generate_memory_topology(MemoryRegion *mr) | |
516 | { | |
517 | FlatView view; | |
518 | ||
519 | flatview_init(&view); | |
520 | ||
83f3c251 AK |
521 | if (mr) { |
522 | render_memory_region(&view, mr, int128_zero(), | |
523 | addrrange_make(int128_zero(), int128_2_64()), false); | |
524 | } | |
3d8e6bf9 | 525 | flatview_simplify(&view); |
093bc2cd AK |
526 | |
527 | return view; | |
528 | } | |
529 | ||
3e9d69e7 AK |
530 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
531 | MemoryRegionIoeventfd *fds_new, | |
532 | unsigned fds_new_nb, | |
533 | MemoryRegionIoeventfd *fds_old, | |
534 | unsigned fds_old_nb) | |
535 | { | |
536 | unsigned iold, inew; | |
80a1ea37 AK |
537 | MemoryRegionIoeventfd *fd; |
538 | MemoryRegionSection section; | |
3e9d69e7 AK |
539 | |
540 | /* Generate a symmetric difference of the old and new fd sets, adding | |
541 | * and deleting as necessary. | |
542 | */ | |
543 | ||
544 | iold = inew = 0; | |
545 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
546 | if (iold < fds_old_nb | |
547 | && (inew == fds_new_nb | |
548 | || memory_region_ioeventfd_before(fds_old[iold], | |
549 | fds_new[inew]))) { | |
80a1ea37 AK |
550 | fd = &fds_old[iold]; |
551 | section = (MemoryRegionSection) { | |
f6790af6 | 552 | .address_space = as, |
80a1ea37 | 553 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 554 | .size = fd->addr.size, |
80a1ea37 AK |
555 | }; |
556 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 557 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
558 | ++iold; |
559 | } else if (inew < fds_new_nb | |
560 | && (iold == fds_old_nb | |
561 | || memory_region_ioeventfd_before(fds_new[inew], | |
562 | fds_old[iold]))) { | |
80a1ea37 AK |
563 | fd = &fds_new[inew]; |
564 | section = (MemoryRegionSection) { | |
f6790af6 | 565 | .address_space = as, |
80a1ea37 | 566 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 567 | .size = fd->addr.size, |
80a1ea37 AK |
568 | }; |
569 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 570 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
571 | ++inew; |
572 | } else { | |
573 | ++iold; | |
574 | ++inew; | |
575 | } | |
576 | } | |
577 | } | |
578 | ||
579 | static void address_space_update_ioeventfds(AddressSpace *as) | |
580 | { | |
99e86347 | 581 | FlatView *view; |
3e9d69e7 AK |
582 | FlatRange *fr; |
583 | unsigned ioeventfd_nb = 0; | |
584 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
585 | AddrRange tmp; | |
586 | unsigned i; | |
587 | ||
99e86347 PB |
588 | view = as->current_map; |
589 | FOR_EACH_FLAT_RANGE(fr, view) { | |
3e9d69e7 AK |
590 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
591 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
592 | int128_sub(fr->addr.start, |
593 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
594 | if (addrrange_intersects(fr->addr, tmp)) { |
595 | ++ioeventfd_nb; | |
7267c094 | 596 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
597 | ioeventfd_nb * sizeof(*ioeventfds)); |
598 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
599 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
600 | } | |
601 | } | |
602 | } | |
603 | ||
604 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
605 | as->ioeventfds, as->ioeventfd_nb); | |
606 | ||
7267c094 | 607 | g_free(as->ioeventfds); |
3e9d69e7 AK |
608 | as->ioeventfds = ioeventfds; |
609 | as->ioeventfd_nb = ioeventfd_nb; | |
610 | } | |
611 | ||
b8af1afb AK |
612 | static void address_space_update_topology_pass(AddressSpace *as, |
613 | FlatView old_view, | |
614 | FlatView new_view, | |
615 | bool adding) | |
093bc2cd | 616 | { |
093bc2cd AK |
617 | unsigned iold, inew; |
618 | FlatRange *frold, *frnew; | |
093bc2cd AK |
619 | |
620 | /* Generate a symmetric difference of the old and new memory maps. | |
621 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
622 | */ | |
623 | iold = inew = 0; | |
624 | while (iold < old_view.nr || inew < new_view.nr) { | |
625 | if (iold < old_view.nr) { | |
626 | frold = &old_view.ranges[iold]; | |
627 | } else { | |
628 | frold = NULL; | |
629 | } | |
630 | if (inew < new_view.nr) { | |
631 | frnew = &new_view.ranges[inew]; | |
632 | } else { | |
633 | frnew = NULL; | |
634 | } | |
635 | ||
636 | if (frold | |
637 | && (!frnew | |
08dafab4 AK |
638 | || int128_lt(frold->addr.start, frnew->addr.start) |
639 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 640 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 641 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 642 | |
b8af1afb | 643 | if (!adding) { |
72e22d2f | 644 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
645 | } |
646 | ||
093bc2cd AK |
647 | ++iold; |
648 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 649 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 650 | |
b8af1afb | 651 | if (adding) { |
50c1e149 | 652 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 653 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 654 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 655 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 656 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 657 | } |
5a583347 AK |
658 | } |
659 | ||
093bc2cd AK |
660 | ++iold; |
661 | ++inew; | |
093bc2cd AK |
662 | } else { |
663 | /* In new */ | |
664 | ||
b8af1afb | 665 | if (adding) { |
72e22d2f | 666 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
667 | } |
668 | ||
093bc2cd AK |
669 | ++inew; |
670 | } | |
671 | } | |
b8af1afb AK |
672 | } |
673 | ||
674 | ||
675 | static void address_space_update_topology(AddressSpace *as) | |
676 | { | |
8786db7c | 677 | FlatView old_view = *as->current_map; |
b8af1afb AK |
678 | FlatView new_view = generate_memory_topology(as->root); |
679 | ||
680 | address_space_update_topology_pass(as, old_view, new_view, false); | |
681 | address_space_update_topology_pass(as, old_view, new_view, true); | |
682 | ||
8786db7c | 683 | *as->current_map = new_view; |
093bc2cd | 684 | flatview_destroy(&old_view); |
3e9d69e7 | 685 | address_space_update_ioeventfds(as); |
093bc2cd AK |
686 | } |
687 | ||
4ef4db86 AK |
688 | void memory_region_transaction_begin(void) |
689 | { | |
bb880ded | 690 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
691 | ++memory_region_transaction_depth; |
692 | } | |
693 | ||
694 | void memory_region_transaction_commit(void) | |
695 | { | |
0d673e36 AK |
696 | AddressSpace *as; |
697 | ||
4ef4db86 AK |
698 | assert(memory_region_transaction_depth); |
699 | --memory_region_transaction_depth; | |
22bde714 JK |
700 | if (!memory_region_transaction_depth && memory_region_update_pending) { |
701 | memory_region_update_pending = false; | |
02e2b95f JK |
702 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); |
703 | ||
0d673e36 AK |
704 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
705 | address_space_update_topology(as); | |
02e2b95f JK |
706 | } |
707 | ||
708 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); | |
e87c099f | 709 | } |
4ef4db86 AK |
710 | } |
711 | ||
545e92e0 AK |
712 | static void memory_region_destructor_none(MemoryRegion *mr) |
713 | { | |
714 | } | |
715 | ||
716 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
717 | { | |
718 | qemu_ram_free(mr->ram_addr); | |
719 | } | |
720 | ||
dfde4e6e PB |
721 | static void memory_region_destructor_alias(MemoryRegion *mr) |
722 | { | |
723 | memory_region_unref(mr->alias); | |
724 | } | |
725 | ||
545e92e0 AK |
726 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) |
727 | { | |
728 | qemu_ram_free_from_ptr(mr->ram_addr); | |
729 | } | |
730 | ||
d0a9b5bc AK |
731 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
732 | { | |
733 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
734 | } |
735 | ||
be675c97 AK |
736 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
737 | { | |
2c3579ab | 738 | #ifdef TARGET_WORDS_BIGENDIAN |
be675c97 AK |
739 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; |
740 | #else | |
741 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
742 | #endif | |
743 | } | |
744 | ||
093bc2cd | 745 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 746 | Object *owner, |
093bc2cd AK |
747 | const char *name, |
748 | uint64_t size) | |
749 | { | |
2cdfcf27 PB |
750 | mr->ops = &unassigned_mem_ops; |
751 | mr->opaque = NULL; | |
2c9b15ca | 752 | mr->owner = owner; |
30951157 | 753 | mr->iommu_ops = NULL; |
093bc2cd | 754 | mr->parent = NULL; |
803c0816 | 755 | mr->owner = NULL; |
08dafab4 AK |
756 | mr->size = int128_make64(size); |
757 | if (size == UINT64_MAX) { | |
758 | mr->size = int128_2_64(); | |
759 | } | |
093bc2cd | 760 | mr->addr = 0; |
b3b00c78 | 761 | mr->subpage = false; |
6bba19ba | 762 | mr->enabled = true; |
14a3c10a | 763 | mr->terminates = false; |
8ea9252a | 764 | mr->ram = false; |
5f9a5ea1 | 765 | mr->romd_mode = true; |
fb1cd6f9 | 766 | mr->readonly = false; |
75c578dc | 767 | mr->rom_device = false; |
545e92e0 | 768 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
769 | mr->priority = 0; |
770 | mr->may_overlap = false; | |
771 | mr->alias = NULL; | |
772 | QTAILQ_INIT(&mr->subregions); | |
773 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
774 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 775 | mr->name = g_strdup(name); |
5a583347 | 776 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
777 | mr->ioeventfd_nb = 0; |
778 | mr->ioeventfds = NULL; | |
d410515e | 779 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
780 | } |
781 | ||
b018ddf6 PB |
782 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
783 | unsigned size) | |
784 | { | |
785 | #ifdef DEBUG_UNASSIGNED | |
786 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
787 | #endif | |
c658b94f AF |
788 | if (cpu_single_env != NULL) { |
789 | cpu_unassigned_access(ENV_GET_CPU(cpu_single_env), | |
790 | addr, false, false, 0, size); | |
791 | } | |
b018ddf6 PB |
792 | return 0; |
793 | } | |
794 | ||
795 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
796 | uint64_t val, unsigned size) | |
797 | { | |
798 | #ifdef DEBUG_UNASSIGNED | |
799 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
800 | #endif | |
c658b94f AF |
801 | if (cpu_single_env != NULL) { |
802 | cpu_unassigned_access(ENV_GET_CPU(cpu_single_env), | |
803 | addr, true, false, 0, size); | |
804 | } | |
b018ddf6 PB |
805 | } |
806 | ||
d197063f PB |
807 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
808 | unsigned size, bool is_write) | |
809 | { | |
810 | return false; | |
811 | } | |
812 | ||
813 | const MemoryRegionOps unassigned_mem_ops = { | |
814 | .valid.accepts = unassigned_mem_accepts, | |
815 | .endianness = DEVICE_NATIVE_ENDIAN, | |
816 | }; | |
817 | ||
d2702032 PB |
818 | bool memory_region_access_valid(MemoryRegion *mr, |
819 | hwaddr addr, | |
820 | unsigned size, | |
821 | bool is_write) | |
093bc2cd | 822 | { |
a014ed07 PB |
823 | int access_size_min, access_size_max; |
824 | int access_size, i; | |
897fa7cf | 825 | |
093bc2cd AK |
826 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
827 | return false; | |
828 | } | |
829 | ||
a014ed07 | 830 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
831 | return true; |
832 | } | |
833 | ||
a014ed07 PB |
834 | access_size_min = mr->ops->valid.min_access_size; |
835 | if (!mr->ops->valid.min_access_size) { | |
836 | access_size_min = 1; | |
837 | } | |
838 | ||
839 | access_size_max = mr->ops->valid.max_access_size; | |
840 | if (!mr->ops->valid.max_access_size) { | |
841 | access_size_max = 4; | |
842 | } | |
843 | ||
844 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
845 | for (i = 0; i < size; i += access_size) { | |
846 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
847 | is_write)) { | |
848 | return false; | |
849 | } | |
093bc2cd | 850 | } |
a014ed07 | 851 | |
093bc2cd AK |
852 | return true; |
853 | } | |
854 | ||
a621f38d | 855 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
a8170e5e | 856 | hwaddr addr, |
a621f38d | 857 | unsigned size) |
093bc2cd | 858 | { |
164a4dcd | 859 | uint64_t data = 0; |
093bc2cd | 860 | |
ce5d2f33 PB |
861 | if (mr->ops->read) { |
862 | access_with_adjusted_size(addr, &data, size, | |
863 | mr->ops->impl.min_access_size, | |
864 | mr->ops->impl.max_access_size, | |
865 | memory_region_read_accessor, mr); | |
866 | } else { | |
867 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
868 | memory_region_oldmmio_read_accessor, mr); | |
74901c3b AK |
869 | } |
870 | ||
093bc2cd AK |
871 | return data; |
872 | } | |
873 | ||
a621f38d | 874 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
093bc2cd | 875 | { |
a621f38d AK |
876 | if (memory_region_wrong_endianness(mr)) { |
877 | switch (size) { | |
878 | case 1: | |
879 | break; | |
880 | case 2: | |
881 | *data = bswap16(*data); | |
882 | break; | |
883 | case 4: | |
884 | *data = bswap32(*data); | |
1470a0cd | 885 | break; |
968a5627 PB |
886 | case 8: |
887 | *data = bswap64(*data); | |
888 | break; | |
a621f38d AK |
889 | default: |
890 | abort(); | |
891 | } | |
892 | } | |
893 | } | |
894 | ||
791af8c8 PB |
895 | static bool memory_region_dispatch_read(MemoryRegion *mr, |
896 | hwaddr addr, | |
897 | uint64_t *pval, | |
898 | unsigned size) | |
a621f38d | 899 | { |
791af8c8 PB |
900 | if (!memory_region_access_valid(mr, addr, size, false)) { |
901 | *pval = unassigned_mem_read(mr, addr, size); | |
902 | return true; | |
903 | } | |
a621f38d | 904 | |
791af8c8 PB |
905 | *pval = memory_region_dispatch_read1(mr, addr, size); |
906 | adjust_endianness(mr, pval, size); | |
907 | return false; | |
a621f38d | 908 | } |
093bc2cd | 909 | |
791af8c8 | 910 | static bool memory_region_dispatch_write(MemoryRegion *mr, |
a8170e5e | 911 | hwaddr addr, |
a621f38d AK |
912 | uint64_t data, |
913 | unsigned size) | |
914 | { | |
897fa7cf | 915 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 916 | unassigned_mem_write(mr, addr, data, size); |
791af8c8 | 917 | return true; |
093bc2cd AK |
918 | } |
919 | ||
a621f38d AK |
920 | adjust_endianness(mr, &data, size); |
921 | ||
ce5d2f33 PB |
922 | if (mr->ops->write) { |
923 | access_with_adjusted_size(addr, &data, size, | |
924 | mr->ops->impl.min_access_size, | |
925 | mr->ops->impl.max_access_size, | |
926 | memory_region_write_accessor, mr); | |
927 | } else { | |
928 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
929 | memory_region_oldmmio_write_accessor, mr); | |
74901c3b | 930 | } |
791af8c8 | 931 | return false; |
093bc2cd AK |
932 | } |
933 | ||
093bc2cd | 934 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 935 | Object *owner, |
093bc2cd AK |
936 | const MemoryRegionOps *ops, |
937 | void *opaque, | |
938 | const char *name, | |
939 | uint64_t size) | |
940 | { | |
2c9b15ca | 941 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
942 | mr->ops = ops; |
943 | mr->opaque = opaque; | |
14a3c10a | 944 | mr->terminates = true; |
97161e17 | 945 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
946 | } |
947 | ||
948 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 949 | Object *owner, |
093bc2cd AK |
950 | const char *name, |
951 | uint64_t size) | |
952 | { | |
2c9b15ca | 953 | memory_region_init(mr, owner, name, size); |
8ea9252a | 954 | mr->ram = true; |
14a3c10a | 955 | mr->terminates = true; |
545e92e0 | 956 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 957 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
958 | } |
959 | ||
960 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 961 | Object *owner, |
093bc2cd AK |
962 | const char *name, |
963 | uint64_t size, | |
964 | void *ptr) | |
965 | { | |
2c9b15ca | 966 | memory_region_init(mr, owner, name, size); |
8ea9252a | 967 | mr->ram = true; |
14a3c10a | 968 | mr->terminates = true; |
545e92e0 | 969 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 970 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
971 | } |
972 | ||
973 | void memory_region_init_alias(MemoryRegion *mr, | |
2c9b15ca | 974 | Object *owner, |
093bc2cd AK |
975 | const char *name, |
976 | MemoryRegion *orig, | |
a8170e5e | 977 | hwaddr offset, |
093bc2cd AK |
978 | uint64_t size) |
979 | { | |
2c9b15ca | 980 | memory_region_init(mr, owner, name, size); |
dfde4e6e PB |
981 | memory_region_ref(orig); |
982 | mr->destructor = memory_region_destructor_alias; | |
093bc2cd AK |
983 | mr->alias = orig; |
984 | mr->alias_offset = offset; | |
985 | } | |
986 | ||
d0a9b5bc | 987 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 988 | Object *owner, |
d0a9b5bc | 989 | const MemoryRegionOps *ops, |
75f5941c | 990 | void *opaque, |
d0a9b5bc AK |
991 | const char *name, |
992 | uint64_t size) | |
993 | { | |
2c9b15ca | 994 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 995 | mr->ops = ops; |
75f5941c | 996 | mr->opaque = opaque; |
d0a9b5bc | 997 | mr->terminates = true; |
75c578dc | 998 | mr->rom_device = true; |
d0a9b5bc | 999 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1000 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
1001 | } |
1002 | ||
30951157 | 1003 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1004 | Object *owner, |
30951157 AK |
1005 | const MemoryRegionIOMMUOps *ops, |
1006 | const char *name, | |
1007 | uint64_t size) | |
1008 | { | |
2c9b15ca | 1009 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1010 | mr->iommu_ops = ops, |
1011 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1012 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1013 | } |
1014 | ||
1660e72d | 1015 | void memory_region_init_reservation(MemoryRegion *mr, |
2c9b15ca | 1016 | Object *owner, |
1660e72d JK |
1017 | const char *name, |
1018 | uint64_t size) | |
1019 | { | |
2c9b15ca | 1020 | memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size); |
1660e72d JK |
1021 | } |
1022 | ||
093bc2cd AK |
1023 | void memory_region_destroy(MemoryRegion *mr) |
1024 | { | |
1025 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
2be0e25f | 1026 | assert(memory_region_transaction_depth == 0); |
545e92e0 | 1027 | mr->destructor(mr); |
093bc2cd | 1028 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1029 | g_free((char *)mr->name); |
1030 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1031 | } |
1032 | ||
803c0816 PB |
1033 | Object *memory_region_owner(MemoryRegion *mr) |
1034 | { | |
1035 | return mr->owner; | |
1036 | } | |
1037 | ||
46637be2 PB |
1038 | void memory_region_ref(MemoryRegion *mr) |
1039 | { | |
1040 | if (mr && mr->owner) { | |
1041 | object_ref(mr->owner); | |
1042 | } | |
1043 | } | |
1044 | ||
1045 | void memory_region_unref(MemoryRegion *mr) | |
1046 | { | |
1047 | if (mr && mr->owner) { | |
1048 | object_unref(mr->owner); | |
1049 | } | |
1050 | } | |
1051 | ||
093bc2cd AK |
1052 | uint64_t memory_region_size(MemoryRegion *mr) |
1053 | { | |
08dafab4 AK |
1054 | if (int128_eq(mr->size, int128_2_64())) { |
1055 | return UINT64_MAX; | |
1056 | } | |
1057 | return int128_get64(mr->size); | |
093bc2cd AK |
1058 | } |
1059 | ||
8991c79b AK |
1060 | const char *memory_region_name(MemoryRegion *mr) |
1061 | { | |
1062 | return mr->name; | |
1063 | } | |
1064 | ||
8ea9252a AK |
1065 | bool memory_region_is_ram(MemoryRegion *mr) |
1066 | { | |
1067 | return mr->ram; | |
1068 | } | |
1069 | ||
55043ba3 AK |
1070 | bool memory_region_is_logging(MemoryRegion *mr) |
1071 | { | |
1072 | return mr->dirty_log_mask; | |
1073 | } | |
1074 | ||
ce7923da AK |
1075 | bool memory_region_is_rom(MemoryRegion *mr) |
1076 | { | |
1077 | return mr->ram && mr->readonly; | |
1078 | } | |
1079 | ||
30951157 AK |
1080 | bool memory_region_is_iommu(MemoryRegion *mr) |
1081 | { | |
1082 | return mr->iommu_ops; | |
1083 | } | |
1084 | ||
06866575 DG |
1085 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1086 | { | |
1087 | notifier_list_add(&mr->iommu_notify, n); | |
1088 | } | |
1089 | ||
1090 | void memory_region_unregister_iommu_notifier(Notifier *n) | |
1091 | { | |
1092 | notifier_remove(n); | |
1093 | } | |
1094 | ||
1095 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1096 | IOMMUTLBEntry entry) | |
1097 | { | |
1098 | assert(memory_region_is_iommu(mr)); | |
1099 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1100 | } | |
1101 | ||
093bc2cd AK |
1102 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1103 | { | |
5a583347 AK |
1104 | uint8_t mask = 1 << client; |
1105 | ||
59023ef4 | 1106 | memory_region_transaction_begin(); |
5a583347 | 1107 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1108 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1109 | memory_region_transaction_commit(); |
093bc2cd AK |
1110 | } |
1111 | ||
a8170e5e AK |
1112 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1113 | hwaddr size, unsigned client) | |
093bc2cd | 1114 | { |
14a3c10a | 1115 | assert(mr->terminates); |
cd7a45c9 BS |
1116 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, |
1117 | 1 << client); | |
093bc2cd AK |
1118 | } |
1119 | ||
a8170e5e AK |
1120 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1121 | hwaddr size) | |
093bc2cd | 1122 | { |
14a3c10a | 1123 | assert(mr->terminates); |
fd4aa979 | 1124 | return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1); |
093bc2cd AK |
1125 | } |
1126 | ||
6c279db8 JQ |
1127 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1128 | hwaddr size, unsigned client) | |
1129 | { | |
1130 | bool ret; | |
1131 | assert(mr->terminates); | |
1132 | ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, | |
1133 | 1 << client); | |
1134 | if (ret) { | |
1135 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, | |
1136 | mr->ram_addr + addr + size, | |
1137 | 1 << client); | |
1138 | } | |
1139 | return ret; | |
1140 | } | |
1141 | ||
1142 | ||
093bc2cd AK |
1143 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1144 | { | |
0d673e36 | 1145 | AddressSpace *as; |
5a583347 AK |
1146 | FlatRange *fr; |
1147 | ||
0d673e36 | 1148 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
99e86347 PB |
1149 | FlatView *view = as->current_map; |
1150 | FOR_EACH_FLAT_RANGE(fr, view) { | |
0d673e36 AK |
1151 | if (fr->mr == mr) { |
1152 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1153 | } | |
5a583347 AK |
1154 | } |
1155 | } | |
093bc2cd AK |
1156 | } |
1157 | ||
1158 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1159 | { | |
fb1cd6f9 | 1160 | if (mr->readonly != readonly) { |
59023ef4 | 1161 | memory_region_transaction_begin(); |
fb1cd6f9 | 1162 | mr->readonly = readonly; |
22bde714 | 1163 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1164 | memory_region_transaction_commit(); |
fb1cd6f9 | 1165 | } |
093bc2cd AK |
1166 | } |
1167 | ||
5f9a5ea1 | 1168 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1169 | { |
5f9a5ea1 | 1170 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1171 | memory_region_transaction_begin(); |
5f9a5ea1 | 1172 | mr->romd_mode = romd_mode; |
22bde714 | 1173 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1174 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1175 | } |
1176 | } | |
1177 | ||
a8170e5e AK |
1178 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1179 | hwaddr size, unsigned client) | |
093bc2cd | 1180 | { |
14a3c10a | 1181 | assert(mr->terminates); |
5a583347 AK |
1182 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1183 | mr->ram_addr + addr + size, | |
1184 | 1 << client); | |
093bc2cd AK |
1185 | } |
1186 | ||
1187 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1188 | { | |
1189 | if (mr->alias) { | |
1190 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1191 | } | |
1192 | ||
14a3c10a | 1193 | assert(mr->terminates); |
093bc2cd | 1194 | |
021d26d1 | 1195 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1196 | } |
1197 | ||
0d673e36 | 1198 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1199 | { |
99e86347 | 1200 | FlatView *view; |
093bc2cd AK |
1201 | FlatRange *fr; |
1202 | CoalescedMemoryRange *cmr; | |
1203 | AddrRange tmp; | |
95d2994a | 1204 | MemoryRegionSection section; |
093bc2cd | 1205 | |
99e86347 PB |
1206 | view = as->current_map; |
1207 | FOR_EACH_FLAT_RANGE(fr, view) { | |
093bc2cd | 1208 | if (fr->mr == mr) { |
95d2994a | 1209 | section = (MemoryRegionSection) { |
f6790af6 | 1210 | .address_space = as, |
95d2994a | 1211 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1212 | .size = fr->addr.size, |
95d2994a AK |
1213 | }; |
1214 | ||
1215 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1216 | int128_get64(fr->addr.start), | |
1217 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1218 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1219 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1220 | int128_sub(fr->addr.start, |
1221 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1222 | if (!addrrange_intersects(tmp, fr->addr)) { |
1223 | continue; | |
1224 | } | |
1225 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1226 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1227 | int128_get64(tmp.start), | |
1228 | int128_get64(tmp.size)); | |
093bc2cd AK |
1229 | } |
1230 | } | |
1231 | } | |
1232 | } | |
1233 | ||
0d673e36 AK |
1234 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1235 | { | |
1236 | AddressSpace *as; | |
1237 | ||
1238 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1239 | memory_region_update_coalesced_range_as(mr, as); | |
1240 | } | |
1241 | } | |
1242 | ||
093bc2cd AK |
1243 | void memory_region_set_coalescing(MemoryRegion *mr) |
1244 | { | |
1245 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1246 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1247 | } |
1248 | ||
1249 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1250 | hwaddr offset, |
093bc2cd AK |
1251 | uint64_t size) |
1252 | { | |
7267c094 | 1253 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1254 | |
08dafab4 | 1255 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1256 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1257 | memory_region_update_coalesced_range(mr); | |
d410515e | 1258 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1259 | } |
1260 | ||
1261 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1262 | { | |
1263 | CoalescedMemoryRange *cmr; | |
1264 | ||
d410515e JK |
1265 | qemu_flush_coalesced_mmio_buffer(); |
1266 | mr->flush_coalesced_mmio = false; | |
1267 | ||
093bc2cd AK |
1268 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1269 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1270 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1271 | g_free(cmr); |
093bc2cd AK |
1272 | } |
1273 | memory_region_update_coalesced_range(mr); | |
1274 | } | |
1275 | ||
d410515e JK |
1276 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1277 | { | |
1278 | mr->flush_coalesced_mmio = true; | |
1279 | } | |
1280 | ||
1281 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1282 | { | |
1283 | qemu_flush_coalesced_mmio_buffer(); | |
1284 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1285 | mr->flush_coalesced_mmio = false; | |
1286 | } | |
1287 | } | |
1288 | ||
3e9d69e7 | 1289 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1290 | hwaddr addr, |
3e9d69e7 AK |
1291 | unsigned size, |
1292 | bool match_data, | |
1293 | uint64_t data, | |
753d5e14 | 1294 | EventNotifier *e) |
3e9d69e7 AK |
1295 | { |
1296 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1297 | .addr.start = int128_make64(addr), |
1298 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1299 | .match_data = match_data, |
1300 | .data = data, | |
753d5e14 | 1301 | .e = e, |
3e9d69e7 AK |
1302 | }; |
1303 | unsigned i; | |
1304 | ||
28f362be | 1305 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1306 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1307 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1308 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1309 | break; | |
1310 | } | |
1311 | } | |
1312 | ++mr->ioeventfd_nb; | |
7267c094 | 1313 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1314 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1315 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1316 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1317 | mr->ioeventfds[i] = mrfd; | |
22bde714 | 1318 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1319 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1320 | } |
1321 | ||
1322 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1323 | hwaddr addr, |
3e9d69e7 AK |
1324 | unsigned size, |
1325 | bool match_data, | |
1326 | uint64_t data, | |
753d5e14 | 1327 | EventNotifier *e) |
3e9d69e7 AK |
1328 | { |
1329 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1330 | .addr.start = int128_make64(addr), |
1331 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1332 | .match_data = match_data, |
1333 | .data = data, | |
753d5e14 | 1334 | .e = e, |
3e9d69e7 AK |
1335 | }; |
1336 | unsigned i; | |
1337 | ||
28f362be | 1338 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1339 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1340 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1341 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1342 | break; | |
1343 | } | |
1344 | } | |
1345 | assert(i != mr->ioeventfd_nb); | |
1346 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1347 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1348 | --mr->ioeventfd_nb; | |
7267c094 | 1349 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1350 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
22bde714 | 1351 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1352 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1353 | } |
1354 | ||
093bc2cd | 1355 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
a8170e5e | 1356 | hwaddr offset, |
093bc2cd AK |
1357 | MemoryRegion *subregion) |
1358 | { | |
1359 | MemoryRegion *other; | |
1360 | ||
59023ef4 JK |
1361 | memory_region_transaction_begin(); |
1362 | ||
093bc2cd | 1363 | assert(!subregion->parent); |
dfde4e6e | 1364 | memory_region_ref(subregion); |
093bc2cd AK |
1365 | subregion->parent = mr; |
1366 | subregion->addr = offset; | |
1367 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1368 | if (subregion->may_overlap || other->may_overlap) { | |
1369 | continue; | |
1370 | } | |
2c7cfd65 | 1371 | if (int128_ge(int128_make64(offset), |
08dafab4 AK |
1372 | int128_add(int128_make64(other->addr), other->size)) |
1373 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1374 | int128_make64(other->addr))) { | |
093bc2cd AK |
1375 | continue; |
1376 | } | |
a5e1cbc8 | 1377 | #if 0 |
860329b2 MW |
1378 | printf("warning: subregion collision %llx/%llx (%s) " |
1379 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1380 | (unsigned long long)offset, |
08dafab4 | 1381 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1382 | subregion->name, |
1383 | (unsigned long long)other->addr, | |
08dafab4 | 1384 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1385 | other->name); |
a5e1cbc8 | 1386 | #endif |
093bc2cd AK |
1387 | } |
1388 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1389 | if (subregion->priority >= other->priority) { | |
1390 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1391 | goto done; | |
1392 | } | |
1393 | } | |
1394 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1395 | done: | |
22bde714 | 1396 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1397 | memory_region_transaction_commit(); |
093bc2cd AK |
1398 | } |
1399 | ||
1400 | ||
1401 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1402 | hwaddr offset, |
093bc2cd AK |
1403 | MemoryRegion *subregion) |
1404 | { | |
1405 | subregion->may_overlap = false; | |
1406 | subregion->priority = 0; | |
1407 | memory_region_add_subregion_common(mr, offset, subregion); | |
1408 | } | |
1409 | ||
1410 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1411 | hwaddr offset, |
093bc2cd AK |
1412 | MemoryRegion *subregion, |
1413 | unsigned priority) | |
1414 | { | |
1415 | subregion->may_overlap = true; | |
1416 | subregion->priority = priority; | |
1417 | memory_region_add_subregion_common(mr, offset, subregion); | |
1418 | } | |
1419 | ||
1420 | void memory_region_del_subregion(MemoryRegion *mr, | |
1421 | MemoryRegion *subregion) | |
1422 | { | |
59023ef4 | 1423 | memory_region_transaction_begin(); |
093bc2cd AK |
1424 | assert(subregion->parent == mr); |
1425 | subregion->parent = NULL; | |
1426 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); | |
dfde4e6e | 1427 | memory_region_unref(subregion); |
22bde714 | 1428 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1429 | memory_region_transaction_commit(); |
6bba19ba AK |
1430 | } |
1431 | ||
1432 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1433 | { | |
1434 | if (enabled == mr->enabled) { | |
1435 | return; | |
1436 | } | |
59023ef4 | 1437 | memory_region_transaction_begin(); |
6bba19ba | 1438 | mr->enabled = enabled; |
22bde714 | 1439 | memory_region_update_pending = true; |
59023ef4 | 1440 | memory_region_transaction_commit(); |
093bc2cd | 1441 | } |
1c0ffa58 | 1442 | |
a8170e5e | 1443 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2282e1af AK |
1444 | { |
1445 | MemoryRegion *parent = mr->parent; | |
1446 | unsigned priority = mr->priority; | |
1447 | bool may_overlap = mr->may_overlap; | |
1448 | ||
1449 | if (addr == mr->addr || !parent) { | |
1450 | mr->addr = addr; | |
1451 | return; | |
1452 | } | |
1453 | ||
1454 | memory_region_transaction_begin(); | |
dfde4e6e | 1455 | memory_region_ref(mr); |
2282e1af AK |
1456 | memory_region_del_subregion(parent, mr); |
1457 | if (may_overlap) { | |
1458 | memory_region_add_subregion_overlap(parent, addr, mr, priority); | |
1459 | } else { | |
1460 | memory_region_add_subregion(parent, addr, mr); | |
1461 | } | |
dfde4e6e | 1462 | memory_region_unref(mr); |
2282e1af AK |
1463 | memory_region_transaction_commit(); |
1464 | } | |
1465 | ||
a8170e5e | 1466 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1467 | { |
4703359e | 1468 | assert(mr->alias); |
4703359e | 1469 | |
59023ef4 | 1470 | if (offset == mr->alias_offset) { |
4703359e AK |
1471 | return; |
1472 | } | |
1473 | ||
59023ef4 JK |
1474 | memory_region_transaction_begin(); |
1475 | mr->alias_offset = offset; | |
22bde714 | 1476 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1477 | memory_region_transaction_commit(); |
4703359e AK |
1478 | } |
1479 | ||
e34911c4 AK |
1480 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1481 | { | |
e34911c4 AK |
1482 | return mr->ram_addr; |
1483 | } | |
1484 | ||
e2177955 AK |
1485 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1486 | { | |
1487 | const AddrRange *addr = addr_; | |
1488 | const FlatRange *fr = fr_; | |
1489 | ||
1490 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1491 | return -1; | |
1492 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1493 | return 1; | |
1494 | } | |
1495 | return 0; | |
1496 | } | |
1497 | ||
99e86347 | 1498 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 1499 | { |
99e86347 | 1500 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
1501 | sizeof(FlatRange), cmp_flatrange_addr); |
1502 | } | |
1503 | ||
3ce10901 PB |
1504 | bool memory_region_present(MemoryRegion *parent, hwaddr addr) |
1505 | { | |
1506 | MemoryRegion *mr = memory_region_find(parent, addr, 1).mr; | |
1507 | if (!mr) { | |
1508 | return false; | |
1509 | } | |
dfde4e6e | 1510 | memory_region_unref(mr); |
3ce10901 PB |
1511 | return true; |
1512 | } | |
1513 | ||
73034e9e | 1514 | MemoryRegionSection memory_region_find(MemoryRegion *mr, |
a8170e5e | 1515 | hwaddr addr, uint64_t size) |
e2177955 | 1516 | { |
052e87b0 | 1517 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
1518 | MemoryRegion *root; |
1519 | AddressSpace *as; | |
1520 | AddrRange range; | |
99e86347 | 1521 | FlatView *view; |
73034e9e PB |
1522 | FlatRange *fr; |
1523 | ||
1524 | addr += mr->addr; | |
1525 | for (root = mr; root->parent; ) { | |
1526 | root = root->parent; | |
1527 | addr += root->addr; | |
1528 | } | |
e2177955 | 1529 | |
73034e9e PB |
1530 | as = memory_region_to_address_space(root); |
1531 | range = addrrange_make(int128_make64(addr), int128_make64(size)); | |
99e86347 PB |
1532 | |
1533 | view = as->current_map; | |
1534 | fr = flatview_lookup(view, range); | |
e2177955 AK |
1535 | if (!fr) { |
1536 | return ret; | |
1537 | } | |
1538 | ||
99e86347 | 1539 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
1540 | --fr; |
1541 | } | |
1542 | ||
1543 | ret.mr = fr->mr; | |
73034e9e | 1544 | ret.address_space = as; |
e2177955 AK |
1545 | range = addrrange_intersection(range, fr->addr); |
1546 | ret.offset_within_region = fr->offset_in_region; | |
1547 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1548 | fr->addr.start)); | |
052e87b0 | 1549 | ret.size = range.size; |
e2177955 | 1550 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 1551 | ret.readonly = fr->readonly; |
dfde4e6e PB |
1552 | memory_region_ref(ret.mr); |
1553 | ||
e2177955 AK |
1554 | return ret; |
1555 | } | |
1556 | ||
1d671369 | 1557 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 1558 | { |
99e86347 | 1559 | FlatView *view; |
7664e80c AK |
1560 | FlatRange *fr; |
1561 | ||
99e86347 PB |
1562 | view = as->current_map; |
1563 | FOR_EACH_FLAT_RANGE(fr, view) { | |
72e22d2f | 1564 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c AK |
1565 | } |
1566 | } | |
1567 | ||
1568 | void memory_global_dirty_log_start(void) | |
1569 | { | |
7664e80c | 1570 | global_dirty_log = true; |
7376e582 | 1571 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1572 | } |
1573 | ||
1574 | void memory_global_dirty_log_stop(void) | |
1575 | { | |
7664e80c | 1576 | global_dirty_log = false; |
7376e582 | 1577 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1578 | } |
1579 | ||
1580 | static void listener_add_address_space(MemoryListener *listener, | |
1581 | AddressSpace *as) | |
1582 | { | |
99e86347 | 1583 | FlatView *view; |
7664e80c AK |
1584 | FlatRange *fr; |
1585 | ||
221b3a3f | 1586 | if (listener->address_space_filter |
f6790af6 | 1587 | && listener->address_space_filter != as) { |
221b3a3f JG |
1588 | return; |
1589 | } | |
1590 | ||
7664e80c | 1591 | if (global_dirty_log) { |
975aefe0 AK |
1592 | if (listener->log_global_start) { |
1593 | listener->log_global_start(listener); | |
1594 | } | |
7664e80c | 1595 | } |
975aefe0 | 1596 | |
99e86347 PB |
1597 | view = as->current_map; |
1598 | FOR_EACH_FLAT_RANGE(fr, view) { | |
7664e80c AK |
1599 | MemoryRegionSection section = { |
1600 | .mr = fr->mr, | |
f6790af6 | 1601 | .address_space = as, |
7664e80c | 1602 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 1603 | .size = fr->addr.size, |
7664e80c | 1604 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 1605 | .readonly = fr->readonly, |
7664e80c | 1606 | }; |
975aefe0 AK |
1607 | if (listener->region_add) { |
1608 | listener->region_add(listener, §ion); | |
1609 | } | |
7664e80c AK |
1610 | } |
1611 | } | |
1612 | ||
f6790af6 | 1613 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 1614 | { |
72e22d2f | 1615 | MemoryListener *other = NULL; |
0d673e36 | 1616 | AddressSpace *as; |
72e22d2f | 1617 | |
7376e582 | 1618 | listener->address_space_filter = filter; |
72e22d2f AK |
1619 | if (QTAILQ_EMPTY(&memory_listeners) |
1620 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1621 | memory_listeners)->priority) { | |
1622 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1623 | } else { | |
1624 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1625 | if (listener->priority < other->priority) { | |
1626 | break; | |
1627 | } | |
1628 | } | |
1629 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1630 | } | |
0d673e36 AK |
1631 | |
1632 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1633 | listener_add_address_space(listener, as); | |
1634 | } | |
7664e80c AK |
1635 | } |
1636 | ||
1637 | void memory_listener_unregister(MemoryListener *listener) | |
1638 | { | |
72e22d2f | 1639 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1640 | } |
e2177955 | 1641 | |
7dca8043 | 1642 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 1643 | { |
59023ef4 | 1644 | memory_region_transaction_begin(); |
8786db7c AK |
1645 | as->root = root; |
1646 | as->current_map = g_new(FlatView, 1); | |
1647 | flatview_init(as->current_map); | |
4c19eb72 AK |
1648 | as->ioeventfd_nb = 0; |
1649 | as->ioeventfds = NULL; | |
0d673e36 | 1650 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 1651 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 1652 | address_space_init_dispatch(as); |
f43793c7 PB |
1653 | memory_region_update_pending |= root->enabled; |
1654 | memory_region_transaction_commit(); | |
1c0ffa58 | 1655 | } |
658b2224 | 1656 | |
83f3c251 AK |
1657 | void address_space_destroy(AddressSpace *as) |
1658 | { | |
1659 | /* Flush out anything from MemoryListeners listening in on this */ | |
1660 | memory_region_transaction_begin(); | |
1661 | as->root = NULL; | |
1662 | memory_region_transaction_commit(); | |
1663 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
1664 | address_space_destroy_dispatch(as); | |
1665 | flatview_destroy(as->current_map); | |
7dca8043 | 1666 | g_free(as->name); |
83f3c251 | 1667 | g_free(as->current_map); |
4c19eb72 | 1668 | g_free(as->ioeventfds); |
83f3c251 AK |
1669 | } |
1670 | ||
791af8c8 | 1671 | bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size) |
acbbec5d | 1672 | { |
791af8c8 | 1673 | return memory_region_dispatch_read(mr, addr, pval, size); |
acbbec5d AK |
1674 | } |
1675 | ||
791af8c8 | 1676 | bool io_mem_write(MemoryRegion *mr, hwaddr addr, |
acbbec5d AK |
1677 | uint64_t val, unsigned size) |
1678 | { | |
791af8c8 | 1679 | return memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1680 | } |
1681 | ||
314e2987 BS |
1682 | typedef struct MemoryRegionList MemoryRegionList; |
1683 | ||
1684 | struct MemoryRegionList { | |
1685 | const MemoryRegion *mr; | |
1686 | bool printed; | |
1687 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1688 | }; | |
1689 | ||
1690 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1691 | ||
1692 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1693 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 1694 | hwaddr base, |
9479c57a | 1695 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1696 | { |
9479c57a JK |
1697 | MemoryRegionList *new_ml, *ml, *next_ml; |
1698 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1699 | const MemoryRegion *submr; |
1700 | unsigned int i; | |
1701 | ||
7ea692b2 | 1702 | if (!mr || !mr->enabled) { |
314e2987 BS |
1703 | return; |
1704 | } | |
1705 | ||
1706 | for (i = 0; i < level; i++) { | |
1707 | mon_printf(f, " "); | |
1708 | } | |
1709 | ||
1710 | if (mr->alias) { | |
1711 | MemoryRegionList *ml; | |
1712 | bool found = false; | |
1713 | ||
1714 | /* check if the alias is already in the queue */ | |
9479c57a | 1715 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1716 | if (ml->mr == mr->alias && !ml->printed) { |
1717 | found = true; | |
1718 | } | |
1719 | } | |
1720 | ||
1721 | if (!found) { | |
1722 | ml = g_new(MemoryRegionList, 1); | |
1723 | ml->mr = mr->alias; | |
1724 | ml->printed = false; | |
9479c57a | 1725 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1726 | } |
4896d74b JK |
1727 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1728 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1729 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1730 | base + mr->addr, |
08dafab4 | 1731 | base + mr->addr |
052e87b0 | 1732 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1733 | mr->priority, |
5f9a5ea1 JK |
1734 | mr->romd_mode ? 'R' : '-', |
1735 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1736 | : '-', | |
314e2987 BS |
1737 | mr->name, |
1738 | mr->alias->name, | |
1739 | mr->alias_offset, | |
08dafab4 | 1740 | mr->alias_offset |
a8170e5e | 1741 | + (hwaddr)int128_get64(mr->size) - 1); |
314e2987 | 1742 | } else { |
4896d74b JK |
1743 | mon_printf(f, |
1744 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1745 | base + mr->addr, |
08dafab4 | 1746 | base + mr->addr |
052e87b0 | 1747 | + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))), |
4b474ba7 | 1748 | mr->priority, |
5f9a5ea1 JK |
1749 | mr->romd_mode ? 'R' : '-', |
1750 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1751 | : '-', | |
314e2987 BS |
1752 | mr->name); |
1753 | } | |
9479c57a JK |
1754 | |
1755 | QTAILQ_INIT(&submr_print_queue); | |
1756 | ||
314e2987 | 1757 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1758 | new_ml = g_new(MemoryRegionList, 1); |
1759 | new_ml->mr = submr; | |
1760 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1761 | if (new_ml->mr->addr < ml->mr->addr || | |
1762 | (new_ml->mr->addr == ml->mr->addr && | |
1763 | new_ml->mr->priority > ml->mr->priority)) { | |
1764 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1765 | new_ml = NULL; | |
1766 | break; | |
1767 | } | |
1768 | } | |
1769 | if (new_ml) { | |
1770 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1771 | } | |
1772 | } | |
1773 | ||
1774 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1775 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1776 | alias_print_queue); | |
1777 | } | |
1778 | ||
88365e47 | 1779 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1780 | g_free(ml); |
314e2987 BS |
1781 | } |
1782 | } | |
1783 | ||
1784 | void mtree_info(fprintf_function mon_printf, void *f) | |
1785 | { | |
1786 | MemoryRegionListHead ml_head; | |
1787 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 1788 | AddressSpace *as; |
314e2987 BS |
1789 | |
1790 | QTAILQ_INIT(&ml_head); | |
1791 | ||
0d673e36 | 1792 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
0d673e36 AK |
1793 | mon_printf(f, "%s\n", as->name); |
1794 | mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); | |
b9f9be88 BS |
1795 | } |
1796 | ||
1797 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1798 | /* print aliased regions */ |
1799 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1800 | if (!ml->printed) { | |
1801 | mon_printf(f, "%s\n", ml->mr->name); | |
1802 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1803 | } | |
1804 | } | |
1805 | ||
1806 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1807 | g_free(ml); |
314e2987 | 1808 | } |
314e2987 | 1809 | } |