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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
022c62cb PB |
16 | #include "exec/memory.h" |
17 | #include "exec/address-spaces.h" | |
18 | #include "exec/ioport.h" | |
1de7afc9 | 19 | #include "qemu/bitops.h" |
2c9b15ca | 20 | #include "qom/object.h" |
55d5d048 | 21 | #include "trace.h" |
093bc2cd AK |
22 | #include <assert.h> |
23 | ||
022c62cb | 24 | #include "exec/memory-internal.h" |
220c3ebd | 25 | #include "exec/ram_addr.h" |
67d95c15 | 26 | |
d197063f PB |
27 | //#define DEBUG_UNASSIGNED |
28 | ||
22bde714 JK |
29 | static unsigned memory_region_transaction_depth; |
30 | static bool memory_region_update_pending; | |
4dc56152 | 31 | static bool ioeventfd_update_pending; |
7664e80c AK |
32 | static bool global_dirty_log = false; |
33 | ||
856d7245 PB |
34 | /* flat_view_mutex is taken around reading as->current_map; the critical |
35 | * section is extremely short, so I'm using a single mutex for every AS. | |
36 | * We could also RCU for the read-side. | |
37 | * | |
38 | * The BQL is taken around transaction commits, hence both locks are taken | |
39 | * while writing to as->current_map (with the BQL taken outside). | |
40 | */ | |
41 | static QemuMutex flat_view_mutex; | |
42 | ||
72e22d2f AK |
43 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
44 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 45 | |
0d673e36 AK |
46 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
47 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
48 | ||
856d7245 PB |
49 | static void memory_init(void) |
50 | { | |
51 | qemu_mutex_init(&flat_view_mutex); | |
52 | } | |
53 | ||
093bc2cd AK |
54 | typedef struct AddrRange AddrRange; |
55 | ||
8417cebf AK |
56 | /* |
57 | * Note using signed integers limits us to physical addresses at most | |
58 | * 63 bits wide. They are needed for negative offsetting in aliases | |
59 | * (large MemoryRegion::alias_offset). | |
60 | */ | |
093bc2cd | 61 | struct AddrRange { |
08dafab4 AK |
62 | Int128 start; |
63 | Int128 size; | |
093bc2cd AK |
64 | }; |
65 | ||
08dafab4 | 66 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
67 | { |
68 | return (AddrRange) { start, size }; | |
69 | } | |
70 | ||
71 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
72 | { | |
08dafab4 | 73 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
74 | } |
75 | ||
08dafab4 | 76 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 77 | { |
08dafab4 | 78 | return int128_add(r.start, r.size); |
093bc2cd AK |
79 | } |
80 | ||
08dafab4 | 81 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 82 | { |
08dafab4 | 83 | int128_addto(&range.start, delta); |
093bc2cd AK |
84 | return range; |
85 | } | |
86 | ||
08dafab4 AK |
87 | static bool addrrange_contains(AddrRange range, Int128 addr) |
88 | { | |
89 | return int128_ge(addr, range.start) | |
90 | && int128_lt(addr, addrrange_end(range)); | |
91 | } | |
92 | ||
093bc2cd AK |
93 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
94 | { | |
08dafab4 AK |
95 | return addrrange_contains(r1, r2.start) |
96 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
97 | } |
98 | ||
99 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
100 | { | |
08dafab4 AK |
101 | Int128 start = int128_max(r1.start, r2.start); |
102 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
103 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
104 | } |
105 | ||
0e0d36b4 AK |
106 | enum ListenerDirection { Forward, Reverse }; |
107 | ||
7376e582 AK |
108 | static bool memory_listener_match(MemoryListener *listener, |
109 | MemoryRegionSection *section) | |
110 | { | |
111 | return !listener->address_space_filter | |
112 | || listener->address_space_filter == section->address_space; | |
113 | } | |
114 | ||
115 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
116 | do { \ |
117 | MemoryListener *_listener; \ | |
118 | \ | |
119 | switch (_direction) { \ | |
120 | case Forward: \ | |
121 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
122 | if (_listener->_callback) { \ |
123 | _listener->_callback(_listener, ##_args); \ | |
124 | } \ | |
0e0d36b4 AK |
125 | } \ |
126 | break; \ | |
127 | case Reverse: \ | |
128 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
129 | memory_listeners, link) { \ | |
975aefe0 AK |
130 | if (_listener->_callback) { \ |
131 | _listener->_callback(_listener, ##_args); \ | |
132 | } \ | |
0e0d36b4 AK |
133 | } \ |
134 | break; \ | |
135 | default: \ | |
136 | abort(); \ | |
137 | } \ | |
138 | } while (0) | |
139 | ||
7376e582 AK |
140 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
141 | do { \ | |
142 | MemoryListener *_listener; \ | |
143 | \ | |
144 | switch (_direction) { \ | |
145 | case Forward: \ | |
146 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
147 | if (_listener->_callback \ |
148 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
149 | _listener->_callback(_listener, _section, ##_args); \ |
150 | } \ | |
151 | } \ | |
152 | break; \ | |
153 | case Reverse: \ | |
154 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
155 | memory_listeners, link) { \ | |
975aefe0 AK |
156 | if (_listener->_callback \ |
157 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
158 | _listener->_callback(_listener, _section, ##_args); \ |
159 | } \ | |
160 | } \ | |
161 | break; \ | |
162 | default: \ | |
163 | abort(); \ | |
164 | } \ | |
165 | } while (0) | |
166 | ||
dfde4e6e | 167 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
0e0d36b4 | 168 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \ |
7376e582 | 169 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 170 | .mr = (fr)->mr, \ |
f6790af6 | 171 | .address_space = (as), \ |
0e0d36b4 | 172 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 173 | .size = (fr)->addr.size, \ |
0e0d36b4 | 174 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 175 | .readonly = (fr)->readonly, \ |
7376e582 | 176 | })) |
0e0d36b4 | 177 | |
093bc2cd AK |
178 | struct CoalescedMemoryRange { |
179 | AddrRange addr; | |
180 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
181 | }; | |
182 | ||
3e9d69e7 AK |
183 | struct MemoryRegionIoeventfd { |
184 | AddrRange addr; | |
185 | bool match_data; | |
186 | uint64_t data; | |
753d5e14 | 187 | EventNotifier *e; |
3e9d69e7 AK |
188 | }; |
189 | ||
190 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
191 | MemoryRegionIoeventfd b) | |
192 | { | |
08dafab4 | 193 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 194 | return true; |
08dafab4 | 195 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 196 | return false; |
08dafab4 | 197 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 198 | return true; |
08dafab4 | 199 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
200 | return false; |
201 | } else if (a.match_data < b.match_data) { | |
202 | return true; | |
203 | } else if (a.match_data > b.match_data) { | |
204 | return false; | |
205 | } else if (a.match_data) { | |
206 | if (a.data < b.data) { | |
207 | return true; | |
208 | } else if (a.data > b.data) { | |
209 | return false; | |
210 | } | |
211 | } | |
753d5e14 | 212 | if (a.e < b.e) { |
3e9d69e7 | 213 | return true; |
753d5e14 | 214 | } else if (a.e > b.e) { |
3e9d69e7 AK |
215 | return false; |
216 | } | |
217 | return false; | |
218 | } | |
219 | ||
220 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
221 | MemoryRegionIoeventfd b) | |
222 | { | |
223 | return !memory_region_ioeventfd_before(a, b) | |
224 | && !memory_region_ioeventfd_before(b, a); | |
225 | } | |
226 | ||
093bc2cd AK |
227 | typedef struct FlatRange FlatRange; |
228 | typedef struct FlatView FlatView; | |
229 | ||
230 | /* Range of memory in the global map. Addresses are absolute. */ | |
231 | struct FlatRange { | |
232 | MemoryRegion *mr; | |
a8170e5e | 233 | hwaddr offset_in_region; |
093bc2cd | 234 | AddrRange addr; |
5a583347 | 235 | uint8_t dirty_log_mask; |
5f9a5ea1 | 236 | bool romd_mode; |
fb1cd6f9 | 237 | bool readonly; |
093bc2cd AK |
238 | }; |
239 | ||
240 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
241 | * order. | |
242 | */ | |
243 | struct FlatView { | |
856d7245 | 244 | unsigned ref; |
093bc2cd AK |
245 | FlatRange *ranges; |
246 | unsigned nr; | |
247 | unsigned nr_allocated; | |
248 | }; | |
249 | ||
cc31e6e7 AK |
250 | typedef struct AddressSpaceOps AddressSpaceOps; |
251 | ||
093bc2cd AK |
252 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
253 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
254 | ||
093bc2cd AK |
255 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
256 | { | |
257 | return a->mr == b->mr | |
258 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 259 | && a->offset_in_region == b->offset_in_region |
5f9a5ea1 | 260 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 261 | && a->readonly == b->readonly; |
093bc2cd AK |
262 | } |
263 | ||
264 | static void flatview_init(FlatView *view) | |
265 | { | |
856d7245 | 266 | view->ref = 1; |
093bc2cd AK |
267 | view->ranges = NULL; |
268 | view->nr = 0; | |
269 | view->nr_allocated = 0; | |
270 | } | |
271 | ||
272 | /* Insert a range into a given position. Caller is responsible for maintaining | |
273 | * sorting order. | |
274 | */ | |
275 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
276 | { | |
277 | if (view->nr == view->nr_allocated) { | |
278 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 279 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
280 | view->nr_allocated * sizeof(*view->ranges)); |
281 | } | |
282 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
283 | (view->nr - pos) * sizeof(FlatRange)); | |
284 | view->ranges[pos] = *range; | |
dfde4e6e | 285 | memory_region_ref(range->mr); |
093bc2cd AK |
286 | ++view->nr; |
287 | } | |
288 | ||
289 | static void flatview_destroy(FlatView *view) | |
290 | { | |
dfde4e6e PB |
291 | int i; |
292 | ||
293 | for (i = 0; i < view->nr; i++) { | |
294 | memory_region_unref(view->ranges[i].mr); | |
295 | } | |
7267c094 | 296 | g_free(view->ranges); |
a9a0c06d | 297 | g_free(view); |
093bc2cd AK |
298 | } |
299 | ||
856d7245 PB |
300 | static void flatview_ref(FlatView *view) |
301 | { | |
302 | atomic_inc(&view->ref); | |
303 | } | |
304 | ||
305 | static void flatview_unref(FlatView *view) | |
306 | { | |
307 | if (atomic_fetch_dec(&view->ref) == 1) { | |
308 | flatview_destroy(view); | |
309 | } | |
310 | } | |
311 | ||
3d8e6bf9 AK |
312 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
313 | { | |
08dafab4 | 314 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 315 | && r1->mr == r2->mr |
08dafab4 AK |
316 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
317 | r1->addr.size), | |
318 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 319 | && r1->dirty_log_mask == r2->dirty_log_mask |
5f9a5ea1 | 320 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 321 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
322 | } |
323 | ||
8508e024 | 324 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
325 | static void flatview_simplify(FlatView *view) |
326 | { | |
327 | unsigned i, j; | |
328 | ||
329 | i = 0; | |
330 | while (i < view->nr) { | |
331 | j = i + 1; | |
332 | while (j < view->nr | |
333 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 334 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
335 | ++j; |
336 | } | |
337 | ++i; | |
338 | memmove(&view->ranges[i], &view->ranges[j], | |
339 | (view->nr - j) * sizeof(view->ranges[j])); | |
340 | view->nr -= j - i; | |
341 | } | |
342 | } | |
343 | ||
e7342aa3 PB |
344 | static bool memory_region_big_endian(MemoryRegion *mr) |
345 | { | |
346 | #ifdef TARGET_WORDS_BIGENDIAN | |
347 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
348 | #else | |
349 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
350 | #endif | |
351 | } | |
352 | ||
e11ef3d1 PB |
353 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
354 | { | |
355 | #ifdef TARGET_WORDS_BIGENDIAN | |
356 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
357 | #else | |
358 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
359 | #endif | |
360 | } | |
361 | ||
362 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
363 | { | |
364 | if (memory_region_wrong_endianness(mr)) { | |
365 | switch (size) { | |
366 | case 1: | |
367 | break; | |
368 | case 2: | |
369 | *data = bswap16(*data); | |
370 | break; | |
371 | case 4: | |
372 | *data = bswap32(*data); | |
373 | break; | |
374 | case 8: | |
375 | *data = bswap64(*data); | |
376 | break; | |
377 | default: | |
378 | abort(); | |
379 | } | |
380 | } | |
381 | } | |
382 | ||
547e9201 | 383 | static void memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
ce5d2f33 PB |
384 | hwaddr addr, |
385 | uint64_t *value, | |
386 | unsigned size, | |
387 | unsigned shift, | |
388 | uint64_t mask) | |
389 | { | |
ce5d2f33 PB |
390 | uint64_t tmp; |
391 | ||
392 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
55d5d048 | 393 | trace_memory_region_ops_read(mr, addr, tmp, size); |
ce5d2f33 PB |
394 | *value |= (tmp & mask) << shift; |
395 | } | |
396 | ||
547e9201 | 397 | static void memory_region_read_accessor(MemoryRegion *mr, |
a8170e5e | 398 | hwaddr addr, |
164a4dcd AK |
399 | uint64_t *value, |
400 | unsigned size, | |
401 | unsigned shift, | |
402 | uint64_t mask) | |
403 | { | |
164a4dcd AK |
404 | uint64_t tmp; |
405 | ||
d410515e JK |
406 | if (mr->flush_coalesced_mmio) { |
407 | qemu_flush_coalesced_mmio_buffer(); | |
408 | } | |
164a4dcd | 409 | tmp = mr->ops->read(mr->opaque, addr, size); |
55d5d048 | 410 | trace_memory_region_ops_read(mr, addr, tmp, size); |
164a4dcd AK |
411 | *value |= (tmp & mask) << shift; |
412 | } | |
413 | ||
547e9201 | 414 | static void memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
ce5d2f33 PB |
415 | hwaddr addr, |
416 | uint64_t *value, | |
417 | unsigned size, | |
418 | unsigned shift, | |
419 | uint64_t mask) | |
420 | { | |
ce5d2f33 PB |
421 | uint64_t tmp; |
422 | ||
423 | tmp = (*value >> shift) & mask; | |
55d5d048 | 424 | trace_memory_region_ops_write(mr, addr, tmp, size); |
ce5d2f33 PB |
425 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
426 | } | |
427 | ||
547e9201 | 428 | static void memory_region_write_accessor(MemoryRegion *mr, |
a8170e5e | 429 | hwaddr addr, |
164a4dcd AK |
430 | uint64_t *value, |
431 | unsigned size, | |
432 | unsigned shift, | |
433 | uint64_t mask) | |
434 | { | |
164a4dcd AK |
435 | uint64_t tmp; |
436 | ||
d410515e JK |
437 | if (mr->flush_coalesced_mmio) { |
438 | qemu_flush_coalesced_mmio_buffer(); | |
439 | } | |
164a4dcd | 440 | tmp = (*value >> shift) & mask; |
55d5d048 | 441 | trace_memory_region_ops_write(mr, addr, tmp, size); |
164a4dcd AK |
442 | mr->ops->write(mr->opaque, addr, tmp, size); |
443 | } | |
444 | ||
a8170e5e | 445 | static void access_with_adjusted_size(hwaddr addr, |
164a4dcd AK |
446 | uint64_t *value, |
447 | unsigned size, | |
448 | unsigned access_size_min, | |
449 | unsigned access_size_max, | |
547e9201 | 450 | void (*access)(MemoryRegion *mr, |
a8170e5e | 451 | hwaddr addr, |
164a4dcd AK |
452 | uint64_t *value, |
453 | unsigned size, | |
454 | unsigned shift, | |
455 | uint64_t mask), | |
547e9201 | 456 | MemoryRegion *mr) |
164a4dcd AK |
457 | { |
458 | uint64_t access_mask; | |
459 | unsigned access_size; | |
460 | unsigned i; | |
461 | ||
462 | if (!access_size_min) { | |
463 | access_size_min = 1; | |
464 | } | |
465 | if (!access_size_max) { | |
466 | access_size_max = 4; | |
467 | } | |
ce5d2f33 PB |
468 | |
469 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
470 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
471 | access_mask = -1ULL >> (64 - access_size * 8); | |
e7342aa3 PB |
472 | if (memory_region_big_endian(mr)) { |
473 | for (i = 0; i < size; i += access_size) { | |
474 | access(mr, addr + i, value, access_size, | |
475 | (size - access_size - i) * 8, access_mask); | |
476 | } | |
477 | } else { | |
478 | for (i = 0; i < size; i += access_size) { | |
479 | access(mr, addr + i, value, access_size, i * 8, access_mask); | |
480 | } | |
164a4dcd AK |
481 | } |
482 | } | |
483 | ||
e2177955 AK |
484 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
485 | { | |
0d673e36 AK |
486 | AddressSpace *as; |
487 | ||
feca4ac1 PB |
488 | while (mr->container) { |
489 | mr = mr->container; | |
e2177955 | 490 | } |
0d673e36 AK |
491 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
492 | if (mr == as->root) { | |
493 | return as; | |
494 | } | |
e2177955 | 495 | } |
eed2bacf | 496 | return NULL; |
e2177955 AK |
497 | } |
498 | ||
093bc2cd AK |
499 | /* Render a memory region into the global view. Ranges in @view obscure |
500 | * ranges in @mr. | |
501 | */ | |
502 | static void render_memory_region(FlatView *view, | |
503 | MemoryRegion *mr, | |
08dafab4 | 504 | Int128 base, |
fb1cd6f9 AK |
505 | AddrRange clip, |
506 | bool readonly) | |
093bc2cd AK |
507 | { |
508 | MemoryRegion *subregion; | |
509 | unsigned i; | |
a8170e5e | 510 | hwaddr offset_in_region; |
08dafab4 AK |
511 | Int128 remain; |
512 | Int128 now; | |
093bc2cd AK |
513 | FlatRange fr; |
514 | AddrRange tmp; | |
515 | ||
6bba19ba AK |
516 | if (!mr->enabled) { |
517 | return; | |
518 | } | |
519 | ||
08dafab4 | 520 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 521 | readonly |= mr->readonly; |
093bc2cd AK |
522 | |
523 | tmp = addrrange_make(base, mr->size); | |
524 | ||
525 | if (!addrrange_intersects(tmp, clip)) { | |
526 | return; | |
527 | } | |
528 | ||
529 | clip = addrrange_intersection(tmp, clip); | |
530 | ||
531 | if (mr->alias) { | |
08dafab4 AK |
532 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
533 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 534 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
535 | return; |
536 | } | |
537 | ||
538 | /* Render subregions in priority order. */ | |
539 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 540 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
541 | } |
542 | ||
14a3c10a | 543 | if (!mr->terminates) { |
093bc2cd AK |
544 | return; |
545 | } | |
546 | ||
08dafab4 | 547 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
548 | base = clip.start; |
549 | remain = clip.size; | |
550 | ||
2eb74e1a PC |
551 | fr.mr = mr; |
552 | fr.dirty_log_mask = mr->dirty_log_mask; | |
553 | fr.romd_mode = mr->romd_mode; | |
554 | fr.readonly = readonly; | |
555 | ||
093bc2cd | 556 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
557 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
558 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
559 | continue; |
560 | } | |
08dafab4 AK |
561 | if (int128_lt(base, view->ranges[i].addr.start)) { |
562 | now = int128_min(remain, | |
563 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
564 | fr.offset_in_region = offset_in_region; |
565 | fr.addr = addrrange_make(base, now); | |
566 | flatview_insert(view, i, &fr); | |
567 | ++i; | |
08dafab4 AK |
568 | int128_addto(&base, now); |
569 | offset_in_region += int128_get64(now); | |
570 | int128_subfrom(&remain, now); | |
093bc2cd | 571 | } |
d26a8cae AK |
572 | now = int128_sub(int128_min(int128_add(base, remain), |
573 | addrrange_end(view->ranges[i].addr)), | |
574 | base); | |
575 | int128_addto(&base, now); | |
576 | offset_in_region += int128_get64(now); | |
577 | int128_subfrom(&remain, now); | |
093bc2cd | 578 | } |
08dafab4 | 579 | if (int128_nz(remain)) { |
093bc2cd AK |
580 | fr.offset_in_region = offset_in_region; |
581 | fr.addr = addrrange_make(base, remain); | |
582 | flatview_insert(view, i, &fr); | |
583 | } | |
584 | } | |
585 | ||
586 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 587 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 588 | { |
a9a0c06d | 589 | FlatView *view; |
093bc2cd | 590 | |
a9a0c06d PB |
591 | view = g_new(FlatView, 1); |
592 | flatview_init(view); | |
093bc2cd | 593 | |
83f3c251 | 594 | if (mr) { |
a9a0c06d | 595 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
596 | addrrange_make(int128_zero(), int128_2_64()), false); |
597 | } | |
a9a0c06d | 598 | flatview_simplify(view); |
093bc2cd AK |
599 | |
600 | return view; | |
601 | } | |
602 | ||
3e9d69e7 AK |
603 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
604 | MemoryRegionIoeventfd *fds_new, | |
605 | unsigned fds_new_nb, | |
606 | MemoryRegionIoeventfd *fds_old, | |
607 | unsigned fds_old_nb) | |
608 | { | |
609 | unsigned iold, inew; | |
80a1ea37 AK |
610 | MemoryRegionIoeventfd *fd; |
611 | MemoryRegionSection section; | |
3e9d69e7 AK |
612 | |
613 | /* Generate a symmetric difference of the old and new fd sets, adding | |
614 | * and deleting as necessary. | |
615 | */ | |
616 | ||
617 | iold = inew = 0; | |
618 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
619 | if (iold < fds_old_nb | |
620 | && (inew == fds_new_nb | |
621 | || memory_region_ioeventfd_before(fds_old[iold], | |
622 | fds_new[inew]))) { | |
80a1ea37 AK |
623 | fd = &fds_old[iold]; |
624 | section = (MemoryRegionSection) { | |
f6790af6 | 625 | .address_space = as, |
80a1ea37 | 626 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 627 | .size = fd->addr.size, |
80a1ea37 AK |
628 | }; |
629 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 630 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
631 | ++iold; |
632 | } else if (inew < fds_new_nb | |
633 | && (iold == fds_old_nb | |
634 | || memory_region_ioeventfd_before(fds_new[inew], | |
635 | fds_old[iold]))) { | |
80a1ea37 AK |
636 | fd = &fds_new[inew]; |
637 | section = (MemoryRegionSection) { | |
f6790af6 | 638 | .address_space = as, |
80a1ea37 | 639 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 640 | .size = fd->addr.size, |
80a1ea37 AK |
641 | }; |
642 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 643 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
644 | ++inew; |
645 | } else { | |
646 | ++iold; | |
647 | ++inew; | |
648 | } | |
649 | } | |
650 | } | |
651 | ||
856d7245 PB |
652 | static FlatView *address_space_get_flatview(AddressSpace *as) |
653 | { | |
654 | FlatView *view; | |
655 | ||
656 | qemu_mutex_lock(&flat_view_mutex); | |
657 | view = as->current_map; | |
658 | flatview_ref(view); | |
659 | qemu_mutex_unlock(&flat_view_mutex); | |
660 | return view; | |
661 | } | |
662 | ||
3e9d69e7 AK |
663 | static void address_space_update_ioeventfds(AddressSpace *as) |
664 | { | |
99e86347 | 665 | FlatView *view; |
3e9d69e7 AK |
666 | FlatRange *fr; |
667 | unsigned ioeventfd_nb = 0; | |
668 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
669 | AddrRange tmp; | |
670 | unsigned i; | |
671 | ||
856d7245 | 672 | view = address_space_get_flatview(as); |
99e86347 | 673 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
674 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
675 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
676 | int128_sub(fr->addr.start, |
677 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
678 | if (addrrange_intersects(fr->addr, tmp)) { |
679 | ++ioeventfd_nb; | |
7267c094 | 680 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
681 | ioeventfd_nb * sizeof(*ioeventfds)); |
682 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
683 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
684 | } | |
685 | } | |
686 | } | |
687 | ||
688 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
689 | as->ioeventfds, as->ioeventfd_nb); | |
690 | ||
7267c094 | 691 | g_free(as->ioeventfds); |
3e9d69e7 AK |
692 | as->ioeventfds = ioeventfds; |
693 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 694 | flatview_unref(view); |
3e9d69e7 AK |
695 | } |
696 | ||
b8af1afb | 697 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
698 | const FlatView *old_view, |
699 | const FlatView *new_view, | |
b8af1afb | 700 | bool adding) |
093bc2cd | 701 | { |
093bc2cd AK |
702 | unsigned iold, inew; |
703 | FlatRange *frold, *frnew; | |
093bc2cd AK |
704 | |
705 | /* Generate a symmetric difference of the old and new memory maps. | |
706 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
707 | */ | |
708 | iold = inew = 0; | |
a9a0c06d PB |
709 | while (iold < old_view->nr || inew < new_view->nr) { |
710 | if (iold < old_view->nr) { | |
711 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
712 | } else { |
713 | frold = NULL; | |
714 | } | |
a9a0c06d PB |
715 | if (inew < new_view->nr) { |
716 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
717 | } else { |
718 | frnew = NULL; | |
719 | } | |
720 | ||
721 | if (frold | |
722 | && (!frnew | |
08dafab4 AK |
723 | || int128_lt(frold->addr.start, frnew->addr.start) |
724 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 725 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 726 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 727 | |
b8af1afb | 728 | if (!adding) { |
72e22d2f | 729 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
730 | } |
731 | ||
093bc2cd AK |
732 | ++iold; |
733 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 734 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 735 | |
b8af1afb | 736 | if (adding) { |
50c1e149 | 737 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b8af1afb | 738 | if (frold->dirty_log_mask && !frnew->dirty_log_mask) { |
72e22d2f | 739 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
b8af1afb | 740 | } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
72e22d2f | 741 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
b8af1afb | 742 | } |
5a583347 AK |
743 | } |
744 | ||
093bc2cd AK |
745 | ++iold; |
746 | ++inew; | |
093bc2cd AK |
747 | } else { |
748 | /* In new */ | |
749 | ||
b8af1afb | 750 | if (adding) { |
72e22d2f | 751 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
752 | } |
753 | ||
093bc2cd AK |
754 | ++inew; |
755 | } | |
756 | } | |
b8af1afb AK |
757 | } |
758 | ||
759 | ||
760 | static void address_space_update_topology(AddressSpace *as) | |
761 | { | |
856d7245 | 762 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 763 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
764 | |
765 | address_space_update_topology_pass(as, old_view, new_view, false); | |
766 | address_space_update_topology_pass(as, old_view, new_view, true); | |
767 | ||
856d7245 PB |
768 | qemu_mutex_lock(&flat_view_mutex); |
769 | flatview_unref(as->current_map); | |
a9a0c06d | 770 | as->current_map = new_view; |
856d7245 PB |
771 | qemu_mutex_unlock(&flat_view_mutex); |
772 | ||
773 | /* Note that all the old MemoryRegions are still alive up to this | |
774 | * point. This relieves most MemoryListeners from the need to | |
775 | * ref/unref the MemoryRegions they get---unless they use them | |
776 | * outside the iothread mutex, in which case precise reference | |
777 | * counting is necessary. | |
778 | */ | |
779 | flatview_unref(old_view); | |
780 | ||
3e9d69e7 | 781 | address_space_update_ioeventfds(as); |
093bc2cd AK |
782 | } |
783 | ||
4ef4db86 AK |
784 | void memory_region_transaction_begin(void) |
785 | { | |
bb880ded | 786 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
787 | ++memory_region_transaction_depth; |
788 | } | |
789 | ||
4dc56152 GA |
790 | static void memory_region_clear_pending(void) |
791 | { | |
792 | memory_region_update_pending = false; | |
793 | ioeventfd_update_pending = false; | |
794 | } | |
795 | ||
4ef4db86 AK |
796 | void memory_region_transaction_commit(void) |
797 | { | |
0d673e36 AK |
798 | AddressSpace *as; |
799 | ||
4ef4db86 AK |
800 | assert(memory_region_transaction_depth); |
801 | --memory_region_transaction_depth; | |
4dc56152 GA |
802 | if (!memory_region_transaction_depth) { |
803 | if (memory_region_update_pending) { | |
804 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
02e2b95f | 805 | |
4dc56152 GA |
806 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
807 | address_space_update_topology(as); | |
808 | } | |
02e2b95f | 809 | |
4dc56152 GA |
810 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
811 | } else if (ioeventfd_update_pending) { | |
812 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
813 | address_space_update_ioeventfds(as); | |
814 | } | |
815 | } | |
816 | memory_region_clear_pending(); | |
817 | } | |
4ef4db86 AK |
818 | } |
819 | ||
545e92e0 AK |
820 | static void memory_region_destructor_none(MemoryRegion *mr) |
821 | { | |
822 | } | |
823 | ||
824 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
825 | { | |
826 | qemu_ram_free(mr->ram_addr); | |
827 | } | |
828 | ||
dfde4e6e PB |
829 | static void memory_region_destructor_alias(MemoryRegion *mr) |
830 | { | |
831 | memory_region_unref(mr->alias); | |
832 | } | |
833 | ||
545e92e0 AK |
834 | static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) |
835 | { | |
836 | qemu_ram_free_from_ptr(mr->ram_addr); | |
837 | } | |
838 | ||
d0a9b5bc AK |
839 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
840 | { | |
841 | qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); | |
d0a9b5bc AK |
842 | } |
843 | ||
093bc2cd | 844 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 845 | Object *owner, |
093bc2cd AK |
846 | const char *name, |
847 | uint64_t size) | |
848 | { | |
2cdfcf27 PB |
849 | mr->ops = &unassigned_mem_ops; |
850 | mr->opaque = NULL; | |
2c9b15ca | 851 | mr->owner = owner; |
30951157 | 852 | mr->iommu_ops = NULL; |
feca4ac1 | 853 | mr->container = NULL; |
08dafab4 AK |
854 | mr->size = int128_make64(size); |
855 | if (size == UINT64_MAX) { | |
856 | mr->size = int128_2_64(); | |
857 | } | |
093bc2cd | 858 | mr->addr = 0; |
b3b00c78 | 859 | mr->subpage = false; |
6bba19ba | 860 | mr->enabled = true; |
14a3c10a | 861 | mr->terminates = false; |
8ea9252a | 862 | mr->ram = false; |
5f9a5ea1 | 863 | mr->romd_mode = true; |
fb1cd6f9 | 864 | mr->readonly = false; |
75c578dc | 865 | mr->rom_device = false; |
545e92e0 | 866 | mr->destructor = memory_region_destructor_none; |
093bc2cd AK |
867 | mr->priority = 0; |
868 | mr->may_overlap = false; | |
869 | mr->alias = NULL; | |
870 | QTAILQ_INIT(&mr->subregions); | |
871 | memset(&mr->subregions_link, 0, sizeof mr->subregions_link); | |
872 | QTAILQ_INIT(&mr->coalesced); | |
7267c094 | 873 | mr->name = g_strdup(name); |
5a583347 | 874 | mr->dirty_log_mask = 0; |
3e9d69e7 AK |
875 | mr->ioeventfd_nb = 0; |
876 | mr->ioeventfds = NULL; | |
d410515e | 877 | mr->flush_coalesced_mmio = false; |
093bc2cd AK |
878 | } |
879 | ||
b018ddf6 PB |
880 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
881 | unsigned size) | |
882 | { | |
883 | #ifdef DEBUG_UNASSIGNED | |
884 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
885 | #endif | |
4917cf44 AF |
886 | if (current_cpu != NULL) { |
887 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 888 | } |
68a7439a | 889 | return 0; |
b018ddf6 PB |
890 | } |
891 | ||
892 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
893 | uint64_t val, unsigned size) | |
894 | { | |
895 | #ifdef DEBUG_UNASSIGNED | |
896 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
897 | #endif | |
4917cf44 AF |
898 | if (current_cpu != NULL) { |
899 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 900 | } |
b018ddf6 PB |
901 | } |
902 | ||
d197063f PB |
903 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
904 | unsigned size, bool is_write) | |
905 | { | |
906 | return false; | |
907 | } | |
908 | ||
909 | const MemoryRegionOps unassigned_mem_ops = { | |
910 | .valid.accepts = unassigned_mem_accepts, | |
911 | .endianness = DEVICE_NATIVE_ENDIAN, | |
912 | }; | |
913 | ||
d2702032 PB |
914 | bool memory_region_access_valid(MemoryRegion *mr, |
915 | hwaddr addr, | |
916 | unsigned size, | |
917 | bool is_write) | |
093bc2cd | 918 | { |
a014ed07 PB |
919 | int access_size_min, access_size_max; |
920 | int access_size, i; | |
897fa7cf | 921 | |
093bc2cd AK |
922 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
923 | return false; | |
924 | } | |
925 | ||
a014ed07 | 926 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
927 | return true; |
928 | } | |
929 | ||
a014ed07 PB |
930 | access_size_min = mr->ops->valid.min_access_size; |
931 | if (!mr->ops->valid.min_access_size) { | |
932 | access_size_min = 1; | |
933 | } | |
934 | ||
935 | access_size_max = mr->ops->valid.max_access_size; | |
936 | if (!mr->ops->valid.max_access_size) { | |
937 | access_size_max = 4; | |
938 | } | |
939 | ||
940 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
941 | for (i = 0; i < size; i += access_size) { | |
942 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
943 | is_write)) { | |
944 | return false; | |
945 | } | |
093bc2cd | 946 | } |
a014ed07 | 947 | |
093bc2cd AK |
948 | return true; |
949 | } | |
950 | ||
a621f38d | 951 | static uint64_t memory_region_dispatch_read1(MemoryRegion *mr, |
a8170e5e | 952 | hwaddr addr, |
a621f38d | 953 | unsigned size) |
093bc2cd | 954 | { |
164a4dcd | 955 | uint64_t data = 0; |
093bc2cd | 956 | |
ce5d2f33 PB |
957 | if (mr->ops->read) { |
958 | access_with_adjusted_size(addr, &data, size, | |
959 | mr->ops->impl.min_access_size, | |
960 | mr->ops->impl.max_access_size, | |
961 | memory_region_read_accessor, mr); | |
962 | } else { | |
963 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
964 | memory_region_oldmmio_read_accessor, mr); | |
74901c3b AK |
965 | } |
966 | ||
093bc2cd AK |
967 | return data; |
968 | } | |
969 | ||
791af8c8 PB |
970 | static bool memory_region_dispatch_read(MemoryRegion *mr, |
971 | hwaddr addr, | |
972 | uint64_t *pval, | |
973 | unsigned size) | |
a621f38d | 974 | { |
791af8c8 PB |
975 | if (!memory_region_access_valid(mr, addr, size, false)) { |
976 | *pval = unassigned_mem_read(mr, addr, size); | |
977 | return true; | |
978 | } | |
a621f38d | 979 | |
791af8c8 PB |
980 | *pval = memory_region_dispatch_read1(mr, addr, size); |
981 | adjust_endianness(mr, pval, size); | |
982 | return false; | |
a621f38d | 983 | } |
093bc2cd | 984 | |
791af8c8 | 985 | static bool memory_region_dispatch_write(MemoryRegion *mr, |
a8170e5e | 986 | hwaddr addr, |
a621f38d AK |
987 | uint64_t data, |
988 | unsigned size) | |
989 | { | |
897fa7cf | 990 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 991 | unassigned_mem_write(mr, addr, data, size); |
791af8c8 | 992 | return true; |
093bc2cd AK |
993 | } |
994 | ||
a621f38d AK |
995 | adjust_endianness(mr, &data, size); |
996 | ||
ce5d2f33 PB |
997 | if (mr->ops->write) { |
998 | access_with_adjusted_size(addr, &data, size, | |
999 | mr->ops->impl.min_access_size, | |
1000 | mr->ops->impl.max_access_size, | |
1001 | memory_region_write_accessor, mr); | |
1002 | } else { | |
1003 | access_with_adjusted_size(addr, &data, size, 1, 4, | |
1004 | memory_region_oldmmio_write_accessor, mr); | |
74901c3b | 1005 | } |
791af8c8 | 1006 | return false; |
093bc2cd AK |
1007 | } |
1008 | ||
093bc2cd | 1009 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1010 | Object *owner, |
093bc2cd AK |
1011 | const MemoryRegionOps *ops, |
1012 | void *opaque, | |
1013 | const char *name, | |
1014 | uint64_t size) | |
1015 | { | |
2c9b15ca | 1016 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1017 | mr->ops = ops; |
1018 | mr->opaque = opaque; | |
14a3c10a | 1019 | mr->terminates = true; |
97161e17 | 1020 | mr->ram_addr = ~(ram_addr_t)0; |
093bc2cd AK |
1021 | } |
1022 | ||
1023 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 1024 | Object *owner, |
093bc2cd AK |
1025 | const char *name, |
1026 | uint64_t size) | |
1027 | { | |
2c9b15ca | 1028 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1029 | mr->ram = true; |
14a3c10a | 1030 | mr->terminates = true; |
545e92e0 | 1031 | mr->destructor = memory_region_destructor_ram; |
c5705a77 | 1032 | mr->ram_addr = qemu_ram_alloc(size, mr); |
093bc2cd AK |
1033 | } |
1034 | ||
1035 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1036 | Object *owner, |
093bc2cd AK |
1037 | const char *name, |
1038 | uint64_t size, | |
1039 | void *ptr) | |
1040 | { | |
2c9b15ca | 1041 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1042 | mr->ram = true; |
14a3c10a | 1043 | mr->terminates = true; |
545e92e0 | 1044 | mr->destructor = memory_region_destructor_ram_from_ptr; |
c5705a77 | 1045 | mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
093bc2cd AK |
1046 | } |
1047 | ||
1048 | void memory_region_init_alias(MemoryRegion *mr, | |
2c9b15ca | 1049 | Object *owner, |
093bc2cd AK |
1050 | const char *name, |
1051 | MemoryRegion *orig, | |
a8170e5e | 1052 | hwaddr offset, |
093bc2cd AK |
1053 | uint64_t size) |
1054 | { | |
2c9b15ca | 1055 | memory_region_init(mr, owner, name, size); |
dfde4e6e PB |
1056 | memory_region_ref(orig); |
1057 | mr->destructor = memory_region_destructor_alias; | |
093bc2cd AK |
1058 | mr->alias = orig; |
1059 | mr->alias_offset = offset; | |
1060 | } | |
1061 | ||
d0a9b5bc | 1062 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 1063 | Object *owner, |
d0a9b5bc | 1064 | const MemoryRegionOps *ops, |
75f5941c | 1065 | void *opaque, |
d0a9b5bc AK |
1066 | const char *name, |
1067 | uint64_t size) | |
1068 | { | |
2c9b15ca | 1069 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1070 | mr->ops = ops; |
75f5941c | 1071 | mr->opaque = opaque; |
d0a9b5bc | 1072 | mr->terminates = true; |
75c578dc | 1073 | mr->rom_device = true; |
d0a9b5bc | 1074 | mr->destructor = memory_region_destructor_rom_device; |
c5705a77 | 1075 | mr->ram_addr = qemu_ram_alloc(size, mr); |
d0a9b5bc AK |
1076 | } |
1077 | ||
30951157 | 1078 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1079 | Object *owner, |
30951157 AK |
1080 | const MemoryRegionIOMMUOps *ops, |
1081 | const char *name, | |
1082 | uint64_t size) | |
1083 | { | |
2c9b15ca | 1084 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1085 | mr->iommu_ops = ops, |
1086 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1087 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1088 | } |
1089 | ||
1660e72d | 1090 | void memory_region_init_reservation(MemoryRegion *mr, |
2c9b15ca | 1091 | Object *owner, |
1660e72d JK |
1092 | const char *name, |
1093 | uint64_t size) | |
1094 | { | |
2c9b15ca | 1095 | memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size); |
1660e72d JK |
1096 | } |
1097 | ||
093bc2cd AK |
1098 | void memory_region_destroy(MemoryRegion *mr) |
1099 | { | |
1100 | assert(QTAILQ_EMPTY(&mr->subregions)); | |
2be0e25f | 1101 | assert(memory_region_transaction_depth == 0); |
545e92e0 | 1102 | mr->destructor(mr); |
093bc2cd | 1103 | memory_region_clear_coalescing(mr); |
7267c094 AL |
1104 | g_free((char *)mr->name); |
1105 | g_free(mr->ioeventfds); | |
093bc2cd AK |
1106 | } |
1107 | ||
803c0816 PB |
1108 | Object *memory_region_owner(MemoryRegion *mr) |
1109 | { | |
1110 | return mr->owner; | |
1111 | } | |
1112 | ||
46637be2 PB |
1113 | void memory_region_ref(MemoryRegion *mr) |
1114 | { | |
1115 | if (mr && mr->owner) { | |
1116 | object_ref(mr->owner); | |
1117 | } | |
1118 | } | |
1119 | ||
1120 | void memory_region_unref(MemoryRegion *mr) | |
1121 | { | |
1122 | if (mr && mr->owner) { | |
1123 | object_unref(mr->owner); | |
1124 | } | |
1125 | } | |
1126 | ||
093bc2cd AK |
1127 | uint64_t memory_region_size(MemoryRegion *mr) |
1128 | { | |
08dafab4 AK |
1129 | if (int128_eq(mr->size, int128_2_64())) { |
1130 | return UINT64_MAX; | |
1131 | } | |
1132 | return int128_get64(mr->size); | |
093bc2cd AK |
1133 | } |
1134 | ||
8991c79b AK |
1135 | const char *memory_region_name(MemoryRegion *mr) |
1136 | { | |
1137 | return mr->name; | |
1138 | } | |
1139 | ||
8ea9252a AK |
1140 | bool memory_region_is_ram(MemoryRegion *mr) |
1141 | { | |
1142 | return mr->ram; | |
1143 | } | |
1144 | ||
55043ba3 AK |
1145 | bool memory_region_is_logging(MemoryRegion *mr) |
1146 | { | |
1147 | return mr->dirty_log_mask; | |
1148 | } | |
1149 | ||
ce7923da AK |
1150 | bool memory_region_is_rom(MemoryRegion *mr) |
1151 | { | |
1152 | return mr->ram && mr->readonly; | |
1153 | } | |
1154 | ||
30951157 AK |
1155 | bool memory_region_is_iommu(MemoryRegion *mr) |
1156 | { | |
1157 | return mr->iommu_ops; | |
1158 | } | |
1159 | ||
06866575 DG |
1160 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1161 | { | |
1162 | notifier_list_add(&mr->iommu_notify, n); | |
1163 | } | |
1164 | ||
1165 | void memory_region_unregister_iommu_notifier(Notifier *n) | |
1166 | { | |
1167 | notifier_remove(n); | |
1168 | } | |
1169 | ||
1170 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1171 | IOMMUTLBEntry entry) | |
1172 | { | |
1173 | assert(memory_region_is_iommu(mr)); | |
1174 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1175 | } | |
1176 | ||
093bc2cd AK |
1177 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1178 | { | |
5a583347 AK |
1179 | uint8_t mask = 1 << client; |
1180 | ||
59023ef4 | 1181 | memory_region_transaction_begin(); |
5a583347 | 1182 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1183 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1184 | memory_region_transaction_commit(); |
093bc2cd AK |
1185 | } |
1186 | ||
a8170e5e AK |
1187 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1188 | hwaddr size, unsigned client) | |
093bc2cd | 1189 | { |
14a3c10a | 1190 | assert(mr->terminates); |
52159192 | 1191 | return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client); |
093bc2cd AK |
1192 | } |
1193 | ||
a8170e5e AK |
1194 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1195 | hwaddr size) | |
093bc2cd | 1196 | { |
14a3c10a | 1197 | assert(mr->terminates); |
75218e7f | 1198 | cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size); |
093bc2cd AK |
1199 | } |
1200 | ||
6c279db8 JQ |
1201 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1202 | hwaddr size, unsigned client) | |
1203 | { | |
1204 | bool ret; | |
1205 | assert(mr->terminates); | |
52159192 | 1206 | ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client); |
6c279db8 | 1207 | if (ret) { |
a2f4d5be | 1208 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client); |
6c279db8 JQ |
1209 | } |
1210 | return ret; | |
1211 | } | |
1212 | ||
1213 | ||
093bc2cd AK |
1214 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1215 | { | |
0d673e36 | 1216 | AddressSpace *as; |
5a583347 AK |
1217 | FlatRange *fr; |
1218 | ||
0d673e36 | 1219 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
856d7245 | 1220 | FlatView *view = address_space_get_flatview(as); |
99e86347 | 1221 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 AK |
1222 | if (fr->mr == mr) { |
1223 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1224 | } | |
5a583347 | 1225 | } |
856d7245 | 1226 | flatview_unref(view); |
5a583347 | 1227 | } |
093bc2cd AK |
1228 | } |
1229 | ||
1230 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1231 | { | |
fb1cd6f9 | 1232 | if (mr->readonly != readonly) { |
59023ef4 | 1233 | memory_region_transaction_begin(); |
fb1cd6f9 | 1234 | mr->readonly = readonly; |
22bde714 | 1235 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1236 | memory_region_transaction_commit(); |
fb1cd6f9 | 1237 | } |
093bc2cd AK |
1238 | } |
1239 | ||
5f9a5ea1 | 1240 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1241 | { |
5f9a5ea1 | 1242 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1243 | memory_region_transaction_begin(); |
5f9a5ea1 | 1244 | mr->romd_mode = romd_mode; |
22bde714 | 1245 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1246 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1247 | } |
1248 | } | |
1249 | ||
a8170e5e AK |
1250 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1251 | hwaddr size, unsigned client) | |
093bc2cd | 1252 | { |
14a3c10a | 1253 | assert(mr->terminates); |
a2f4d5be | 1254 | cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client); |
093bc2cd AK |
1255 | } |
1256 | ||
1257 | void *memory_region_get_ram_ptr(MemoryRegion *mr) | |
1258 | { | |
1259 | if (mr->alias) { | |
1260 | return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset; | |
1261 | } | |
1262 | ||
14a3c10a | 1263 | assert(mr->terminates); |
093bc2cd | 1264 | |
021d26d1 | 1265 | return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK); |
093bc2cd AK |
1266 | } |
1267 | ||
0d673e36 | 1268 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1269 | { |
99e86347 | 1270 | FlatView *view; |
093bc2cd AK |
1271 | FlatRange *fr; |
1272 | CoalescedMemoryRange *cmr; | |
1273 | AddrRange tmp; | |
95d2994a | 1274 | MemoryRegionSection section; |
093bc2cd | 1275 | |
856d7245 | 1276 | view = address_space_get_flatview(as); |
99e86347 | 1277 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1278 | if (fr->mr == mr) { |
95d2994a | 1279 | section = (MemoryRegionSection) { |
f6790af6 | 1280 | .address_space = as, |
95d2994a | 1281 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1282 | .size = fr->addr.size, |
95d2994a AK |
1283 | }; |
1284 | ||
1285 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1286 | int128_get64(fr->addr.start), | |
1287 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1288 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1289 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1290 | int128_sub(fr->addr.start, |
1291 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1292 | if (!addrrange_intersects(tmp, fr->addr)) { |
1293 | continue; | |
1294 | } | |
1295 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1296 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1297 | int128_get64(tmp.start), | |
1298 | int128_get64(tmp.size)); | |
093bc2cd AK |
1299 | } |
1300 | } | |
1301 | } | |
856d7245 | 1302 | flatview_unref(view); |
093bc2cd AK |
1303 | } |
1304 | ||
0d673e36 AK |
1305 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1306 | { | |
1307 | AddressSpace *as; | |
1308 | ||
1309 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1310 | memory_region_update_coalesced_range_as(mr, as); | |
1311 | } | |
1312 | } | |
1313 | ||
093bc2cd AK |
1314 | void memory_region_set_coalescing(MemoryRegion *mr) |
1315 | { | |
1316 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1317 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1318 | } |
1319 | ||
1320 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1321 | hwaddr offset, |
093bc2cd AK |
1322 | uint64_t size) |
1323 | { | |
7267c094 | 1324 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1325 | |
08dafab4 | 1326 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1327 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1328 | memory_region_update_coalesced_range(mr); | |
d410515e | 1329 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1330 | } |
1331 | ||
1332 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1333 | { | |
1334 | CoalescedMemoryRange *cmr; | |
ab5b3db5 | 1335 | bool updated = false; |
093bc2cd | 1336 | |
d410515e JK |
1337 | qemu_flush_coalesced_mmio_buffer(); |
1338 | mr->flush_coalesced_mmio = false; | |
1339 | ||
093bc2cd AK |
1340 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1341 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1342 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1343 | g_free(cmr); |
ab5b3db5 FZ |
1344 | updated = true; |
1345 | } | |
1346 | ||
1347 | if (updated) { | |
1348 | memory_region_update_coalesced_range(mr); | |
093bc2cd | 1349 | } |
093bc2cd AK |
1350 | } |
1351 | ||
d410515e JK |
1352 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1353 | { | |
1354 | mr->flush_coalesced_mmio = true; | |
1355 | } | |
1356 | ||
1357 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1358 | { | |
1359 | qemu_flush_coalesced_mmio_buffer(); | |
1360 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1361 | mr->flush_coalesced_mmio = false; | |
1362 | } | |
1363 | } | |
1364 | ||
3e9d69e7 | 1365 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1366 | hwaddr addr, |
3e9d69e7 AK |
1367 | unsigned size, |
1368 | bool match_data, | |
1369 | uint64_t data, | |
753d5e14 | 1370 | EventNotifier *e) |
3e9d69e7 AK |
1371 | { |
1372 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1373 | .addr.start = int128_make64(addr), |
1374 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1375 | .match_data = match_data, |
1376 | .data = data, | |
753d5e14 | 1377 | .e = e, |
3e9d69e7 AK |
1378 | }; |
1379 | unsigned i; | |
1380 | ||
28f362be | 1381 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1382 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1383 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1384 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1385 | break; | |
1386 | } | |
1387 | } | |
1388 | ++mr->ioeventfd_nb; | |
7267c094 | 1389 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1390 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1391 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1392 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1393 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 1394 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1395 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1396 | } |
1397 | ||
1398 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1399 | hwaddr addr, |
3e9d69e7 AK |
1400 | unsigned size, |
1401 | bool match_data, | |
1402 | uint64_t data, | |
753d5e14 | 1403 | EventNotifier *e) |
3e9d69e7 AK |
1404 | { |
1405 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1406 | .addr.start = int128_make64(addr), |
1407 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1408 | .match_data = match_data, |
1409 | .data = data, | |
753d5e14 | 1410 | .e = e, |
3e9d69e7 AK |
1411 | }; |
1412 | unsigned i; | |
1413 | ||
28f362be | 1414 | adjust_endianness(mr, &mrfd.data, size); |
59023ef4 | 1415 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1416 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1417 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1418 | break; | |
1419 | } | |
1420 | } | |
1421 | assert(i != mr->ioeventfd_nb); | |
1422 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1423 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1424 | --mr->ioeventfd_nb; | |
7267c094 | 1425 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1426 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 1427 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1428 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1429 | } |
1430 | ||
feca4ac1 | 1431 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 1432 | { |
0598701a | 1433 | hwaddr offset = subregion->addr; |
feca4ac1 | 1434 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
1435 | MemoryRegion *other; |
1436 | ||
59023ef4 JK |
1437 | memory_region_transaction_begin(); |
1438 | ||
dfde4e6e | 1439 | memory_region_ref(subregion); |
093bc2cd AK |
1440 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1441 | if (subregion->may_overlap || other->may_overlap) { | |
1442 | continue; | |
1443 | } | |
2c7cfd65 | 1444 | if (int128_ge(int128_make64(offset), |
08dafab4 AK |
1445 | int128_add(int128_make64(other->addr), other->size)) |
1446 | || int128_le(int128_add(int128_make64(offset), subregion->size), | |
1447 | int128_make64(other->addr))) { | |
093bc2cd AK |
1448 | continue; |
1449 | } | |
a5e1cbc8 | 1450 | #if 0 |
860329b2 MW |
1451 | printf("warning: subregion collision %llx/%llx (%s) " |
1452 | "vs %llx/%llx (%s)\n", | |
093bc2cd | 1453 | (unsigned long long)offset, |
08dafab4 | 1454 | (unsigned long long)int128_get64(subregion->size), |
860329b2 MW |
1455 | subregion->name, |
1456 | (unsigned long long)other->addr, | |
08dafab4 | 1457 | (unsigned long long)int128_get64(other->size), |
860329b2 | 1458 | other->name); |
a5e1cbc8 | 1459 | #endif |
093bc2cd AK |
1460 | } |
1461 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { | |
1462 | if (subregion->priority >= other->priority) { | |
1463 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1464 | goto done; | |
1465 | } | |
1466 | } | |
1467 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1468 | done: | |
22bde714 | 1469 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1470 | memory_region_transaction_commit(); |
093bc2cd AK |
1471 | } |
1472 | ||
0598701a PC |
1473 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1474 | hwaddr offset, | |
1475 | MemoryRegion *subregion) | |
1476 | { | |
feca4ac1 PB |
1477 | assert(!subregion->container); |
1478 | subregion->container = mr; | |
0598701a | 1479 | subregion->addr = offset; |
feca4ac1 | 1480 | memory_region_update_container_subregions(subregion); |
0598701a | 1481 | } |
093bc2cd AK |
1482 | |
1483 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1484 | hwaddr offset, |
093bc2cd AK |
1485 | MemoryRegion *subregion) |
1486 | { | |
1487 | subregion->may_overlap = false; | |
1488 | subregion->priority = 0; | |
1489 | memory_region_add_subregion_common(mr, offset, subregion); | |
1490 | } | |
1491 | ||
1492 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1493 | hwaddr offset, |
093bc2cd | 1494 | MemoryRegion *subregion, |
a1ff8ae0 | 1495 | int priority) |
093bc2cd AK |
1496 | { |
1497 | subregion->may_overlap = true; | |
1498 | subregion->priority = priority; | |
1499 | memory_region_add_subregion_common(mr, offset, subregion); | |
1500 | } | |
1501 | ||
1502 | void memory_region_del_subregion(MemoryRegion *mr, | |
1503 | MemoryRegion *subregion) | |
1504 | { | |
59023ef4 | 1505 | memory_region_transaction_begin(); |
feca4ac1 PB |
1506 | assert(subregion->container == mr); |
1507 | subregion->container = NULL; | |
093bc2cd | 1508 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 1509 | memory_region_unref(subregion); |
22bde714 | 1510 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1511 | memory_region_transaction_commit(); |
6bba19ba AK |
1512 | } |
1513 | ||
1514 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1515 | { | |
1516 | if (enabled == mr->enabled) { | |
1517 | return; | |
1518 | } | |
59023ef4 | 1519 | memory_region_transaction_begin(); |
6bba19ba | 1520 | mr->enabled = enabled; |
22bde714 | 1521 | memory_region_update_pending = true; |
59023ef4 | 1522 | memory_region_transaction_commit(); |
093bc2cd | 1523 | } |
1c0ffa58 | 1524 | |
67891b8a | 1525 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 1526 | { |
feca4ac1 | 1527 | MemoryRegion *container = mr->container; |
2282e1af | 1528 | |
feca4ac1 | 1529 | if (container) { |
67891b8a PC |
1530 | memory_region_transaction_begin(); |
1531 | memory_region_ref(mr); | |
feca4ac1 PB |
1532 | memory_region_del_subregion(container, mr); |
1533 | mr->container = container; | |
1534 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
1535 | memory_region_unref(mr); |
1536 | memory_region_transaction_commit(); | |
2282e1af | 1537 | } |
67891b8a | 1538 | } |
2282e1af | 1539 | |
67891b8a PC |
1540 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
1541 | { | |
1542 | if (addr != mr->addr) { | |
1543 | mr->addr = addr; | |
1544 | memory_region_readd_subregion(mr); | |
1545 | } | |
2282e1af AK |
1546 | } |
1547 | ||
a8170e5e | 1548 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1549 | { |
4703359e | 1550 | assert(mr->alias); |
4703359e | 1551 | |
59023ef4 | 1552 | if (offset == mr->alias_offset) { |
4703359e AK |
1553 | return; |
1554 | } | |
1555 | ||
59023ef4 JK |
1556 | memory_region_transaction_begin(); |
1557 | mr->alias_offset = offset; | |
22bde714 | 1558 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1559 | memory_region_transaction_commit(); |
4703359e AK |
1560 | } |
1561 | ||
e34911c4 AK |
1562 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1563 | { | |
e34911c4 AK |
1564 | return mr->ram_addr; |
1565 | } | |
1566 | ||
e2177955 AK |
1567 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1568 | { | |
1569 | const AddrRange *addr = addr_; | |
1570 | const FlatRange *fr = fr_; | |
1571 | ||
1572 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
1573 | return -1; | |
1574 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
1575 | return 1; | |
1576 | } | |
1577 | return 0; | |
1578 | } | |
1579 | ||
99e86347 | 1580 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 1581 | { |
99e86347 | 1582 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
1583 | sizeof(FlatRange), cmp_flatrange_addr); |
1584 | } | |
1585 | ||
feca4ac1 | 1586 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
3ce10901 | 1587 | { |
feca4ac1 PB |
1588 | MemoryRegion *mr = memory_region_find(container, addr, 1).mr; |
1589 | if (!mr || (mr == container)) { | |
3ce10901 PB |
1590 | return false; |
1591 | } | |
dfde4e6e | 1592 | memory_region_unref(mr); |
3ce10901 PB |
1593 | return true; |
1594 | } | |
1595 | ||
eed2bacf IM |
1596 | bool memory_region_is_mapped(MemoryRegion *mr) |
1597 | { | |
1598 | return mr->container ? true : false; | |
1599 | } | |
1600 | ||
73034e9e | 1601 | MemoryRegionSection memory_region_find(MemoryRegion *mr, |
a8170e5e | 1602 | hwaddr addr, uint64_t size) |
e2177955 | 1603 | { |
052e87b0 | 1604 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
1605 | MemoryRegion *root; |
1606 | AddressSpace *as; | |
1607 | AddrRange range; | |
99e86347 | 1608 | FlatView *view; |
73034e9e PB |
1609 | FlatRange *fr; |
1610 | ||
1611 | addr += mr->addr; | |
feca4ac1 PB |
1612 | for (root = mr; root->container; ) { |
1613 | root = root->container; | |
73034e9e PB |
1614 | addr += root->addr; |
1615 | } | |
e2177955 | 1616 | |
73034e9e | 1617 | as = memory_region_to_address_space(root); |
eed2bacf IM |
1618 | if (!as) { |
1619 | return ret; | |
1620 | } | |
73034e9e | 1621 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 1622 | |
856d7245 | 1623 | view = address_space_get_flatview(as); |
99e86347 | 1624 | fr = flatview_lookup(view, range); |
e2177955 | 1625 | if (!fr) { |
6307d974 | 1626 | flatview_unref(view); |
e2177955 AK |
1627 | return ret; |
1628 | } | |
1629 | ||
99e86347 | 1630 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
1631 | --fr; |
1632 | } | |
1633 | ||
1634 | ret.mr = fr->mr; | |
73034e9e | 1635 | ret.address_space = as; |
e2177955 AK |
1636 | range = addrrange_intersection(range, fr->addr); |
1637 | ret.offset_within_region = fr->offset_in_region; | |
1638 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
1639 | fr->addr.start)); | |
052e87b0 | 1640 | ret.size = range.size; |
e2177955 | 1641 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 1642 | ret.readonly = fr->readonly; |
dfde4e6e PB |
1643 | memory_region_ref(ret.mr); |
1644 | ||
856d7245 | 1645 | flatview_unref(view); |
e2177955 AK |
1646 | return ret; |
1647 | } | |
1648 | ||
1d671369 | 1649 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 1650 | { |
99e86347 | 1651 | FlatView *view; |
7664e80c AK |
1652 | FlatRange *fr; |
1653 | ||
856d7245 | 1654 | view = address_space_get_flatview(as); |
99e86347 | 1655 | FOR_EACH_FLAT_RANGE(fr, view) { |
72e22d2f | 1656 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c | 1657 | } |
856d7245 | 1658 | flatview_unref(view); |
7664e80c AK |
1659 | } |
1660 | ||
1661 | void memory_global_dirty_log_start(void) | |
1662 | { | |
7664e80c | 1663 | global_dirty_log = true; |
7376e582 | 1664 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
7664e80c AK |
1665 | } |
1666 | ||
1667 | void memory_global_dirty_log_stop(void) | |
1668 | { | |
7664e80c | 1669 | global_dirty_log = false; |
7376e582 | 1670 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
1671 | } |
1672 | ||
1673 | static void listener_add_address_space(MemoryListener *listener, | |
1674 | AddressSpace *as) | |
1675 | { | |
99e86347 | 1676 | FlatView *view; |
7664e80c AK |
1677 | FlatRange *fr; |
1678 | ||
221b3a3f | 1679 | if (listener->address_space_filter |
f6790af6 | 1680 | && listener->address_space_filter != as) { |
221b3a3f JG |
1681 | return; |
1682 | } | |
1683 | ||
7664e80c | 1684 | if (global_dirty_log) { |
975aefe0 AK |
1685 | if (listener->log_global_start) { |
1686 | listener->log_global_start(listener); | |
1687 | } | |
7664e80c | 1688 | } |
975aefe0 | 1689 | |
856d7245 | 1690 | view = address_space_get_flatview(as); |
99e86347 | 1691 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
1692 | MemoryRegionSection section = { |
1693 | .mr = fr->mr, | |
f6790af6 | 1694 | .address_space = as, |
7664e80c | 1695 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 1696 | .size = fr->addr.size, |
7664e80c | 1697 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 1698 | .readonly = fr->readonly, |
7664e80c | 1699 | }; |
975aefe0 AK |
1700 | if (listener->region_add) { |
1701 | listener->region_add(listener, §ion); | |
1702 | } | |
7664e80c | 1703 | } |
856d7245 | 1704 | flatview_unref(view); |
7664e80c AK |
1705 | } |
1706 | ||
f6790af6 | 1707 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 1708 | { |
72e22d2f | 1709 | MemoryListener *other = NULL; |
0d673e36 | 1710 | AddressSpace *as; |
72e22d2f | 1711 | |
7376e582 | 1712 | listener->address_space_filter = filter; |
72e22d2f AK |
1713 | if (QTAILQ_EMPTY(&memory_listeners) |
1714 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
1715 | memory_listeners)->priority) { | |
1716 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
1717 | } else { | |
1718 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
1719 | if (listener->priority < other->priority) { | |
1720 | break; | |
1721 | } | |
1722 | } | |
1723 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
1724 | } | |
0d673e36 AK |
1725 | |
1726 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1727 | listener_add_address_space(listener, as); | |
1728 | } | |
7664e80c AK |
1729 | } |
1730 | ||
1731 | void memory_listener_unregister(MemoryListener *listener) | |
1732 | { | |
72e22d2f | 1733 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 1734 | } |
e2177955 | 1735 | |
7dca8043 | 1736 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 1737 | { |
856d7245 PB |
1738 | if (QTAILQ_EMPTY(&address_spaces)) { |
1739 | memory_init(); | |
1740 | } | |
1741 | ||
59023ef4 | 1742 | memory_region_transaction_begin(); |
8786db7c AK |
1743 | as->root = root; |
1744 | as->current_map = g_new(FlatView, 1); | |
1745 | flatview_init(as->current_map); | |
4c19eb72 AK |
1746 | as->ioeventfd_nb = 0; |
1747 | as->ioeventfds = NULL; | |
0d673e36 | 1748 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 1749 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 1750 | address_space_init_dispatch(as); |
f43793c7 PB |
1751 | memory_region_update_pending |= root->enabled; |
1752 | memory_region_transaction_commit(); | |
1c0ffa58 | 1753 | } |
658b2224 | 1754 | |
83f3c251 AK |
1755 | void address_space_destroy(AddressSpace *as) |
1756 | { | |
078c44f4 DG |
1757 | MemoryListener *listener; |
1758 | ||
83f3c251 AK |
1759 | /* Flush out anything from MemoryListeners listening in on this */ |
1760 | memory_region_transaction_begin(); | |
1761 | as->root = NULL; | |
1762 | memory_region_transaction_commit(); | |
1763 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
1764 | address_space_destroy_dispatch(as); | |
078c44f4 DG |
1765 | |
1766 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
1767 | assert(listener->address_space_filter != as); | |
1768 | } | |
1769 | ||
856d7245 | 1770 | flatview_unref(as->current_map); |
7dca8043 | 1771 | g_free(as->name); |
4c19eb72 | 1772 | g_free(as->ioeventfds); |
83f3c251 AK |
1773 | } |
1774 | ||
791af8c8 | 1775 | bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size) |
acbbec5d | 1776 | { |
791af8c8 | 1777 | return memory_region_dispatch_read(mr, addr, pval, size); |
acbbec5d AK |
1778 | } |
1779 | ||
791af8c8 | 1780 | bool io_mem_write(MemoryRegion *mr, hwaddr addr, |
acbbec5d AK |
1781 | uint64_t val, unsigned size) |
1782 | { | |
791af8c8 | 1783 | return memory_region_dispatch_write(mr, addr, val, size); |
acbbec5d AK |
1784 | } |
1785 | ||
314e2987 BS |
1786 | typedef struct MemoryRegionList MemoryRegionList; |
1787 | ||
1788 | struct MemoryRegionList { | |
1789 | const MemoryRegion *mr; | |
1790 | bool printed; | |
1791 | QTAILQ_ENTRY(MemoryRegionList) queue; | |
1792 | }; | |
1793 | ||
1794 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
1795 | ||
1796 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
1797 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 1798 | hwaddr base, |
9479c57a | 1799 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 1800 | { |
9479c57a JK |
1801 | MemoryRegionList *new_ml, *ml, *next_ml; |
1802 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
1803 | const MemoryRegion *submr; |
1804 | unsigned int i; | |
1805 | ||
7ea692b2 | 1806 | if (!mr || !mr->enabled) { |
314e2987 BS |
1807 | return; |
1808 | } | |
1809 | ||
1810 | for (i = 0; i < level; i++) { | |
1811 | mon_printf(f, " "); | |
1812 | } | |
1813 | ||
1814 | if (mr->alias) { | |
1815 | MemoryRegionList *ml; | |
1816 | bool found = false; | |
1817 | ||
1818 | /* check if the alias is already in the queue */ | |
9479c57a | 1819 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
314e2987 BS |
1820 | if (ml->mr == mr->alias && !ml->printed) { |
1821 | found = true; | |
1822 | } | |
1823 | } | |
1824 | ||
1825 | if (!found) { | |
1826 | ml = g_new(MemoryRegionList, 1); | |
1827 | ml->mr = mr->alias; | |
1828 | ml->printed = false; | |
9479c57a | 1829 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 1830 | } |
4896d74b JK |
1831 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
1832 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
1833 | "-" TARGET_FMT_plx "\n", | |
314e2987 | 1834 | base + mr->addr, |
08dafab4 | 1835 | base + mr->addr |
fd1d9926 AW |
1836 | + (int128_nz(mr->size) ? |
1837 | (hwaddr)int128_get64(int128_sub(mr->size, | |
1838 | int128_one())) : 0), | |
4b474ba7 | 1839 | mr->priority, |
5f9a5ea1 JK |
1840 | mr->romd_mode ? 'R' : '-', |
1841 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1842 | : '-', | |
314e2987 BS |
1843 | mr->name, |
1844 | mr->alias->name, | |
1845 | mr->alias_offset, | |
08dafab4 | 1846 | mr->alias_offset |
a66670c7 AK |
1847 | + (int128_nz(mr->size) ? |
1848 | (hwaddr)int128_get64(int128_sub(mr->size, | |
1849 | int128_one())) : 0)); | |
314e2987 | 1850 | } else { |
4896d74b JK |
1851 | mon_printf(f, |
1852 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", | |
314e2987 | 1853 | base + mr->addr, |
08dafab4 | 1854 | base + mr->addr |
fd1d9926 AW |
1855 | + (int128_nz(mr->size) ? |
1856 | (hwaddr)int128_get64(int128_sub(mr->size, | |
1857 | int128_one())) : 0), | |
4b474ba7 | 1858 | mr->priority, |
5f9a5ea1 JK |
1859 | mr->romd_mode ? 'R' : '-', |
1860 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
1861 | : '-', | |
314e2987 BS |
1862 | mr->name); |
1863 | } | |
9479c57a JK |
1864 | |
1865 | QTAILQ_INIT(&submr_print_queue); | |
1866 | ||
314e2987 | 1867 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
1868 | new_ml = g_new(MemoryRegionList, 1); |
1869 | new_ml->mr = submr; | |
1870 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1871 | if (new_ml->mr->addr < ml->mr->addr || | |
1872 | (new_ml->mr->addr == ml->mr->addr && | |
1873 | new_ml->mr->priority > ml->mr->priority)) { | |
1874 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
1875 | new_ml = NULL; | |
1876 | break; | |
1877 | } | |
1878 | } | |
1879 | if (new_ml) { | |
1880 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
1881 | } | |
1882 | } | |
1883 | ||
1884 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
1885 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
1886 | alias_print_queue); | |
1887 | } | |
1888 | ||
88365e47 | 1889 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 1890 | g_free(ml); |
314e2987 BS |
1891 | } |
1892 | } | |
1893 | ||
1894 | void mtree_info(fprintf_function mon_printf, void *f) | |
1895 | { | |
1896 | MemoryRegionListHead ml_head; | |
1897 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 1898 | AddressSpace *as; |
314e2987 BS |
1899 | |
1900 | QTAILQ_INIT(&ml_head); | |
1901 | ||
0d673e36 | 1902 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
0d673e36 AK |
1903 | mon_printf(f, "%s\n", as->name); |
1904 | mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); | |
b9f9be88 BS |
1905 | } |
1906 | ||
1907 | mon_printf(f, "aliases\n"); | |
314e2987 BS |
1908 | /* print aliased regions */ |
1909 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
1910 | if (!ml->printed) { | |
1911 | mon_printf(f, "%s\n", ml->mr->name); | |
1912 | mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); | |
1913 | } | |
1914 | } | |
1915 | ||
1916 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 1917 | g_free(ml); |
314e2987 | 1918 | } |
314e2987 | 1919 | } |