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ARM host: fix generated blocks linking
[qemu.git] / qemu-char.h
CommitLineData
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1#ifndef QEMU_CHAR_H
2#define QEMU_CHAR_H
3
376253ec 4#include "qemu-common.h"
5ccfae10 5#include "sys-queue.h"
376253ec 6
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7/* character device */
8
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9#define CHR_EVENT_BREAK 0 /* serial break char */
10#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
11#define CHR_EVENT_RESET 2 /* new connection established */
12#define CHR_EVENT_MUX_IN 3 /* mux-focus was set to this terminal */
13#define CHR_EVENT_MUX_OUT 4 /* mux-focus will move on */
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14
15
16#define CHR_IOCTL_SERIAL_SET_PARAMS 1
17typedef struct {
18 int speed;
19 int parity;
20 int data_bits;
21 int stop_bits;
22} QEMUSerialSetParams;
23
24#define CHR_IOCTL_SERIAL_SET_BREAK 2
25
26#define CHR_IOCTL_PP_READ_DATA 3
27#define CHR_IOCTL_PP_WRITE_DATA 4
28#define CHR_IOCTL_PP_READ_CONTROL 5
29#define CHR_IOCTL_PP_WRITE_CONTROL 6
30#define CHR_IOCTL_PP_READ_STATUS 7
31#define CHR_IOCTL_PP_EPP_READ_ADDR 8
32#define CHR_IOCTL_PP_EPP_READ 9
33#define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
34#define CHR_IOCTL_PP_EPP_WRITE 11
563e3c6e 35#define CHR_IOCTL_PP_DATA_DIR 12
87ecb68b 36
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37#define CHR_IOCTL_SERIAL_SET_TIOCM 13
38#define CHR_IOCTL_SERIAL_GET_TIOCM 14
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39
40#define CHR_TIOCM_CTS 0x020
41#define CHR_TIOCM_CAR 0x040
42#define CHR_TIOCM_DSR 0x100
43#define CHR_TIOCM_RI 0x080
44#define CHR_TIOCM_DTR 0x002
45#define CHR_TIOCM_RTS 0x004
46
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47typedef void IOEventHandler(void *opaque, int event);
48
49struct CharDriverState {
ceecf1d1 50 void (*init)(struct CharDriverState *s);
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51 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
52 void (*chr_update_read_handler)(struct CharDriverState *s);
53 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
f8f8e7e6 54 int (*get_msgfd)(struct CharDriverState *s);
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55 IOEventHandler *chr_event;
56 IOCanRWHandler *chr_can_read;
57 IOReadHandler *chr_read;
58 void *handler_opaque;
59 void (*chr_send_event)(struct CharDriverState *chr, int event);
60 void (*chr_close)(struct CharDriverState *chr);
bd9bdce6 61 void (*chr_accept_input)(struct CharDriverState *chr);
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62 void *opaque;
63 int focus;
64 QEMUBH *bh;
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65 char *label;
66 char *filename;
67 TAILQ_ENTRY(CharDriverState) next;
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68};
69
ceecf1d1 70CharDriverState *qemu_chr_open(const char *label, const char *filename, void (*init)(struct CharDriverState *s));
9596ebb7 71void qemu_chr_close(CharDriverState *chr);
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72void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
73int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
74void qemu_chr_send_event(CharDriverState *s, int event);
75void qemu_chr_add_handlers(CharDriverState *s,
76 IOCanRWHandler *fd_can_read,
77 IOReadHandler *fd_read,
78 IOEventHandler *fd_event,
79 void *opaque);
80int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
81void qemu_chr_reset(CharDriverState *s);
2970a6c9 82void qemu_chr_initial_reset(void);
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83int qemu_chr_can_read(CharDriverState *s);
84void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
f8f8e7e6 85int qemu_chr_get_msgfd(CharDriverState *s);
bd9bdce6 86void qemu_chr_accept_input(CharDriverState *s);
376253ec 87void qemu_chr_info(Monitor *mon);
87ecb68b 88
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89extern int term_escape_char;
90
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91/* async I/O support */
92
93int qemu_set_fd_handler2(int fd,
94 IOCanRWHandler *fd_read_poll,
95 IOHandler *fd_read,
96 IOHandler *fd_write,
97 void *opaque);
98int qemu_set_fd_handler(int fd,
99 IOHandler *fd_read,
100 IOHandler *fd_write,
101 void *opaque);
102
103#endif