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dd83b06a AF |
1 | /* |
2 | * QEMU CPU model | |
3 | * | |
4 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see | |
18 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
19 | */ | |
20 | ||
14cccb61 | 21 | #include "qom/cpu.h" |
dd83b06a | 22 | #include "qemu-common.h" |
13eed94e | 23 | #include "sysemu/kvm.h" |
066e9b27 IM |
24 | #include "qemu/notify.h" |
25 | #include "sysemu/sysemu.h" | |
26 | ||
27 | /* CPU hot-plug notifiers */ | |
28 | static NotifierList cpu_added_notifiers = | |
29 | NOTIFIER_LIST_INITIALIZER(cpu_add_notifiers); | |
30 | ||
31 | void qemu_register_cpu_added_notifier(Notifier *notifier) | |
32 | { | |
33 | notifier_list_add(&cpu_added_notifiers, notifier); | |
34 | } | |
dd83b06a | 35 | |
d8ed887b AF |
36 | void cpu_reset_interrupt(CPUState *cpu, int mask) |
37 | { | |
38 | cpu->interrupt_request &= ~mask; | |
39 | } | |
40 | ||
dd83b06a AF |
41 | void cpu_reset(CPUState *cpu) |
42 | { | |
43 | CPUClass *klass = CPU_GET_CLASS(cpu); | |
44 | ||
45 | if (klass->reset != NULL) { | |
46 | (*klass->reset)(cpu); | |
47 | } | |
48 | } | |
49 | ||
50 | static void cpu_common_reset(CPUState *cpu) | |
51 | { | |
fcd7d003 | 52 | cpu->exit_request = 0; |
259186a7 | 53 | cpu->interrupt_request = 0; |
d77953b9 | 54 | cpu->current_tb = NULL; |
259186a7 | 55 | cpu->halted = 0; |
dd83b06a AF |
56 | } |
57 | ||
2b8c2754 AF |
58 | ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) |
59 | { | |
60 | CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); | |
61 | ||
62 | return cc->class_by_name(cpu_model); | |
63 | } | |
64 | ||
65 | static ObjectClass *cpu_common_class_by_name(const char *cpu_model) | |
66 | { | |
67 | return NULL; | |
68 | } | |
69 | ||
4f658099 AF |
70 | static void cpu_common_realizefn(DeviceState *dev, Error **errp) |
71 | { | |
13eed94e IM |
72 | CPUState *cpu = CPU(dev); |
73 | ||
74 | if (dev->hotplugged) { | |
75 | cpu_synchronize_post_init(cpu); | |
066e9b27 | 76 | notifier_list_notify(&cpu_added_notifiers, dev); |
6afb4721 | 77 | cpu_resume(cpu); |
13eed94e | 78 | } |
4f658099 AF |
79 | } |
80 | ||
997395d3 IM |
81 | static int64_t cpu_common_get_arch_id(CPUState *cpu) |
82 | { | |
83 | return cpu->cpu_index; | |
84 | } | |
85 | ||
dd83b06a AF |
86 | static void cpu_class_init(ObjectClass *klass, void *data) |
87 | { | |
961f8395 | 88 | DeviceClass *dc = DEVICE_CLASS(klass); |
dd83b06a AF |
89 | CPUClass *k = CPU_CLASS(klass); |
90 | ||
2b8c2754 | 91 | k->class_by_name = cpu_common_class_by_name; |
dd83b06a | 92 | k->reset = cpu_common_reset; |
997395d3 | 93 | k->get_arch_id = cpu_common_get_arch_id; |
4f658099 | 94 | dc->realize = cpu_common_realizefn; |
961f8395 | 95 | dc->no_user = 1; |
dd83b06a AF |
96 | } |
97 | ||
961f8395 | 98 | static const TypeInfo cpu_type_info = { |
dd83b06a | 99 | .name = TYPE_CPU, |
961f8395 | 100 | .parent = TYPE_DEVICE, |
dd83b06a AF |
101 | .instance_size = sizeof(CPUState), |
102 | .abstract = true, | |
103 | .class_size = sizeof(CPUClass), | |
104 | .class_init = cpu_class_init, | |
105 | }; | |
106 | ||
107 | static void cpu_register_types(void) | |
108 | { | |
109 | type_register_static(&cpu_type_info); | |
110 | } | |
111 | ||
112 | type_init(cpu_register_types) |