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hw/arm/pic_cpu: Remove the now-unneeded arm_pic_init_cpu()
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1/*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
dd83b06a 21#include "qemu-common.h"
878096ee 22#include "qom/cpu.h"
13eed94e 23#include "sysemu/kvm.h"
066e9b27 24#include "qemu/notify.h"
91b1df8c 25#include "qemu/log.h"
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26#include "sysemu/sysemu.h"
27
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28typedef struct CPUExistsArgs {
29 int64_t id;
30 bool found;
31} CPUExistsArgs;
32
33static void cpu_exist_cb(CPUState *cpu, void *data)
34{
35 CPUClass *klass = CPU_GET_CLASS(cpu);
36 CPUExistsArgs *arg = data;
37
38 if (klass->get_arch_id(cpu) == arg->id) {
39 arg->found = true;
40 }
41}
42
43bool cpu_exists(int64_t id)
44{
45 CPUExistsArgs data = {
46 .id = id,
47 .found = false,
48 };
49
50 qemu_for_each_cpu(cpu_exist_cb, &data);
51 return data.found;
52}
53
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54bool cpu_paging_enabled(const CPUState *cpu)
55{
56 CPUClass *cc = CPU_GET_CLASS(cpu);
57
58 return cc->get_paging_enabled(cpu);
59}
60
61static bool cpu_common_get_paging_enabled(const CPUState *cpu)
62{
6db297ea 63 return false;
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64}
65
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66void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
67 Error **errp)
68{
69 CPUClass *cc = CPU_GET_CLASS(cpu);
70
71 return cc->get_memory_mapping(cpu, list, errp);
72}
73
74static void cpu_common_get_memory_mapping(CPUState *cpu,
75 MemoryMappingList *list,
76 Error **errp)
77{
78 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
79}
80
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81/* CPU hot-plug notifiers */
82static NotifierList cpu_added_notifiers =
83 NOTIFIER_LIST_INITIALIZER(cpu_add_notifiers);
84
85void qemu_register_cpu_added_notifier(Notifier *notifier)
86{
87 notifier_list_add(&cpu_added_notifiers, notifier);
88}
dd83b06a 89
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90void cpu_reset_interrupt(CPUState *cpu, int mask)
91{
92 cpu->interrupt_request &= ~mask;
93}
94
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95void cpu_exit(CPUState *cpu)
96{
97 cpu->exit_request = 1;
98 cpu->tcg_exit_req = 1;
99}
100
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101int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
102 void *opaque)
103{
104 CPUClass *cc = CPU_GET_CLASS(cpu);
105
106 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
107}
108
109static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
110 CPUState *cpu, void *opaque)
111{
112 return -1;
113}
114
115int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
116 int cpuid, void *opaque)
117{
118 CPUClass *cc = CPU_GET_CLASS(cpu);
119
120 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
121}
122
123static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
124 CPUState *cpu, int cpuid,
125 void *opaque)
126{
127 return -1;
128}
129
130int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
131 void *opaque)
132{
133 CPUClass *cc = CPU_GET_CLASS(cpu);
134
135 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
136}
137
138static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
139 CPUState *cpu, void *opaque)
140{
141 return -1;
142}
143
144int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
145 int cpuid, void *opaque)
146{
147 CPUClass *cc = CPU_GET_CLASS(cpu);
148
149 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
150}
151
152static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
153 CPUState *cpu, int cpuid,
154 void *opaque)
155{
156 return -1;
157}
158
159
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160static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
161{
162 return 0;
163}
164
165static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
166{
167 return 0;
168}
169
170
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171void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
172 int flags)
173{
174 CPUClass *cc = CPU_GET_CLASS(cpu);
175
176 if (cc->dump_state) {
177 cc->dump_state(cpu, f, cpu_fprintf, flags);
178 }
179}
180
181void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
182 int flags)
183{
184 CPUClass *cc = CPU_GET_CLASS(cpu);
185
186 if (cc->dump_statistics) {
187 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
188 }
189}
190
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191void cpu_reset(CPUState *cpu)
192{
193 CPUClass *klass = CPU_GET_CLASS(cpu);
194
195 if (klass->reset != NULL) {
196 (*klass->reset)(cpu);
197 }
198}
199
200static void cpu_common_reset(CPUState *cpu)
201{
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202 CPUClass *cc = CPU_GET_CLASS(cpu);
203
204 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
205 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
206 log_cpu_state(cpu, cc->reset_dump_flags);
207 }
208
fcd7d003 209 cpu->exit_request = 0;
259186a7 210 cpu->interrupt_request = 0;
d77953b9 211 cpu->current_tb = NULL;
259186a7 212 cpu->halted = 0;
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213}
214
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215ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
216{
217 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
218
219 return cc->class_by_name(cpu_model);
220}
221
222static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
223{
224 return NULL;
225}
226
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227static void cpu_common_realizefn(DeviceState *dev, Error **errp)
228{
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229 CPUState *cpu = CPU(dev);
230
231 if (dev->hotplugged) {
232 cpu_synchronize_post_init(cpu);
066e9b27 233 notifier_list_notify(&cpu_added_notifiers, dev);
6afb4721 234 cpu_resume(cpu);
13eed94e 235 }
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236}
237
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238static void cpu_common_initfn(Object *obj)
239{
240 CPUState *cpu = CPU(obj);
241 CPUClass *cc = CPU_GET_CLASS(obj);
242
243 cpu->gdb_num_regs = cc->gdb_num_core_regs;
244}
245
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246static int64_t cpu_common_get_arch_id(CPUState *cpu)
247{
248 return cpu->cpu_index;
249}
250
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251static void cpu_class_init(ObjectClass *klass, void *data)
252{
961f8395 253 DeviceClass *dc = DEVICE_CLASS(klass);
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254 CPUClass *k = CPU_CLASS(klass);
255
2b8c2754 256 k->class_by_name = cpu_common_class_by_name;
dd83b06a 257 k->reset = cpu_common_reset;
997395d3 258 k->get_arch_id = cpu_common_get_arch_id;
444d5590 259 k->get_paging_enabled = cpu_common_get_paging_enabled;
a23bbfda 260 k->get_memory_mapping = cpu_common_get_memory_mapping;
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261 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
262 k->write_elf32_note = cpu_common_write_elf32_note;
263 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
264 k->write_elf64_note = cpu_common_write_elf64_note;
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265 k->gdb_read_register = cpu_common_gdb_read_register;
266 k->gdb_write_register = cpu_common_gdb_write_register;
4f658099 267 dc->realize = cpu_common_realizefn;
961f8395 268 dc->no_user = 1;
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269}
270
961f8395 271static const TypeInfo cpu_type_info = {
dd83b06a 272 .name = TYPE_CPU,
961f8395 273 .parent = TYPE_DEVICE,
dd83b06a 274 .instance_size = sizeof(CPUState),
a0e372f0 275 .instance_init = cpu_common_initfn,
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276 .abstract = true,
277 .class_size = sizeof(CPUClass),
278 .class_init = cpu_class_init,
279};
280
281static void cpu_register_types(void)
282{
283 type_register_static(&cpu_type_info);
284}
285
286type_init(cpu_register_types)