[qemu.git] / softmmu_header.h

/*
 *  Software MMU support
 * 
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#if DATA_SIZE == 8
#define SUFFIX q
#define USUFFIX q
#define DATA_TYPE uint64_t
#elif DATA_SIZE == 4
#define SUFFIX l
#define USUFFIX l
#define DATA_TYPE uint32_t
#elif DATA_SIZE == 2
#define SUFFIX w
#define USUFFIX uw
#define DATA_TYPE uint16_t
#define DATA_STYPE int16_t
#elif DATA_SIZE == 1
#define SUFFIX b
#define USUFFIX ub
#define DATA_TYPE uint8_t
#define DATA_STYPE int8_t
#else
#error unsupported data size
#endif

#if ACCESS_TYPE == 0

#define CPU_MEM_INDEX 0
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == 1

#define CPU_MEM_INDEX 1
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == 2

#ifdef TARGET_I386
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
#elif defined (TARGET_PPC)
#define CPU_MEM_INDEX (msr_pr)
#elif defined (TARGET_SPARC)
#define CPU_MEM_INDEX ((env->psrs) == 0)
#endif
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == 3

#ifdef TARGET_I386
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
#elif defined (TARGET_PPC)
#define CPU_MEM_INDEX (msr_pr)
#elif defined (TARGET_SPARC)
#define CPU_MEM_INDEX ((env->psrs) == 0)
#endif
#define MMUSUFFIX _cmmu

#else
#error invalid ACCESS_TYPE
#endif

#if DATA_SIZE == 8
#define RES_TYPE uint64_t
#else
#define RES_TYPE int
#endif


DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
                                                         int is_user);
void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);

#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
    (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)

static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res;

    asm volatile ("movl %1, %%edx\n"
                  "movl %1, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %1, %%eax\n"
                  "je 1f\n"
                  "pushl %6\n"
                  "call %7\n"
                  "popl %%edx\n"
                  "movl %%eax, %0\n"
                  "jmp 2f\n"
                  "1:\n"
                  "addl 4(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movzbl (%%eax), %0\n"
#elif DATA_SIZE == 2
                  "movzwl (%%eax), %0\n"
#elif DATA_SIZE == 4
                  "movl (%%eax), %0\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : "=r" (res)
                  : "r" (ptr), 
                  "i" ((CPU_TLB_SIZE - 1) << 3), 
                  "i" (TARGET_PAGE_BITS - 3), 
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
                  "i" (CPU_MEM_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
    return res;
}

#if DATA_SIZE <= 2
static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res;

    asm volatile ("movl %1, %%edx\n"
                  "movl %1, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %1, %%eax\n"
                  "je 1f\n"
                  "pushl %6\n"
                  "call %7\n"
                  "popl %%edx\n"
#if DATA_SIZE == 1
                  "movsbl %%al, %0\n"
#elif DATA_SIZE == 2
                  "movswl %%ax, %0\n"
#else
#error unsupported size
#endif
                  "jmp 2f\n"
                  "1:\n"
                  "addl 4(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movsbl (%%eax), %0\n"
#elif DATA_SIZE == 2
                  "movswl (%%eax), %0\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : "=r" (res)
                  : "r" (ptr), 
                  "i" ((CPU_TLB_SIZE - 1) << 3), 
                  "i" (TARGET_PAGE_BITS - 3), 
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
                  "i" (CPU_MEM_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
    return res;
}
#endif

static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
{
    asm volatile ("movl %0, %%edx\n"
                  "movl %0, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %0, %%eax\n"
                  "je 1f\n"
#if DATA_SIZE == 1
                  "movzbl %b1, %%edx\n"
#elif DATA_SIZE == 2
                  "movzwl %w1, %%edx\n"
#elif DATA_SIZE == 4
                  "movl %1, %%edx\n"
#else
#error unsupported size
#endif
                  "pushl %6\n"
                  "call %7\n"
                  "popl %%eax\n"
                  "jmp 2f\n"
                  "1:\n"
                  "addl 4(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movb %b1, (%%eax)\n"
#elif DATA_SIZE == 2
                  "movw %w1, (%%eax)\n"
#elif DATA_SIZE == 4
                  "movl %1, (%%eax)\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : 
                  : "r" (ptr), 
/* NOTE: 'q' would be needed as constraint, but we could not use it
   with T1 ! */
                  "r" (v), 
                  "i" ((CPU_TLB_SIZE - 1) << 3), 
                  "i" (TARGET_PAGE_BITS - 3), 
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_write[CPU_MEM_INDEX][0].address)),
                  "i" (CPU_MEM_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
}

#else

/* generic load/store macros */

static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int index;
    RES_TYPE res;
    target_ulong addr;
    unsigned long physaddr;
    int is_user;

    addr = ptr;
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    is_user = CPU_MEM_INDEX;
    if (__builtin_expect(env->tlb_read[is_user][index].address != 
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
    } else {
        physaddr = addr + env->tlb_read[is_user][index].addend;
        res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
    }
    return res;
}

#if DATA_SIZE <= 2
static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res, index;
    target_ulong addr;
    unsigned long physaddr;
    int is_user;

    addr = ptr;
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    is_user = CPU_MEM_INDEX;
    if (__builtin_expect(env->tlb_read[is_user][index].address != 
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
    } else {
        physaddr = addr + env->tlb_read[is_user][index].addend;
        res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
    }
    return res;
}
#endif

/* generic store macro */

static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
{
    int index;
    target_ulong addr;
    unsigned long physaddr;
    int is_user;

    addr = ptr;
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    is_user = CPU_MEM_INDEX;
    if (__builtin_expect(env->tlb_write[is_user][index].address != 
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
    } else {
        physaddr = addr + env->tlb_write[is_user][index].addend;
        glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
    }
}

#endif

#if DATA_SIZE == 8
static inline double glue(ldfq, MEMSUFFIX)(target_ulong ptr)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.i = glue(ldq, MEMSUFFIX)(ptr);
    return u.d;
}

static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, double v)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.d = v;
    glue(stq, MEMSUFFIX)(ptr, u.i);
}
#endif /* DATA_SIZE == 8 */

#if DATA_SIZE == 4
static inline float glue(ldfl, MEMSUFFIX)(target_ulong ptr)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.i = glue(ldl, MEMSUFFIX)(ptr);
    return u.f;
}

static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float v)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.f = v;
    glue(stl, MEMSUFFIX)(ptr, u.i);
}
#endif /* DATA_SIZE == 4 */

#undef RES_TYPE
#undef DATA_TYPE
#undef DATA_STYPE
#undef SUFFIX
#undef USUFFIX
#undef DATA_SIZE
#undef CPU_MEM_INDEX
#undef MMUSUFFIX
Commit	Line	Data
b92e5a22 FB	1	/*
	2	* Software MMU support
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20	#if DATA_SIZE == 8
	21	#define SUFFIX q
61382a50	22	#define USUFFIX q
b92e5a22 FB	23	#define DATA_TYPE uint64_t
	24	#elif DATA_SIZE == 4
	25	#define SUFFIX l
61382a50	26	#define USUFFIX l
b92e5a22 FB	27	#define DATA_TYPE uint32_t
	28	#elif DATA_SIZE == 2
	29	#define SUFFIX w
61382a50	30	#define USUFFIX uw
b92e5a22 FB	31	#define DATA_TYPE uint16_t
	32	#define DATA_STYPE int16_t
	33	#elif DATA_SIZE == 1
	34	#define SUFFIX b
61382a50	35	#define USUFFIX ub
b92e5a22 FB	36	#define DATA_TYPE uint8_t
	37	#define DATA_STYPE int8_t
	38	#else
	39	#error unsupported data size
	40	#endif
	41
61382a50 FB	42	#if ACCESS_TYPE == 0
	43
	44	#define CPU_MEM_INDEX 0
	45	#define MMUSUFFIX _mmu
	46
	47	#elif ACCESS_TYPE == 1
	48
	49	#define CPU_MEM_INDEX 1
	50	#define MMUSUFFIX _mmu
	51
	52	#elif ACCESS_TYPE == 2
	53
2d603d22	54	#ifdef TARGET_I386
61382a50	55	#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
2d603d22 FB	56	#elif defined (TARGET_PPC)
2d603d22 FB	57	#define CPU_MEM_INDEX (msr_pr)
e95c8d51 FB	58	#elif defined (TARGET_SPARC)
e95c8d51 FB	59	#define CPU_MEM_INDEX ((env->psrs) == 0)
2d603d22	60	#endif
61382a50 FB	61	#define MMUSUFFIX _mmu
	62
	63	#elif ACCESS_TYPE == 3
	64
2d603d22	65	#ifdef TARGET_I386
61382a50	66	#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
2d603d22 FB	67	#elif defined (TARGET_PPC)
2d603d22 FB	68	#define CPU_MEM_INDEX (msr_pr)
e95c8d51 FB	69	#elif defined (TARGET_SPARC)
e95c8d51 FB	70	#define CPU_MEM_INDEX ((env->psrs) == 0)
2d603d22	71	#endif
61382a50 FB	72	#define MMUSUFFIX _cmmu
61382a50 FB	73
b92e5a22	74	#else
61382a50	75	#error invalid ACCESS_TYPE
b92e5a22 FB	76	#endif
	77
	78	#if DATA_SIZE == 8
	79	#define RES_TYPE uint64_t
	80	#else
	81	#define RES_TYPE int
	82	#endif
	83
	84
c27004ec	85	DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
61382a50	86	int is_user);
c27004ec	87	void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
b92e5a22	88
c27004ec FB	89	#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
c27004ec FB	90	(ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
e16c53fa	91
c27004ec	92	static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
e16c53fa FB	93	{
	94	int res;
	95
	96	asm volatile ("movl %1, %%edx\n"
	97	"movl %1, %%eax\n"
	98	"shrl %3, %%edx\n"
	99	"andl %4, %%eax\n"
	100	"andl %2, %%edx\n"
	101	"leal %5(%%edx, %%ebp), %%edx\n"
	102	"cmpl (%%edx), %%eax\n"
	103	"movl %1, %%eax\n"
	104	"je 1f\n"
	105	"pushl %6\n"
	106	"call %7\n"
	107	"popl %%edx\n"
	108	"movl %%eax, %0\n"
	109	"jmp 2f\n"
	110	"1:\n"
	111	"addl 4(%%edx), %%eax\n"
	112	#if DATA_SIZE == 1
	113	"movzbl (%%eax), %0\n"
	114	#elif DATA_SIZE == 2
	115	"movzwl (%%eax), %0\n"
	116	#elif DATA_SIZE == 4
	117	"movl (%%eax), %0\n"
	118	#else
	119	#error unsupported size
	120	#endif
	121	"2:\n"
	122	: "=r" (res)
	123	: "r" (ptr),
	124	"i" ((CPU_TLB_SIZE - 1) << 3),
	125	"i" (TARGET_PAGE_BITS - 3),
	126	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
	127	"m" ((uint32_t )offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
	128	"i" (CPU_MEM_INDEX),
	129	"m" ((uint8_t )&glue(glue(__ld, SUFFIX), MMUSUFFIX))
	130	: "%eax", "%ecx", "%edx", "memory", "cc");
	131	return res;
	132	}
	133
	134	#if DATA_SIZE <= 2
c27004ec	135	static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
e16c53fa FB	136	{
	137	int res;
	138
	139	asm volatile ("movl %1, %%edx\n"
	140	"movl %1, %%eax\n"
	141	"shrl %3, %%edx\n"
	142	"andl %4, %%eax\n"
	143	"andl %2, %%edx\n"
	144	"leal %5(%%edx, %%ebp), %%edx\n"
	145	"cmpl (%%edx), %%eax\n"
	146	"movl %1, %%eax\n"
	147	"je 1f\n"
	148	"pushl %6\n"
	149	"call %7\n"
	150	"popl %%edx\n"
	151	#if DATA_SIZE == 1
	152	"movsbl %%al, %0\n"
	153	#elif DATA_SIZE == 2
	154	"movswl %%ax, %0\n"
	155	#else
	156	#error unsupported size
	157	#endif
	158	"jmp 2f\n"
	159	"1:\n"
	160	"addl 4(%%edx), %%eax\n"
	161	#if DATA_SIZE == 1
	162	"movsbl (%%eax), %0\n"
	163	#elif DATA_SIZE == 2
	164	"movswl (%%eax), %0\n"
	165	#else
	166	#error unsupported size
	167	#endif
	168	"2:\n"
	169	: "=r" (res)
	170	: "r" (ptr),
	171	"i" ((CPU_TLB_SIZE - 1) << 3),
	172	"i" (TARGET_PAGE_BITS - 3),
	173	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
	174	"m" ((uint32_t )offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
	175	"i" (CPU_MEM_INDEX),
	176	"m" ((uint8_t )&glue(glue(__ld, SUFFIX), MMUSUFFIX))
	177	: "%eax", "%ecx", "%edx", "memory", "cc");
	178	return res;
	179	}
	180	#endif
	181
c27004ec	182	static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
e16c53fa FB	183	{
	184	asm volatile ("movl %0, %%edx\n"
	185	"movl %0, %%eax\n"
	186	"shrl %3, %%edx\n"
	187	"andl %4, %%eax\n"
	188	"andl %2, %%edx\n"
	189	"leal %5(%%edx, %%ebp), %%edx\n"
	190	"cmpl (%%edx), %%eax\n"
	191	"movl %0, %%eax\n"
	192	"je 1f\n"
	193	#if DATA_SIZE == 1
	194	"movzbl %b1, %%edx\n"
	195	#elif DATA_SIZE == 2
	196	"movzwl %w1, %%edx\n"
	197	#elif DATA_SIZE == 4
	198	"movl %1, %%edx\n"
	199	#else
	200	#error unsupported size
	201	#endif
	202	"pushl %6\n"
	203	"call %7\n"
	204	"popl %%eax\n"
	205	"jmp 2f\n"
	206	"1:\n"
	207	"addl 4(%%edx), %%eax\n"
	208	#if DATA_SIZE == 1
	209	"movb %b1, (%%eax)\n"
	210	#elif DATA_SIZE == 2
	211	"movw %w1, (%%eax)\n"
	212	#elif DATA_SIZE == 4
	213	"movl %1, (%%eax)\n"
	214	#else
	215	#error unsupported size
	216	#endif
	217	"2:\n"
	218	:
	219	: "r" (ptr),
	220	/* NOTE: 'q' would be needed as constraint, but we could not use it
	221	with T1 ! */
	222	"r" (v),
	223	"i" ((CPU_TLB_SIZE - 1) << 3),
	224	"i" (TARGET_PAGE_BITS - 3),
	225	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
	226	"m" ((uint32_t )offsetof(CPUState, tlb_write[CPU_MEM_INDEX][0].address)),
	227	"i" (CPU_MEM_INDEX),
	228	"m" ((uint8_t )&glue(glue(__st, SUFFIX), MMUSUFFIX))
	229	: "%eax", "%ecx", "%edx", "memory", "cc");
	230	}
	231
	232	#else
	233
	234	/* generic load/store macros */
	235
c27004ec	236	static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 FB	237	{
	238	int index;
	239	RES_TYPE res;
c27004ec FB	240	target_ulong addr;
c27004ec FB	241	unsigned long physaddr;
61382a50 FB	242	int is_user;
61382a50 FB	243
c27004ec	244	addr = ptr;
b92e5a22	245	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
61382a50 FB	246	is_user = CPU_MEM_INDEX;
61382a50 FB	247	if (__builtin_expect(env->tlb_read[is_user][index].address !=
b92e5a22	248	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
61382a50	249	res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
b92e5a22	250	} else {
61382a50 FB	251	physaddr = addr + env->tlb_read[is_user][index].addend;
61382a50 FB	252	res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
b92e5a22 FB	253	}
	254	return res;
	255	}
	256
	257	#if DATA_SIZE <= 2
c27004ec	258	static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 FB	259	{
b92e5a22 FB	260	int res, index;
c27004ec FB	261	target_ulong addr;
c27004ec FB	262	unsigned long physaddr;
61382a50 FB	263	int is_user;
61382a50 FB	264
c27004ec	265	addr = ptr;
b92e5a22	266	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
61382a50 FB	267	is_user = CPU_MEM_INDEX;
61382a50 FB	268	if (__builtin_expect(env->tlb_read[is_user][index].address !=
b92e5a22	269	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
61382a50	270	res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
b92e5a22	271	} else {
61382a50	272	physaddr = addr + env->tlb_read[is_user][index].addend;
b92e5a22 FB	273	res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
	274	}
	275	return res;
	276	}
	277	#endif
	278
e16c53fa FB	279	/* generic store macro */
e16c53fa FB	280
c27004ec	281	static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
b92e5a22 FB	282	{
b92e5a22 FB	283	int index;
c27004ec FB	284	target_ulong addr;
c27004ec FB	285	unsigned long physaddr;
61382a50 FB	286	int is_user;
61382a50 FB	287
c27004ec	288	addr = ptr;
b92e5a22	289	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
61382a50 FB	290	is_user = CPU_MEM_INDEX;
61382a50 FB	291	if (__builtin_expect(env->tlb_write[is_user][index].address !=
b92e5a22	292	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
61382a50	293	glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
b92e5a22	294	} else {
61382a50	295	physaddr = addr + env->tlb_write[is_user][index].addend;
b92e5a22 FB	296	glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
	297	}
	298	}
	299
e16c53fa FB	300	#endif
e16c53fa FB	301
2d603d22	302	#if DATA_SIZE == 8
c27004ec	303	static inline double glue(ldfq, MEMSUFFIX)(target_ulong ptr)
2d603d22 FB	304	{
	305	union {
	306	double d;
	307	uint64_t i;
	308	} u;
	309	u.i = glue(ldq, MEMSUFFIX)(ptr);
	310	return u.d;
	311	}
	312
c27004ec	313	static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, double v)
2d603d22 FB	314	{
	315	union {
	316	double d;
	317	uint64_t i;
	318	} u;
	319	u.d = v;
	320	glue(stq, MEMSUFFIX)(ptr, u.i);
	321	}
	322	#endif /* DATA_SIZE == 8 */
	323
	324	#if DATA_SIZE == 4
c27004ec	325	static inline float glue(ldfl, MEMSUFFIX)(target_ulong ptr)
2d603d22 FB	326	{
	327	union {
	328	float f;
	329	uint32_t i;
	330	} u;
	331	u.i = glue(ldl, MEMSUFFIX)(ptr);
	332	return u.f;
	333	}
	334
c27004ec	335	static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float v)
2d603d22 FB	336	{
	337	union {
	338	float f;
	339	uint32_t i;
	340	} u;
	341	u.f = v;
	342	glue(stl, MEMSUFFIX)(ptr, u.i);
	343	}
	344	#endif /* DATA_SIZE == 4 */
	345
b92e5a22 FB	346	#undef RES_TYPE
	347	#undef DATA_TYPE
	348	#undef DATA_STYPE
	349	#undef SUFFIX
61382a50	350	#undef USUFFIX
b92e5a22	351	#undef DATA_SIZE
61382a50 FB	352	#undef CPU_MEM_INDEX
61382a50 FB	353	#undef MMUSUFFIX