[qemu.git] / softmmu_header.h

/*
 *  Software MMU support
 * 
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#if DATA_SIZE == 8
#define SUFFIX q
#define USUFFIX q
#define DATA_TYPE uint64_t
#elif DATA_SIZE == 4
#define SUFFIX l
#define USUFFIX l
#define DATA_TYPE uint32_t
#elif DATA_SIZE == 2
#define SUFFIX w
#define USUFFIX uw
#define DATA_TYPE uint16_t
#define DATA_STYPE int16_t
#elif DATA_SIZE == 1
#define SUFFIX b
#define USUFFIX ub
#define DATA_TYPE uint8_t
#define DATA_STYPE int8_t
#else
#error unsupported data size
#endif

#if ACCESS_TYPE == 0

#define CPU_MEM_INDEX 0
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == 1

#define CPU_MEM_INDEX 1
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == 2

#ifdef TARGET_I386
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
#elif defined (TARGET_PPC)
#define CPU_MEM_INDEX (msr_pr)
#elif defined (TARGET_MIPS)
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
#elif defined (TARGET_SPARC)
#define CPU_MEM_INDEX ((env->psrs) == 0)
#endif
#define MMUSUFFIX _mmu

#elif ACCESS_TYPE == 3

#ifdef TARGET_I386
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
#elif defined (TARGET_PPC)
#define CPU_MEM_INDEX (msr_pr)
#elif defined (TARGET_MIPS)
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
#elif defined (TARGET_SPARC)
#define CPU_MEM_INDEX ((env->psrs) == 0)
#endif
#define MMUSUFFIX _cmmu

#else
#error invalid ACCESS_TYPE
#endif

#if DATA_SIZE == 8
#define RES_TYPE uint64_t
#else
#define RES_TYPE int
#endif


DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
                                                         int is_user);
void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);

#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
    (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)

static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res;

    asm volatile ("movl %1, %%edx\n"
                  "movl %1, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %1, %%eax\n"
                  "je 1f\n"
                  "pushl %6\n"
                  "call %7\n"
                  "popl %%edx\n"
                  "movl %%eax, %0\n"
                  "jmp 2f\n"
                  "1:\n"
                  "addl 4(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movzbl (%%eax), %0\n"
#elif DATA_SIZE == 2
                  "movzwl (%%eax), %0\n"
#elif DATA_SIZE == 4
                  "movl (%%eax), %0\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : "=r" (res)
                  : "r" (ptr), 
                  "i" ((CPU_TLB_SIZE - 1) << 3), 
                  "i" (TARGET_PAGE_BITS - 3), 
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
                  "i" (CPU_MEM_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
    return res;
}

#if DATA_SIZE <= 2
static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res;

    asm volatile ("movl %1, %%edx\n"
                  "movl %1, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %1, %%eax\n"
                  "je 1f\n"
                  "pushl %6\n"
                  "call %7\n"
                  "popl %%edx\n"
#if DATA_SIZE == 1
                  "movsbl %%al, %0\n"
#elif DATA_SIZE == 2
                  "movswl %%ax, %0\n"
#else
#error unsupported size
#endif
                  "jmp 2f\n"
                  "1:\n"
                  "addl 4(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movsbl (%%eax), %0\n"
#elif DATA_SIZE == 2
                  "movswl (%%eax), %0\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : "=r" (res)
                  : "r" (ptr), 
                  "i" ((CPU_TLB_SIZE - 1) << 3), 
                  "i" (TARGET_PAGE_BITS - 3), 
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
                  "i" (CPU_MEM_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
    return res;
}
#endif

static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
{
    asm volatile ("movl %0, %%edx\n"
                  "movl %0, %%eax\n"
                  "shrl %3, %%edx\n"
                  "andl %4, %%eax\n"
                  "andl %2, %%edx\n"
                  "leal %5(%%edx, %%ebp), %%edx\n"
                  "cmpl (%%edx), %%eax\n"
                  "movl %0, %%eax\n"
                  "je 1f\n"
#if DATA_SIZE == 1
                  "movzbl %b1, %%edx\n"
#elif DATA_SIZE == 2
                  "movzwl %w1, %%edx\n"
#elif DATA_SIZE == 4
                  "movl %1, %%edx\n"
#else
#error unsupported size
#endif
                  "pushl %6\n"
                  "call %7\n"
                  "popl %%eax\n"
                  "jmp 2f\n"
                  "1:\n"
                  "addl 4(%%edx), %%eax\n"
#if DATA_SIZE == 1
                  "movb %b1, (%%eax)\n"
#elif DATA_SIZE == 2
                  "movw %w1, (%%eax)\n"
#elif DATA_SIZE == 4
                  "movl %1, (%%eax)\n"
#else
#error unsupported size
#endif
                  "2:\n"
                  : 
                  : "r" (ptr), 
/* NOTE: 'q' would be needed as constraint, but we could not use it
   with T1 ! */
                  "r" (v), 
                  "i" ((CPU_TLB_SIZE - 1) << 3), 
                  "i" (TARGET_PAGE_BITS - 3), 
                  "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
                  "m" (*(uint32_t *)offsetof(CPUState, tlb_write[CPU_MEM_INDEX][0].address)),
                  "i" (CPU_MEM_INDEX),
                  "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
                  : "%eax", "%ecx", "%edx", "memory", "cc");
}

#else

/* generic load/store macros */

static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int index;
    RES_TYPE res;
    target_ulong addr;
    unsigned long physaddr;
    int is_user;

    addr = ptr;
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    is_user = CPU_MEM_INDEX;
    if (__builtin_expect(env->tlb_read[is_user][index].address != 
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
    } else {
        physaddr = addr + env->tlb_read[is_user][index].addend;
        res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
    }
    return res;
}

#if DATA_SIZE <= 2
static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
{
    int res, index;
    target_ulong addr;
    unsigned long physaddr;
    int is_user;

    addr = ptr;
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    is_user = CPU_MEM_INDEX;
    if (__builtin_expect(env->tlb_read[is_user][index].address != 
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
    } else {
        physaddr = addr + env->tlb_read[is_user][index].addend;
        res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
    }
    return res;
}
#endif

/* generic store macro */

static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
{
    int index;
    target_ulong addr;
    unsigned long physaddr;
    int is_user;

    addr = ptr;
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
    is_user = CPU_MEM_INDEX;
    if (__builtin_expect(env->tlb_write[is_user][index].address != 
                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
        glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
    } else {
        physaddr = addr + env->tlb_write[is_user][index].addend;
        glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
    }
}

#endif

#if DATA_SIZE == 8
static inline double glue(ldfq, MEMSUFFIX)(target_ulong ptr)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.i = glue(ldq, MEMSUFFIX)(ptr);
    return u.d;
}

static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, double v)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.d = v;
    glue(stq, MEMSUFFIX)(ptr, u.i);
}
#endif /* DATA_SIZE == 8 */

#if DATA_SIZE == 4
static inline float glue(ldfl, MEMSUFFIX)(target_ulong ptr)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.i = glue(ldl, MEMSUFFIX)(ptr);
    return u.f;
}

static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float v)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.f = v;
    glue(stl, MEMSUFFIX)(ptr, u.i);
}
#endif /* DATA_SIZE == 4 */

#undef RES_TYPE
#undef DATA_TYPE
#undef DATA_STYPE
#undef SUFFIX
#undef USUFFIX
#undef DATA_SIZE
#undef CPU_MEM_INDEX
#undef MMUSUFFIX
Commit	Line	Data
b92e5a22 FB	1	/*
	2	* Software MMU support
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20	#if DATA_SIZE == 8
	21	#define SUFFIX q
61382a50	22	#define USUFFIX q
b92e5a22 FB	23	#define DATA_TYPE uint64_t
	24	#elif DATA_SIZE == 4
	25	#define SUFFIX l
61382a50	26	#define USUFFIX l
b92e5a22 FB	27	#define DATA_TYPE uint32_t
	28	#elif DATA_SIZE == 2
	29	#define SUFFIX w
61382a50	30	#define USUFFIX uw
b92e5a22 FB	31	#define DATA_TYPE uint16_t
	32	#define DATA_STYPE int16_t
	33	#elif DATA_SIZE == 1
	34	#define SUFFIX b
61382a50	35	#define USUFFIX ub
b92e5a22 FB	36	#define DATA_TYPE uint8_t
	37	#define DATA_STYPE int8_t
	38	#else
	39	#error unsupported data size
	40	#endif
	41
61382a50 FB	42	#if ACCESS_TYPE == 0
	43
	44	#define CPU_MEM_INDEX 0
	45	#define MMUSUFFIX _mmu
	46
	47	#elif ACCESS_TYPE == 1
	48
	49	#define CPU_MEM_INDEX 1
	50	#define MMUSUFFIX _mmu
	51
	52	#elif ACCESS_TYPE == 2
	53
2d603d22	54	#ifdef TARGET_I386
61382a50	55	#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
2d603d22 FB	56	#elif defined (TARGET_PPC)
2d603d22 FB	57	#define CPU_MEM_INDEX (msr_pr)
6af0bf9c FB	58	#elif defined (TARGET_MIPS)
6af0bf9c FB	59	#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
e95c8d51 FB	60	#elif defined (TARGET_SPARC)
e95c8d51 FB	61	#define CPU_MEM_INDEX ((env->psrs) == 0)
2d603d22	62	#endif
61382a50 FB	63	#define MMUSUFFIX _mmu
	64
	65	#elif ACCESS_TYPE == 3
	66
2d603d22	67	#ifdef TARGET_I386
61382a50	68	#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
2d603d22 FB	69	#elif defined (TARGET_PPC)
2d603d22 FB	70	#define CPU_MEM_INDEX (msr_pr)
6af0bf9c FB	71	#elif defined (TARGET_MIPS)
6af0bf9c FB	72	#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
e95c8d51 FB	73	#elif defined (TARGET_SPARC)
e95c8d51 FB	74	#define CPU_MEM_INDEX ((env->psrs) == 0)
2d603d22	75	#endif
61382a50 FB	76	#define MMUSUFFIX _cmmu
61382a50 FB	77
b92e5a22	78	#else
61382a50	79	#error invalid ACCESS_TYPE
b92e5a22 FB	80	#endif
	81
	82	#if DATA_SIZE == 8
	83	#define RES_TYPE uint64_t
	84	#else
	85	#define RES_TYPE int
	86	#endif
	87
	88
c27004ec	89	DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
61382a50	90	int is_user);
c27004ec	91	void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
b92e5a22	92
c27004ec FB	93	#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
c27004ec FB	94	(ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
e16c53fa	95
c27004ec	96	static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
e16c53fa FB	97	{
	98	int res;
	99
	100	asm volatile ("movl %1, %%edx\n"
	101	"movl %1, %%eax\n"
	102	"shrl %3, %%edx\n"
	103	"andl %4, %%eax\n"
	104	"andl %2, %%edx\n"
	105	"leal %5(%%edx, %%ebp), %%edx\n"
	106	"cmpl (%%edx), %%eax\n"
	107	"movl %1, %%eax\n"
	108	"je 1f\n"
	109	"pushl %6\n"
	110	"call %7\n"
	111	"popl %%edx\n"
	112	"movl %%eax, %0\n"
	113	"jmp 2f\n"
	114	"1:\n"
	115	"addl 4(%%edx), %%eax\n"
	116	#if DATA_SIZE == 1
	117	"movzbl (%%eax), %0\n"
	118	#elif DATA_SIZE == 2
	119	"movzwl (%%eax), %0\n"
	120	#elif DATA_SIZE == 4
	121	"movl (%%eax), %0\n"
	122	#else
	123	#error unsupported size
	124	#endif
	125	"2:\n"
	126	: "=r" (res)
	127	: "r" (ptr),
	128	"i" ((CPU_TLB_SIZE - 1) << 3),
	129	"i" (TARGET_PAGE_BITS - 3),
	130	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
	131	"m" ((uint32_t )offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
	132	"i" (CPU_MEM_INDEX),
	133	"m" ((uint8_t )&glue(glue(__ld, SUFFIX), MMUSUFFIX))
	134	: "%eax", "%ecx", "%edx", "memory", "cc");
	135	return res;
	136	}
	137
	138	#if DATA_SIZE <= 2
c27004ec	139	static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
e16c53fa FB	140	{
	141	int res;
	142
	143	asm volatile ("movl %1, %%edx\n"
	144	"movl %1, %%eax\n"
	145	"shrl %3, %%edx\n"
	146	"andl %4, %%eax\n"
	147	"andl %2, %%edx\n"
	148	"leal %5(%%edx, %%ebp), %%edx\n"
	149	"cmpl (%%edx), %%eax\n"
	150	"movl %1, %%eax\n"
	151	"je 1f\n"
	152	"pushl %6\n"
	153	"call %7\n"
	154	"popl %%edx\n"
	155	#if DATA_SIZE == 1
	156	"movsbl %%al, %0\n"
	157	#elif DATA_SIZE == 2
	158	"movswl %%ax, %0\n"
	159	#else
	160	#error unsupported size
	161	#endif
	162	"jmp 2f\n"
	163	"1:\n"
	164	"addl 4(%%edx), %%eax\n"
	165	#if DATA_SIZE == 1
	166	"movsbl (%%eax), %0\n"
	167	#elif DATA_SIZE == 2
	168	"movswl (%%eax), %0\n"
	169	#else
	170	#error unsupported size
	171	#endif
	172	"2:\n"
	173	: "=r" (res)
	174	: "r" (ptr),
	175	"i" ((CPU_TLB_SIZE - 1) << 3),
	176	"i" (TARGET_PAGE_BITS - 3),
	177	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
	178	"m" ((uint32_t )offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
	179	"i" (CPU_MEM_INDEX),
	180	"m" ((uint8_t )&glue(glue(__ld, SUFFIX), MMUSUFFIX))
	181	: "%eax", "%ecx", "%edx", "memory", "cc");
	182	return res;
	183	}
	184	#endif
	185
c27004ec	186	static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
e16c53fa FB	187	{
	188	asm volatile ("movl %0, %%edx\n"
	189	"movl %0, %%eax\n"
	190	"shrl %3, %%edx\n"
	191	"andl %4, %%eax\n"
	192	"andl %2, %%edx\n"
	193	"leal %5(%%edx, %%ebp), %%edx\n"
	194	"cmpl (%%edx), %%eax\n"
	195	"movl %0, %%eax\n"
	196	"je 1f\n"
	197	#if DATA_SIZE == 1
	198	"movzbl %b1, %%edx\n"
	199	#elif DATA_SIZE == 2
	200	"movzwl %w1, %%edx\n"
	201	#elif DATA_SIZE == 4
	202	"movl %1, %%edx\n"
	203	#else
	204	#error unsupported size
	205	#endif
	206	"pushl %6\n"
	207	"call %7\n"
	208	"popl %%eax\n"
	209	"jmp 2f\n"
	210	"1:\n"
	211	"addl 4(%%edx), %%eax\n"
	212	#if DATA_SIZE == 1
	213	"movb %b1, (%%eax)\n"
	214	#elif DATA_SIZE == 2
	215	"movw %w1, (%%eax)\n"
	216	#elif DATA_SIZE == 4
	217	"movl %1, (%%eax)\n"
	218	#else
	219	#error unsupported size
	220	#endif
	221	"2:\n"
	222	:
	223	: "r" (ptr),
	224	/* NOTE: 'q' would be needed as constraint, but we could not use it
	225	with T1 ! */
	226	"r" (v),
	227	"i" ((CPU_TLB_SIZE - 1) << 3),
	228	"i" (TARGET_PAGE_BITS - 3),
	229	"i" (TARGET_PAGE_MASK \| (DATA_SIZE - 1)),
	230	"m" ((uint32_t )offsetof(CPUState, tlb_write[CPU_MEM_INDEX][0].address)),
	231	"i" (CPU_MEM_INDEX),
	232	"m" ((uint8_t )&glue(glue(__st, SUFFIX), MMUSUFFIX))
	233	: "%eax", "%ecx", "%edx", "memory", "cc");
	234	}
	235
	236	#else
	237
	238	/* generic load/store macros */
	239
c27004ec	240	static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 FB	241	{
	242	int index;
	243	RES_TYPE res;
c27004ec FB	244	target_ulong addr;
c27004ec FB	245	unsigned long physaddr;
61382a50 FB	246	int is_user;
61382a50 FB	247
c27004ec	248	addr = ptr;
b92e5a22	249	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
61382a50 FB	250	is_user = CPU_MEM_INDEX;
61382a50 FB	251	if (__builtin_expect(env->tlb_read[is_user][index].address !=
b92e5a22	252	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
61382a50	253	res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
b92e5a22	254	} else {
61382a50 FB	255	physaddr = addr + env->tlb_read[is_user][index].addend;
61382a50 FB	256	res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
b92e5a22 FB	257	}
	258	return res;
	259	}
	260
	261	#if DATA_SIZE <= 2
c27004ec	262	static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 FB	263	{
b92e5a22 FB	264	int res, index;
c27004ec FB	265	target_ulong addr;
c27004ec FB	266	unsigned long physaddr;
61382a50 FB	267	int is_user;
61382a50 FB	268
c27004ec	269	addr = ptr;
b92e5a22	270	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
61382a50 FB	271	is_user = CPU_MEM_INDEX;
61382a50 FB	272	if (__builtin_expect(env->tlb_read[is_user][index].address !=
b92e5a22	273	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
61382a50	274	res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
b92e5a22	275	} else {
61382a50	276	physaddr = addr + env->tlb_read[is_user][index].addend;
b92e5a22 FB	277	res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
	278	}
	279	return res;
	280	}
	281	#endif
	282
e16c53fa FB	283	/* generic store macro */
e16c53fa FB	284
c27004ec	285	static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
b92e5a22 FB	286	{
b92e5a22 FB	287	int index;
c27004ec FB	288	target_ulong addr;
c27004ec FB	289	unsigned long physaddr;
61382a50 FB	290	int is_user;
61382a50 FB	291
c27004ec	292	addr = ptr;
b92e5a22	293	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
61382a50 FB	294	is_user = CPU_MEM_INDEX;
61382a50 FB	295	if (__builtin_expect(env->tlb_write[is_user][index].address !=
b92e5a22	296	(addr & (TARGET_PAGE_MASK \| (DATA_SIZE - 1))), 0)) {
61382a50	297	glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
b92e5a22	298	} else {
61382a50	299	physaddr = addr + env->tlb_write[is_user][index].addend;
b92e5a22 FB	300	glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
	301	}
	302	}
	303
e16c53fa FB	304	#endif
e16c53fa FB	305
2d603d22	306	#if DATA_SIZE == 8
c27004ec	307	static inline double glue(ldfq, MEMSUFFIX)(target_ulong ptr)
2d603d22 FB	308	{
	309	union {
	310	double d;
	311	uint64_t i;
	312	} u;
	313	u.i = glue(ldq, MEMSUFFIX)(ptr);
	314	return u.d;
	315	}
	316
c27004ec	317	static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, double v)
2d603d22 FB	318	{
	319	union {
	320	double d;
	321	uint64_t i;
	322	} u;
	323	u.d = v;
	324	glue(stq, MEMSUFFIX)(ptr, u.i);
	325	}
	326	#endif /* DATA_SIZE == 8 */
	327
	328	#if DATA_SIZE == 4
c27004ec	329	static inline float glue(ldfl, MEMSUFFIX)(target_ulong ptr)
2d603d22 FB	330	{
	331	union {
	332	float f;
	333	uint32_t i;
	334	} u;
	335	u.i = glue(ldl, MEMSUFFIX)(ptr);
	336	return u.f;
	337	}
	338
c27004ec	339	static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float v)
2d603d22 FB	340	{
	341	union {
	342	float f;
	343	uint32_t i;
	344	} u;
	345	u.f = v;
	346	glue(stl, MEMSUFFIX)(ptr, u.i);
	347	}
	348	#endif /* DATA_SIZE == 4 */
	349
b92e5a22 FB	350	#undef RES_TYPE
	351	#undef DATA_TYPE
	352	#undef DATA_STYPE
	353	#undef SUFFIX
61382a50	354	#undef USUFFIX
b92e5a22	355	#undef DATA_SIZE
61382a50 FB	356	#undef CPU_MEM_INDEX
61382a50 FB	357	#undef MMUSUFFIX