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PowerPC update (Jocelyn Mayer)
[qemu.git] / softmmu_header.h
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1/*
2 * Software MMU support
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#if DATA_SIZE == 8
21#define SUFFIX q
61382a50 22#define USUFFIX q
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23#define DATA_TYPE uint64_t
24#elif DATA_SIZE == 4
25#define SUFFIX l
61382a50 26#define USUFFIX l
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27#define DATA_TYPE uint32_t
28#elif DATA_SIZE == 2
29#define SUFFIX w
61382a50 30#define USUFFIX uw
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31#define DATA_TYPE uint16_t
32#define DATA_STYPE int16_t
33#elif DATA_SIZE == 1
34#define SUFFIX b
61382a50 35#define USUFFIX ub
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36#define DATA_TYPE uint8_t
37#define DATA_STYPE int8_t
38#else
39#error unsupported data size
40#endif
41
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42#if ACCESS_TYPE == 0
43
44#define CPU_MEM_INDEX 0
45#define MMUSUFFIX _mmu
46
47#elif ACCESS_TYPE == 1
48
49#define CPU_MEM_INDEX 1
50#define MMUSUFFIX _mmu
51
52#elif ACCESS_TYPE == 2
53
54#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
55#define MMUSUFFIX _mmu
56
57#elif ACCESS_TYPE == 3
58
59#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
60#define MMUSUFFIX _cmmu
61
b92e5a22 62#else
61382a50 63#error invalid ACCESS_TYPE
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64#endif
65
66#if DATA_SIZE == 8
67#define RES_TYPE uint64_t
68#else
69#define RES_TYPE int
70#endif
71
72
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73DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
74 int is_user);
75void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(unsigned long addr, DATA_TYPE v, int is_user);
b92e5a22 76
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77#if (DATA_SIZE <= 4) && defined(__i386__) && (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
78
79static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(void *ptr)
80{
81 int res;
82
83 asm volatile ("movl %1, %%edx\n"
84 "movl %1, %%eax\n"
85 "shrl %3, %%edx\n"
86 "andl %4, %%eax\n"
87 "andl %2, %%edx\n"
88 "leal %5(%%edx, %%ebp), %%edx\n"
89 "cmpl (%%edx), %%eax\n"
90 "movl %1, %%eax\n"
91 "je 1f\n"
92 "pushl %6\n"
93 "call %7\n"
94 "popl %%edx\n"
95 "movl %%eax, %0\n"
96 "jmp 2f\n"
97 "1:\n"
98 "addl 4(%%edx), %%eax\n"
99#if DATA_SIZE == 1
100 "movzbl (%%eax), %0\n"
101#elif DATA_SIZE == 2
102 "movzwl (%%eax), %0\n"
103#elif DATA_SIZE == 4
104 "movl (%%eax), %0\n"
105#else
106#error unsupported size
107#endif
108 "2:\n"
109 : "=r" (res)
110 : "r" (ptr),
111 "i" ((CPU_TLB_SIZE - 1) << 3),
112 "i" (TARGET_PAGE_BITS - 3),
113 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
114 "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
115 "i" (CPU_MEM_INDEX),
116 "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
117 : "%eax", "%ecx", "%edx", "memory", "cc");
118 return res;
119}
120
121#if DATA_SIZE <= 2
122static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(void *ptr)
123{
124 int res;
125
126 asm volatile ("movl %1, %%edx\n"
127 "movl %1, %%eax\n"
128 "shrl %3, %%edx\n"
129 "andl %4, %%eax\n"
130 "andl %2, %%edx\n"
131 "leal %5(%%edx, %%ebp), %%edx\n"
132 "cmpl (%%edx), %%eax\n"
133 "movl %1, %%eax\n"
134 "je 1f\n"
135 "pushl %6\n"
136 "call %7\n"
137 "popl %%edx\n"
138#if DATA_SIZE == 1
139 "movsbl %%al, %0\n"
140#elif DATA_SIZE == 2
141 "movswl %%ax, %0\n"
142#else
143#error unsupported size
144#endif
145 "jmp 2f\n"
146 "1:\n"
147 "addl 4(%%edx), %%eax\n"
148#if DATA_SIZE == 1
149 "movsbl (%%eax), %0\n"
150#elif DATA_SIZE == 2
151 "movswl (%%eax), %0\n"
152#else
153#error unsupported size
154#endif
155 "2:\n"
156 : "=r" (res)
157 : "r" (ptr),
158 "i" ((CPU_TLB_SIZE - 1) << 3),
159 "i" (TARGET_PAGE_BITS - 3),
160 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
161 "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
162 "i" (CPU_MEM_INDEX),
163 "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
164 : "%eax", "%ecx", "%edx", "memory", "cc");
165 return res;
166}
167#endif
168
169static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(void *ptr, RES_TYPE v)
170{
171 asm volatile ("movl %0, %%edx\n"
172 "movl %0, %%eax\n"
173 "shrl %3, %%edx\n"
174 "andl %4, %%eax\n"
175 "andl %2, %%edx\n"
176 "leal %5(%%edx, %%ebp), %%edx\n"
177 "cmpl (%%edx), %%eax\n"
178 "movl %0, %%eax\n"
179 "je 1f\n"
180#if DATA_SIZE == 1
181 "movzbl %b1, %%edx\n"
182#elif DATA_SIZE == 2
183 "movzwl %w1, %%edx\n"
184#elif DATA_SIZE == 4
185 "movl %1, %%edx\n"
186#else
187#error unsupported size
188#endif
189 "pushl %6\n"
190 "call %7\n"
191 "popl %%eax\n"
192 "jmp 2f\n"
193 "1:\n"
194 "addl 4(%%edx), %%eax\n"
195#if DATA_SIZE == 1
196 "movb %b1, (%%eax)\n"
197#elif DATA_SIZE == 2
198 "movw %w1, (%%eax)\n"
199#elif DATA_SIZE == 4
200 "movl %1, (%%eax)\n"
201#else
202#error unsupported size
203#endif
204 "2:\n"
205 :
206 : "r" (ptr),
207/* NOTE: 'q' would be needed as constraint, but we could not use it
208 with T1 ! */
209 "r" (v),
210 "i" ((CPU_TLB_SIZE - 1) << 3),
211 "i" (TARGET_PAGE_BITS - 3),
212 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
213 "m" (*(uint32_t *)offsetof(CPUState, tlb_write[CPU_MEM_INDEX][0].address)),
214 "i" (CPU_MEM_INDEX),
215 "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
216 : "%eax", "%ecx", "%edx", "memory", "cc");
217}
218
219#else
220
221/* generic load/store macros */
222
8948b5d6 223static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(void *ptr)
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224{
225 int index;
226 RES_TYPE res;
227 unsigned long addr, physaddr;
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228 int is_user;
229
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230 addr = (unsigned long)ptr;
231 index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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232 is_user = CPU_MEM_INDEX;
233 if (__builtin_expect(env->tlb_read[is_user][index].address !=
b92e5a22 234 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
61382a50 235 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
b92e5a22 236 } else {
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237 physaddr = addr + env->tlb_read[is_user][index].addend;
238 res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
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239 }
240 return res;
241}
242
243#if DATA_SIZE <= 2
244static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(void *ptr)
245{
246 int res, index;
247 unsigned long addr, physaddr;
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248 int is_user;
249
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250 addr = (unsigned long)ptr;
251 index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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252 is_user = CPU_MEM_INDEX;
253 if (__builtin_expect(env->tlb_read[is_user][index].address !=
b92e5a22 254 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
61382a50 255 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
b92e5a22 256 } else {
61382a50 257 physaddr = addr + env->tlb_read[is_user][index].addend;
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258 res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
259 }
260 return res;
261}
262#endif
263
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264/* generic store macro */
265
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266static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(void *ptr, RES_TYPE v)
267{
268 int index;
269 unsigned long addr, physaddr;
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270 int is_user;
271
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272 addr = (unsigned long)ptr;
273 index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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274 is_user = CPU_MEM_INDEX;
275 if (__builtin_expect(env->tlb_write[is_user][index].address !=
b92e5a22 276 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
61382a50 277 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
b92e5a22 278 } else {
61382a50 279 physaddr = addr + env->tlb_write[is_user][index].addend;
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280 glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
281 }
282}
283
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284#endif
285
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286#undef RES_TYPE
287#undef DATA_TYPE
288#undef DATA_STYPE
289#undef SUFFIX
61382a50 290#undef USUFFIX
b92e5a22 291#undef DATA_SIZE
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292#undef CPU_MEM_INDEX
293#undef MMUSUFFIX