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25ebd80f AF |
1 | /* |
2 | * QEMU Alpha CPU | |
3 | * | |
9444006f | 4 | * Copyright (c) 2007 Jocelyn Mayer |
25ebd80f AF |
5 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2.1 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see | |
19 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
20 | */ | |
21 | ||
3993c6bd | 22 | #include "cpu.h" |
25ebd80f | 23 | #include "qemu-common.h" |
fe31e737 | 24 | #include "migration/vmstate.h" |
25ebd80f AF |
25 | |
26 | ||
bd1b2828 | 27 | static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) |
0c28246f | 28 | { |
bd1b2828 AF |
29 | AlphaCPU *cpu = ALPHA_CPU(dev); |
30 | AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev); | |
0c28246f AF |
31 | |
32 | qemu_init_vcpu(&cpu->env); | |
bd1b2828 AF |
33 | |
34 | acc->parent_realize(dev, errp); | |
0c28246f AF |
35 | } |
36 | ||
494342b3 AF |
37 | /* Sort alphabetically by type name. */ |
38 | static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b) | |
39 | { | |
40 | ObjectClass *class_a = (ObjectClass *)a; | |
41 | ObjectClass *class_b = (ObjectClass *)b; | |
42 | const char *name_a, *name_b; | |
43 | ||
44 | name_a = object_class_get_name(class_a); | |
45 | name_b = object_class_get_name(class_b); | |
46 | return strcmp(name_a, name_b); | |
47 | } | |
48 | ||
49 | static void alpha_cpu_list_entry(gpointer data, gpointer user_data) | |
50 | { | |
51 | ObjectClass *oc = data; | |
92a31361 | 52 | CPUListState *s = user_data; |
494342b3 AF |
53 | |
54 | (*s->cpu_fprintf)(s->file, " %s\n", | |
55 | object_class_get_name(oc)); | |
56 | } | |
57 | ||
58 | void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf) | |
59 | { | |
92a31361 | 60 | CPUListState s = { |
494342b3 AF |
61 | .file = f, |
62 | .cpu_fprintf = cpu_fprintf, | |
63 | }; | |
64 | GSList *list; | |
65 | ||
66 | list = object_class_get_list(TYPE_ALPHA_CPU, false); | |
67 | list = g_slist_sort(list, alpha_cpu_list_compare); | |
68 | (*cpu_fprintf)(f, "Available CPUs:\n"); | |
69 | g_slist_foreach(list, alpha_cpu_list_entry, &s); | |
70 | g_slist_free(list); | |
71 | } | |
72 | ||
0c28246f AF |
73 | /* Models */ |
74 | ||
75 | #define TYPE(model) model "-" TYPE_ALPHA_CPU | |
76 | ||
77 | typedef struct AlphaCPUAlias { | |
78 | const char *alias; | |
79 | const char *typename; | |
80 | } AlphaCPUAlias; | |
81 | ||
82 | static const AlphaCPUAlias alpha_cpu_aliases[] = { | |
83 | { "21064", TYPE("ev4") }, | |
84 | { "21164", TYPE("ev5") }, | |
85 | { "21164a", TYPE("ev56") }, | |
86 | { "21164pc", TYPE("pca56") }, | |
87 | { "21264", TYPE("ev6") }, | |
88 | { "21264a", TYPE("ev67") }, | |
89 | }; | |
90 | ||
91 | static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model) | |
92 | { | |
93 | ObjectClass *oc = NULL; | |
94 | char *typename; | |
95 | int i; | |
96 | ||
97 | if (cpu_model == NULL) { | |
98 | return NULL; | |
99 | } | |
100 | ||
101 | oc = object_class_by_name(cpu_model); | |
a120c287 AF |
102 | if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL && |
103 | !object_class_is_abstract(oc)) { | |
0c28246f AF |
104 | return oc; |
105 | } | |
106 | ||
107 | for (i = 0; i < ARRAY_SIZE(alpha_cpu_aliases); i++) { | |
108 | if (strcmp(cpu_model, alpha_cpu_aliases[i].alias) == 0) { | |
109 | oc = object_class_by_name(alpha_cpu_aliases[i].typename); | |
a120c287 | 110 | assert(oc != NULL && !object_class_is_abstract(oc)); |
0c28246f AF |
111 | return oc; |
112 | } | |
113 | } | |
114 | ||
115 | typename = g_strdup_printf("%s-" TYPE_ALPHA_CPU, cpu_model); | |
116 | oc = object_class_by_name(typename); | |
117 | g_free(typename); | |
a120c287 AF |
118 | if (oc != NULL && object_class_is_abstract(oc)) { |
119 | oc = NULL; | |
120 | } | |
0c28246f AF |
121 | return oc; |
122 | } | |
123 | ||
124 | AlphaCPU *cpu_alpha_init(const char *cpu_model) | |
125 | { | |
126 | AlphaCPU *cpu; | |
127 | CPUAlphaState *env; | |
128 | ObjectClass *cpu_class; | |
129 | ||
130 | cpu_class = alpha_cpu_class_by_name(cpu_model); | |
131 | if (cpu_class == NULL) { | |
132 | /* Default to ev67; no reason not to emulate insns by default. */ | |
133 | cpu_class = object_class_by_name(TYPE("ev67")); | |
134 | } | |
135 | cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class))); | |
136 | env = &cpu->env; | |
137 | ||
138 | env->cpu_model_str = cpu_model; | |
139 | ||
bd1b2828 AF |
140 | object_property_set_bool(OBJECT(cpu), true, "realized", NULL); |
141 | ||
0c28246f AF |
142 | return cpu; |
143 | } | |
144 | ||
145 | static void ev4_cpu_initfn(Object *obj) | |
146 | { | |
147 | AlphaCPU *cpu = ALPHA_CPU(obj); | |
148 | CPUAlphaState *env = &cpu->env; | |
149 | ||
150 | env->implver = IMPLVER_2106x; | |
151 | } | |
152 | ||
153 | static const TypeInfo ev4_cpu_type_info = { | |
154 | .name = TYPE("ev4"), | |
155 | .parent = TYPE_ALPHA_CPU, | |
156 | .instance_init = ev4_cpu_initfn, | |
157 | }; | |
158 | ||
159 | static void ev5_cpu_initfn(Object *obj) | |
160 | { | |
161 | AlphaCPU *cpu = ALPHA_CPU(obj); | |
162 | CPUAlphaState *env = &cpu->env; | |
163 | ||
164 | env->implver = IMPLVER_21164; | |
165 | } | |
166 | ||
167 | static const TypeInfo ev5_cpu_type_info = { | |
168 | .name = TYPE("ev5"), | |
169 | .parent = TYPE_ALPHA_CPU, | |
170 | .instance_init = ev5_cpu_initfn, | |
171 | }; | |
172 | ||
173 | static void ev56_cpu_initfn(Object *obj) | |
174 | { | |
175 | AlphaCPU *cpu = ALPHA_CPU(obj); | |
176 | CPUAlphaState *env = &cpu->env; | |
177 | ||
178 | env->amask |= AMASK_BWX; | |
179 | } | |
180 | ||
181 | static const TypeInfo ev56_cpu_type_info = { | |
182 | .name = TYPE("ev56"), | |
183 | .parent = TYPE("ev5"), | |
184 | .instance_init = ev56_cpu_initfn, | |
185 | }; | |
186 | ||
187 | static void pca56_cpu_initfn(Object *obj) | |
188 | { | |
189 | AlphaCPU *cpu = ALPHA_CPU(obj); | |
190 | CPUAlphaState *env = &cpu->env; | |
191 | ||
192 | env->amask |= AMASK_MVI; | |
193 | } | |
194 | ||
195 | static const TypeInfo pca56_cpu_type_info = { | |
196 | .name = TYPE("pca56"), | |
197 | .parent = TYPE("ev56"), | |
198 | .instance_init = pca56_cpu_initfn, | |
199 | }; | |
200 | ||
201 | static void ev6_cpu_initfn(Object *obj) | |
202 | { | |
203 | AlphaCPU *cpu = ALPHA_CPU(obj); | |
204 | CPUAlphaState *env = &cpu->env; | |
205 | ||
206 | env->implver = IMPLVER_21264; | |
207 | env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP; | |
208 | } | |
209 | ||
210 | static const TypeInfo ev6_cpu_type_info = { | |
211 | .name = TYPE("ev6"), | |
212 | .parent = TYPE_ALPHA_CPU, | |
213 | .instance_init = ev6_cpu_initfn, | |
214 | }; | |
215 | ||
216 | static void ev67_cpu_initfn(Object *obj) | |
217 | { | |
218 | AlphaCPU *cpu = ALPHA_CPU(obj); | |
219 | CPUAlphaState *env = &cpu->env; | |
220 | ||
221 | env->amask |= AMASK_CIX | AMASK_PREFETCH; | |
222 | } | |
223 | ||
224 | static const TypeInfo ev67_cpu_type_info = { | |
225 | .name = TYPE("ev67"), | |
226 | .parent = TYPE("ev6"), | |
227 | .instance_init = ev67_cpu_initfn, | |
228 | }; | |
229 | ||
230 | static const TypeInfo ev68_cpu_type_info = { | |
231 | .name = TYPE("ev68"), | |
232 | .parent = TYPE("ev67"), | |
233 | }; | |
234 | ||
9444006f AF |
235 | static void alpha_cpu_initfn(Object *obj) |
236 | { | |
c05efcb1 | 237 | CPUState *cs = CPU(obj); |
9444006f AF |
238 | AlphaCPU *cpu = ALPHA_CPU(obj); |
239 | CPUAlphaState *env = &cpu->env; | |
240 | ||
c05efcb1 | 241 | cs->env_ptr = env; |
9444006f AF |
242 | cpu_exec_init(env); |
243 | tlb_flush(env, 1); | |
244 | ||
0c28246f AF |
245 | alpha_translate_init(); |
246 | ||
9444006f AF |
247 | #if defined(CONFIG_USER_ONLY) |
248 | env->ps = PS_USER_MODE; | |
249 | cpu_alpha_store_fpcr(env, (FPCR_INVD | FPCR_DZED | FPCR_OVFD | |
250 | | FPCR_UNFD | FPCR_INED | FPCR_DNOD | |
251 | | FPCR_DYN_NORMAL)); | |
252 | #endif | |
253 | env->lock_addr = -1; | |
254 | env->fen = 1; | |
255 | } | |
256 | ||
2b8c2754 AF |
257 | static void alpha_cpu_class_init(ObjectClass *oc, void *data) |
258 | { | |
bd1b2828 | 259 | DeviceClass *dc = DEVICE_CLASS(oc); |
2b8c2754 | 260 | CPUClass *cc = CPU_CLASS(oc); |
bd1b2828 AF |
261 | AlphaCPUClass *acc = ALPHA_CPU_CLASS(oc); |
262 | ||
263 | acc->parent_realize = dc->realize; | |
264 | dc->realize = alpha_cpu_realizefn; | |
2b8c2754 AF |
265 | |
266 | cc->class_by_name = alpha_cpu_class_by_name; | |
97a8ea5a | 267 | cc->do_interrupt = alpha_cpu_do_interrupt; |
fe31e737 | 268 | device_class_set_vmsd(dc, &vmstate_alpha_cpu); |
2b8c2754 AF |
269 | } |
270 | ||
25ebd80f AF |
271 | static const TypeInfo alpha_cpu_type_info = { |
272 | .name = TYPE_ALPHA_CPU, | |
273 | .parent = TYPE_CPU, | |
274 | .instance_size = sizeof(AlphaCPU), | |
9444006f | 275 | .instance_init = alpha_cpu_initfn, |
0c28246f | 276 | .abstract = true, |
25ebd80f | 277 | .class_size = sizeof(AlphaCPUClass), |
2b8c2754 | 278 | .class_init = alpha_cpu_class_init, |
25ebd80f AF |
279 | }; |
280 | ||
281 | static void alpha_cpu_register_types(void) | |
282 | { | |
283 | type_register_static(&alpha_cpu_type_info); | |
0c28246f AF |
284 | type_register_static(&ev4_cpu_type_info); |
285 | type_register_static(&ev5_cpu_type_info); | |
286 | type_register_static(&ev56_cpu_type_info); | |
287 | type_register_static(&pca56_cpu_type_info); | |
288 | type_register_static(&ev6_cpu_type_info); | |
289 | type_register_static(&ev67_cpu_type_info); | |
290 | type_register_static(&ev68_cpu_type_info); | |
25ebd80f AF |
291 | } |
292 | ||
293 | type_init(alpha_cpu_register_types) |