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58850dad AF |
1 | /* |
2 | * ARM gdb server stub | |
3 | * | |
4 | * Copyright (c) 2003-2005 Fabrice Bellard | |
5 | * Copyright (c) 2013 SUSE LINUX Products GmbH | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
21 | /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect | |
22 | whatever the target description contains. Due to a historical mishap | |
23 | the FPA registers appear in between core integer regs and the CPSR. | |
24 | We hack round this by giving the FPA regs zero size when talking to a | |
25 | newer gdb. */ | |
26 | ||
27 | static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) | |
28 | { | |
29 | if (n < 16) { | |
30 | /* Core integer register. */ | |
986a2998 | 31 | return gdb_get_reg32(mem_buf, env->regs[n]); |
58850dad AF |
32 | } |
33 | if (n < 24) { | |
34 | /* FPA registers. */ | |
35 | if (gdb_has_xml) { | |
36 | return 0; | |
37 | } | |
38 | memset(mem_buf, 0, 12); | |
39 | return 12; | |
40 | } | |
41 | switch (n) { | |
42 | case 24: | |
43 | /* FPA status register. */ | |
44 | if (gdb_has_xml) { | |
45 | return 0; | |
46 | } | |
986a2998 | 47 | return gdb_get_reg32(mem_buf, 0); |
58850dad AF |
48 | case 25: |
49 | /* CPSR */ | |
986a2998 | 50 | return gdb_get_reg32(mem_buf, cpsr_read(env)); |
58850dad AF |
51 | } |
52 | /* Unknown register. */ | |
53 | return 0; | |
54 | } | |
55 | ||
56 | static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n) | |
57 | { | |
58 | uint32_t tmp; | |
59 | ||
60 | tmp = ldl_p(mem_buf); | |
61 | ||
62 | /* Mask out low bit of PC to workaround gdb bugs. This will probably | |
63 | cause problems if we ever implement the Jazelle DBX extensions. */ | |
64 | if (n == 15) { | |
65 | tmp &= ~1; | |
66 | } | |
67 | ||
68 | if (n < 16) { | |
69 | /* Core integer register. */ | |
70 | env->regs[n] = tmp; | |
71 | return 4; | |
72 | } | |
73 | if (n < 24) { /* 16-23 */ | |
74 | /* FPA registers (ignored). */ | |
75 | if (gdb_has_xml) { | |
76 | return 0; | |
77 | } | |
78 | return 12; | |
79 | } | |
80 | switch (n) { | |
81 | case 24: | |
82 | /* FPA status register (ignored). */ | |
83 | if (gdb_has_xml) { | |
84 | return 0; | |
85 | } | |
86 | return 4; | |
87 | case 25: | |
88 | /* CPSR */ | |
89 | cpsr_write(env, tmp, 0xffffffff); | |
90 | return 4; | |
91 | } | |
92 | /* Unknown register. */ | |
93 | return 0; | |
94 | } |