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target-arm: Don't overuse CPUState
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CommitLineData
b7bcbe95
FB
1/*
2 * ARM helper routines
5fafdf24 3 *
9ee6e8bb 4 * Copyright (c) 2005-2007 CodeSourcery, LLC
b7bcbe95
FB
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
b7bcbe95 18 */
3e457172
BS
19#include "cpu.h"
20#include "dyngen-exec.h"
7b59220e 21#include "helper.h"
b7bcbe95 22
ad69471c
PB
23#define SIGNBIT (uint32_t)0x80000000
24#define SIGNBIT64 ((uint64_t)1 << 63)
25
3e457172
BS
26#if !defined(CONFIG_USER_ONLY)
27static void raise_exception(int tt)
b7bcbe95
FB
28{
29 env->exception_index = tt;
1162c041 30 cpu_loop_exit(env);
b7bcbe95 31}
3e457172 32#endif
b7bcbe95 33
8f8e3aa4
PB
34uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
35 uint32_t rn, uint32_t maxindex)
9ee6e8bb
PB
36{
37 uint32_t val;
9ee6e8bb
PB
38 uint32_t tmp;
39 int index;
40 int shift;
41 uint64_t *table;
42 table = (uint64_t *)&env->vfp.regs[rn];
43 val = 0;
9ee6e8bb 44 for (shift = 0; shift < 32; shift += 8) {
8f8e3aa4
PB
45 index = (ireg >> shift) & 0xff;
46 if (index < maxindex) {
3018f259 47 tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
9ee6e8bb
PB
48 val |= tmp << shift;
49 } else {
8f8e3aa4 50 val |= def & (0xff << shift);
9ee6e8bb
PB
51 }
52 }
8f8e3aa4 53 return val;
9ee6e8bb
PB
54}
55
b5ff1b31
FB
56#if !defined(CONFIG_USER_ONLY)
57
3e457172
BS
58#include "softmmu_exec.h"
59
b5ff1b31 60#define MMUSUFFIX _mmu
b5ff1b31
FB
61
62#define SHIFT 0
63#include "softmmu_template.h"
64
65#define SHIFT 1
66#include "softmmu_template.h"
67
68#define SHIFT 2
69#include "softmmu_template.h"
70
71#define SHIFT 3
72#include "softmmu_template.h"
73
74/* try to fill the TLB and return an exception if error. If retaddr is
75 NULL, it means that the function was called in C code (i.e. not
76 from generated code or from helper.c) */
77/* XXX: fix it to restore all registers */
0ecb72a5 78void tlb_fill(CPUARMState *env1, target_ulong addr, int is_write, int mmu_idx,
bccd9ec5 79 void *retaddr)
b5ff1b31
FB
80{
81 TranslationBlock *tb;
0ecb72a5 82 CPUARMState *saved_env;
44f8625d 83 unsigned long pc;
b5ff1b31
FB
84 int ret;
85
b5ff1b31 86 saved_env = env;
6e19a137 87 env = env1;
97b348e7 88 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx);
551bd27f 89 if (unlikely(ret)) {
b5ff1b31
FB
90 if (retaddr) {
91 /* now we have a real cpu fault */
44f8625d 92 pc = (unsigned long)retaddr;
b5ff1b31
FB
93 tb = tb_find_pc(pc);
94 if (tb) {
95 /* the PC is inside the translated code. It means that we have
96 a virtual CPU fault */
618ba8e6 97 cpu_restore_state(tb, env, pc);
b5ff1b31
FB
98 }
99 }
100 raise_exception(env->exception_index);
101 }
102 env = saved_env;
103}
b5ff1b31 104#endif
1497c961 105
0ecb72a5 106/* FIXME: Pass an axplicit pointer to QF to CPUARMState, and move saturating
ad69471c 107 instructions into helper.c */
1497c961
PB
108uint32_t HELPER(add_setq)(uint32_t a, uint32_t b)
109{
110 uint32_t res = a + b;
111 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
112 env->QF = 1;
113 return res;
114}
115
116uint32_t HELPER(add_saturate)(uint32_t a, uint32_t b)
117{
118 uint32_t res = a + b;
119 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
120 env->QF = 1;
121 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
122 }
123 return res;
124}
125
126uint32_t HELPER(sub_saturate)(uint32_t a, uint32_t b)
127{
128 uint32_t res = a - b;
129 if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
130 env->QF = 1;
131 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
132 }
133 return res;
134}
135
136uint32_t HELPER(double_saturate)(int32_t val)
137{
138 uint32_t res;
139 if (val >= 0x40000000) {
140 res = ~SIGNBIT;
141 env->QF = 1;
142 } else if (val <= (int32_t)0xc0000000) {
143 res = SIGNBIT;
144 env->QF = 1;
145 } else {
146 res = val << 1;
147 }
148 return res;
149}
150
151uint32_t HELPER(add_usaturate)(uint32_t a, uint32_t b)
152{
153 uint32_t res = a + b;
154 if (res < a) {
155 env->QF = 1;
156 res = ~0;
157 }
158 return res;
159}
160
161uint32_t HELPER(sub_usaturate)(uint32_t a, uint32_t b)
162{
163 uint32_t res = a - b;
164 if (res > a) {
165 env->QF = 1;
166 res = 0;
167 }
168 return res;
169}
170
6ddbc6e4
PB
171/* Signed saturation. */
172static inline uint32_t do_ssat(int32_t val, int shift)
173{
174 int32_t top;
175 uint32_t mask;
176
6ddbc6e4
PB
177 top = val >> shift;
178 mask = (1u << shift) - 1;
179 if (top > 0) {
180 env->QF = 1;
181 return mask;
182 } else if (top < -1) {
183 env->QF = 1;
184 return ~mask;
185 }
186 return val;
187}
188
189/* Unsigned saturation. */
190static inline uint32_t do_usat(int32_t val, int shift)
191{
192 uint32_t max;
193
6ddbc6e4
PB
194 max = (1u << shift) - 1;
195 if (val < 0) {
196 env->QF = 1;
197 return 0;
198 } else if (val > max) {
199 env->QF = 1;
200 return max;
201 }
202 return val;
203}
204
205/* Signed saturate. */
206uint32_t HELPER(ssat)(uint32_t x, uint32_t shift)
207{
208 return do_ssat(x, shift);
209}
210
211/* Dual halfword signed saturate. */
212uint32_t HELPER(ssat16)(uint32_t x, uint32_t shift)
213{
214 uint32_t res;
215
216 res = (uint16_t)do_ssat((int16_t)x, shift);
217 res |= do_ssat(((int32_t)x) >> 16, shift) << 16;
218 return res;
219}
220
221/* Unsigned saturate. */
222uint32_t HELPER(usat)(uint32_t x, uint32_t shift)
223{
224 return do_usat(x, shift);
225}
226
227/* Dual halfword unsigned saturate. */
228uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
229{
230 uint32_t res;
231
232 res = (uint16_t)do_usat((int16_t)x, shift);
233 res |= do_usat(((int32_t)x) >> 16, shift) << 16;
234 return res;
235}
d9ba4830
PB
236
237void HELPER(wfi)(void)
238{
239 env->exception_index = EXCP_HLT;
240 env->halted = 1;
1162c041 241 cpu_loop_exit(env);
d9ba4830
PB
242}
243
244void HELPER(exception)(uint32_t excp)
245{
246 env->exception_index = excp;
1162c041 247 cpu_loop_exit(env);
d9ba4830
PB
248}
249
250uint32_t HELPER(cpsr_read)(void)
251{
252 return cpsr_read(env) & ~CPSR_EXEC;
253}
254
255void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
256{
257 cpsr_write(env, val, mask);
258}
b0109805
PB
259
260/* Access to user mode registers from privileged modes. */
261uint32_t HELPER(get_user_reg)(uint32_t regno)
262{
263 uint32_t val;
264
265 if (regno == 13) {
266 val = env->banked_r13[0];
267 } else if (regno == 14) {
268 val = env->banked_r14[0];
269 } else if (regno >= 8
270 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
271 val = env->usr_regs[regno - 8];
272 } else {
273 val = env->regs[regno];
274 }
275 return val;
276}
277
278void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
279{
280 if (regno == 13) {
281 env->banked_r13[0] = val;
282 } else if (regno == 14) {
283 env->banked_r14[0] = val;
284 } else if (regno >= 8
285 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
286 env->usr_regs[regno - 8] = val;
287 } else {
288 env->regs[regno] = val;
289 }
290}
291
8984bd2e
PB
292/* ??? Flag setting arithmetic is awkward because we need to do comparisons.
293 The only way to do that in TCG is a conditional branch, which clobbers
294 all our temporaries. For now implement these as helper functions. */
295
296uint32_t HELPER (add_cc)(uint32_t a, uint32_t b)
297{
298 uint32_t result;
37f9ba46 299 result = a + b;
6fbe23d5 300 env->NF = env->ZF = result;
8984bd2e
PB
301 env->CF = result < a;
302 env->VF = (a ^ b ^ -1) & (a ^ result);
303 return result;
304}
305
306uint32_t HELPER(adc_cc)(uint32_t a, uint32_t b)
307{
308 uint32_t result;
309 if (!env->CF) {
310 result = a + b;
311 env->CF = result < a;
312 } else {
313 result = a + b + 1;
314 env->CF = result <= a;
315 }
316 env->VF = (a ^ b ^ -1) & (a ^ result);
6fbe23d5 317 env->NF = env->ZF = result;
8984bd2e
PB
318 return result;
319}
320
321uint32_t HELPER(sub_cc)(uint32_t a, uint32_t b)
322{
323 uint32_t result;
324 result = a - b;
6fbe23d5 325 env->NF = env->ZF = result;
8984bd2e
PB
326 env->CF = a >= b;
327 env->VF = (a ^ b) & (a ^ result);
328 return result;
329}
330
331uint32_t HELPER(sbc_cc)(uint32_t a, uint32_t b)
332{
333 uint32_t result;
334 if (!env->CF) {
335 result = a - b - 1;
336 env->CF = a > b;
337 } else {
338 result = a - b;
339 env->CF = a >= b;
340 }
341 env->VF = (a ^ b) & (a ^ result);
6fbe23d5 342 env->NF = env->ZF = result;
8984bd2e
PB
343 return result;
344}
345
346/* Similarly for variable shift instructions. */
347
348uint32_t HELPER(shl)(uint32_t x, uint32_t i)
349{
350 int shift = i & 0xff;
351 if (shift >= 32)
352 return 0;
353 return x << shift;
354}
355
356uint32_t HELPER(shr)(uint32_t x, uint32_t i)
357{
358 int shift = i & 0xff;
359 if (shift >= 32)
360 return 0;
361 return (uint32_t)x >> shift;
362}
363
364uint32_t HELPER(sar)(uint32_t x, uint32_t i)
365{
366 int shift = i & 0xff;
367 if (shift >= 32)
368 shift = 31;
369 return (int32_t)x >> shift;
370}
371
8984bd2e
PB
372uint32_t HELPER(shl_cc)(uint32_t x, uint32_t i)
373{
374 int shift = i & 0xff;
375 if (shift >= 32) {
376 if (shift == 32)
377 env->CF = x & 1;
378 else
379 env->CF = 0;
380 return 0;
381 } else if (shift != 0) {
382 env->CF = (x >> (32 - shift)) & 1;
383 return x << shift;
384 }
385 return x;
386}
387
388uint32_t HELPER(shr_cc)(uint32_t x, uint32_t i)
389{
390 int shift = i & 0xff;
391 if (shift >= 32) {
392 if (shift == 32)
393 env->CF = (x >> 31) & 1;
394 else
395 env->CF = 0;
396 return 0;
397 } else if (shift != 0) {
398 env->CF = (x >> (shift - 1)) & 1;
399 return x >> shift;
400 }
401 return x;
402}
403
404uint32_t HELPER(sar_cc)(uint32_t x, uint32_t i)
405{
406 int shift = i & 0xff;
407 if (shift >= 32) {
408 env->CF = (x >> 31) & 1;
409 return (int32_t)x >> 31;
410 } else if (shift != 0) {
411 env->CF = (x >> (shift - 1)) & 1;
412 return (int32_t)x >> shift;
413 }
414 return x;
415}
416
417uint32_t HELPER(ror_cc)(uint32_t x, uint32_t i)
418{
419 int shift1, shift;
420 shift1 = i & 0xff;
421 shift = shift1 & 0x1f;
422 if (shift == 0) {
423 if (shift1 != 0)
424 env->CF = (x >> 31) & 1;
425 return x;
426 } else {
427 env->CF = (x >> (shift - 1)) & 1;
428 return ((uint32_t)x >> shift) | (x << (32 - shift));
429 }
430}