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f570c61e AG |
1 | #ifndef TARGET_ARM_TRANSLATE_H |
2 | #define TARGET_ARM_TRANSLATE_H | |
3 | ||
4 | /* internal defines */ | |
5 | typedef struct DisasContext { | |
6 | target_ulong pc; | |
14ade10f | 7 | uint32_t insn; |
f570c61e AG |
8 | int is_jmp; |
9 | /* Nonzero if this instruction has been conditionally skipped. */ | |
10 | int condjmp; | |
11 | /* The label that will be jumped to when the instruction is skipped. */ | |
12 | int condlabel; | |
13 | /* Thumb-2 conditional execution bits. */ | |
14 | int condexec_mask; | |
15 | int condexec_cond; | |
16 | struct TranslationBlock *tb; | |
17 | int singlestep_enabled; | |
18 | int thumb; | |
19 | int bswap_code; | |
20 | #if !defined(CONFIG_USER_ONLY) | |
21 | int user; | |
22 | #endif | |
23 | int vfp_enabled; | |
24 | int vec_len; | |
25 | int vec_stride; | |
3926cc84 | 26 | int aarch64; |
f570c61e AG |
27 | } DisasContext; |
28 | ||
3407ad0e AG |
29 | extern TCGv_ptr cpu_env; |
30 | ||
14ade10f AG |
31 | #ifdef TARGET_AARCH64 |
32 | void a64_translate_init(void); | |
33 | void disas_a64_insn(CPUARMState *env, DisasContext *s); | |
34 | void gen_a64_set_pc_im(uint64_t val); | |
35 | #else | |
36 | static inline void a64_translate_init(void) | |
37 | { | |
38 | } | |
39 | ||
40 | static inline void disas_a64_insn(CPUARMState *env, DisasContext *s) | |
41 | { | |
42 | } | |
43 | ||
44 | static inline void gen_a64_set_pc_im(uint64_t val) | |
45 | { | |
46 | } | |
47 | #endif | |
48 | ||
f570c61e | 49 | #endif /* TARGET_ARM_TRANSLATE_H */ |