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81fdc5f8 TS |
1 | /* |
2 | * CRIS helper routines. | |
3 | * | |
4 | * Copyright (c) 2007 AXIS Communications AB | |
5 | * Written by Edgar E. Iglesias. | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
21 | ||
22 | #include <stdio.h> | |
23 | #include <string.h> | |
24 | ||
25 | #include "config.h" | |
26 | #include "cpu.h" | |
27 | #include "mmu.h" | |
28 | #include "exec-all.h" | |
941db528 | 29 | #include "host-utils.h" |
81fdc5f8 | 30 | |
e62b5b13 EI |
31 | #define D(x) |
32 | ||
81fdc5f8 TS |
33 | #if defined(CONFIG_USER_ONLY) |
34 | ||
35 | void do_interrupt (CPUState *env) | |
36 | { | |
bbaf29c7 EI |
37 | env->exception_index = -1; |
38 | env->pregs[PR_ERP] = env->pc; | |
81fdc5f8 TS |
39 | } |
40 | ||
41 | int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw, | |
6ebbf390 | 42 | int mmu_idx, int is_softmmu) |
81fdc5f8 | 43 | { |
bbaf29c7 EI |
44 | env->exception_index = 0xaa; |
45 | env->debug1 = address; | |
46 | cpu_dump_state(env, stderr, fprintf, 0); | |
47 | env->pregs[PR_ERP] = env->pc; | |
48 | return 1; | |
81fdc5f8 TS |
49 | } |
50 | ||
51 | target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) | |
52 | { | |
bbaf29c7 | 53 | return addr; |
81fdc5f8 TS |
54 | } |
55 | ||
56 | #else /* !CONFIG_USER_ONLY */ | |
57 | ||
e62b5b13 EI |
58 | |
59 | static void cris_shift_ccs(CPUState *env) | |
60 | { | |
61 | uint32_t ccs; | |
62 | /* Apply the ccs shift. */ | |
63 | ccs = env->pregs[PR_CCS]; | |
b41f7df0 | 64 | ccs = ((ccs & 0xc0000000) | ((ccs << 12) >> 2)) & ~0x3ff; |
e62b5b13 EI |
65 | env->pregs[PR_CCS] = ccs; |
66 | } | |
67 | ||
81fdc5f8 | 68 | int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
6ebbf390 | 69 | int mmu_idx, int is_softmmu) |
81fdc5f8 TS |
70 | { |
71 | struct cris_mmu_result_t res; | |
72 | int prot, miss; | |
e62b5b13 | 73 | int r = -1; |
81fdc5f8 TS |
74 | target_ulong phy; |
75 | ||
b41f7df0 | 76 | D(printf ("%s addr=%x pc=%x rw=%x\n", __func__, address, env->pc, rw)); |
81fdc5f8 TS |
77 | address &= TARGET_PAGE_MASK; |
78 | prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; | |
6ebbf390 | 79 | miss = cris_mmu_translate(&res, env, address, rw, mmu_idx); |
81fdc5f8 TS |
80 | if (miss) |
81 | { | |
e62b5b13 EI |
82 | env->exception_index = EXCP_MMU_FAULT; |
83 | env->fault_vector = res.bf_vec; | |
84 | r = 1; | |
81fdc5f8 TS |
85 | } |
86 | else | |
87 | { | |
88 | phy = res.phy; | |
b41f7df0 EI |
89 | prot = res.prot; |
90 | address &= TARGET_PAGE_MASK; | |
e62b5b13 | 91 | r = tlb_set_page(env, address, phy, prot, mmu_idx, is_softmmu); |
81fdc5f8 | 92 | } |
b41f7df0 EI |
93 | if (r > 0) |
94 | D(fprintf(logfile, "%s returns %d irqreq=%x addr=%x ismmu=%d vec=%x\n", | |
95 | __func__, r, env->interrupt_request, | |
96 | address, is_softmmu, res.bf_vec)); | |
e62b5b13 | 97 | return r; |
81fdc5f8 TS |
98 | } |
99 | ||
100 | void do_interrupt(CPUState *env) | |
101 | { | |
e62b5b13 | 102 | int ex_vec = -1; |
81fdc5f8 | 103 | |
e62b5b13 | 104 | D(fprintf (stderr, "exception index=%d interrupt_req=%d\n", |
b41f7df0 EI |
105 | env->exception_index, |
106 | env->interrupt_request)); | |
81fdc5f8 TS |
107 | |
108 | switch (env->exception_index) | |
109 | { | |
110 | case EXCP_BREAK: | |
e62b5b13 EI |
111 | /* These exceptions are genereated by the core itself. |
112 | ERP should point to the insn following the brk. */ | |
113 | ex_vec = env->trap_vector; | |
9004627f | 114 | env->pregs[PR_ERP] = env->pc + 2; |
81fdc5f8 | 115 | break; |
e62b5b13 EI |
116 | |
117 | case EXCP_MMU_FAULT: | |
e62b5b13 | 118 | ex_vec = env->fault_vector; |
b41f7df0 | 119 | env->pregs[PR_ERP] = env->pc; |
81fdc5f8 TS |
120 | break; |
121 | ||
122 | default: | |
b41f7df0 EI |
123 | /* Is the core accepting interrupts? */ |
124 | if (!(env->pregs[PR_CCS] & I_FLAG)) | |
125 | return; | |
126 | /* The interrupt controller gives us the | |
127 | vector. */ | |
128 | ex_vec = env->interrupt_vector; | |
129 | /* Normal interrupts are taken between | |
130 | TB's. env->pc is valid here. */ | |
131 | env->pregs[PR_ERP] = env->pc; | |
132 | break; | |
133 | } | |
134 | ||
135 | if ((env->pregs[PR_CCS] & U_FLAG)) { | |
136 | D(fprintf(logfile, "excp isr=%x PC=%x ERP=%x pid=%x ccs=%x cc=%d %x\n", | |
137 | ex_vec, env->pc, | |
138 | env->pregs[PR_ERP], env->pregs[PR_PID], | |
139 | env->pregs[PR_CCS], | |
140 | env->cc_op, env->cc_mask)); | |
81fdc5f8 | 141 | } |
b41f7df0 | 142 | |
e62b5b13 | 143 | env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); |
b41f7df0 EI |
144 | |
145 | if (env->pregs[PR_CCS] & U_FLAG) { | |
146 | /* Swap stack pointers. */ | |
147 | env->pregs[PR_USP] = env->regs[R_SP]; | |
148 | env->regs[R_SP] = env->ksp; | |
149 | } | |
150 | ||
151 | /* Apply the CRIS CCS shift. Clears U if set. */ | |
e62b5b13 | 152 | cris_shift_ccs(env); |
b41f7df0 EI |
153 | D(fprintf (logfile, "%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", |
154 | __func__, env->pc, ex_vec, | |
155 | env->pregs[PR_CCS], | |
156 | env->pregs[PR_PID], | |
157 | env->pregs[PR_ERP])); | |
81fdc5f8 TS |
158 | } |
159 | ||
160 | target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) | |
161 | { | |
81fdc5f8 TS |
162 | uint32_t phy = addr; |
163 | struct cris_mmu_result_t res; | |
164 | int miss; | |
165 | miss = cris_mmu_translate(&res, env, addr, 0, 0); | |
166 | if (!miss) | |
167 | phy = res.phy; | |
e62b5b13 | 168 | D(fprintf(stderr, "%s %x -> %x\n", __func__, addr, phy)); |
81fdc5f8 TS |
169 | return phy; |
170 | } | |
171 | #endif |