[qemu.git] / target-cris / op_helper.c

/*
 *  CRIS helper routines
 *
 *  Copyright (c) 2007 AXIS Communications
 *  Written by Edgar E. Iglesias
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <assert.h>
#include "exec.h"
#include "mmu.h"
#include "helper.h"

#define MMUSUFFIX _mmu

#define SHIFT 0
#include "softmmu_template.h"

#define SHIFT 1
#include "softmmu_template.h"

#define SHIFT 2
#include "softmmu_template.h"

#define SHIFT 3
#include "softmmu_template.h"

#define D(x)

/* Try to fill the TLB and return an exception if error. If retaddr is
   NULL, it means that the function was called in C code (i.e. not
   from generated code or from helper.c) */
/* XXX: fix it to restore all registers */
void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
{
    TranslationBlock *tb;
    CPUState *saved_env;
    unsigned long pc;
    int ret;

    /* XXX: hack to restore env in all cases, even if not called from
       generated code */
    saved_env = env;
    env = cpu_single_env;

    D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__, 
	     env->pc, env->debug1, retaddr));
    ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
    if (__builtin_expect(ret, 0)) {
        if (retaddr) {
            /* now we have a real cpu fault */
            pc = (unsigned long)retaddr;
            tb = tb_find_pc(pc);
            if (tb) {
                /* the PC is inside the translated code. It means that we have
                   a virtual CPU fault */
                cpu_restore_state(tb, env, pc, NULL);

		/* Evaluate flags after retranslation.  */
                helper_top_evaluate_flags();
            }
        }
        cpu_loop_exit();
    }
    env = saved_env;
}

void helper_raise_exception(uint32_t index)
{
	env->exception_index = index;
	cpu_loop_exit();
}

void helper_tlb_flush_pid(uint32_t pid)
{
#if !defined(CONFIG_USER_ONLY)
	cris_mmu_flush_pid(env, pid);
#endif
}

void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
{
	(fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1)); 
}

void helper_dummy(void)
{

}

/* Used by the tlb decoder.  */
#define EXTRACT_FIELD(src, start, end) \
	    (((src) >> start) & ((1 << (end - start + 1)) - 1))

void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
{
	uint32_t srs;
	srs = env->pregs[PR_SRS];
	srs &= 3;
	env->sregs[srs][sreg] = env->regs[reg];

#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2) {
		if (sreg == 6) {
			/* Writes to tlb-hi write to mm_cause as a side 
			   effect.  */
			env->sregs[SFR_RW_MM_TLB_HI] = T0;
			env->sregs[SFR_R_MM_CAUSE] = T0;
		}
		else if (sreg == 5) {
			uint32_t set;
			uint32_t idx;
			uint32_t lo, hi;
			uint32_t vaddr;
			int tlb_v;

			idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
			set >>= 4;
			set &= 3;

			idx &= 15;
			/* We've just made a write to tlb_lo.  */
			lo = env->sregs[SFR_RW_MM_TLB_LO];
			/* Writes are done via r_mm_cause.  */
			hi = env->sregs[SFR_R_MM_CAUSE];

			vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
					      13, 31);
			vaddr <<= TARGET_PAGE_BITS;
			tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
					    3, 3);
			env->tlbsets[srs - 1][set][idx].lo = lo;
			env->tlbsets[srs - 1][set][idx].hi = hi;

			D(fprintf(logfile, 
				  "tlb flush vaddr=%x v=%d pc=%x\n", 
				  vaddr, tlb_v, env->pc));
			tlb_flush_page(env, vaddr);
		}
	}
#endif
}

void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
{
	uint32_t srs;
	env->pregs[PR_SRS] &= 3;
	srs = env->pregs[PR_SRS];
	
#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2)
	{
		uint32_t set;
		uint32_t idx;
		uint32_t lo, hi;

		idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
		set >>= 4;
		set &= 3;
		idx &= 15;

		/* Update the mirror regs.  */
		hi = env->tlbsets[srs - 1][set][idx].hi;
		lo = env->tlbsets[srs - 1][set][idx].lo;
		env->sregs[SFR_RW_MM_TLB_HI] = hi;
		env->sregs[SFR_RW_MM_TLB_LO] = lo;
	}
#endif
	env->regs[reg] = env->sregs[srs][sreg];
	RETURN();
}

static void cris_ccs_rshift(CPUState *env)
{
	uint32_t ccs;

	/* Apply the ccs shift.  */
	ccs = env->pregs[PR_CCS];
	ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
	if (ccs & U_FLAG)
	{
		/* Enter user mode.  */
		env->ksp = env->regs[R_SP];
		env->regs[R_SP] = env->pregs[PR_USP];
	}

	env->pregs[PR_CCS] = ccs;
}

void helper_rfe(void)
{
	D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget));

	cris_ccs_rshift(env);

	/* RFE sets the P_FLAG only if the R_FLAG is not set.  */
	if (!(env->pregs[PR_CCS] & R_FLAG))
		env->pregs[PR_CCS] |= P_FLAG;
}

void helper_store(uint32_t a0)
{
	if (env->pregs[PR_CCS] & P_FLAG )
	{
		cpu_abort(env, "cond_store_failed! pc=%x a0=%x\n",
			  env->pc, a0);
	}
}

void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
                          int is_asi)
{
	D(printf("%s addr=%x w=%d ex=%d asi=%d\n", 
		__func__, addr, is_write, is_exec, is_asi));
}

static void evaluate_flags_writeback(uint32_t flags)
{
	int x;

	/* Extended arithmetics, leave the z flag alone.  */
	x = env->cc_x;
	if ((x || env->cc_op == CC_OP_ADDC)
	    && flags & Z_FLAG)
		env->cc_mask &= ~Z_FLAG;

	/* all insn clear the x-flag except setf or clrf.  */
	env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG);
	flags &= env->cc_mask;
	env->pregs[PR_CCS] |= flags;
}

void helper_evaluate_flags_muls(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;
	int64_t tmp;
	int32_t mof;
	int dneg;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	dneg = ((int32_t)res) < 0;

	mof = env->pregs[PR_MOF];
	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp < 0)
		flags |= N_FLAG;
	if ((dneg && mof != -1)
	    || (!dneg && mof != 0))
		flags |= V_FLAG;
	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_mulu(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;
	uint64_t tmp;
	uint32_t mof;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	mof = env->pregs[PR_MOF];
	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp >> 63)
		flags |= N_FLAG;
	if (mof)
		flags |= V_FLAG;

	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_mcp(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (((src & 0x80000000L) == 0L)
		    && ((dst & 0x80000000L) == 0L))
		{
			flags |= V_FLAG;
		}
		else if (((src & 0x80000000L) != 0L) &&
			 ((dst & 0x80000000L) != 0L))
		{
			flags |= R_FLAG;
		}
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (((src & 0x80000000L) != 0L)
		    && ((dst & 0x80000000L) != 0L))
			flags |= V_FLAG;
		if ((dst & 0x80000000L) != 0L
		    || (src & 0x80000000L) != 0L)
			flags |= R_FLAG;
	}

	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_alu_4(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;

	/* Reconstruct the result.  */
	switch (env->cc_op)
	{
		case CC_OP_SUB:
			res = dst - src;
			break;
		case CC_OP_ADD:
			res = dst + src;
			break;
		default:
			res = env->cc_result;
			break;
	}

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (((src & 0x80000000L) == 0L)
		    && ((dst & 0x80000000L) == 0L))
		{
			flags |= V_FLAG;
		}
		else if (((src & 0x80000000L) != 0L) &&
			 ((dst & 0x80000000L) != 0L))
		{
			flags |= C_FLAG;
		}
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (((src & 0x80000000L) != 0L)
		    && ((dst & 0x80000000L) != 0L))
			flags |= V_FLAG;
		if ((dst & 0x80000000L) != 0L
		    || (src & 0x80000000L) != 0L)
			flags |= C_FLAG;
	}

	if (env->cc_op == CC_OP_SUB
	    || env->cc_op == CC_OP_CMP) {
		flags ^= C_FLAG;
	}
	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_move_4 (void)
{
	uint32_t res;
	uint32_t flags = 0;

	res = env->cc_result;

	if ((int32_t)res < 0)
		flags |= N_FLAG;
	else if (res == 0L)
		flags |= Z_FLAG;

	evaluate_flags_writeback(flags);
}
void  helper_evaluate_flags_move_2 (void)
{
	uint32_t src;
	uint32_t flags = 0;
	uint16_t res;

	src = env->cc_src;
	res = env->cc_result;

	if ((int16_t)res < 0L)
		flags |= N_FLAG;
	else if (res == 0)
		flags |= Z_FLAG;

	evaluate_flags_writeback(flags);
}

/* TODO: This is expensive. We could split things up and only evaluate part of
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
void helper_evaluate_flags (void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	/* Now, evaluate the flags. This stuff is based on
	   Per Zander's CRISv10 simulator.  */
	switch (env->cc_size)
	{
		case 1:
			if ((res & 0x80L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80L) == 0L)
				    && ((dst & 0x80L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80L) != 0L)
					 && ((dst & 0x80L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x80L) != 0L)
				    && ((dst & 0x80L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x80L) != 0L
				    || (src & 0x80L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 2:
			if ((res & 0x8000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x8000L) == 0L)
				    && ((dst & 0x8000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x8000L) != 0L)
					 && ((dst & 0x8000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x8000L) != 0L)
				    && ((dst & 0x8000L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x8000L) != 0L
				    || (src & 0x8000L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 4:
			if ((res & 0x80000000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80000000L) == 0L)
				    && ((dst & 0x80000000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80000000L) != 0L) &&
					 ((dst & 0x80000000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if (res == 0L)
					flags |= Z_FLAG;
				if (((src & 0x80000000L) != 0L)
				    && ((dst & 0x80000000L) != 0L))
					flags |= V_FLAG;
				if ((dst & 0x80000000L) != 0L
				    || (src & 0x80000000L) != 0L)
					flags |= C_FLAG;
			}
			break;
		default:
			break;
	}

	if (env->cc_op == CC_OP_SUB
	    || env->cc_op == CC_OP_CMP) {
		flags ^= C_FLAG;
	}
	evaluate_flags_writeback(flags);
}

void helper_top_evaluate_flags(void)
{
	switch (env->cc_op)
	{
		case CC_OP_MCP:
			helper_evaluate_flags_mcp();
			break;
		case CC_OP_MULS:
			helper_evaluate_flags_muls();
			break;
		case CC_OP_MULU:
			helper_evaluate_flags_mulu();
			break;
		case CC_OP_MOVE:
		case CC_OP_AND:
		case CC_OP_OR:
		case CC_OP_XOR:
		case CC_OP_ASR:
		case CC_OP_LSR:
		case CC_OP_LSL:
			switch (env->cc_size)
			{
				case 4:
					helper_evaluate_flags_move_4();
					break;
				case 2:
					helper_evaluate_flags_move_2();
					break;
				default:
					helper_evaluate_flags();
					break;
			}
			break;
		case CC_OP_FLAGS:
			/* live.  */
			break;
		default:
		{
			switch (env->cc_size)
			{
				case 4:
					helper_evaluate_flags_alu_4();
					break;
				default:
					helper_evaluate_flags();
					break;
			}
		}
		break;
	}
}
Commit	Line	Data
81fdc5f8 TS	1	/*
	2	* CRIS helper routines
	3	*
	4	* Copyright (c) 2007 AXIS Communications
	5	* Written by Edgar E. Iglesias
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
	22	#include <assert.h>
	23	#include "exec.h"
786c02f1	24	#include "mmu.h"
30abcfc7	25	#include "helper.h"
81fdc5f8 TS	26
81fdc5f8 TS	27	#define MMUSUFFIX _mmu
81fdc5f8 TS	28
	29	#define SHIFT 0
	30	#include "softmmu_template.h"
	31
	32	#define SHIFT 1
	33	#include "softmmu_template.h"
	34
	35	#define SHIFT 2
	36	#include "softmmu_template.h"
	37
	38	#define SHIFT 3
	39	#include "softmmu_template.h"
	40
786c02f1 EI	41	#define D(x)
786c02f1 EI	42
81fdc5f8 TS	43	/* Try to fill the TLB and return an exception if error. If retaddr is
	44	NULL, it means that the function was called in C code (i.e. not
	45	from generated code or from helper.c) */
	46	/* XXX: fix it to restore all registers */
6ebbf390	47	void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
81fdc5f8 TS	48	{
	49	TranslationBlock *tb;
	50	CPUState *saved_env;
44f8625d	51	unsigned long pc;
81fdc5f8 TS	52	int ret;
	53
	54	/* XXX: hack to restore env in all cases, even if not called from
	55	generated code */
	56	saved_env = env;
	57	env = cpu_single_env;
b41f7df0	58
ef29a70d EI	59	D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__,
ef29a70d EI	60	env->pc, env->debug1, retaddr));
6ebbf390	61	ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
81fdc5f8 TS	62	if (__builtin_expect(ret, 0)) {
	63	if (retaddr) {
	64	/* now we have a real cpu fault */
44f8625d	65	pc = (unsigned long)retaddr;
81fdc5f8 TS	66	tb = tb_find_pc(pc);
	67	if (tb) {
	68	/* the PC is inside the translated code. It means that we have
	69	a virtual CPU fault */
	70	cpu_restore_state(tb, env, pc, NULL);
30abcfc7 EI	71
	72	/* Evaluate flags after retranslation. */
	73	helper_top_evaluate_flags();
81fdc5f8 TS	74	}
	75	}
	76	cpu_loop_exit();
	77	}
	78	env = saved_env;
	79	}
	80
dceaf394	81	void helper_raise_exception(uint32_t index)
786c02f1	82	{
dceaf394 EI	83	env->exception_index = index;
dceaf394 EI	84	cpu_loop_exit();
786c02f1 EI	85	}
786c02f1 EI	86
cf1d97f0 EI	87	void helper_tlb_flush_pid(uint32_t pid)
	88	{
	89	#if !defined(CONFIG_USER_ONLY)
	90	cris_mmu_flush_pid(env, pid);
	91	#endif
	92	}
	93
30abcfc7	94	void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
b41f7df0 EI	95	{
	96	(fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1));
	97	}
	98
	99	void helper_dummy(void)
	100	{
	101
	102	}
	103
cf1d97f0 EI	104	/* Used by the tlb decoder. */
	105	#define EXTRACT_FIELD(src, start, end) \
	106	(((src) >> start) & ((1 << (end - start + 1)) - 1))
	107
dceaf394 EI	108	void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
	109	{
	110	uint32_t srs;
	111	srs = env->pregs[PR_SRS];
	112	srs &= 3;
	113	env->sregs[srs][sreg] = env->regs[reg];
	114
	115	#if !defined(CONFIG_USER_ONLY)
	116	if (srs == 1 \|\| srs == 2) {
	117	if (sreg == 6) {
	118	/* Writes to tlb-hi write to mm_cause as a side
	119	effect. */
	120	env->sregs[SFR_RW_MM_TLB_HI] = T0;
	121	env->sregs[SFR_R_MM_CAUSE] = T0;
	122	}
	123	else if (sreg == 5) {
	124	uint32_t set;
	125	uint32_t idx;
	126	uint32_t lo, hi;
	127	uint32_t vaddr;
cf1d97f0	128	int tlb_v;
dceaf394 EI	129
	130	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	131	set >>= 4;
	132	set &= 3;
	133
	134	idx &= 15;
	135	/* We've just made a write to tlb_lo. */
	136	lo = env->sregs[SFR_RW_MM_TLB_LO];
	137	/* Writes are done via r_mm_cause. */
	138	hi = env->sregs[SFR_R_MM_CAUSE];
cf1d97f0 EI	139
	140	vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
	141	13, 31);
	142	vaddr <<= TARGET_PAGE_BITS;
	143	tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
	144	3, 3);
dceaf394 EI	145	env->tlbsets[srs - 1][set][idx].lo = lo;
dceaf394 EI	146	env->tlbsets[srs - 1][set][idx].hi = hi;
cf1d97f0 EI	147
	148	D(fprintf(logfile,
	149	"tlb flush vaddr=%x v=%d pc=%x\n",
	150	vaddr, tlb_v, env->pc));
	151	tlb_flush_page(env, vaddr);
dceaf394 EI	152	}
	153	}
	154	#endif
	155	}
	156
	157	void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
	158	{
	159	uint32_t srs;
	160	env->pregs[PR_SRS] &= 3;
	161	srs = env->pregs[PR_SRS];
	162
	163	#if !defined(CONFIG_USER_ONLY)
	164	if (srs == 1 \|\| srs == 2)
	165	{
	166	uint32_t set;
	167	uint32_t idx;
	168	uint32_t lo, hi;
	169
	170	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	171	set >>= 4;
	172	set &= 3;
	173	idx &= 15;
	174
	175	/* Update the mirror regs. */
	176	hi = env->tlbsets[srs - 1][set][idx].hi;
	177	lo = env->tlbsets[srs - 1][set][idx].lo;
	178	env->sregs[SFR_RW_MM_TLB_HI] = hi;
	179	env->sregs[SFR_RW_MM_TLB_LO] = lo;
	180	}
	181	#endif
	182	env->regs[reg] = env->sregs[srs][sreg];
	183	RETURN();
	184	}
	185
	186	static void cris_ccs_rshift(CPUState *env)
	187	{
	188	uint32_t ccs;
	189
	190	/* Apply the ccs shift. */
	191	ccs = env->pregs[PR_CCS];
	192	ccs = (ccs & 0xc0000000) \| ((ccs & 0x0fffffff) >> 10);
	193	if (ccs & U_FLAG)
	194	{
	195	/* Enter user mode. */
	196	env->ksp = env->regs[R_SP];
	197	env->regs[R_SP] = env->pregs[PR_USP];
	198	}
	199
	200	env->pregs[PR_CCS] = ccs;
	201	}
	202
b41f7df0 EI	203	void helper_rfe(void)
	204	{
	205	D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
	206	env->pregs[PR_ERP], env->pregs[PR_PID],
	207	env->pregs[PR_CCS],
	208	env->btarget));
dceaf394 EI	209
	210	cris_ccs_rshift(env);
	211
	212	/* RFE sets the P_FLAG only if the R_FLAG is not set. */
	213	if (!(env->pregs[PR_CCS] & R_FLAG))
	214	env->pregs[PR_CCS] \|= P_FLAG;
b41f7df0 EI	215	}
	216
	217	void helper_store(uint32_t a0)
	218	{
	219	if (env->pregs[PR_CCS] & P_FLAG )
	220	{
	221	cpu_abort(env, "cond_store_failed! pc=%x a0=%x\n",
	222	env->pc, a0);
	223	}
	224	}
	225
81fdc5f8 TS	226	void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
	227	int is_asi)
	228	{
786c02f1 EI	229	D(printf("%s addr=%x w=%d ex=%d asi=%d\n",
786c02f1 EI	230	__func__, addr, is_write, is_exec, is_asi));
81fdc5f8	231	}
b41f7df0 EI	232
	233	static void evaluate_flags_writeback(uint32_t flags)
	234	{
	235	int x;
	236
	237	/* Extended arithmetics, leave the z flag alone. */
30abcfc7	238	x = env->cc_x;
b41f7df0 EI	239	if ((x \|\| env->cc_op == CC_OP_ADDC)
	240	&& flags & Z_FLAG)
	241	env->cc_mask &= ~Z_FLAG;
	242
	243	/* all insn clear the x-flag except setf or clrf. */
	244	env->pregs[PR_CCS] &= ~(env->cc_mask \| X_FLAG);
	245	flags &= env->cc_mask;
	246	env->pregs[PR_CCS] \|= flags;
b41f7df0 EI	247	}
	248
	249	void helper_evaluate_flags_muls(void)
	250	{
	251	uint32_t src;
	252	uint32_t dst;
	253	uint32_t res;
	254	uint32_t flags = 0;
dceaf394	255	int64_t tmp;
b41f7df0 EI	256	int32_t mof;
	257	int dneg;
	258
	259	src = env->cc_src;
	260	dst = env->cc_dest;
	261	res = env->cc_result;
	262
b41f7df0 EI	263	dneg = ((int32_t)res) < 0;
b41f7df0 EI	264
dceaf394 EI	265	mof = env->pregs[PR_MOF];
	266	tmp = mof;
	267	tmp <<= 32;
	268	tmp \|= res;
b41f7df0 EI	269	if (tmp == 0)
	270	flags \|= Z_FLAG;
	271	else if (tmp < 0)
	272	flags \|= N_FLAG;
	273	if ((dneg && mof != -1)
	274	\|\| (!dneg && mof != 0))
	275	flags \|= V_FLAG;
	276	evaluate_flags_writeback(flags);
	277	}
	278
	279	void helper_evaluate_flags_mulu(void)
	280	{
	281	uint32_t src;
	282	uint32_t dst;
	283	uint32_t res;
	284	uint32_t flags = 0;
dceaf394	285	uint64_t tmp;
b41f7df0 EI	286	uint32_t mof;
	287
	288	src = env->cc_src;
	289	dst = env->cc_dest;
	290	res = env->cc_result;
	291
dceaf394 EI	292	mof = env->pregs[PR_MOF];
	293	tmp = mof;
	294	tmp <<= 32;
	295	tmp \|= res;
b41f7df0 EI	296	if (tmp == 0)
	297	flags \|= Z_FLAG;
	298	else if (tmp >> 63)
	299	flags \|= N_FLAG;
	300	if (mof)
	301	flags \|= V_FLAG;
	302
	303	evaluate_flags_writeback(flags);
	304	}
	305
	306	void helper_evaluate_flags_mcp(void)
	307	{
	308	uint32_t src;
	309	uint32_t dst;
	310	uint32_t res;
	311	uint32_t flags = 0;
	312
	313	src = env->cc_src;
	314	dst = env->cc_dest;
	315	res = env->cc_result;
	316
	317	if ((res & 0x80000000L) != 0L)
	318	{
	319	flags \|= N_FLAG;
	320	if (((src & 0x80000000L) == 0L)
	321	&& ((dst & 0x80000000L) == 0L))
	322	{
	323	flags \|= V_FLAG;
	324	}
	325	else if (((src & 0x80000000L) != 0L) &&
	326	((dst & 0x80000000L) != 0L))
	327	{
	328	flags \|= R_FLAG;
	329	}
	330	}
	331	else
	332	{
	333	if (res == 0L)
	334	flags \|= Z_FLAG;
	335	if (((src & 0x80000000L) != 0L)
	336	&& ((dst & 0x80000000L) != 0L))
	337	flags \|= V_FLAG;
	338	if ((dst & 0x80000000L) != 0L
	339	\|\| (src & 0x80000000L) != 0L)
	340	flags \|= R_FLAG;
	341	}
	342
	343	evaluate_flags_writeback(flags);
	344	}
	345
	346	void helper_evaluate_flags_alu_4(void)
	347	{
	348	uint32_t src;
	349	uint32_t dst;
	350	uint32_t res;
	351	uint32_t flags = 0;
	352
	353	src = env->cc_src;
	354	dst = env->cc_dest;
30abcfc7 EI	355
	356	/* Reconstruct the result. */
	357	switch (env->cc_op)
	358	{
	359	case CC_OP_SUB:
	360	res = dst - src;
	361	break;
	362	case CC_OP_ADD:
	363	res = dst + src;
	364	break;
	365	default:
	366	res = env->cc_result;
	367	break;
	368	}
	369
	370	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
	371	src = ~src;
b41f7df0 EI	372
	373	if ((res & 0x80000000L) != 0L)
	374	{
	375	flags \|= N_FLAG;
	376	if (((src & 0x80000000L) == 0L)
	377	&& ((dst & 0x80000000L) == 0L))
	378	{
	379	flags \|= V_FLAG;
	380	}
	381	else if (((src & 0x80000000L) != 0L) &&
	382	((dst & 0x80000000L) != 0L))
	383	{
	384	flags \|= C_FLAG;
	385	}
	386	}
	387	else
	388	{
	389	if (res == 0L)
	390	flags \|= Z_FLAG;
	391	if (((src & 0x80000000L) != 0L)
	392	&& ((dst & 0x80000000L) != 0L))
	393	flags \|= V_FLAG;
	394	if ((dst & 0x80000000L) != 0L
	395	\|\| (src & 0x80000000L) != 0L)
	396	flags \|= C_FLAG;
	397	}
	398
	399	if (env->cc_op == CC_OP_SUB
	400	\|\| env->cc_op == CC_OP_CMP) {
	401	flags ^= C_FLAG;
	402	}
	403	evaluate_flags_writeback(flags);
	404	}
	405
	406	void helper_evaluate_flags_move_4 (void)
	407	{
b41f7df0 EI	408	uint32_t res;
	409	uint32_t flags = 0;
	410
b41f7df0 EI	411	res = env->cc_result;
	412
	413	if ((int32_t)res < 0)
	414	flags \|= N_FLAG;
	415	else if (res == 0L)
	416	flags \|= Z_FLAG;
	417
	418	evaluate_flags_writeback(flags);
	419	}
	420	void helper_evaluate_flags_move_2 (void)
	421	{
	422	uint32_t src;
	423	uint32_t flags = 0;
	424	uint16_t res;
	425
	426	src = env->cc_src;
	427	res = env->cc_result;
	428
	429	if ((int16_t)res < 0L)
	430	flags \|= N_FLAG;
	431	else if (res == 0)
	432	flags \|= Z_FLAG;
	433
	434	evaluate_flags_writeback(flags);
	435	}
	436
	437	/* TODO: This is expensive. We could split things up and only evaluate part of
	438	CCR on a need to know basis. For now, we simply re-evaluate everything. */
	439	void helper_evaluate_flags (void)
	440	{
	441	uint32_t src;
	442	uint32_t dst;
	443	uint32_t res;
	444	uint32_t flags = 0;
	445
	446	src = env->cc_src;
	447	dst = env->cc_dest;
	448	res = env->cc_result;
	449
30abcfc7 EI	450	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
30abcfc7 EI	451	src = ~src;
b41f7df0 EI	452
	453	/* Now, evaluate the flags. This stuff is based on
	454	Per Zander's CRISv10 simulator. */
	455	switch (env->cc_size)
	456	{
	457	case 1:
	458	if ((res & 0x80L) != 0L)
	459	{
	460	flags \|= N_FLAG;
	461	if (((src & 0x80L) == 0L)
	462	&& ((dst & 0x80L) == 0L))
	463	{
	464	flags \|= V_FLAG;
	465	}
	466	else if (((src & 0x80L) != 0L)
	467	&& ((dst & 0x80L) != 0L))
	468	{
	469	flags \|= C_FLAG;
	470	}
	471	}
	472	else
	473	{
	474	if ((res & 0xFFL) == 0L)
	475	{
	476	flags \|= Z_FLAG;
	477	}
	478	if (((src & 0x80L) != 0L)
	479	&& ((dst & 0x80L) != 0L))
	480	{
	481	flags \|= V_FLAG;
	482	}
	483	if ((dst & 0x80L) != 0L
	484	\|\| (src & 0x80L) != 0L)
	485	{
	486	flags \|= C_FLAG;
	487	}
	488	}
	489	break;
	490	case 2:
	491	if ((res & 0x8000L) != 0L)
	492	{
	493	flags \|= N_FLAG;
	494	if (((src & 0x8000L) == 0L)
	495	&& ((dst & 0x8000L) == 0L))
	496	{
	497	flags \|= V_FLAG;
	498	}
	499	else if (((src & 0x8000L) != 0L)
	500	&& ((dst & 0x8000L) != 0L))
	501	{
	502	flags \|= C_FLAG;
	503	}
	504	}
	505	else
	506	{
	507	if ((res & 0xFFFFL) == 0L)
	508	{
	509	flags \|= Z_FLAG;
	510	}
	511	if (((src & 0x8000L) != 0L)
	512	&& ((dst & 0x8000L) != 0L))
	513	{
	514	flags \|= V_FLAG;
	515	}
516	if ((dst & 0x8000L) != 0L
517	\|\| (src & 0x8000L) != 0L)
518	{
519	flags \|= C_FLAG;
520	}
521	}
522	break;
523	case 4:
524	if ((res & 0x80000000L) != 0L)
525	{
526	flags \|= N_FLAG;
527	if (((src & 0x80000000L) == 0L)
528	&& ((dst & 0x80000000L) == 0L))
529	{
530	flags \|= V_FLAG;
531	}
532	else if (((src & 0x80000000L) != 0L) &&
533	((dst & 0x80000000L) != 0L))
534	{
535	flags \|= C_FLAG;
536	}
537	}
538	else
539	{
540	if (res == 0L)
541	flags \|= Z_FLAG;
542	if (((src & 0x80000000L) != 0L)
543	&& ((dst & 0x80000000L) != 0L))
544	flags \|= V_FLAG;
545	if ((dst & 0x80000000L) != 0L
546	\|\| (src & 0x80000000L) != 0L)
547	flags \|= C_FLAG;
548	}
549	break;
550	default:
551	break;
552	}
553
554	if (env->cc_op == CC_OP_SUB
555	\|\| env->cc_op == CC_OP_CMP) {
556	flags ^= C_FLAG;
557	}
558	evaluate_flags_writeback(flags);
559	}
30abcfc7 EI	560
	561	void helper_top_evaluate_flags(void)
	562	{
	563	switch (env->cc_op)
	564	{
	565	case CC_OP_MCP:
	566	helper_evaluate_flags_mcp();
	567	break;
	568	case CC_OP_MULS:
	569	helper_evaluate_flags_muls();
	570	break;
	571	case CC_OP_MULU:
	572	helper_evaluate_flags_mulu();
	573	break;
	574	case CC_OP_MOVE:
	575	case CC_OP_AND:
	576	case CC_OP_OR:
	577	case CC_OP_XOR:
	578	case CC_OP_ASR:
	579	case CC_OP_LSR:
	580	case CC_OP_LSL:
	581	switch (env->cc_size)
	582	{
	583	case 4:
	584	helper_evaluate_flags_move_4();
	585	break;
	586	case 2:
	587	helper_evaluate_flags_move_2();
	588	break;
	589	default:
	590	helper_evaluate_flags();
	591	break;
	592	}
	593	break;
	594	case CC_OP_FLAGS:
	595	/* live. */
	596	break;
	597	default:
	598	{
	599	switch (env->cc_size)
	600	{
	601	case 4:
	602	helper_evaluate_flags_alu_4();
	603	break;
	604	default:
	605	helper_evaluate_flags();
	606	break;
	607	}
	608	}
	609	break;
	610	}
	611	}