[qemu.git] / target-i386 / exec.h

/*
 *  i386 execution defines 
 *
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#include "config.h"
#include "dyngen-exec.h"

/* XXX: factorize this mess */
#ifdef TARGET_X86_64
#define TARGET_LONG_BITS 64
#else
#define TARGET_LONG_BITS 32
#endif

#include "cpu-defs.h"

/* at least 4 register variables are defined */
register struct CPUX86State *env asm(AREG0);

#if TARGET_LONG_BITS > HOST_LONG_BITS

/* no registers can be used */
#define T0 (env->t0)
#define T1 (env->t1)
#define T2 (env->t2)

#else

/* XXX: use unsigned long instead of target_ulong - better code will
   be generated for 64 bit CPUs */
register target_ulong T0 asm(AREG1);
register target_ulong T1 asm(AREG2);
register target_ulong T2 asm(AREG3);

/* if more registers are available, we define some registers too */
#ifdef AREG4
register target_ulong EAX asm(AREG4);
#define reg_EAX
#endif

#ifdef AREG5
register target_ulong ESP asm(AREG5);
#define reg_ESP
#endif

#ifdef AREG6
register target_ulong EBP asm(AREG6);
#define reg_EBP
#endif

#ifdef AREG7
register target_ulong ECX asm(AREG7);
#define reg_ECX
#endif

#ifdef AREG8
register target_ulong EDX asm(AREG8);
#define reg_EDX
#endif

#ifdef AREG9
register target_ulong EBX asm(AREG9);
#define reg_EBX
#endif

#ifdef AREG10
register target_ulong ESI asm(AREG10);
#define reg_ESI
#endif

#ifdef AREG11
register target_ulong EDI asm(AREG11);
#define reg_EDI
#endif

#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */

#define A0 T2

extern FILE *logfile;
extern int loglevel;

#ifndef reg_EAX
#define EAX (env->regs[R_EAX])
#endif
#ifndef reg_ECX
#define ECX (env->regs[R_ECX])
#endif
#ifndef reg_EDX
#define EDX (env->regs[R_EDX])
#endif
#ifndef reg_EBX
#define EBX (env->regs[R_EBX])
#endif
#ifndef reg_ESP
#define ESP (env->regs[R_ESP])
#endif
#ifndef reg_EBP
#define EBP (env->regs[R_EBP])
#endif
#ifndef reg_ESI
#define ESI (env->regs[R_ESI])
#endif
#ifndef reg_EDI
#define EDI (env->regs[R_EDI])
#endif
#define EIP  (env->eip)
#define DF  (env->df)

#define CC_SRC (env->cc_src)
#define CC_DST (env->cc_dst)
#define CC_OP  (env->cc_op)

/* float macros */
#define FT0    (env->ft0)
#define ST0    (env->fpregs[env->fpstt].d)
#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
#define ST1    ST(1)

#ifdef USE_FP_CONVERT
#define FP_CONVERT  (env->fp_convert)
#endif

#include "cpu.h"
#include "exec-all.h"

typedef struct CCTable {
    int (*compute_all)(void); /* return all the flags */
    int (*compute_c)(void);  /* return the C flag */
} CCTable;

extern CCTable cc_table[];

void load_seg(int seg_reg, int selector);
void helper_ljmp_protected_T0_T1(int next_eip);
void helper_lcall_real_T0_T1(int shift, int next_eip);
void helper_lcall_protected_T0_T1(int shift, int next_eip);
void helper_iret_real(int shift);
void helper_iret_protected(int shift, int next_eip);
void helper_lret_protected(int shift, int addend);
void helper_lldt_T0(void);
void helper_ltr_T0(void);
void helper_movl_crN_T0(int reg);
void helper_movl_drN_T0(int reg);
void helper_invlpg(unsigned int addr);
void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, 
                             int is_write, int is_user, int is_softmmu);
void tlb_fill(target_ulong addr, int is_write, int is_user, 
              void *retaddr);
void __hidden cpu_lock(void);
void __hidden cpu_unlock(void);
void do_interrupt(int intno, int is_int, int error_code, 
                  target_ulong next_eip, int is_hw);
void do_interrupt_user(int intno, int is_int, int error_code, 
                       target_ulong next_eip);
void raise_interrupt(int intno, int is_int, int error_code, 
                     int next_eip_addend);
void raise_exception_err(int exception_index, int error_code);
void raise_exception(int exception_index);
void __hidden cpu_loop_exit(void);

void OPPROTO op_movl_eflags_T0(void);
void OPPROTO op_movl_T0_eflags(void);
void helper_divl_EAX_T0(void);
void helper_idivl_EAX_T0(void);
void helper_mulq_EAX_T0(void);
void helper_imulq_EAX_T0(void);
void helper_imulq_T0_T1(void);
void helper_divq_EAX_T0(void);
void helper_idivq_EAX_T0(void);
void helper_cmpxchg8b(void);
void helper_cpuid(void);
void helper_enter_level(int level, int data32);
void helper_sysenter(void);
void helper_sysexit(void);
void helper_syscall(int next_eip_addend);
void helper_sysret(int dflag);
void helper_rdtsc(void);
void helper_rdmsr(void);
void helper_wrmsr(void);
void helper_lsl(void);
void helper_lar(void);
void helper_verr(void);
void helper_verw(void);

void check_iob_T0(void);
void check_iow_T0(void);
void check_iol_T0(void);
void check_iob_DX(void);
void check_iow_DX(void);
void check_iol_DX(void);

/* XXX: move that to a generic header */
#if !defined(CONFIG_USER_ONLY)

#define ldul_user ldl_user
#define ldul_kernel ldl_kernel

#define ACCESS_TYPE 0
#define MEMSUFFIX _kernel
#define DATA_SIZE 1
#include "softmmu_header.h"

#define DATA_SIZE 2
#include "softmmu_header.h"

#define DATA_SIZE 4
#include "softmmu_header.h"

#define DATA_SIZE 8
#include "softmmu_header.h"
#undef ACCESS_TYPE
#undef MEMSUFFIX

#define ACCESS_TYPE 1
#define MEMSUFFIX _user
#define DATA_SIZE 1
#include "softmmu_header.h"

#define DATA_SIZE 2
#include "softmmu_header.h"

#define DATA_SIZE 4
#include "softmmu_header.h"

#define DATA_SIZE 8
#include "softmmu_header.h"
#undef ACCESS_TYPE
#undef MEMSUFFIX

/* these access are slower, they must be as rare as possible */
#define ACCESS_TYPE 2
#define MEMSUFFIX _data
#define DATA_SIZE 1
#include "softmmu_header.h"

#define DATA_SIZE 2
#include "softmmu_header.h"

#define DATA_SIZE 4
#include "softmmu_header.h"

#define DATA_SIZE 8
#include "softmmu_header.h"
#undef ACCESS_TYPE
#undef MEMSUFFIX

#define ldub(p) ldub_data(p)
#define ldsb(p) ldsb_data(p)
#define lduw(p) lduw_data(p)
#define ldsw(p) ldsw_data(p)
#define ldl(p) ldl_data(p)
#define ldq(p) ldq_data(p)

#define stb(p, v) stb_data(p, v)
#define stw(p, v) stw_data(p, v)
#define stl(p, v) stl_data(p, v)
#define stq(p, v) stq_data(p, v)

static inline double ldfq(target_ulong ptr)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.i = ldq(ptr);
    return u.d;
}

static inline void stfq(target_ulong ptr, double v)
{
    union {
        double d;
        uint64_t i;
    } u;
    u.d = v;
    stq(ptr, u.i);
}

static inline float ldfl(target_ulong ptr)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.i = ldl(ptr);
    return u.f;
}

static inline void stfl(target_ulong ptr, float v)
{
    union {
        float f;
        uint32_t i;
    } u;
    u.f = v;
    stl(ptr, u.i);
}

#endif /* !defined(CONFIG_USER_ONLY) */

#ifdef USE_X86LDOUBLE
/* use long double functions */
#define floatx_to_int32 floatx80_to_int32
#define floatx_to_int64 floatx80_to_int64
#define floatx_abs floatx80_abs
#define floatx_chs floatx80_chs
#define floatx_round_to_int floatx80_round_to_int
#define sin sinl
#define cos cosl
#define sqrt sqrtl
#define pow powl
#define log logl
#define tan tanl
#define atan2 atan2l
#define floor floorl
#define ceil ceill
#else
#define floatx_to_int32 float64_to_int32
#define floatx_to_int64 float64_to_int64
#define floatx_abs float64_abs
#define floatx_chs float64_chs
#define floatx_round_to_int float64_round_to_int
#endif

extern CPU86_LDouble sin(CPU86_LDouble x);
extern CPU86_LDouble cos(CPU86_LDouble x);
extern CPU86_LDouble sqrt(CPU86_LDouble x);
extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
extern CPU86_LDouble log(CPU86_LDouble x);
extern CPU86_LDouble tan(CPU86_LDouble x);
extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
extern CPU86_LDouble floor(CPU86_LDouble x);
extern CPU86_LDouble ceil(CPU86_LDouble x);

#define RC_MASK         0xc00
#define RC_NEAR		0x000
#define RC_DOWN		0x400
#define RC_UP		0x800
#define RC_CHOP		0xc00

#define MAXTAN 9223372036854775808.0

#ifdef USE_X86LDOUBLE

/* only for x86 */
typedef union {
    long double d;
    struct {
        unsigned long long lower;
        unsigned short upper;
    } l;
} CPU86_LDoubleU;

/* the following deal with x86 long double-precision numbers */
#define MAXEXPD 0x7fff
#define EXPBIAS 16383
#define EXPD(fp)	(fp.l.upper & 0x7fff)
#define SIGND(fp)	((fp.l.upper) & 0x8000)
#define MANTD(fp)       (fp.l.lower)
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS

#else

/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
typedef union {
    double d;
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
    struct {
        uint32_t lower;
        int32_t upper;
    } l;
#else
    struct {
        int32_t upper;
        uint32_t lower;
    } l;
#endif
#ifndef __arm__
    int64_t ll;
#endif
} CPU86_LDoubleU;

/* the following deal with IEEE double-precision numbers */
#define MAXEXPD 0x7ff
#define EXPBIAS 1023
#define EXPD(fp)	(((fp.l.upper) >> 20) & 0x7FF)
#define SIGND(fp)	((fp.l.upper) & 0x80000000)
#ifdef __arm__
#define MANTD(fp)	(fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
#else
#define MANTD(fp)	(fp.ll & ((1LL << 52) - 1))
#endif
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
#endif

static inline void fpush(void)
{
    env->fpstt = (env->fpstt - 1) & 7;
    env->fptags[env->fpstt] = 0; /* validate stack entry */
}

static inline void fpop(void)
{
    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
    env->fpstt = (env->fpstt + 1) & 7;
}

#ifndef USE_X86LDOUBLE
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
{
    CPU86_LDoubleU temp;
    int upper, e;
    uint64_t ll;

    /* mantissa */
    upper = lduw(ptr + 8);
    /* XXX: handle overflow ? */
    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
    e |= (upper >> 4) & 0x800; /* sign */
    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
#ifdef __arm__
    temp.l.upper = (e << 20) | (ll >> 32);
    temp.l.lower = ll;
#else
    temp.ll = ll | ((uint64_t)e << 52);
#endif
    return temp.d;
}

static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
{
    CPU86_LDoubleU temp;
    int e;

    temp.d = f;
    /* mantissa */
    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
    /* exponent + sign */
    e = EXPD(temp) - EXPBIAS + 16383;
    e |= SIGND(temp) >> 16;
    stw(ptr + 8, e);
}
#else

/* XXX: same endianness assumed */

#ifdef CONFIG_USER_ONLY

static inline CPU86_LDouble helper_fldt(target_ulong ptr)
{
    return *(CPU86_LDouble *)ptr;
}

static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
{
    *(CPU86_LDouble *)ptr = f;
}

#else

/* we use memory access macros */

static inline CPU86_LDouble helper_fldt(target_ulong ptr)
{
    CPU86_LDoubleU temp;

    temp.l.lower = ldq(ptr);
    temp.l.upper = lduw(ptr + 8);
    return temp.d;
}

static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
{
    CPU86_LDoubleU temp;
    
    temp.d = f;
    stq(ptr, temp.l.lower);
    stw(ptr + 8, temp.l.upper);
}

#endif /* !CONFIG_USER_ONLY */

#endif /* USE_X86LDOUBLE */

#define FPUS_IE (1 << 0)
#define FPUS_DE (1 << 1)
#define FPUS_ZE (1 << 2)
#define FPUS_OE (1 << 3)
#define FPUS_UE (1 << 4)
#define FPUS_PE (1 << 5)
#define FPUS_SF (1 << 6)
#define FPUS_SE (1 << 7)
#define FPUS_B  (1 << 15)

#define FPUC_EM 0x3f

extern const CPU86_LDouble f15rk[7];

void helper_fldt_ST0_A0(void);
void helper_fstt_ST0_A0(void);
void fpu_raise_exception(void);
CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
void helper_fbld_ST0_A0(void);
void helper_fbst_ST0_A0(void);
void helper_f2xm1(void);
void helper_fyl2x(void);
void helper_fptan(void);
void helper_fpatan(void);
void helper_fxtract(void);
void helper_fprem1(void);
void helper_fprem(void);
void helper_fyl2xp1(void);
void helper_fsqrt(void);
void helper_fsincos(void);
void helper_frndint(void);
void helper_fscale(void);
void helper_fsin(void);
void helper_fcos(void);
void helper_fxam_ST0(void);
void helper_fstenv(target_ulong ptr, int data32);
void helper_fldenv(target_ulong ptr, int data32);
void helper_fsave(target_ulong ptr, int data32);
void helper_frstor(target_ulong ptr, int data32);
void helper_fxsave(target_ulong ptr, int data64);
void helper_fxrstor(target_ulong ptr, int data64);
void restore_native_fp_state(CPUState *env);
void save_native_fp_state(CPUState *env);
float approx_rsqrt(float a);
float approx_rcp(float a);
double helper_sqrt(double a);
int fpu_isnan(double a);
void update_fp_status(void);

extern const uint8_t parity_table[256];
extern const uint8_t rclw_table[32];
extern const uint8_t rclb_table[32];

static inline uint32_t compute_eflags(void)
{
    return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
}

/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
static inline void load_eflags(int eflags, int update_mask)
{
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
    DF = 1 - (2 * ((eflags >> 10) & 1));
    env->eflags = (env->eflags & ~update_mask) | 
        (eflags & update_mask);
}

static inline void env_to_regs(void)
{
#ifdef reg_EAX
    EAX = env->regs[R_EAX];
#endif
#ifdef reg_ECX
    ECX = env->regs[R_ECX];
#endif
#ifdef reg_EDX
    EDX = env->regs[R_EDX];
#endif
#ifdef reg_EBX
    EBX = env->regs[R_EBX];
#endif
#ifdef reg_ESP
    ESP = env->regs[R_ESP];
#endif
#ifdef reg_EBP
    EBP = env->regs[R_EBP];
#endif
#ifdef reg_ESI
    ESI = env->regs[R_ESI];
#endif
#ifdef reg_EDI
    EDI = env->regs[R_EDI];
#endif
}

static inline void regs_to_env(void)
{
#ifdef reg_EAX
    env->regs[R_EAX] = EAX;
#endif
#ifdef reg_ECX
    env->regs[R_ECX] = ECX;
#endif
#ifdef reg_EDX
    env->regs[R_EDX] = EDX;
#endif
#ifdef reg_EBX
    env->regs[R_EBX] = EBX;
#endif
#ifdef reg_ESP
    env->regs[R_ESP] = ESP;
#endif
#ifdef reg_EBP
    env->regs[R_EBP] = EBP;
#endif
#ifdef reg_ESI
    env->regs[R_ESI] = ESI;
#endif
#ifdef reg_EDI
    env->regs[R_EDI] = EDI;
#endif
}
Commit	Line	Data
2c0262af FB	1	/*
	2	* i386 execution defines
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
7d3505c5	20	#include "config.h"
2c0262af FB	21	#include "dyngen-exec.h"
2c0262af FB	22
14ce26e7	23	/* XXX: factorize this mess */
14ce26e7 FB	24	#ifdef TARGET_X86_64
	25	#define TARGET_LONG_BITS 64
	26	#else
	27	#define TARGET_LONG_BITS 32
	28	#endif
	29
d785e6be FB	30	#include "cpu-defs.h"
d785e6be FB	31
0d1a29f9	32	/* at least 4 register variables are defined */
2c0262af	33	register struct CPUX86State *env asm(AREG0);
14ce26e7	34
d785e6be FB	35	#if TARGET_LONG_BITS > HOST_LONG_BITS
	36
	37	/* no registers can be used */
	38	#define T0 (env->t0)
	39	#define T1 (env->t1)
	40	#define T2 (env->t2)
14ce26e7	41
d785e6be FB	42	#else
	43
	44	/* XXX: use unsigned long instead of target_ulong - better code will
	45	be generated for 64 bit CPUs */
	46	register target_ulong T0 asm(AREG1);
	47	register target_ulong T1 asm(AREG2);
	48	register target_ulong T2 asm(AREG3);
2c0262af	49
2c0262af FB	50	/* if more registers are available, we define some registers too */
2c0262af FB	51	#ifdef AREG4
d785e6be	52	register target_ulong EAX asm(AREG4);
2c0262af FB	53	#define reg_EAX
	54	#endif
	55
	56	#ifdef AREG5
d785e6be	57	register target_ulong ESP asm(AREG5);
2c0262af FB	58	#define reg_ESP
	59	#endif
	60
	61	#ifdef AREG6
d785e6be	62	register target_ulong EBP asm(AREG6);
2c0262af FB	63	#define reg_EBP
	64	#endif
	65
	66	#ifdef AREG7
d785e6be	67	register target_ulong ECX asm(AREG7);
2c0262af FB	68	#define reg_ECX
	69	#endif
	70
	71	#ifdef AREG8
d785e6be	72	register target_ulong EDX asm(AREG8);
2c0262af FB	73	#define reg_EDX
	74	#endif
	75
	76	#ifdef AREG9
d785e6be	77	register target_ulong EBX asm(AREG9);
2c0262af FB	78	#define reg_EBX
	79	#endif
	80
	81	#ifdef AREG10
d785e6be	82	register target_ulong ESI asm(AREG10);
2c0262af FB	83	#define reg_ESI
	84	#endif
	85
	86	#ifdef AREG11
d785e6be	87	register target_ulong EDI asm(AREG11);
2c0262af FB	88	#define reg_EDI
	89	#endif
	90
d785e6be	91	#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
14ce26e7 FB	92
	93	#define A0 T2
	94
2c0262af FB	95	extern FILE *logfile;
	96	extern int loglevel;
	97
	98	#ifndef reg_EAX
	99	#define EAX (env->regs[R_EAX])
	100	#endif
	101	#ifndef reg_ECX
	102	#define ECX (env->regs[R_ECX])
	103	#endif
	104	#ifndef reg_EDX
	105	#define EDX (env->regs[R_EDX])
	106	#endif
	107	#ifndef reg_EBX
	108	#define EBX (env->regs[R_EBX])
	109	#endif
	110	#ifndef reg_ESP
	111	#define ESP (env->regs[R_ESP])
	112	#endif
	113	#ifndef reg_EBP
	114	#define EBP (env->regs[R_EBP])
	115	#endif
	116	#ifndef reg_ESI
	117	#define ESI (env->regs[R_ESI])
	118	#endif
	119	#ifndef reg_EDI
	120	#define EDI (env->regs[R_EDI])
	121	#endif
	122	#define EIP (env->eip)
	123	#define DF (env->df)
	124
	125	#define CC_SRC (env->cc_src)
	126	#define CC_DST (env->cc_dst)
	127	#define CC_OP (env->cc_op)
	128
	129	/* float macros */
	130	#define FT0 (env->ft0)
664e0f19 FB	131	#define ST0 (env->fpregs[env->fpstt].d)
664e0f19 FB	132	#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
2c0262af FB	133	#define ST1 ST(1)
	134
	135	#ifdef USE_FP_CONVERT
	136	#define FP_CONVERT (env->fp_convert)
	137	#endif
	138
	139	#include "cpu.h"
	140	#include "exec-all.h"
	141
	142	typedef struct CCTable {
	143	int (compute_all)(void); / return all the flags */
	144	int (compute_c)(void); / return the C flag */
	145	} CCTable;
	146
	147	extern CCTable cc_table[];
	148
8e682019	149	void load_seg(int seg_reg, int selector);
08cea4ee	150	void helper_ljmp_protected_T0_T1(int next_eip);
2c0262af FB	151	void helper_lcall_real_T0_T1(int shift, int next_eip);
	152	void helper_lcall_protected_T0_T1(int shift, int next_eip);
	153	void helper_iret_real(int shift);
08cea4ee	154	void helper_iret_protected(int shift, int next_eip);
2c0262af FB	155	void helper_lret_protected(int shift, int addend);
	156	void helper_lldt_T0(void);
	157	void helper_ltr_T0(void);
	158	void helper_movl_crN_T0(int reg);
	159	void helper_movl_drN_T0(int reg);
	160	void helper_invlpg(unsigned int addr);
1ac157da	161	void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
14ce26e7	162	void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
1ac157da	163	void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
2c0262af	164	void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
14ce26e7	165	int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
61382a50	166	int is_write, int is_user, int is_softmmu);
14ce26e7	167	void tlb_fill(target_ulong addr, int is_write, int is_user,
61382a50	168	void *retaddr);
2c0262af FB	169	void __hidden cpu_lock(void);
	170	void __hidden cpu_unlock(void);
	171	void do_interrupt(int intno, int is_int, int error_code,
14ce26e7	172	target_ulong next_eip, int is_hw);
2c0262af	173	void do_interrupt_user(int intno, int is_int, int error_code,
14ce26e7	174	target_ulong next_eip);
2c0262af	175	void raise_interrupt(int intno, int is_int, int error_code,
a8ede8ba	176	int next_eip_addend);
2c0262af FB	177	void raise_exception_err(int exception_index, int error_code);
	178	void raise_exception(int exception_index);
	179	void __hidden cpu_loop_exit(void);
2c0262af FB	180
	181	void OPPROTO op_movl_eflags_T0(void);
	182	void OPPROTO op_movl_T0_eflags(void);
14ce26e7 FB	183	void helper_divl_EAX_T0(void);
	184	void helper_idivl_EAX_T0(void);
	185	void helper_mulq_EAX_T0(void);
	186	void helper_imulq_EAX_T0(void);
	187	void helper_imulq_T0_T1(void);
	188	void helper_divq_EAX_T0(void);
	189	void helper_idivq_EAX_T0(void);
2c0262af FB	190	void helper_cmpxchg8b(void);
2c0262af FB	191	void helper_cpuid(void);
61a8c4ec	192	void helper_enter_level(int level, int data32);
023fe10d FB	193	void helper_sysenter(void);
023fe10d FB	194	void helper_sysexit(void);
06c2f506	195	void helper_syscall(int next_eip_addend);
14ce26e7	196	void helper_sysret(int dflag);
2c0262af FB	197	void helper_rdtsc(void);
	198	void helper_rdmsr(void);
	199	void helper_wrmsr(void);
	200	void helper_lsl(void);
	201	void helper_lar(void);
3ab493de FB	202	void helper_verr(void);
3ab493de FB	203	void helper_verw(void);
2c0262af	204
3e25f951 FB	205	void check_iob_T0(void);
	206	void check_iow_T0(void);
	207	void check_iol_T0(void);
	208	void check_iob_DX(void);
	209	void check_iow_DX(void);
	210	void check_iol_DX(void);
	211
9951bf39 FB	212	/* XXX: move that to a generic header */
	213	#if !defined(CONFIG_USER_ONLY)
	214
	215	#define ldul_user ldl_user
	216	#define ldul_kernel ldl_kernel
	217
	218	#define ACCESS_TYPE 0
	219	#define MEMSUFFIX _kernel
	220	#define DATA_SIZE 1
	221	#include "softmmu_header.h"
	222
	223	#define DATA_SIZE 2
	224	#include "softmmu_header.h"
	225
	226	#define DATA_SIZE 4
	227	#include "softmmu_header.h"
	228
	229	#define DATA_SIZE 8
	230	#include "softmmu_header.h"
	231	#undef ACCESS_TYPE
	232	#undef MEMSUFFIX
	233
	234	#define ACCESS_TYPE 1
	235	#define MEMSUFFIX _user
	236	#define DATA_SIZE 1
	237	#include "softmmu_header.h"
	238
	239	#define DATA_SIZE 2
	240	#include "softmmu_header.h"
	241
	242	#define DATA_SIZE 4
	243	#include "softmmu_header.h"
	244
	245	#define DATA_SIZE 8
	246	#include "softmmu_header.h"
	247	#undef ACCESS_TYPE
	248	#undef MEMSUFFIX
	249
	250	/* these access are slower, they must be as rare as possible */
	251	#define ACCESS_TYPE 2
	252	#define MEMSUFFIX _data
	253	#define DATA_SIZE 1
	254	#include "softmmu_header.h"
	255
	256	#define DATA_SIZE 2
	257	#include "softmmu_header.h"
	258
	259	#define DATA_SIZE 4
	260	#include "softmmu_header.h"
	261
	262	#define DATA_SIZE 8
	263	#include "softmmu_header.h"
	264	#undef ACCESS_TYPE
	265	#undef MEMSUFFIX
	266
	267	#define ldub(p) ldub_data(p)
	268	#define ldsb(p) ldsb_data(p)
	269	#define lduw(p) lduw_data(p)
	270	#define ldsw(p) ldsw_data(p)
	271	#define ldl(p) ldl_data(p)
	272	#define ldq(p) ldq_data(p)
	273
	274	#define stb(p, v) stb_data(p, v)
	275	#define stw(p, v) stw_data(p, v)
276	#define stl(p, v) stl_data(p, v)
277	#define stq(p, v) stq_data(p, v)
278
14ce26e7	279	static inline double ldfq(target_ulong ptr)
9951bf39 FB	280	{
	281	union {
	282	double d;
	283	uint64_t i;
	284	} u;
	285	u.i = ldq(ptr);
	286	return u.d;
	287	}
	288
14ce26e7	289	static inline void stfq(target_ulong ptr, double v)
9951bf39 FB	290	{
	291	union {
	292	double d;
	293	uint64_t i;
	294	} u;
	295	u.d = v;
	296	stq(ptr, u.i);
	297	}
	298
14ce26e7	299	static inline float ldfl(target_ulong ptr)
9951bf39 FB	300	{
	301	union {
	302	float f;
	303	uint32_t i;
	304	} u;
	305	u.i = ldl(ptr);
	306	return u.f;
	307	}
	308
14ce26e7	309	static inline void stfl(target_ulong ptr, float v)
9951bf39 FB	310	{
	311	union {
	312	float f;
	313	uint32_t i;
	314	} u;
	315	u.f = v;
	316	stl(ptr, u.i);
	317	}
	318
	319	#endif /* !defined(CONFIG_USER_ONLY) */
	320
2c0262af FB	321	#ifdef USE_X86LDOUBLE
2c0262af FB	322	/* use long double functions */
7a0e1f41 FB	323	#define floatx_to_int32 floatx80_to_int32
	324	#define floatx_to_int64 floatx80_to_int64
	325	#define floatx_abs floatx80_abs
	326	#define floatx_chs floatx80_chs
	327	#define floatx_round_to_int floatx80_round_to_int
2c0262af FB	328	#define sin sinl
	329	#define cos cosl
	330	#define sqrt sqrtl
	331	#define pow powl
	332	#define log logl
	333	#define tan tanl
	334	#define atan2 atan2l
	335	#define floor floorl
	336	#define ceil ceill
7d3505c5	337	#else
7a0e1f41 FB	338	#define floatx_to_int32 float64_to_int32
	339	#define floatx_to_int64 float64_to_int64
	340	#define floatx_abs float64_abs
	341	#define floatx_chs float64_chs
	342	#define floatx_round_to_int float64_round_to_int
7d3505c5	343	#endif
7a0e1f41	344
2c0262af FB	345	extern CPU86_LDouble sin(CPU86_LDouble x);
	346	extern CPU86_LDouble cos(CPU86_LDouble x);
	347	extern CPU86_LDouble sqrt(CPU86_LDouble x);
	348	extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
	349	extern CPU86_LDouble log(CPU86_LDouble x);
	350	extern CPU86_LDouble tan(CPU86_LDouble x);
	351	extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
	352	extern CPU86_LDouble floor(CPU86_LDouble x);
	353	extern CPU86_LDouble ceil(CPU86_LDouble x);
2c0262af FB	354
	355	#define RC_MASK 0xc00
	356	#define RC_NEAR 0x000
	357	#define RC_DOWN 0x400
	358	#define RC_UP 0x800
	359	#define RC_CHOP 0xc00
	360
	361	#define MAXTAN 9223372036854775808.0
	362
2c0262af FB	363	#ifdef USE_X86LDOUBLE
	364
	365	/* only for x86 */
	366	typedef union {
	367	long double d;
	368	struct {
	369	unsigned long long lower;
	370	unsigned short upper;
	371	} l;
	372	} CPU86_LDoubleU;
	373
	374	/* the following deal with x86 long double-precision numbers */
	375	#define MAXEXPD 0x7fff
	376	#define EXPBIAS 16383
	377	#define EXPD(fp) (fp.l.upper & 0x7fff)
	378	#define SIGND(fp) ((fp.l.upper) & 0x8000)
	379	#define MANTD(fp) (fp.l.lower)
	380	#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) \| EXPBIAS
	381
	382	#else
	383
	384	/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
	385	typedef union {
	386	double d;
	387	#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
	388	struct {
	389	uint32_t lower;
	390	int32_t upper;
	391	} l;
	392	#else
	393	struct {
	394	int32_t upper;
	395	uint32_t lower;
	396	} l;
	397	#endif
	398	#ifndef __arm__
	399	int64_t ll;
	400	#endif
	401	} CPU86_LDoubleU;
	402
	403	/* the following deal with IEEE double-precision numbers */
	404	#define MAXEXPD 0x7ff
	405	#define EXPBIAS 1023
	406	#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
	407	#define SIGND(fp) ((fp.l.upper) & 0x80000000)
	408	#ifdef __arm__
	409	#define MANTD(fp) (fp.l.lower \| ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
	410	#else
	411	#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
	412	#endif
	413	#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) \| (EXPBIAS << 20)
	414	#endif
	415
	416	static inline void fpush(void)
	417	{
	418	env->fpstt = (env->fpstt - 1) & 7;
	419	env->fptags[env->fpstt] = 0; /* validate stack entry */
	420	}
	421
	422	static inline void fpop(void)
	423	{
	424	env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
	425	env->fpstt = (env->fpstt + 1) & 7;
	426	}
427
428	#ifndef USE_X86LDOUBLE
14ce26e7	429	static inline CPU86_LDouble helper_fldt(target_ulong ptr)
2c0262af FB	430	{
	431	CPU86_LDoubleU temp;
	432	int upper, e;
	433	uint64_t ll;
	434
	435	/* mantissa */
	436	upper = lduw(ptr + 8);
	437	/* XXX: handle overflow ? */
	438	e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
	439	e \|= (upper >> 4) & 0x800; /* sign */
	440	ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
	441	#ifdef __arm__
	442	temp.l.upper = (e << 20) \| (ll >> 32);
	443	temp.l.lower = ll;
	444	#else
	445	temp.ll = ll \| ((uint64_t)e << 52);
	446	#endif
	447	return temp.d;
	448	}
	449
664e0f19	450	static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
2c0262af FB	451	{
	452	CPU86_LDoubleU temp;
	453	int e;
	454
	455	temp.d = f;
	456	/* mantissa */
	457	stq(ptr, (MANTD(temp) << 11) \| (1LL << 63));
	458	/* exponent + sign */
	459	e = EXPD(temp) - EXPBIAS + 16383;
	460	e \|= SIGND(temp) >> 16;
	461	stw(ptr + 8, e);
	462	}
9951bf39 FB	463	#else
	464
	465	/* XXX: same endianness assumed */
	466
	467	#ifdef CONFIG_USER_ONLY
	468
14ce26e7	469	static inline CPU86_LDouble helper_fldt(target_ulong ptr)
9951bf39 FB	470	{
	471	return (CPU86_LDouble )ptr;
	472	}
	473
14ce26e7	474	static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
9951bf39 FB	475	{
	476	(CPU86_LDouble )ptr = f;
	477	}
	478
	479	#else
	480
	481	/* we use memory access macros */
	482
14ce26e7	483	static inline CPU86_LDouble helper_fldt(target_ulong ptr)
9951bf39 FB	484	{
	485	CPU86_LDoubleU temp;
	486
	487	temp.l.lower = ldq(ptr);
	488	temp.l.upper = lduw(ptr + 8);
	489	return temp.d;
	490	}
	491
14ce26e7	492	static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
9951bf39 FB	493	{
	494	CPU86_LDoubleU temp;
	495
	496	temp.d = f;
	497	stq(ptr, temp.l.lower);
	498	stw(ptr + 8, temp.l.upper);
	499	}
	500
	501	#endif /* !CONFIG_USER_ONLY */
	502
	503	#endif /* USE_X86LDOUBLE */
2c0262af	504
2ee73ac3 FB	505	#define FPUS_IE (1 << 0)
	506	#define FPUS_DE (1 << 1)
	507	#define FPUS_ZE (1 << 2)
	508	#define FPUS_OE (1 << 3)
	509	#define FPUS_UE (1 << 4)
	510	#define FPUS_PE (1 << 5)
	511	#define FPUS_SF (1 << 6)
	512	#define FPUS_SE (1 << 7)
	513	#define FPUS_B (1 << 15)
	514
	515	#define FPUC_EM 0x3f
	516
83fb7adf	517	extern const CPU86_LDouble f15rk[7];
2c0262af FB	518
	519	void helper_fldt_ST0_A0(void);
	520	void helper_fstt_ST0_A0(void);
2ee73ac3 FB	521	void fpu_raise_exception(void);
2ee73ac3 FB	522	CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
2c0262af FB	523	void helper_fbld_ST0_A0(void);
	524	void helper_fbst_ST0_A0(void);
	525	void helper_f2xm1(void);
	526	void helper_fyl2x(void);
	527	void helper_fptan(void);
	528	void helper_fpatan(void);
	529	void helper_fxtract(void);
	530	void helper_fprem1(void);
	531	void helper_fprem(void);
	532	void helper_fyl2xp1(void);
	533	void helper_fsqrt(void);
	534	void helper_fsincos(void);
	535	void helper_frndint(void);
	536	void helper_fscale(void);
	537	void helper_fsin(void);
	538	void helper_fcos(void);
	539	void helper_fxam_ST0(void);
14ce26e7 FB	540	void helper_fstenv(target_ulong ptr, int data32);
	541	void helper_fldenv(target_ulong ptr, int data32);
	542	void helper_fsave(target_ulong ptr, int data32);
	543	void helper_frstor(target_ulong ptr, int data32);
	544	void helper_fxsave(target_ulong ptr, int data64);
	545	void helper_fxrstor(target_ulong ptr, int data64);
03857e31 FB	546	void restore_native_fp_state(CPUState *env);
03857e31 FB	547	void save_native_fp_state(CPUState *env);
664e0f19 FB	548	float approx_rsqrt(float a);
664e0f19 FB	549	float approx_rcp(float a);
79f91c27	550	double helper_sqrt(double a);
664e0f19	551	int fpu_isnan(double a);
7a0e1f41	552	void update_fp_status(void);
2c0262af	553
83fb7adf FB	554	extern const uint8_t parity_table[256];
	555	extern const uint8_t rclw_table[32];
	556	extern const uint8_t rclb_table[32];
2c0262af FB	557
	558	static inline uint32_t compute_eflags(void)
	559	{
	560	return env->eflags \| cc_table[CC_OP].compute_all() \| (DF & DF_MASK);
	561	}
	562
2c0262af FB	563	/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
	564	static inline void load_eflags(int eflags, int update_mask)
	565	{
	566	CC_SRC = eflags & (CC_O \| CC_S \| CC_Z \| CC_A \| CC_P \| CC_C);
	567	DF = 1 - (2 * ((eflags >> 10) & 1));
	568	env->eflags = (env->eflags & ~update_mask) \|
	569	(eflags & update_mask);
	570	}
	571
0d1a29f9 FB	572	static inline void env_to_regs(void)
	573	{
	574	#ifdef reg_EAX
	575	EAX = env->regs[R_EAX];
	576	#endif
	577	#ifdef reg_ECX
	578	ECX = env->regs[R_ECX];
	579	#endif
	580	#ifdef reg_EDX
	581	EDX = env->regs[R_EDX];
	582	#endif
	583	#ifdef reg_EBX
	584	EBX = env->regs[R_EBX];
	585	#endif
	586	#ifdef reg_ESP
	587	ESP = env->regs[R_ESP];
	588	#endif
	589	#ifdef reg_EBP
	590	EBP = env->regs[R_EBP];
	591	#endif
	592	#ifdef reg_ESI
	593	ESI = env->regs[R_ESI];
	594	#endif
	595	#ifdef reg_EDI
	596	EDI = env->regs[R_EDI];
	597	#endif
	598	}
	599
	600	static inline void regs_to_env(void)
	601	{
	602	#ifdef reg_EAX
	603	env->regs[R_EAX] = EAX;
	604	#endif
	605	#ifdef reg_ECX
	606	env->regs[R_ECX] = ECX;
	607	#endif
	608	#ifdef reg_EDX
	609	env->regs[R_EDX] = EDX;
	610	#endif
	611	#ifdef reg_EBX
	612	env->regs[R_EBX] = EBX;
	613	#endif
	614	#ifdef reg_ESP
	615	env->regs[R_ESP] = ESP;
	616	#endif
	617	#ifdef reg_EBP
	618	env->regs[R_EBP] = EBP;
	619	#endif
	620	#ifdef reg_ESI
	621	env->regs[R_ESI] = ESI;
	622	#endif
	623	#ifdef reg_EDI
	624	env->regs[R_EDI] = EDI;
	625	#endif
	626	}