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i386: remove unused function prototypes (Laurent Desnogues)
[qemu.git] / target-i386 / exec.h
CommitLineData
2c0262af 1/*
5fafdf24 2 * i386 execution defines
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3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
7d3505c5 20#include "config.h"
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21#include "dyngen-exec.h"
22
14ce26e7 23/* XXX: factorize this mess */
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24#ifdef TARGET_X86_64
25#define TARGET_LONG_BITS 64
26#else
27#define TARGET_LONG_BITS 32
28#endif
29
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30#include "cpu-defs.h"
31
2c0262af 32register struct CPUX86State *env asm(AREG0);
14ce26e7 33
79383c9c 34#include "qemu-log.h"
2c0262af 35
2c0262af 36#define EAX (env->regs[R_EAX])
2c0262af 37#define ECX (env->regs[R_ECX])
2c0262af 38#define EDX (env->regs[R_EDX])
2c0262af 39#define EBX (env->regs[R_EBX])
2c0262af 40#define ESP (env->regs[R_ESP])
2c0262af 41#define EBP (env->regs[R_EBP])
2c0262af 42#define ESI (env->regs[R_ESI])
2c0262af 43#define EDI (env->regs[R_EDI])
1e4840bf 44#define EIP (env->eip)
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45#define DF (env->df)
46
47#define CC_SRC (env->cc_src)
48#define CC_DST (env->cc_dst)
49#define CC_OP (env->cc_op)
50
51/* float macros */
52#define FT0 (env->ft0)
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53#define ST0 (env->fpregs[env->fpstt].d)
54#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
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55#define ST1 ST(1)
56
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57#include "cpu.h"
58#include "exec-all.h"
59
14ce26e7 60void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
1ac157da 61void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
5fafdf24 62int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
6ebbf390 63 int is_write, int mmu_idx, int is_softmmu);
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64void __hidden cpu_lock(void);
65void __hidden cpu_unlock(void);
5fafdf24 66void do_interrupt(int intno, int is_int, int error_code,
14ce26e7 67 target_ulong next_eip, int is_hw);
5fafdf24 68void do_interrupt_user(int intno, int is_int, int error_code,
14ce26e7 69 target_ulong next_eip);
5fafdf24 70void raise_interrupt(int intno, int is_int, int error_code,
a8ede8ba 71 int next_eip_addend);
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72void raise_exception_err(int exception_index, int error_code);
73void raise_exception(int exception_index);
3b21e03e 74void do_smm_enter(void);
2c0262af 75void __hidden cpu_loop_exit(void);
2c0262af 76
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77/* n must be a constant to be efficient */
78static inline target_long lshift(target_long x, int n)
79{
80 if (n >= 0)
81 return x << n;
82 else
83 return x >> (-n);
84}
85
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86#include "helper.h"
87
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88static inline void svm_check_intercept(uint32_t type)
89{
90 helper_svm_check_intercept_param(type, 0);
91}
3e25f951 92
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93#if !defined(CONFIG_USER_ONLY)
94
a9049a07 95#include "softmmu_exec.h"
9951bf39 96
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97#endif /* !defined(CONFIG_USER_ONLY) */
98
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99#ifdef USE_X86LDOUBLE
100/* use long double functions */
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101#define floatx_to_int32 floatx80_to_int32
102#define floatx_to_int64 floatx80_to_int64
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103#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
104#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
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105#define int32_to_floatx int32_to_floatx80
106#define int64_to_floatx int64_to_floatx80
107#define float32_to_floatx float32_to_floatx80
108#define float64_to_floatx float64_to_floatx80
109#define floatx_to_float32 floatx80_to_float32
110#define floatx_to_float64 floatx80_to_float64
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111#define floatx_abs floatx80_abs
112#define floatx_chs floatx80_chs
113#define floatx_round_to_int floatx80_round_to_int
8422b113
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114#define floatx_compare floatx80_compare
115#define floatx_compare_quiet floatx80_compare_quiet
7d3505c5 116#else
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117#define floatx_to_int32 float64_to_int32
118#define floatx_to_int64 float64_to_int64
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119#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
120#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
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121#define int32_to_floatx int32_to_float64
122#define int64_to_floatx int64_to_float64
123#define float32_to_floatx float32_to_float64
124#define float64_to_floatx(x, e) (x)
125#define floatx_to_float32 float64_to_float32
126#define floatx_to_float64(x, e) (x)
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127#define floatx_abs float64_abs
128#define floatx_chs float64_chs
129#define floatx_round_to_int float64_round_to_int
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130#define floatx_compare float64_compare
131#define floatx_compare_quiet float64_compare_quiet
7d3505c5 132#endif
7a0e1f41 133
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134#define RC_MASK 0xc00
135#define RC_NEAR 0x000
136#define RC_DOWN 0x400
137#define RC_UP 0x800
138#define RC_CHOP 0xc00
139
140#define MAXTAN 9223372036854775808.0
141
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142#ifdef USE_X86LDOUBLE
143
144/* only for x86 */
145typedef union {
146 long double d;
147 struct {
148 unsigned long long lower;
149 unsigned short upper;
150 } l;
151} CPU86_LDoubleU;
152
153/* the following deal with x86 long double-precision numbers */
154#define MAXEXPD 0x7fff
155#define EXPBIAS 16383
156#define EXPD(fp) (fp.l.upper & 0x7fff)
157#define SIGND(fp) ((fp.l.upper) & 0x8000)
158#define MANTD(fp) (fp.l.lower)
159#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
160
161#else
162
163/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
164typedef union {
165 double d;
166#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
167 struct {
168 uint32_t lower;
169 int32_t upper;
170 } l;
171#else
172 struct {
173 int32_t upper;
174 uint32_t lower;
175 } l;
176#endif
177#ifndef __arm__
178 int64_t ll;
179#endif
180} CPU86_LDoubleU;
181
182/* the following deal with IEEE double-precision numbers */
183#define MAXEXPD 0x7ff
184#define EXPBIAS 1023
185#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
186#define SIGND(fp) ((fp.l.upper) & 0x80000000)
187#ifdef __arm__
188#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
189#else
190#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
191#endif
192#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
193#endif
194
195static inline void fpush(void)
196{
197 env->fpstt = (env->fpstt - 1) & 7;
198 env->fptags[env->fpstt] = 0; /* validate stack entry */
199}
200
201static inline void fpop(void)
202{
203 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
204 env->fpstt = (env->fpstt + 1) & 7;
205}
206
207#ifndef USE_X86LDOUBLE
14ce26e7 208static inline CPU86_LDouble helper_fldt(target_ulong ptr)
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209{
210 CPU86_LDoubleU temp;
211 int upper, e;
212 uint64_t ll;
213
214 /* mantissa */
215 upper = lduw(ptr + 8);
216 /* XXX: handle overflow ? */
217 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
218 e |= (upper >> 4) & 0x800; /* sign */
219 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
220#ifdef __arm__
221 temp.l.upper = (e << 20) | (ll >> 32);
222 temp.l.lower = ll;
223#else
224 temp.ll = ll | ((uint64_t)e << 52);
225#endif
226 return temp.d;
227}
228
664e0f19 229static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
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230{
231 CPU86_LDoubleU temp;
232 int e;
233
234 temp.d = f;
235 /* mantissa */
236 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
237 /* exponent + sign */
238 e = EXPD(temp) - EXPBIAS + 16383;
239 e |= SIGND(temp) >> 16;
240 stw(ptr + 8, e);
241}
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242#else
243
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244/* we use memory access macros */
245
14ce26e7 246static inline CPU86_LDouble helper_fldt(target_ulong ptr)
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247{
248 CPU86_LDoubleU temp;
249
250 temp.l.lower = ldq(ptr);
251 temp.l.upper = lduw(ptr + 8);
252 return temp.d;
253}
254
14ce26e7 255static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
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256{
257 CPU86_LDoubleU temp;
3b46e624 258
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259 temp.d = f;
260 stq(ptr, temp.l.lower);
261 stw(ptr + 8, temp.l.upper);
262}
263
9951bf39 264#endif /* USE_X86LDOUBLE */
2c0262af 265
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266#define FPUS_IE (1 << 0)
267#define FPUS_DE (1 << 1)
268#define FPUS_ZE (1 << 2)
269#define FPUS_OE (1 << 3)
270#define FPUS_UE (1 << 4)
271#define FPUS_PE (1 << 5)
272#define FPUS_SF (1 << 6)
273#define FPUS_SE (1 << 7)
274#define FPUS_B (1 << 15)
275
276#define FPUC_EM 0x3f
277
83fb7adf 278extern const CPU86_LDouble f15rk[7];
2c0262af 279
2ee73ac3 280void fpu_raise_exception(void);
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281void restore_native_fp_state(CPUState *env);
282void save_native_fp_state(CPUState *env);
2c0262af 283
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284extern const uint8_t parity_table[256];
285extern const uint8_t rclw_table[32];
286extern const uint8_t rclb_table[32];
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287
288static inline uint32_t compute_eflags(void)
289{
a7812ae4 290 return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
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291}
292
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293/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
294static inline void load_eflags(int eflags, int update_mask)
295{
296 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
297 DF = 1 - (2 * ((eflags >> 10) & 1));
5fafdf24 298 env->eflags = (env->eflags & ~update_mask) |
093f8f06 299 (eflags & update_mask) | 0x2;
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300}
301
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302static inline void env_to_regs(void)
303{
304#ifdef reg_EAX
305 EAX = env->regs[R_EAX];
306#endif
307#ifdef reg_ECX
308 ECX = env->regs[R_ECX];
309#endif
310#ifdef reg_EDX
311 EDX = env->regs[R_EDX];
312#endif
313#ifdef reg_EBX
314 EBX = env->regs[R_EBX];
315#endif
316#ifdef reg_ESP
317 ESP = env->regs[R_ESP];
318#endif
319#ifdef reg_EBP
320 EBP = env->regs[R_EBP];
321#endif
322#ifdef reg_ESI
323 ESI = env->regs[R_ESI];
324#endif
325#ifdef reg_EDI
326 EDI = env->regs[R_EDI];
327#endif
328}
329
330static inline void regs_to_env(void)
331{
332#ifdef reg_EAX
333 env->regs[R_EAX] = EAX;
334#endif
335#ifdef reg_ECX
336 env->regs[R_ECX] = ECX;
337#endif
338#ifdef reg_EDX
339 env->regs[R_EDX] = EDX;
340#endif
341#ifdef reg_EBX
342 env->regs[R_EBX] = EBX;
343#endif
344#ifdef reg_ESP
345 env->regs[R_ESP] = ESP;
346#endif
347#ifdef reg_EBP
348 env->regs[R_EBP] = EBP;
349#endif
350#ifdef reg_ESI
351 env->regs[R_ESI] = ESI;
352#endif
353#ifdef reg_EDI
354 env->regs[R_EDI] = EDI;
355#endif
356}
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357
358static inline int cpu_halted(CPUState *env) {
359 /* handle exit of HALTED state */
ce5232c5 360 if (!env->halted)
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361 return 0;
362 /* disable halt condition */
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363 if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
364 (env->eflags & IF_MASK)) ||
365 (env->interrupt_request & CPU_INTERRUPT_NMI)) {
ce5232c5 366 env->halted = 0;
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367 return 0;
368 }
369 return EXCP_HALTED;
370}
0573fbfc 371
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372/* load efer and update the corresponding hflags. XXX: do consistency
373 checks with cpuid bits ? */
374static inline void cpu_load_efer(CPUState *env, uint64_t val)
375{
376 env->efer = val;
377 env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
378 if (env->efer & MSR_EFER_LMA)
379 env->hflags |= HF_LMA_MASK;
380 if (env->efer & MSR_EFER_SVME)
381 env->hflags |= HF_SVME_MASK;
382}