[qemu.git] / target-i386 / machine.c

#include "hw/hw.h"
#include "hw/boards.h"
#include "hw/pc.h"
#include "hw/isa.h"

#include "exec-all.h"
#include "kvm.h"

static const VMStateDescription vmstate_segment = {
    .name = "segment",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT32(selector, SegmentCache),
        VMSTATE_UINTTL(base, SegmentCache),
        VMSTATE_UINT32(limit, SegmentCache),
        VMSTATE_UINT32(flags, SegmentCache),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_SEGMENT(_field, _state) {                            \
    .name       = (stringify(_field)),                               \
    .size       = sizeof(SegmentCache),                              \
    .vmsd       = &vmstate_segment,                                  \
    .flags      = VMS_STRUCT,                                        \
    .offset     = offsetof(_state, _field)                           \
            + type_check(SegmentCache,typeof_field(_state, _field))  \
}

#define VMSTATE_SEGMENT_ARRAY(_field, _state, _n)                    \
    VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)

static const VMStateDescription vmstate_xmm_reg = {
    .name = "xmm_reg",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT64(XMM_Q(0), XMMReg),
        VMSTATE_UINT64(XMM_Q(1), XMMReg),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_XMM_REGS(_field, _state, _n)                         \
    VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)

/* YMMH format is the same as XMM */
static const VMStateDescription vmstate_ymmh_reg = {
    .name = "ymmh_reg",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT64(XMM_Q(0), XMMReg),
        VMSTATE_UINT64(XMM_Q(1), XMMReg),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v)                         \
    VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)

static const VMStateDescription vmstate_mtrr_var = {
    .name = "mtrr_var",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT64(base, MTRRVar),
        VMSTATE_UINT64(mask, MTRRVar),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_MTRR_VARS(_field, _state, _n, _v)                    \
    VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)

static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size)
{
    fprintf(stderr, "call put_fpreg() with invalid arguments\n");
    exit(0);
}

#ifdef USE_X86LDOUBLE
/* XXX: add that in a FPU generic layer */
union x86_longdouble {
    uint64_t mant;
    uint16_t exp;
};

#define MANTD1(fp)	(fp & ((1LL << 52) - 1))
#define EXPBIAS1 1023
#define EXPD1(fp)	((fp >> 52) & 0x7FF)
#define SIGND1(fp)	((fp >> 32) & 0x80000000)

static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
{
    int e;
    /* mantissa */
    p->mant = (MANTD1(temp) << 11) | (1LL << 63);
    /* exponent + sign */
    e = EXPD1(temp) - EXPBIAS1 + 16383;
    e |= SIGND1(temp) >> 16;
    p->exp = e;
}

static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;

    qemu_get_be64s(f, &mant);
    qemu_get_be16s(f, &exp);
    fp_reg->d = cpu_set_fp80(mant, exp);
    return 0;
}

static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;
    /* we save the real CPU data (in case of MMX usage only 'mant'
       contains the MMX register */
    cpu_get_fp80(&mant, &exp, fp_reg->d);
    qemu_put_be64s(f, &mant);
    qemu_put_be16s(f, &exp);
}

static const VMStateInfo vmstate_fpreg = {
    .name = "fpreg",
    .get  = get_fpreg,
    .put  = put_fpreg,
};

static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size)
{
    union x86_longdouble *p = opaque;
    uint64_t mant;

    qemu_get_be64s(f, &mant);
    p->mant = mant;
    p->exp = 0xffff;
    return 0;
}

static const VMStateInfo vmstate_fpreg_1_mmx = {
    .name = "fpreg_1_mmx",
    .get  = get_fpreg_1_mmx,
    .put  = put_fpreg_error,
};

static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size)
{
    union x86_longdouble *p = opaque;
    uint64_t mant;

    qemu_get_be64s(f, &mant);
    fp64_to_fp80(p, mant);
    return 0;
}

static const VMStateInfo vmstate_fpreg_1_no_mmx = {
    .name = "fpreg_1_no_mmx",
    .get  = get_fpreg_1_no_mmx,
    .put  = put_fpreg_error,
};

static bool fpregs_is_0(void *opaque, int version_id)
{
    CPUState *env = opaque;

    return (env->fpregs_format_vmstate == 0);
}

static bool fpregs_is_1_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return (guess_mmx && (env->fpregs_format_vmstate == 1));
}

static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return (!guess_mmx && (env->fpregs_format_vmstate == 1));
}

#define VMSTATE_FP_REGS(_field, _state, _n)                               \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)

#else
static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;

    qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
    return 0;
}

static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    /* if we use doubles for float emulation, we save the doubles to
       avoid losing information in case of MMX usage. It can give
       problems if the image is restored on a CPU where long
       doubles are used instead. */
    qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
}

const VMStateInfo vmstate_fpreg = {
    .name = "fpreg",
    .get  = get_fpreg,
    .put  = put_fpreg,
};

static int get_fpreg_0_mmx(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;

    qemu_get_be64s(f, &mant);
    qemu_get_be16s(f, &exp);
    fp_reg->mmx.MMX_Q(0) = mant;
    return 0;
}

const VMStateInfo vmstate_fpreg_0_mmx = {
    .name = "fpreg_0_mmx",
    .get  = get_fpreg_0_mmx,
    .put  = put_fpreg_error,
};

static int get_fpreg_0_no_mmx(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;

    qemu_get_be64s(f, &mant);
    qemu_get_be16s(f, &exp);

    fp_reg->d = cpu_set_fp80(mant, exp);
    return 0;
}

const VMStateInfo vmstate_fpreg_0_no_mmx = {
    .name = "fpreg_0_no_mmx",
    .get  = get_fpreg_0_no_mmx,
    .put  = put_fpreg_error,
};

static bool fpregs_is_1(void *opaque, int version_id)
{
    CPUState *env = opaque;

    return env->fpregs_format_vmstate == 1;
}

static bool fpregs_is_0_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return guess_mmx && env->fpregs_format_vmstate == 0;
}

static bool fpregs_is_0_no_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return !guess_mmx && env->fpregs_format_vmstate == 0;
}

#define VMSTATE_FP_REGS(_field, _state, _n)                               \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)

#endif /* USE_X86LDOUBLE */

static bool version_is_5(void *opaque, int version_id)
{
    return version_id == 5;
}

#ifdef TARGET_X86_64
static bool less_than_7(void *opaque, int version_id)
{
    return version_id < 7;
}

static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
{
    uint64_t *v = pv;
    *v = qemu_get_be32(f);
    return 0;
}

static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
{
    uint64_t *v = pv;
    qemu_put_be32(f, *v);
}

static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
    .name = "uint64_as_uint32",
    .get  = get_uint64_as_uint32,
    .put  = put_uint64_as_uint32,
};

#define VMSTATE_HACK_UINT32(_f, _s, _t)                                  \
    VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
#endif

static void cpu_pre_save(void *opaque)
{
    CPUState *env = opaque;
    int i;

    /* FPU */
    env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
    env->fptag_vmstate = 0;
    for(i = 0; i < 8; i++) {
        env->fptag_vmstate |= ((!env->fptags[i]) << i);
    }

#ifdef USE_X86LDOUBLE
    env->fpregs_format_vmstate = 0;
#else
    env->fpregs_format_vmstate = 1;
#endif
}

static int cpu_post_load(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int i;

    /* XXX: restore FPU round state */
    env->fpstt = (env->fpus_vmstate >> 11) & 7;
    env->fpus = env->fpus_vmstate & ~0x3800;
    env->fptag_vmstate ^= 0xff;
    for(i = 0; i < 8; i++) {
        env->fptags[i] = (env->fptag_vmstate >> i) & 1;
    }

    cpu_breakpoint_remove_all(env, BP_CPU);
    cpu_watchpoint_remove_all(env, BP_CPU);
    for (i = 0; i < 4; i++)
        hw_breakpoint_insert(env, i);

    tlb_flush(env, 1);
    return 0;
}

static const VMStateDescription vmstate_cpu = {
    .name = "cpu",
    .version_id = CPU_SAVE_VERSION,
    .minimum_version_id = 3,
    .minimum_version_id_old = 3,
    .pre_save = cpu_pre_save,
    .post_load = cpu_post_load,
    .fields      = (VMStateField []) {
        VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
        VMSTATE_UINTTL(eip, CPUState),
        VMSTATE_UINTTL(eflags, CPUState),
        VMSTATE_UINT32(hflags, CPUState),
        /* FPU */
        VMSTATE_UINT16(fpuc, CPUState),
        VMSTATE_UINT16(fpus_vmstate, CPUState),
        VMSTATE_UINT16(fptag_vmstate, CPUState),
        VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
        VMSTATE_FP_REGS(fpregs, CPUState, 8),

        VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
        VMSTATE_SEGMENT(ldt, CPUState),
        VMSTATE_SEGMENT(tr, CPUState),
        VMSTATE_SEGMENT(gdt, CPUState),
        VMSTATE_SEGMENT(idt, CPUState),

        VMSTATE_UINT32(sysenter_cs, CPUState),
#ifdef TARGET_X86_64
        /* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
        VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
        VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
        VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
        VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
#else
        VMSTATE_UINTTL(sysenter_esp, CPUState),
        VMSTATE_UINTTL(sysenter_eip, CPUState),
#endif

        VMSTATE_UINTTL(cr[0], CPUState),
        VMSTATE_UINTTL(cr[2], CPUState),
        VMSTATE_UINTTL(cr[3], CPUState),
        VMSTATE_UINTTL(cr[4], CPUState),
        VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
        /* MMU */
        VMSTATE_INT32(a20_mask, CPUState),
        /* XMM */
        VMSTATE_UINT32(mxcsr, CPUState),
        VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),

#ifdef TARGET_X86_64
        VMSTATE_UINT64(efer, CPUState),
        VMSTATE_UINT64(star, CPUState),
        VMSTATE_UINT64(lstar, CPUState),
        VMSTATE_UINT64(cstar, CPUState),
        VMSTATE_UINT64(fmask, CPUState),
        VMSTATE_UINT64(kernelgsbase, CPUState),
#endif
        VMSTATE_UINT32_V(smbase, CPUState, 4),

        VMSTATE_UINT64_V(pat, CPUState, 5),
        VMSTATE_UINT32_V(hflags2, CPUState, 5),

        VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
        VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
        VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
        VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
        VMSTATE_UINT64_V(intercept, CPUState, 5),
        VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
        VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
        VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
        VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
        VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
        VMSTATE_UINT8_V(v_tpr, CPUState, 5),
        /* MTRRs */
        VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
        VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
        VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
        /* KVM-related states */
        VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
        VMSTATE_UINT32_V(mp_state, CPUState, 9),
        VMSTATE_UINT64_V(tsc, CPUState, 9),
        VMSTATE_INT32_V(exception_injected, CPUState, 11),
        VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
        VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
        VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
        VMSTATE_UINT8_V(has_error_code, CPUState, 11),
        VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
        /* MCE */
        VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
        VMSTATE_UINT64_V(mcg_status, CPUState, 10),
        VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
        VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
        /* rdtscp */
        VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
        /* KVM pvclock msr */
        VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
        VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
        /* XSAVE related fields */
        VMSTATE_UINT64_V(xcr0, CPUState, 12),
        VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
        VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
        VMSTATE_END_OF_LIST()
        /* The above list is not sorted /wrt version numbers, watch out! */
    }
};

void cpu_save(QEMUFile *f, void *opaque)
{
    vmstate_save_state(f, &vmstate_cpu, opaque);
}

int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
    return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
}
Commit	Line	Data
8dd3dca3 AJ	1	#include "hw/hw.h"
	2	#include "hw/boards.h"
	3	#include "hw/pc.h"
	4	#include "hw/isa.h"
	5
	6	#include "exec-all.h"
b0a46a33	7	#include "kvm.h"
8dd3dca3	8
66e6d55b JQ	9	static const VMStateDescription vmstate_segment = {
	10	.name = "segment",
	11	.version_id = 1,
	12	.minimum_version_id = 1,
	13	.minimum_version_id_old = 1,
	14	.fields = (VMStateField []) {
	15	VMSTATE_UINT32(selector, SegmentCache),
	16	VMSTATE_UINTTL(base, SegmentCache),
	17	VMSTATE_UINT32(limit, SegmentCache),
	18	VMSTATE_UINT32(flags, SegmentCache),
	19	VMSTATE_END_OF_LIST()
	20	}
	21	};
	22
0cb892aa JQ	23	#define VMSTATE_SEGMENT(_field, _state) { \
	24	.name = (stringify(_field)), \
	25	.size = sizeof(SegmentCache), \
	26	.vmsd = &vmstate_segment, \
	27	.flags = VMS_STRUCT, \
	28	.offset = offsetof(_state, _field) \
	29	+ type_check(SegmentCache,typeof_field(_state, _field)) \
8dd3dca3 AJ	30	}
8dd3dca3 AJ	31
0cb892aa JQ	32	#define VMSTATE_SEGMENT_ARRAY(_field, _state, _n) \
0cb892aa JQ	33	VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
8dd3dca3	34
fc3b0aa2 JQ	35	static const VMStateDescription vmstate_xmm_reg = {
	36	.name = "xmm_reg",
	37	.version_id = 1,
	38	.minimum_version_id = 1,
	39	.minimum_version_id_old = 1,
	40	.fields = (VMStateField []) {
	41	VMSTATE_UINT64(XMM_Q(0), XMMReg),
	42	VMSTATE_UINT64(XMM_Q(1), XMMReg),
	43	VMSTATE_END_OF_LIST()
	44	}
	45	};
	46
0cb892aa JQ	47	#define VMSTATE_XMM_REGS(_field, _state, _n) \
0cb892aa JQ	48	VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
fc3b0aa2	49
f1665b21 SY	50	/* YMMH format is the same as XMM */
	51	static const VMStateDescription vmstate_ymmh_reg = {
	52	.name = "ymmh_reg",
	53	.version_id = 1,
	54	.minimum_version_id = 1,
	55	.minimum_version_id_old = 1,
	56	.fields = (VMStateField []) {
	57	VMSTATE_UINT64(XMM_Q(0), XMMReg),
	58	VMSTATE_UINT64(XMM_Q(1), XMMReg),
	59	VMSTATE_END_OF_LIST()
	60	}
	61	};
	62
	63	#define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v) \
	64	VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
	65
216c07c3 JQ	66	static const VMStateDescription vmstate_mtrr_var = {
	67	.name = "mtrr_var",
	68	.version_id = 1,
	69	.minimum_version_id = 1,
	70	.minimum_version_id_old = 1,
	71	.fields = (VMStateField []) {
	72	VMSTATE_UINT64(base, MTRRVar),
	73	VMSTATE_UINT64(mask, MTRRVar),
	74	VMSTATE_END_OF_LIST()
	75	}
	76	};
	77
0cb892aa JQ	78	#define VMSTATE_MTRR_VARS(_field, _state, _n, _v) \
0cb892aa JQ	79	VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
216c07c3	80
0cb892aa	81	static void put_fpreg_error(QEMUFile f, void opaque, size_t size)
216c07c3	82	{
0cb892aa JQ	83	fprintf(stderr, "call put_fpreg() with invalid arguments\n");
0cb892aa JQ	84	exit(0);
216c07c3 JQ	85	}
216c07c3 JQ	86
3c8ce630 JQ	87	#ifdef USE_X86LDOUBLE
	88	/* XXX: add that in a FPU generic layer */
	89	union x86_longdouble {
	90	uint64_t mant;
	91	uint16_t exp;
	92	};
	93
	94	#define MANTD1(fp) (fp & ((1LL << 52) - 1))
	95	#define EXPBIAS1 1023
	96	#define EXPD1(fp) ((fp >> 52) & 0x7FF)
	97	#define SIGND1(fp) ((fp >> 32) & 0x80000000)
	98
	99	static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
	100	{
	101	int e;
	102	/* mantissa */
	103	p->mant = (MANTD1(temp) << 11) \| (1LL << 63);
	104	/* exponent + sign */
	105	e = EXPD1(temp) - EXPBIAS1 + 16383;
	106	e \|= SIGND1(temp) >> 16;
	107	p->exp = e;
	108	}
	109
	110	static int get_fpreg(QEMUFile f, void opaque, size_t size)
	111	{
	112	FPReg *fp_reg = opaque;
	113	uint64_t mant;
	114	uint16_t exp;
	115
	116	qemu_get_be64s(f, &mant);
	117	qemu_get_be16s(f, &exp);
	118	fp_reg->d = cpu_set_fp80(mant, exp);
	119	return 0;
	120	}
	121
	122	static void put_fpreg(QEMUFile f, void opaque, size_t size)
	123	{
	124	FPReg *fp_reg = opaque;
	125	uint64_t mant;
	126	uint16_t exp;
	127	/* we save the real CPU data (in case of MMX usage only 'mant'
	128	contains the MMX register */
	129	cpu_get_fp80(&mant, &exp, fp_reg->d);
	130	qemu_put_be64s(f, &mant);
	131	qemu_put_be16s(f, &exp);
	132	}
	133
976b2037	134	static const VMStateInfo vmstate_fpreg = {
0cb892aa JQ	135	.name = "fpreg",
	136	.get = get_fpreg,
	137	.put = put_fpreg,
	138	};
	139
3c8ce630 JQ	140	static int get_fpreg_1_mmx(QEMUFile f, void opaque, size_t size)
	141	{
	142	union x86_longdouble *p = opaque;
	143	uint64_t mant;
	144
	145	qemu_get_be64s(f, &mant);
	146	p->mant = mant;
	147	p->exp = 0xffff;
	148	return 0;
	149	}
	150
976b2037	151	static const VMStateInfo vmstate_fpreg_1_mmx = {
0cb892aa JQ	152	.name = "fpreg_1_mmx",
	153	.get = get_fpreg_1_mmx,
	154	.put = put_fpreg_error,
	155	};
	156
3c8ce630 JQ	157	static int get_fpreg_1_no_mmx(QEMUFile f, void opaque, size_t size)
	158	{
	159	union x86_longdouble *p = opaque;
	160	uint64_t mant;
	161
	162	qemu_get_be64s(f, &mant);
	163	fp64_to_fp80(p, mant);
	164	return 0;
	165	}
	166
976b2037	167	static const VMStateInfo vmstate_fpreg_1_no_mmx = {
0cb892aa JQ	168	.name = "fpreg_1_no_mmx",
	169	.get = get_fpreg_1_no_mmx,
	170	.put = put_fpreg_error,
	171	};
	172
	173	static bool fpregs_is_0(void *opaque, int version_id)
	174	{
	175	CPUState *env = opaque;
	176
	177	return (env->fpregs_format_vmstate == 0);
	178	}
	179
	180	static bool fpregs_is_1_mmx(void *opaque, int version_id)
	181	{
	182	CPUState *env = opaque;
	183	int guess_mmx;
	184
	185	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	186	(env->fpus_vmstate & 0x3800) == 0);
	187	return (guess_mmx && (env->fpregs_format_vmstate == 1));
	188	}
	189
	190	static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
	191	{
	192	CPUState *env = opaque;
	193	int guess_mmx;
	194
	195	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	196	(env->fpus_vmstate & 0x3800) == 0);
	197	return (!guess_mmx && (env->fpregs_format_vmstate == 1));
	198	}
	199
	200	#define VMSTATE_FP_REGS(_field, _state, _n) \
	201	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
	202	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
	203	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
	204
3c8ce630 JQ	205	#else
	206	static int get_fpreg(QEMUFile f, void opaque, size_t size)
	207	{
	208	FPReg *fp_reg = opaque;
	209
	210	qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
	211	return 0;
	212	}
	213
	214	static void put_fpreg(QEMUFile f, void opaque, size_t size)
	215	{
	216	FPReg *fp_reg = opaque;
	217	/* if we use doubles for float emulation, we save the doubles to
	218	avoid losing information in case of MMX usage. It can give
	219	problems if the image is restored on a CPU where long
	220	doubles are used instead. */
	221	qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
	222	}
	223
0cb892aa JQ	224	const VMStateInfo vmstate_fpreg = {
	225	.name = "fpreg",
	226	.get = get_fpreg,
	227	.put = put_fpreg,
	228	};
	229
3c8ce630 JQ	230	static int get_fpreg_0_mmx(QEMUFile f, void opaque, size_t size)
	231	{
	232	FPReg *fp_reg = opaque;
	233	uint64_t mant;
	234	uint16_t exp;
	235
	236	qemu_get_be64s(f, &mant);
	237	qemu_get_be16s(f, &exp);
	238	fp_reg->mmx.MMX_Q(0) = mant;
	239	return 0;
	240	}
	241
0cb892aa JQ	242	const VMStateInfo vmstate_fpreg_0_mmx = {
	243	.name = "fpreg_0_mmx",
	244	.get = get_fpreg_0_mmx,
	245	.put = put_fpreg_error,
	246	};
	247
3c8ce630 JQ	248	static int get_fpreg_0_no_mmx(QEMUFile f, void opaque, size_t size)
	249	{
	250	FPReg *fp_reg = opaque;
	251	uint64_t mant;
	252	uint16_t exp;
	253
	254	qemu_get_be64s(f, &mant);
	255	qemu_get_be16s(f, &exp);
	256
	257	fp_reg->d = cpu_set_fp80(mant, exp);
	258	return 0;
	259	}
	260
0cb892aa JQ	261	const VMStateInfo vmstate_fpreg_0_no_mmx = {
	262	.name = "fpreg_0_no_mmx",
	263	.get = get_fpreg_0_no_mmx,
	264	.put = put_fpreg_error,
	265	};
	266
	267	static bool fpregs_is_1(void *opaque, int version_id)
	268	{
	269	CPUState *env = opaque;
	270
	271	return env->fpregs_format_vmstate == 1;
	272	}
	273
	274	static bool fpregs_is_0_mmx(void *opaque, int version_id)
	275	{
	276	CPUState *env = opaque;
	277	int guess_mmx;
	278
	279	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	280	(env->fpus_vmstate & 0x3800) == 0);
	281	return guess_mmx && env->fpregs_format_vmstate == 0;
	282	}
	283
	284	static bool fpregs_is_0_no_mmx(void *opaque, int version_id)
	285	{
	286	CPUState *env = opaque;
	287	int guess_mmx;
	288
	289	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	290	(env->fpus_vmstate & 0x3800) == 0);
	291	return !guess_mmx && env->fpregs_format_vmstate == 0;
	292	}
	293
	294	#define VMSTATE_FP_REGS(_field, _state, _n) \
	295	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \
	296	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \
	297	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)
	298
3c8ce630 JQ	299	#endif /* USE_X86LDOUBLE */
3c8ce630 JQ	300
0cb892aa JQ	301	static bool version_is_5(void *opaque, int version_id)
	302	{
	303	return version_id == 5;
	304	}
	305
	306	#ifdef TARGET_X86_64
	307	static bool less_than_7(void *opaque, int version_id)
	308	{
	309	return version_id < 7;
	310	}
	311
	312	static int get_uint64_as_uint32(QEMUFile f, void pv, size_t size)
	313	{
	314	uint64_t *v = pv;
	315	*v = qemu_get_be32(f);
	316	return 0;
	317	}
	318
	319	static void put_uint64_as_uint32(QEMUFile f, void pv, size_t size)
	320	{
	321	uint64_t *v = pv;
	322	qemu_put_be32(f, *v);
	323	}
	324
976b2037	325	static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
0cb892aa JQ	326	.name = "uint64_as_uint32",
	327	.get = get_uint64_as_uint32,
	328	.put = put_uint64_as_uint32,
	329	};
	330
	331	#define VMSTATE_HACK_UINT32(_f, _s, _t) \
d4829d49	332	VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
0cb892aa JQ	333	#endif
0cb892aa JQ	334
c4c38c8c	335	static void cpu_pre_save(void *opaque)
8dd3dca3 AJ	336	{
8dd3dca3 AJ	337	CPUState *env = opaque;
0e607a80	338	int i;
8dd3dca3	339
8dd3dca3	340	/* FPU */
67b8f419	341	env->fpus_vmstate = (env->fpus & ~0x3800) \| (env->fpstt & 0x7) << 11;
cdc0c58f	342	env->fptag_vmstate = 0;
8dd3dca3	343	for(i = 0; i < 8; i++) {
cdc0c58f	344	env->fptag_vmstate \|= ((!env->fptags[i]) << i);
8dd3dca3 AJ	345	}
8dd3dca3 AJ	346
8dd3dca3	347	#ifdef USE_X86LDOUBLE
60a902f1	348	env->fpregs_format_vmstate = 0;
8dd3dca3	349	#else
60a902f1	350	env->fpregs_format_vmstate = 1;
8dd3dca3	351	#endif
c4c38c8c JQ	352	}
c4c38c8c JQ	353
468f6581 JQ	354	static int cpu_post_load(void *opaque, int version_id)
	355	{
	356	CPUState *env = opaque;
	357	int i;
	358
	359	/* XXX: restore FPU round state */
	360	env->fpstt = (env->fpus_vmstate >> 11) & 7;
	361	env->fpus = env->fpus_vmstate & ~0x3800;
	362	env->fptag_vmstate ^= 0xff;
	363	for(i = 0; i < 8; i++) {
	364	env->fptags[i] = (env->fptag_vmstate >> i) & 1;
	365	}
	366
	367	cpu_breakpoint_remove_all(env, BP_CPU);
	368	cpu_watchpoint_remove_all(env, BP_CPU);
	369	for (i = 0; i < 4; i++)
	370	hw_breakpoint_insert(env, i);
	371
1e7fbc6d JQ	372	tlb_flush(env, 1);
1e7fbc6d JQ	373	return 0;
468f6581 JQ	374	}
468f6581 JQ	375
976b2037	376	static const VMStateDescription vmstate_cpu = {
0cb892aa JQ	377	.name = "cpu",
	378	.version_id = CPU_SAVE_VERSION,
	379	.minimum_version_id = 3,
	380	.minimum_version_id_old = 3,
	381	.pre_save = cpu_pre_save,
0cb892aa JQ	382	.post_load = cpu_post_load,
	383	.fields = (VMStateField []) {
	384	VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
	385	VMSTATE_UINTTL(eip, CPUState),
	386	VMSTATE_UINTTL(eflags, CPUState),
	387	VMSTATE_UINT32(hflags, CPUState),
	388	/* FPU */
	389	VMSTATE_UINT16(fpuc, CPUState),
	390	VMSTATE_UINT16(fpus_vmstate, CPUState),
	391	VMSTATE_UINT16(fptag_vmstate, CPUState),
	392	VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
	393	VMSTATE_FP_REGS(fpregs, CPUState, 8),
	394
	395	VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
	396	VMSTATE_SEGMENT(ldt, CPUState),
	397	VMSTATE_SEGMENT(tr, CPUState),
	398	VMSTATE_SEGMENT(gdt, CPUState),
	399	VMSTATE_SEGMENT(idt, CPUState),
	400
	401	VMSTATE_UINT32(sysenter_cs, CPUState),
	402	#ifdef TARGET_X86_64
	403	/* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
	404	VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
	405	VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
	406	VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
	407	VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
8dd3dca3	408	#else
0cb892aa JQ	409	VMSTATE_UINTTL(sysenter_esp, CPUState),
0cb892aa JQ	410	VMSTATE_UINTTL(sysenter_eip, CPUState),
3c8ce630	411	#endif
8dd3dca3	412
0cb892aa JQ	413	VMSTATE_UINTTL(cr[0], CPUState),
	414	VMSTATE_UINTTL(cr[2], CPUState),
	415	VMSTATE_UINTTL(cr[3], CPUState),
	416	VMSTATE_UINTTL(cr[4], CPUState),
	417	VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
	418	/* MMU */
	419	VMSTATE_INT32(a20_mask, CPUState),
	420	/* XMM */
	421	VMSTATE_UINT32(mxcsr, CPUState),
	422	VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),
8dd3dca3 AJ	423
8dd3dca3 AJ	424	#ifdef TARGET_X86_64
0cb892aa JQ	425	VMSTATE_UINT64(efer, CPUState),
	426	VMSTATE_UINT64(star, CPUState),
	427	VMSTATE_UINT64(lstar, CPUState),
	428	VMSTATE_UINT64(cstar, CPUState),
	429	VMSTATE_UINT64(fmask, CPUState),
	430	VMSTATE_UINT64(kernelgsbase, CPUState),
8dd3dca3	431	#endif
0cb892aa JQ	432	VMSTATE_UINT32_V(smbase, CPUState, 4),
	433
	434	VMSTATE_UINT64_V(pat, CPUState, 5),
	435	VMSTATE_UINT32_V(hflags2, CPUState, 5),
	436
	437	VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
	438	VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
	439	VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
	440	VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
	441	VMSTATE_UINT64_V(intercept, CPUState, 5),
	442	VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
	443	VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
	444	VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
	445	VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
	446	VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
	447	VMSTATE_UINT8_V(v_tpr, CPUState, 5),
dd5e3b17	448	/* MTRRs */
0cb892aa JQ	449	VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
	450	VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
	451	VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
	452	/* KVM-related states */
0e607a80	453	VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
0cb892aa JQ	454	VMSTATE_UINT32_V(mp_state, CPUState, 9),
0cb892aa JQ	455	VMSTATE_UINT64_V(tsc, CPUState, 9),
31827373	456	VMSTATE_INT32_V(exception_injected, CPUState, 11),
a0fb002c JK	457	VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
	458	VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
	459	VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
	460	VMSTATE_UINT8_V(has_error_code, CPUState, 11),
	461	VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
0cb892aa JQ	462	/* MCE */
	463	VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
	464	VMSTATE_UINT64_V(mcg_status, CPUState, 10),
	465	VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
	466	VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
	467	/* rdtscp */
	468	VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
1a03675d GC	469	/* KVM pvclock msr */
	470	VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
	471	VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
f1665b21 SY	472	/* XSAVE related fields */
	473	VMSTATE_UINT64_V(xcr0, CPUState, 12),
	474	VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
	475	VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
0cb892aa	476	VMSTATE_END_OF_LIST()
a0fb002c	477	/* The above list is not sorted /wrt version numbers, watch out! */
79c4f6b0	478	}
0cb892aa	479	};
79c4f6b0	480
0cb892aa JQ	481	void cpu_save(QEMUFile f, void opaque)
	482	{
	483	vmstate_save_state(f, &vmstate_cpu, opaque);
	484	}
1f76b9b9	485
0cb892aa JQ	486	int cpu_load(QEMUFile f, void opaque, int version_id)
	487	{
	488	return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
8dd3dca3	489	}