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Commit | Line | Data |
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8dd3dca3 AJ |
1 | #include "hw/hw.h" |
2 | #include "hw/boards.h" | |
3 | #include "hw/pc.h" | |
4 | #include "hw/isa.h" | |
5 | ||
6 | #include "exec-all.h" | |
7 | ||
8 | void register_machines(void) | |
9 | { | |
10 | qemu_register_machine(&pc_machine); | |
11 | qemu_register_machine(&isapc_machine); | |
12 | } | |
13 | ||
14 | static void cpu_put_seg(QEMUFile *f, SegmentCache *dt) | |
15 | { | |
16 | qemu_put_be32(f, dt->selector); | |
17 | qemu_put_betl(f, dt->base); | |
18 | qemu_put_be32(f, dt->limit); | |
19 | qemu_put_be32(f, dt->flags); | |
20 | } | |
21 | ||
22 | static void cpu_get_seg(QEMUFile *f, SegmentCache *dt) | |
23 | { | |
24 | dt->selector = qemu_get_be32(f); | |
25 | dt->base = qemu_get_betl(f); | |
26 | dt->limit = qemu_get_be32(f); | |
27 | dt->flags = qemu_get_be32(f); | |
28 | } | |
29 | ||
30 | void cpu_save(QEMUFile *f, void *opaque) | |
31 | { | |
32 | CPUState *env = opaque; | |
33 | uint16_t fptag, fpus, fpuc, fpregs_format; | |
34 | uint32_t hflags; | |
7caa33f7 | 35 | int32_t a20_mask; |
8dd3dca3 AJ |
36 | int i; |
37 | ||
38 | for(i = 0; i < CPU_NB_REGS; i++) | |
39 | qemu_put_betls(f, &env->regs[i]); | |
40 | qemu_put_betls(f, &env->eip); | |
41 | qemu_put_betls(f, &env->eflags); | |
42 | hflags = env->hflags; /* XXX: suppress most of the redundant hflags */ | |
43 | qemu_put_be32s(f, &hflags); | |
44 | ||
45 | /* FPU */ | |
46 | fpuc = env->fpuc; | |
47 | fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; | |
48 | fptag = 0; | |
49 | for(i = 0; i < 8; i++) { | |
50 | fptag |= ((!env->fptags[i]) << i); | |
51 | } | |
52 | ||
53 | qemu_put_be16s(f, &fpuc); | |
54 | qemu_put_be16s(f, &fpus); | |
55 | qemu_put_be16s(f, &fptag); | |
56 | ||
57 | #ifdef USE_X86LDOUBLE | |
58 | fpregs_format = 0; | |
59 | #else | |
60 | fpregs_format = 1; | |
61 | #endif | |
62 | qemu_put_be16s(f, &fpregs_format); | |
63 | ||
64 | for(i = 0; i < 8; i++) { | |
65 | #ifdef USE_X86LDOUBLE | |
66 | { | |
67 | uint64_t mant; | |
68 | uint16_t exp; | |
69 | /* we save the real CPU data (in case of MMX usage only 'mant' | |
70 | contains the MMX register */ | |
71 | cpu_get_fp80(&mant, &exp, env->fpregs[i].d); | |
72 | qemu_put_be64(f, mant); | |
73 | qemu_put_be16(f, exp); | |
74 | } | |
75 | #else | |
76 | /* if we use doubles for float emulation, we save the doubles to | |
77 | avoid losing information in case of MMX usage. It can give | |
78 | problems if the image is restored on a CPU where long | |
79 | doubles are used instead. */ | |
80 | qemu_put_be64(f, env->fpregs[i].mmx.MMX_Q(0)); | |
81 | #endif | |
82 | } | |
83 | ||
84 | for(i = 0; i < 6; i++) | |
85 | cpu_put_seg(f, &env->segs[i]); | |
86 | cpu_put_seg(f, &env->ldt); | |
87 | cpu_put_seg(f, &env->tr); | |
88 | cpu_put_seg(f, &env->gdt); | |
89 | cpu_put_seg(f, &env->idt); | |
90 | ||
f5049756 | 91 | qemu_put_be32s(f, &env->sysenter_cs); |
2436b61a AZ |
92 | qemu_put_betls(f, &env->sysenter_esp); |
93 | qemu_put_betls(f, &env->sysenter_eip); | |
8dd3dca3 AJ |
94 | |
95 | qemu_put_betls(f, &env->cr[0]); | |
96 | qemu_put_betls(f, &env->cr[2]); | |
97 | qemu_put_betls(f, &env->cr[3]); | |
98 | qemu_put_betls(f, &env->cr[4]); | |
99 | ||
100 | for(i = 0; i < 8; i++) | |
101 | qemu_put_betls(f, &env->dr[i]); | |
102 | ||
103 | /* MMU */ | |
7caa33f7 | 104 | a20_mask = (int32_t) env->a20_mask; |
b6c4f71f | 105 | qemu_put_sbe32s(f, &a20_mask); |
8dd3dca3 AJ |
106 | |
107 | /* XMM */ | |
108 | qemu_put_be32s(f, &env->mxcsr); | |
109 | for(i = 0; i < CPU_NB_REGS; i++) { | |
110 | qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(0)); | |
111 | qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(1)); | |
112 | } | |
113 | ||
114 | #ifdef TARGET_X86_64 | |
115 | qemu_put_be64s(f, &env->efer); | |
116 | qemu_put_be64s(f, &env->star); | |
117 | qemu_put_be64s(f, &env->lstar); | |
118 | qemu_put_be64s(f, &env->cstar); | |
119 | qemu_put_be64s(f, &env->fmask); | |
120 | qemu_put_be64s(f, &env->kernelgsbase); | |
121 | #endif | |
122 | qemu_put_be32s(f, &env->smbase); | |
5cc1d1e6 FB |
123 | |
124 | qemu_put_be64s(f, &env->pat); | |
125 | qemu_put_be32s(f, &env->hflags2); | |
5cc1d1e6 FB |
126 | |
127 | qemu_put_be64s(f, &env->vm_hsave); | |
128 | qemu_put_be64s(f, &env->vm_vmcb); | |
129 | qemu_put_be64s(f, &env->tsc_offset); | |
130 | qemu_put_be64s(f, &env->intercept); | |
131 | qemu_put_be16s(f, &env->intercept_cr_read); | |
132 | qemu_put_be16s(f, &env->intercept_cr_write); | |
133 | qemu_put_be16s(f, &env->intercept_dr_read); | |
134 | qemu_put_be16s(f, &env->intercept_dr_write); | |
135 | qemu_put_be32s(f, &env->intercept_exceptions); | |
136 | qemu_put_8s(f, &env->v_tpr); | |
8dd3dca3 AJ |
137 | } |
138 | ||
139 | #ifdef USE_X86LDOUBLE | |
140 | /* XXX: add that in a FPU generic layer */ | |
141 | union x86_longdouble { | |
142 | uint64_t mant; | |
143 | uint16_t exp; | |
144 | }; | |
145 | ||
146 | #define MANTD1(fp) (fp & ((1LL << 52) - 1)) | |
147 | #define EXPBIAS1 1023 | |
148 | #define EXPD1(fp) ((fp >> 52) & 0x7FF) | |
149 | #define SIGND1(fp) ((fp >> 32) & 0x80000000) | |
150 | ||
151 | static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp) | |
152 | { | |
153 | int e; | |
154 | /* mantissa */ | |
155 | p->mant = (MANTD1(temp) << 11) | (1LL << 63); | |
156 | /* exponent + sign */ | |
157 | e = EXPD1(temp) - EXPBIAS1 + 16383; | |
158 | e |= SIGND1(temp) >> 16; | |
159 | p->exp = e; | |
160 | } | |
161 | #endif | |
162 | ||
163 | int cpu_load(QEMUFile *f, void *opaque, int version_id) | |
164 | { | |
165 | CPUState *env = opaque; | |
166 | int i, guess_mmx; | |
167 | uint32_t hflags; | |
168 | uint16_t fpus, fpuc, fptag, fpregs_format; | |
7caa33f7 | 169 | int32_t a20_mask; |
8dd3dca3 | 170 | |
9656f324 | 171 | if (version_id != 3 && version_id != 4 && version_id != 5 |
2436b61a | 172 | && version_id != 6 && version_id != 7) |
8dd3dca3 AJ |
173 | return -EINVAL; |
174 | for(i = 0; i < CPU_NB_REGS; i++) | |
175 | qemu_get_betls(f, &env->regs[i]); | |
176 | qemu_get_betls(f, &env->eip); | |
177 | qemu_get_betls(f, &env->eflags); | |
178 | qemu_get_be32s(f, &hflags); | |
179 | ||
180 | qemu_get_be16s(f, &fpuc); | |
181 | qemu_get_be16s(f, &fpus); | |
182 | qemu_get_be16s(f, &fptag); | |
183 | qemu_get_be16s(f, &fpregs_format); | |
184 | ||
185 | /* NOTE: we cannot always restore the FPU state if the image come | |
186 | from a host with a different 'USE_X86LDOUBLE' define. We guess | |
187 | if we are in an MMX state to restore correctly in that case. */ | |
188 | guess_mmx = ((fptag == 0xff) && (fpus & 0x3800) == 0); | |
189 | for(i = 0; i < 8; i++) { | |
190 | uint64_t mant; | |
191 | uint16_t exp; | |
192 | ||
193 | switch(fpregs_format) { | |
194 | case 0: | |
195 | mant = qemu_get_be64(f); | |
196 | exp = qemu_get_be16(f); | |
197 | #ifdef USE_X86LDOUBLE | |
198 | env->fpregs[i].d = cpu_set_fp80(mant, exp); | |
199 | #else | |
200 | /* difficult case */ | |
201 | if (guess_mmx) | |
202 | env->fpregs[i].mmx.MMX_Q(0) = mant; | |
203 | else | |
204 | env->fpregs[i].d = cpu_set_fp80(mant, exp); | |
205 | #endif | |
206 | break; | |
207 | case 1: | |
208 | mant = qemu_get_be64(f); | |
209 | #ifdef USE_X86LDOUBLE | |
210 | { | |
211 | union x86_longdouble *p; | |
212 | /* difficult case */ | |
213 | p = (void *)&env->fpregs[i]; | |
214 | if (guess_mmx) { | |
215 | p->mant = mant; | |
216 | p->exp = 0xffff; | |
217 | } else { | |
218 | fp64_to_fp80(p, mant); | |
219 | } | |
220 | } | |
221 | #else | |
222 | env->fpregs[i].mmx.MMX_Q(0) = mant; | |
223 | #endif | |
224 | break; | |
225 | default: | |
226 | return -EINVAL; | |
227 | } | |
228 | } | |
229 | ||
230 | env->fpuc = fpuc; | |
231 | /* XXX: restore FPU round state */ | |
232 | env->fpstt = (fpus >> 11) & 7; | |
233 | env->fpus = fpus & ~0x3800; | |
234 | fptag ^= 0xff; | |
235 | for(i = 0; i < 8; i++) { | |
236 | env->fptags[i] = (fptag >> i) & 1; | |
237 | } | |
238 | ||
239 | for(i = 0; i < 6; i++) | |
240 | cpu_get_seg(f, &env->segs[i]); | |
241 | cpu_get_seg(f, &env->ldt); | |
242 | cpu_get_seg(f, &env->tr); | |
243 | cpu_get_seg(f, &env->gdt); | |
244 | cpu_get_seg(f, &env->idt); | |
245 | ||
246 | qemu_get_be32s(f, &env->sysenter_cs); | |
2436b61a AZ |
247 | if (version_id >= 7) { |
248 | qemu_get_betls(f, &env->sysenter_esp); | |
249 | qemu_get_betls(f, &env->sysenter_eip); | |
250 | } else { | |
251 | qemu_get_be32s(f, &env->sysenter_esp); | |
252 | qemu_get_be32s(f, &env->sysenter_eip); | |
253 | } | |
8dd3dca3 AJ |
254 | |
255 | qemu_get_betls(f, &env->cr[0]); | |
256 | qemu_get_betls(f, &env->cr[2]); | |
257 | qemu_get_betls(f, &env->cr[3]); | |
258 | qemu_get_betls(f, &env->cr[4]); | |
259 | ||
260 | for(i = 0; i < 8; i++) | |
261 | qemu_get_betls(f, &env->dr[i]); | |
262 | ||
263 | /* MMU */ | |
b6c4f71f | 264 | qemu_get_sbe32s(f, &a20_mask); |
7caa33f7 | 265 | env->a20_mask = a20_mask; |
8dd3dca3 AJ |
266 | |
267 | qemu_get_be32s(f, &env->mxcsr); | |
268 | for(i = 0; i < CPU_NB_REGS; i++) { | |
269 | qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(0)); | |
270 | qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(1)); | |
271 | } | |
272 | ||
273 | #ifdef TARGET_X86_64 | |
274 | qemu_get_be64s(f, &env->efer); | |
275 | qemu_get_be64s(f, &env->star); | |
276 | qemu_get_be64s(f, &env->lstar); | |
277 | qemu_get_be64s(f, &env->cstar); | |
278 | qemu_get_be64s(f, &env->fmask); | |
279 | qemu_get_be64s(f, &env->kernelgsbase); | |
280 | #endif | |
5cc1d1e6 | 281 | if (version_id >= 4) { |
8dd3dca3 | 282 | qemu_get_be32s(f, &env->smbase); |
5cc1d1e6 FB |
283 | } |
284 | if (version_id >= 5) { | |
285 | qemu_get_be64s(f, &env->pat); | |
286 | qemu_get_be32s(f, &env->hflags2); | |
9656f324 PB |
287 | if (version_id < 6) |
288 | qemu_get_be32s(f, &env->halted); | |
5cc1d1e6 FB |
289 | |
290 | qemu_get_be64s(f, &env->vm_hsave); | |
291 | qemu_get_be64s(f, &env->vm_vmcb); | |
292 | qemu_get_be64s(f, &env->tsc_offset); | |
293 | qemu_get_be64s(f, &env->intercept); | |
294 | qemu_get_be16s(f, &env->intercept_cr_read); | |
295 | qemu_get_be16s(f, &env->intercept_cr_write); | |
296 | qemu_get_be16s(f, &env->intercept_dr_read); | |
297 | qemu_get_be16s(f, &env->intercept_dr_write); | |
298 | qemu_get_be32s(f, &env->intercept_exceptions); | |
299 | qemu_get_8s(f, &env->v_tpr); | |
300 | } | |
301 | /* XXX: ensure compatiblity for halted bit ? */ | |
302 | /* XXX: compute redundant hflags bits */ | |
8dd3dca3 AJ |
303 | env->hflags = hflags; |
304 | tlb_flush(env, 1); | |
305 | return 0; | |
306 | } |