]> git.proxmox.com Git - qemu.git/blame - target-i386/op.c
use the TCG code generator
[qemu.git] / target-i386 / op.c
CommitLineData
2c0262af
FB
1/*
2 * i386 micro operations
5fafdf24 3 *
2c0262af
FB
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
f68dd770 20
f68dd770 21#define ASM_SOFTMMU
2c0262af
FB
22#include "exec.h"
23
24/* n must be a constant to be efficient */
14ce26e7 25static inline target_long lshift(target_long x, int n)
2c0262af
FB
26{
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31}
32
33/* we define the various pieces of code used by the JIT */
34
35#define REG EAX
36#define REGNAME _EAX
37#include "opreg_template.h"
38#undef REG
39#undef REGNAME
40
41#define REG ECX
42#define REGNAME _ECX
43#include "opreg_template.h"
44#undef REG
45#undef REGNAME
46
47#define REG EDX
48#define REGNAME _EDX
49#include "opreg_template.h"
50#undef REG
51#undef REGNAME
52
53#define REG EBX
54#define REGNAME _EBX
55#include "opreg_template.h"
56#undef REG
57#undef REGNAME
58
59#define REG ESP
60#define REGNAME _ESP
61#include "opreg_template.h"
62#undef REG
63#undef REGNAME
64
65#define REG EBP
66#define REGNAME _EBP
67#include "opreg_template.h"
68#undef REG
69#undef REGNAME
70
71#define REG ESI
72#define REGNAME _ESI
73#include "opreg_template.h"
74#undef REG
75#undef REGNAME
76
77#define REG EDI
78#define REGNAME _EDI
79#include "opreg_template.h"
80#undef REG
81#undef REGNAME
82
14ce26e7
FB
83#ifdef TARGET_X86_64
84
85#define REG (env->regs[8])
86#define REGNAME _R8
87#include "opreg_template.h"
88#undef REG
89#undef REGNAME
90
91#define REG (env->regs[9])
92#define REGNAME _R9
93#include "opreg_template.h"
94#undef REG
95#undef REGNAME
96
97#define REG (env->regs[10])
98#define REGNAME _R10
99#include "opreg_template.h"
100#undef REG
101#undef REGNAME
102
103#define REG (env->regs[11])
104#define REGNAME _R11
105#include "opreg_template.h"
106#undef REG
107#undef REGNAME
108
109#define REG (env->regs[12])
110#define REGNAME _R12
111#include "opreg_template.h"
112#undef REG
113#undef REGNAME
114
115#define REG (env->regs[13])
116#define REGNAME _R13
117#include "opreg_template.h"
118#undef REG
119#undef REGNAME
120
121#define REG (env->regs[14])
122#define REGNAME _R14
123#include "opreg_template.h"
124#undef REG
125#undef REGNAME
126
127#define REG (env->regs[15])
128#define REGNAME _R15
129#include "opreg_template.h"
130#undef REG
131#undef REGNAME
132
133#endif
134
2c0262af
FB
135/* operations with flags */
136
137/* update flags with T0 and T1 (add/sub case) */
138void OPPROTO op_update2_cc(void)
139{
140 CC_SRC = T1;
141 CC_DST = T0;
142}
143
144/* update flags with T0 (logic operation case) */
145void OPPROTO op_update1_cc(void)
146{
147 CC_DST = T0;
148}
149
150void OPPROTO op_update_neg_cc(void)
151{
152 CC_SRC = -T0;
153 CC_DST = T0;
154}
155
156void OPPROTO op_cmpl_T0_T1_cc(void)
157{
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160}
161
162void OPPROTO op_update_inc_cc(void)
163{
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166}
167
168void OPPROTO op_testl_T0_T1_cc(void)
169{
170 CC_DST = T0 & T1;
171}
172
173/* operations without flags */
174
2c0262af
FB
175void OPPROTO op_negl_T0(void)
176{
177 T0 = -T0;
178}
179
180void OPPROTO op_incl_T0(void)
181{
182 T0++;
183}
184
185void OPPROTO op_decl_T0(void)
186{
187 T0--;
188}
189
190void OPPROTO op_notl_T0(void)
191{
192 T0 = ~T0;
193}
194
2c0262af 195/* multiply/divide */
d36cd60e
FB
196
197/* XXX: add eflags optimizations */
198/* XXX: add non P4 style flags */
199
2c0262af
FB
200void OPPROTO op_mulb_AL_T0(void)
201{
202 unsigned int res;
203 res = (uint8_t)EAX * (uint8_t)T0;
14ce26e7 204 EAX = (EAX & ~0xffff) | res;
d36cd60e 205 CC_DST = res;
2c0262af
FB
206 CC_SRC = (res & 0xff00);
207}
208
209void OPPROTO op_imulb_AL_T0(void)
210{
211 int res;
212 res = (int8_t)EAX * (int8_t)T0;
14ce26e7 213 EAX = (EAX & ~0xffff) | (res & 0xffff);
d36cd60e 214 CC_DST = res;
2c0262af
FB
215 CC_SRC = (res != (int8_t)res);
216}
217
218void OPPROTO op_mulw_AX_T0(void)
219{
220 unsigned int res;
221 res = (uint16_t)EAX * (uint16_t)T0;
14ce26e7
FB
222 EAX = (EAX & ~0xffff) | (res & 0xffff);
223 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 224 CC_DST = res;
2c0262af
FB
225 CC_SRC = res >> 16;
226}
227
228void OPPROTO op_imulw_AX_T0(void)
229{
230 int res;
231 res = (int16_t)EAX * (int16_t)T0;
14ce26e7
FB
232 EAX = (EAX & ~0xffff) | (res & 0xffff);
233 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 234 CC_DST = res;
2c0262af
FB
235 CC_SRC = (res != (int16_t)res);
236}
237
238void OPPROTO op_mull_EAX_T0(void)
239{
240 uint64_t res;
241 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
14ce26e7
FB
242 EAX = (uint32_t)res;
243 EDX = (uint32_t)(res >> 32);
244 CC_DST = (uint32_t)res;
245 CC_SRC = (uint32_t)(res >> 32);
2c0262af
FB
246}
247
248void OPPROTO op_imull_EAX_T0(void)
249{
250 int64_t res;
251 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
31313213
FB
252 EAX = (uint32_t)(res);
253 EDX = (uint32_t)(res >> 32);
d36cd60e 254 CC_DST = res;
2c0262af
FB
255 CC_SRC = (res != (int32_t)res);
256}
257
258void OPPROTO op_imulw_T0_T1(void)
259{
260 int res;
261 res = (int16_t)T0 * (int16_t)T1;
262 T0 = res;
d36cd60e 263 CC_DST = res;
2c0262af
FB
264 CC_SRC = (res != (int16_t)res);
265}
266
267void OPPROTO op_imull_T0_T1(void)
268{
269 int64_t res;
270 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
271 T0 = res;
d36cd60e 272 CC_DST = res;
2c0262af
FB
273 CC_SRC = (res != (int32_t)res);
274}
275
14ce26e7
FB
276#ifdef TARGET_X86_64
277void OPPROTO op_mulq_EAX_T0(void)
278{
279 helper_mulq_EAX_T0();
280}
281
282void OPPROTO op_imulq_EAX_T0(void)
283{
284 helper_imulq_EAX_T0();
285}
286
287void OPPROTO op_imulq_T0_T1(void)
288{
289 helper_imulq_T0_T1();
290}
291#endif
292
2c0262af 293/* division, flags are undefined */
2c0262af
FB
294
295void OPPROTO op_divb_AL_T0(void)
296{
297 unsigned int num, den, q, r;
298
299 num = (EAX & 0xffff);
300 den = (T0 & 0xff);
301 if (den == 0) {
2c0262af
FB
302 raise_exception(EXCP00_DIVZ);
303 }
45bbbb46
FB
304 q = (num / den);
305 if (q > 0xff)
306 raise_exception(EXCP00_DIVZ);
307 q &= 0xff;
2c0262af 308 r = (num % den) & 0xff;
14ce26e7 309 EAX = (EAX & ~0xffff) | (r << 8) | q;
2c0262af
FB
310}
311
312void OPPROTO op_idivb_AL_T0(void)
313{
314 int num, den, q, r;
315
316 num = (int16_t)EAX;
317 den = (int8_t)T0;
318 if (den == 0) {
2c0262af
FB
319 raise_exception(EXCP00_DIVZ);
320 }
45bbbb46
FB
321 q = (num / den);
322 if (q != (int8_t)q)
323 raise_exception(EXCP00_DIVZ);
324 q &= 0xff;
2c0262af 325 r = (num % den) & 0xff;
14ce26e7 326 EAX = (EAX & ~0xffff) | (r << 8) | q;
2c0262af
FB
327}
328
329void OPPROTO op_divw_AX_T0(void)
330{
331 unsigned int num, den, q, r;
332
333 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
334 den = (T0 & 0xffff);
335 if (den == 0) {
2c0262af
FB
336 raise_exception(EXCP00_DIVZ);
337 }
45bbbb46
FB
338 q = (num / den);
339 if (q > 0xffff)
340 raise_exception(EXCP00_DIVZ);
341 q &= 0xffff;
2c0262af 342 r = (num % den) & 0xffff;
14ce26e7
FB
343 EAX = (EAX & ~0xffff) | q;
344 EDX = (EDX & ~0xffff) | r;
2c0262af
FB
345}
346
347void OPPROTO op_idivw_AX_T0(void)
348{
349 int num, den, q, r;
350
351 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
352 den = (int16_t)T0;
353 if (den == 0) {
2c0262af
FB
354 raise_exception(EXCP00_DIVZ);
355 }
45bbbb46
FB
356 q = (num / den);
357 if (q != (int16_t)q)
358 raise_exception(EXCP00_DIVZ);
359 q &= 0xffff;
2c0262af 360 r = (num % den) & 0xffff;
14ce26e7
FB
361 EAX = (EAX & ~0xffff) | q;
362 EDX = (EDX & ~0xffff) | r;
2c0262af
FB
363}
364
14ce26e7
FB
365#ifdef TARGET_X86_64
366void OPPROTO op_divq_EAX_T0(void)
367{
368 helper_divq_EAX_T0();
369}
370
371void OPPROTO op_idivq_EAX_T0(void)
372{
373 helper_idivq_EAX_T0();
374}
375#endif
376
2c0262af
FB
377/* constant load & misc op */
378
14ce26e7 379/* XXX: consistent names */
2c0262af
FB
380void OPPROTO op_addl_T1_im(void)
381{
382 T1 += PARAM1;
383}
384
385void OPPROTO op_movl_T1_A0(void)
386{
387 T1 = A0;
388}
389
2c0262af
FB
390void OPPROTO op_addl_A0_AL(void)
391{
14ce26e7
FB
392 A0 = (uint32_t)(A0 + (EAX & 0xff));
393}
394
395#ifdef WORDS_BIGENDIAN
396typedef union UREG64 {
397 struct { uint16_t v3, v2, v1, v0; } w;
398 struct { uint32_t v1, v0; } l;
399 uint64_t q;
400} UREG64;
401#else
402typedef union UREG64 {
403 struct { uint16_t v0, v1, v2, v3; } w;
404 struct { uint32_t v0, v1; } l;
405 uint64_t q;
406} UREG64;
407#endif
408
14ce26e7
FB
409#define PARAMQ1 \
410({\
411 UREG64 __p;\
412 __p.l.v1 = PARAM1;\
413 __p.l.v0 = PARAM2;\
414 __p.q;\
5fafdf24 415})
14ce26e7 416
0573fbfc
TS
417#ifdef TARGET_X86_64
418
14ce26e7
FB
419void OPPROTO op_addq_A0_AL(void)
420{
421 A0 = (A0 + (EAX & 0xff));
422}
423
424#endif
425
2c0262af
FB
426/* memory access */
427
61382a50 428#define MEMSUFFIX _raw
2c0262af
FB
429#include "ops_mem.h"
430
61382a50 431#if !defined(CONFIG_USER_ONLY)
f68dd770 432#define MEMSUFFIX _kernel
2c0262af
FB
433#include "ops_mem.h"
434
f68dd770 435#define MEMSUFFIX _user
2c0262af 436#include "ops_mem.h"
61382a50 437#endif
2c0262af 438
2c0262af
FB
439void OPPROTO op_hlt(void)
440{
3d7374c5
FB
441 helper_hlt();
442}
443
444void OPPROTO op_monitor(void)
445{
446 helper_monitor();
447}
448
449void OPPROTO op_mwait(void)
450{
451 helper_mwait();
2c0262af
FB
452}
453
454void OPPROTO op_debug(void)
455{
456 env->exception_index = EXCP_DEBUG;
457 cpu_loop_exit();
458}
459
460void OPPROTO op_raise_interrupt(void)
461{
a8ede8ba 462 int intno, next_eip_addend;
2c0262af 463 intno = PARAM1;
a8ede8ba
FB
464 next_eip_addend = PARAM2;
465 raise_interrupt(intno, 1, 0, next_eip_addend);
2c0262af
FB
466}
467
468void OPPROTO op_raise_exception(void)
469{
470 int exception_index;
471 exception_index = PARAM1;
472 raise_exception(exception_index);
473}
474
475void OPPROTO op_into(void)
476{
477 int eflags;
478 eflags = cc_table[CC_OP].compute_all();
479 if (eflags & CC_O) {
480 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
481 }
482 FORCE_RET();
483}
484
485void OPPROTO op_cli(void)
486{
487 env->eflags &= ~IF_MASK;
488}
489
490void OPPROTO op_sti(void)
491{
492 env->eflags |= IF_MASK;
493}
494
495void OPPROTO op_set_inhibit_irq(void)
496{
497 env->hflags |= HF_INHIBIT_IRQ_MASK;
498}
499
500void OPPROTO op_reset_inhibit_irq(void)
501{
502 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
503}
504
3b21e03e
FB
505void OPPROTO op_rsm(void)
506{
507 helper_rsm();
508}
509
2c0262af
FB
510#if 0
511/* vm86plus instructions */
512void OPPROTO op_cli_vm(void)
513{
514 env->eflags &= ~VIF_MASK;
515}
516
517void OPPROTO op_sti_vm(void)
518{
519 env->eflags |= VIF_MASK;
520 if (env->eflags & VIP_MASK) {
521 EIP = PARAM1;
522 raise_exception(EXCP0D_GPF);
523 }
524 FORCE_RET();
525}
526#endif
527
528void OPPROTO op_boundw(void)
529{
530 int low, high, v;
14ce26e7
FB
531 low = ldsw(A0);
532 high = ldsw(A0 + 2);
2c0262af
FB
533 v = (int16_t)T0;
534 if (v < low || v > high) {
2c0262af
FB
535 raise_exception(EXCP05_BOUND);
536 }
537 FORCE_RET();
538}
539
540void OPPROTO op_boundl(void)
541{
542 int low, high, v;
14ce26e7
FB
543 low = ldl(A0);
544 high = ldl(A0 + 4);
2c0262af
FB
545 v = T0;
546 if (v < low || v > high) {
2c0262af
FB
547 raise_exception(EXCP05_BOUND);
548 }
549 FORCE_RET();
550}
551
552void OPPROTO op_cmpxchg8b(void)
553{
554 helper_cmpxchg8b();
555}
556
88fe8a41
TS
557void OPPROTO op_single_step(void)
558{
559 helper_single_step();
560}
561
2c0262af
FB
562/* multiple size ops */
563
564#define ldul ldl
565
566#define SHIFT 0
567#include "ops_template.h"
568#undef SHIFT
569
570#define SHIFT 1
571#include "ops_template.h"
572#undef SHIFT
573
574#define SHIFT 2
575#include "ops_template.h"
576#undef SHIFT
577
14ce26e7
FB
578#ifdef TARGET_X86_64
579
580#define SHIFT 3
581#include "ops_template.h"
582#undef SHIFT
583
584#endif
585
2c0262af
FB
586/* sign extend */
587
588void OPPROTO op_movsbl_T0_T0(void)
589{
590 T0 = (int8_t)T0;
591}
592
593void OPPROTO op_movzbl_T0_T0(void)
594{
595 T0 = (uint8_t)T0;
596}
597
598void OPPROTO op_movswl_T0_T0(void)
599{
600 T0 = (int16_t)T0;
601}
602
603void OPPROTO op_movzwl_T0_T0(void)
604{
605 T0 = (uint16_t)T0;
606}
607
608void OPPROTO op_movswl_EAX_AX(void)
609{
0499e4a0 610 EAX = (uint32_t)((int16_t)EAX);
2c0262af
FB
611}
612
14ce26e7 613#ifdef TARGET_X86_64
664e0f19
FB
614void OPPROTO op_movslq_T0_T0(void)
615{
616 T0 = (int32_t)T0;
617}
618
14ce26e7
FB
619void OPPROTO op_movslq_RAX_EAX(void)
620{
621 EAX = (int32_t)EAX;
622}
623#endif
624
2c0262af
FB
625void OPPROTO op_movsbw_AX_AL(void)
626{
14ce26e7 627 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
2c0262af
FB
628}
629
630void OPPROTO op_movslq_EDX_EAX(void)
631{
0499e4a0 632 EDX = (uint32_t)((int32_t)EAX >> 31);
2c0262af
FB
633}
634
635void OPPROTO op_movswl_DX_AX(void)
636{
14ce26e7
FB
637 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
638}
639
640#ifdef TARGET_X86_64
641void OPPROTO op_movsqo_RDX_RAX(void)
642{
643 EDX = (int64_t)EAX >> 63;
2c0262af 644}
14ce26e7 645#endif
2c0262af
FB
646
647/* string ops helpers */
648
649void OPPROTO op_addl_ESI_T0(void)
650{
14ce26e7 651 ESI = (uint32_t)(ESI + T0);
2c0262af
FB
652}
653
654void OPPROTO op_addw_ESI_T0(void)
655{
656 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
657}
658
659void OPPROTO op_addl_EDI_T0(void)
660{
14ce26e7 661 EDI = (uint32_t)(EDI + T0);
2c0262af
FB
662}
663
664void OPPROTO op_addw_EDI_T0(void)
665{
666 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
667}
668
669void OPPROTO op_decl_ECX(void)
670{
14ce26e7 671 ECX = (uint32_t)(ECX - 1);
2c0262af
FB
672}
673
674void OPPROTO op_decw_ECX(void)
675{
676 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
677}
678
14ce26e7
FB
679#ifdef TARGET_X86_64
680void OPPROTO op_addq_ESI_T0(void)
681{
682 ESI = (ESI + T0);
683}
684
685void OPPROTO op_addq_EDI_T0(void)
686{
687 EDI = (EDI + T0);
688}
689
690void OPPROTO op_decq_ECX(void)
691{
692 ECX--;
693}
694#endif
695
2c0262af
FB
696void OPPROTO op_rdtsc(void)
697{
698 helper_rdtsc();
699}
700
df01e0fc
AZ
701void OPPROTO op_rdpmc(void)
702{
703 helper_rdpmc();
704}
705
2c0262af
FB
706void OPPROTO op_cpuid(void)
707{
708 helper_cpuid();
709}
710
61a8c4ec
FB
711void OPPROTO op_enter_level(void)
712{
713 helper_enter_level(PARAM1, PARAM2);
714}
715
8f091a59
FB
716#ifdef TARGET_X86_64
717void OPPROTO op_enter64_level(void)
718{
719 helper_enter64_level(PARAM1, PARAM2);
720}
721#endif
722
023fe10d
FB
723void OPPROTO op_sysenter(void)
724{
725 helper_sysenter();
726}
727
728void OPPROTO op_sysexit(void)
729{
730 helper_sysexit();
731}
732
14ce26e7
FB
733#ifdef TARGET_X86_64
734void OPPROTO op_syscall(void)
735{
06c2f506 736 helper_syscall(PARAM1);
14ce26e7
FB
737}
738
739void OPPROTO op_sysret(void)
740{
741 helper_sysret(PARAM1);
742}
743#endif
744
2c0262af
FB
745void OPPROTO op_rdmsr(void)
746{
747 helper_rdmsr();
748}
749
750void OPPROTO op_wrmsr(void)
751{
752 helper_wrmsr();
753}
754
755/* bcd */
756
757/* XXX: exception */
758void OPPROTO op_aam(void)
759{
760 int base = PARAM1;
761 int al, ah;
762 al = EAX & 0xff;
763 ah = al / base;
764 al = al % base;
765 EAX = (EAX & ~0xffff) | al | (ah << 8);
766 CC_DST = al;
767}
768
769void OPPROTO op_aad(void)
770{
771 int base = PARAM1;
772 int al, ah;
773 al = EAX & 0xff;
774 ah = (EAX >> 8) & 0xff;
775 al = ((ah * base) + al) & 0xff;
776 EAX = (EAX & ~0xffff) | al;
777 CC_DST = al;
778}
779
780void OPPROTO op_aaa(void)
781{
782 int icarry;
783 int al, ah, af;
784 int eflags;
785
786 eflags = cc_table[CC_OP].compute_all();
787 af = eflags & CC_A;
788 al = EAX & 0xff;
789 ah = (EAX >> 8) & 0xff;
790
791 icarry = (al > 0xf9);
792 if (((al & 0x0f) > 9 ) || af) {
793 al = (al + 6) & 0x0f;
794 ah = (ah + 1 + icarry) & 0xff;
795 eflags |= CC_C | CC_A;
796 } else {
797 eflags &= ~(CC_C | CC_A);
798 al &= 0x0f;
799 }
800 EAX = (EAX & ~0xffff) | al | (ah << 8);
801 CC_SRC = eflags;
647c5930 802 FORCE_RET();
2c0262af
FB
803}
804
805void OPPROTO op_aas(void)
806{
807 int icarry;
808 int al, ah, af;
809 int eflags;
810
811 eflags = cc_table[CC_OP].compute_all();
812 af = eflags & CC_A;
813 al = EAX & 0xff;
814 ah = (EAX >> 8) & 0xff;
815
816 icarry = (al < 6);
817 if (((al & 0x0f) > 9 ) || af) {
818 al = (al - 6) & 0x0f;
819 ah = (ah - 1 - icarry) & 0xff;
820 eflags |= CC_C | CC_A;
821 } else {
822 eflags &= ~(CC_C | CC_A);
823 al &= 0x0f;
824 }
825 EAX = (EAX & ~0xffff) | al | (ah << 8);
826 CC_SRC = eflags;
647c5930 827 FORCE_RET();
2c0262af
FB
828}
829
830void OPPROTO op_daa(void)
831{
832 int al, af, cf;
833 int eflags;
834
835 eflags = cc_table[CC_OP].compute_all();
836 cf = eflags & CC_C;
837 af = eflags & CC_A;
838 al = EAX & 0xff;
839
840 eflags = 0;
841 if (((al & 0x0f) > 9 ) || af) {
842 al = (al + 6) & 0xff;
843 eflags |= CC_A;
844 }
845 if ((al > 0x9f) || cf) {
846 al = (al + 0x60) & 0xff;
847 eflags |= CC_C;
848 }
849 EAX = (EAX & ~0xff) | al;
850 /* well, speed is not an issue here, so we compute the flags by hand */
851 eflags |= (al == 0) << 6; /* zf */
852 eflags |= parity_table[al]; /* pf */
853 eflags |= (al & 0x80); /* sf */
854 CC_SRC = eflags;
647c5930 855 FORCE_RET();
2c0262af
FB
856}
857
858void OPPROTO op_das(void)
859{
860 int al, al1, af, cf;
861 int eflags;
862
863 eflags = cc_table[CC_OP].compute_all();
864 cf = eflags & CC_C;
865 af = eflags & CC_A;
866 al = EAX & 0xff;
867
868 eflags = 0;
869 al1 = al;
870 if (((al & 0x0f) > 9 ) || af) {
871 eflags |= CC_A;
872 if (al < 6 || cf)
873 eflags |= CC_C;
874 al = (al - 6) & 0xff;
875 }
876 if ((al1 > 0x99) || cf) {
877 al = (al - 0x60) & 0xff;
878 eflags |= CC_C;
879 }
880 EAX = (EAX & ~0xff) | al;
881 /* well, speed is not an issue here, so we compute the flags by hand */
882 eflags |= (al == 0) << 6; /* zf */
883 eflags |= parity_table[al]; /* pf */
884 eflags |= (al & 0x80); /* sf */
885 CC_SRC = eflags;
647c5930 886 FORCE_RET();
2c0262af
FB
887}
888
889/* segment handling */
890
891/* never use it with R_CS */
892void OPPROTO op_movl_seg_T0(void)
893{
3415a4dd 894 load_seg(PARAM1, T0);
2c0262af
FB
895}
896
897/* faster VM86 version */
898void OPPROTO op_movl_seg_T0_vm(void)
899{
900 int selector;
901 SegmentCache *sc;
3b46e624 902
2c0262af
FB
903 selector = T0 & 0xffff;
904 /* env->segs[] access */
905 sc = (SegmentCache *)((char *)env + PARAM1);
906 sc->selector = selector;
14ce26e7 907 sc->base = (selector << 4);
2c0262af
FB
908}
909
910void OPPROTO op_movl_T0_seg(void)
911{
912 T0 = env->segs[PARAM1].selector;
913}
914
2c0262af
FB
915void OPPROTO op_lsl(void)
916{
917 helper_lsl();
918}
919
920void OPPROTO op_lar(void)
921{
922 helper_lar();
923}
924
3ab493de
FB
925void OPPROTO op_verr(void)
926{
927 helper_verr();
928}
929
930void OPPROTO op_verw(void)
931{
932 helper_verw();
933}
934
935void OPPROTO op_arpl(void)
936{
937 if ((T0 & 3) < (T1 & 3)) {
938 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
939 T0 = (T0 & ~3) | (T1 & 3);
940 T1 = CC_Z;
941 } else {
942 T1 = 0;
943 }
944 FORCE_RET();
945}
3b46e624 946
3ab493de
FB
947void OPPROTO op_arpl_update(void)
948{
949 int eflags;
950 eflags = cc_table[CC_OP].compute_all();
951 CC_SRC = (eflags & ~CC_Z) | T1;
952}
3b46e624 953
2c0262af
FB
954/* T0: segment, T1:eip */
955void OPPROTO op_ljmp_protected_T0_T1(void)
956{
08cea4ee 957 helper_ljmp_protected_T0_T1(PARAM1);
2c0262af
FB
958}
959
960void OPPROTO op_lcall_real_T0_T1(void)
961{
962 helper_lcall_real_T0_T1(PARAM1, PARAM2);
963}
964
965void OPPROTO op_lcall_protected_T0_T1(void)
966{
967 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
968}
969
970void OPPROTO op_iret_real(void)
971{
972 helper_iret_real(PARAM1);
973}
974
975void OPPROTO op_iret_protected(void)
976{
08cea4ee 977 helper_iret_protected(PARAM1, PARAM2);
2c0262af
FB
978}
979
980void OPPROTO op_lret_protected(void)
981{
982 helper_lret_protected(PARAM1, PARAM2);
983}
984
985void OPPROTO op_lldt_T0(void)
986{
987 helper_lldt_T0();
988}
989
990void OPPROTO op_ltr_T0(void)
991{
992 helper_ltr_T0();
993}
994
0573fbfc 995/* CR registers access. */
2c0262af
FB
996void OPPROTO op_movl_crN_T0(void)
997{
998 helper_movl_crN_T0(PARAM1);
999}
1000
0573fbfc
TS
1001/* These pseudo-opcodes check for SVM intercepts. */
1002void OPPROTO op_svm_check_intercept(void)
1003{
1004 A0 = PARAM1 & PARAM2;
1005 svm_check_intercept(PARAMQ1);
1006}
1007
1008void OPPROTO op_svm_check_intercept_param(void)
1009{
1010 A0 = PARAM1 & PARAM2;
1011 svm_check_intercept_param(PARAMQ1, T1);
1012}
1013
1014void OPPROTO op_svm_vmexit(void)
1015{
1016 A0 = PARAM1 & PARAM2;
1017 vmexit(PARAMQ1, T1);
1018}
1019
1020void OPPROTO op_geneflags(void)
1021{
1022 CC_SRC = cc_table[CC_OP].compute_all();
1023}
1024
1025/* This pseudo-opcode checks for IO intercepts. */
1026#if !defined(CONFIG_USER_ONLY)
1027void OPPROTO op_svm_check_intercept_io(void)
1028{
1029 A0 = PARAM1 & PARAM2;
1030 /* PARAMQ1 = TYPE (0 = OUT, 1 = IN; 4 = STRING; 8 = REP)
1031 T0 = PORT
1032 T1 = next eip */
1033 stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), T1);
1034 /* ASIZE does not appear on real hw */
1035 svm_check_intercept_param(SVM_EXIT_IOIO,
1036 (PARAMQ1 & ~SVM_IOIO_ASIZE_MASK) |
1037 ((T0 & 0xffff) << 16));
1038}
1039#endif
1040
5fafdf24 1041#if !defined(CONFIG_USER_ONLY)
39c61f49
FB
1042void OPPROTO op_movtl_T0_cr8(void)
1043{
39c61f49 1044 T0 = cpu_get_apic_tpr(env);
39c61f49 1045}
82e41634 1046#endif
39c61f49 1047
2c0262af
FB
1048/* DR registers access */
1049void OPPROTO op_movl_drN_T0(void)
1050{
1051 helper_movl_drN_T0(PARAM1);
1052}
1053
1054void OPPROTO op_lmsw_T0(void)
1055{
710c15a2
FB
1056 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1057 if already set to one. */
1058 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
2c0262af
FB
1059 helper_movl_crN_T0(0);
1060}
1061
1062void OPPROTO op_invlpg_A0(void)
1063{
1064 helper_invlpg(A0);
1065}
1066
1067void OPPROTO op_movl_T0_env(void)
1068{
1069 T0 = *(uint32_t *)((char *)env + PARAM1);
1070}
1071
1072void OPPROTO op_movl_env_T0(void)
1073{
1074 *(uint32_t *)((char *)env + PARAM1) = T0;
1075}
1076
1077void OPPROTO op_movl_env_T1(void)
1078{
1079 *(uint32_t *)((char *)env + PARAM1) = T1;
1080}
1081
14ce26e7
FB
1082void OPPROTO op_movtl_T0_env(void)
1083{
1084 T0 = *(target_ulong *)((char *)env + PARAM1);
1085}
1086
1087void OPPROTO op_movtl_env_T0(void)
1088{
1089 *(target_ulong *)((char *)env + PARAM1) = T0;
1090}
1091
1092void OPPROTO op_movtl_T1_env(void)
1093{
1094 T1 = *(target_ulong *)((char *)env + PARAM1);
1095}
1096
1097void OPPROTO op_movtl_env_T1(void)
1098{
1099 *(target_ulong *)((char *)env + PARAM1) = T1;
1100}
1101
2c0262af
FB
1102void OPPROTO op_clts(void)
1103{
1104 env->cr[0] &= ~CR0_TS_MASK;
7eee2a50 1105 env->hflags &= ~HF_TS_MASK;
2c0262af
FB
1106}
1107
1108/* flags handling */
1109
14ce26e7
FB
1110void OPPROTO op_jmp_label(void)
1111{
1112 GOTO_LABEL_PARAM(1);
2c0262af
FB
1113}
1114
14ce26e7 1115void OPPROTO op_jnz_T0_label(void)
2c0262af
FB
1116{
1117 if (T0)
14ce26e7 1118 GOTO_LABEL_PARAM(1);
39c61f49 1119 FORCE_RET();
14ce26e7
FB
1120}
1121
1122void OPPROTO op_jz_T0_label(void)
1123{
1124 if (!T0)
1125 GOTO_LABEL_PARAM(1);
39c61f49 1126 FORCE_RET();
2c0262af
FB
1127}
1128
1129/* slow set cases (compute x86 flags) */
1130void OPPROTO op_seto_T0_cc(void)
1131{
1132 int eflags;
1133 eflags = cc_table[CC_OP].compute_all();
1134 T0 = (eflags >> 11) & 1;
1135}
1136
1137void OPPROTO op_setb_T0_cc(void)
1138{
1139 T0 = cc_table[CC_OP].compute_c();
1140}
1141
1142void OPPROTO op_setz_T0_cc(void)
1143{
1144 int eflags;
1145 eflags = cc_table[CC_OP].compute_all();
1146 T0 = (eflags >> 6) & 1;
1147}
1148
1149void OPPROTO op_setbe_T0_cc(void)
1150{
1151 int eflags;
1152 eflags = cc_table[CC_OP].compute_all();
1153 T0 = (eflags & (CC_Z | CC_C)) != 0;
1154}
1155
1156void OPPROTO op_sets_T0_cc(void)
1157{
1158 int eflags;
1159 eflags = cc_table[CC_OP].compute_all();
1160 T0 = (eflags >> 7) & 1;
1161}
1162
1163void OPPROTO op_setp_T0_cc(void)
1164{
1165 int eflags;
1166 eflags = cc_table[CC_OP].compute_all();
1167 T0 = (eflags >> 2) & 1;
1168}
1169
1170void OPPROTO op_setl_T0_cc(void)
1171{
1172 int eflags;
1173 eflags = cc_table[CC_OP].compute_all();
1174 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1175}
1176
1177void OPPROTO op_setle_T0_cc(void)
1178{
1179 int eflags;
1180 eflags = cc_table[CC_OP].compute_all();
1181 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1182}
1183
1184void OPPROTO op_xor_T0_1(void)
1185{
1186 T0 ^= 1;
1187}
1188
0b9dc5e4
FB
1189void OPPROTO op_mov_T0_cc(void)
1190{
1191 T0 = cc_table[CC_OP].compute_all();
1192}
1193
4136f33c 1194/* XXX: clear VIF/VIP in all ops ? */
2c0262af
FB
1195
1196void OPPROTO op_movl_eflags_T0(void)
1197{
4b7aba51 1198 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
2c0262af
FB
1199}
1200
1201void OPPROTO op_movw_eflags_T0(void)
1202{
4b7aba51 1203 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
4136f33c
FB
1204}
1205
1206void OPPROTO op_movl_eflags_T0_io(void)
1207{
4b7aba51 1208 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
4136f33c
FB
1209}
1210
1211void OPPROTO op_movw_eflags_T0_io(void)
1212{
4b7aba51 1213 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
2c0262af
FB
1214}
1215
1216void OPPROTO op_movl_eflags_T0_cpl0(void)
1217{
4b7aba51 1218 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
2c0262af
FB
1219}
1220
1221void OPPROTO op_movw_eflags_T0_cpl0(void)
1222{
4b7aba51 1223 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
2c0262af
FB
1224}
1225
1226#if 0
1227/* vm86plus version */
1228void OPPROTO op_movw_eflags_T0_vm(void)
1229{
1230 int eflags;
1231 eflags = T0;
1232 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1233 DF = 1 - (2 * ((eflags >> 10) & 1));
1234 /* we also update some system flags as in user mode */
1235 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1236 (eflags & FL_UPDATE_MASK16);
1237 if (eflags & IF_MASK) {
1238 env->eflags |= VIF_MASK;
1239 if (env->eflags & VIP_MASK) {
1240 EIP = PARAM1;
1241 raise_exception(EXCP0D_GPF);
1242 }
1243 }
1244 FORCE_RET();
1245}
1246
1247void OPPROTO op_movl_eflags_T0_vm(void)
1248{
1249 int eflags;
1250 eflags = T0;
1251 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1252 DF = 1 - (2 * ((eflags >> 10) & 1));
1253 /* we also update some system flags as in user mode */
1254 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1255 (eflags & FL_UPDATE_MASK32);
1256 if (eflags & IF_MASK) {
1257 env->eflags |= VIF_MASK;
1258 if (env->eflags & VIP_MASK) {
1259 EIP = PARAM1;
1260 raise_exception(EXCP0D_GPF);
1261 }
1262 }
1263 FORCE_RET();
1264}
1265#endif
1266
1267/* XXX: compute only O flag */
1268void OPPROTO op_movb_eflags_T0(void)
1269{
1270 int of;
1271 of = cc_table[CC_OP].compute_all() & CC_O;
1272 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1273}
1274
1275void OPPROTO op_movl_T0_eflags(void)
1276{
1277 int eflags;
1278 eflags = cc_table[CC_OP].compute_all();
1279 eflags |= (DF & DF_MASK);
1280 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1281 T0 = eflags;
1282}
1283
1284/* vm86plus version */
1285#if 0
1286void OPPROTO op_movl_T0_eflags_vm(void)
1287{
1288 int eflags;
1289 eflags = cc_table[CC_OP].compute_all();
1290 eflags |= (DF & DF_MASK);
1291 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1292 if (env->eflags & VIF_MASK)
1293 eflags |= IF_MASK;
1294 T0 = eflags;
1295}
1296#endif
1297
1298void OPPROTO op_cld(void)
1299{
1300 DF = 1;
1301}
1302
1303void OPPROTO op_std(void)
1304{
1305 DF = -1;
1306}
1307
1308void OPPROTO op_clc(void)
1309{
1310 int eflags;
1311 eflags = cc_table[CC_OP].compute_all();
1312 eflags &= ~CC_C;
1313 CC_SRC = eflags;
1314}
1315
1316void OPPROTO op_stc(void)
1317{
1318 int eflags;
1319 eflags = cc_table[CC_OP].compute_all();
1320 eflags |= CC_C;
1321 CC_SRC = eflags;
1322}
1323
1324void OPPROTO op_cmc(void)
1325{
1326 int eflags;
1327 eflags = cc_table[CC_OP].compute_all();
1328 eflags ^= CC_C;
1329 CC_SRC = eflags;
1330}
1331
1332void OPPROTO op_salc(void)
1333{
1334 int cf;
1335 cf = cc_table[CC_OP].compute_c();
1336 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1337}
1338
1339static int compute_all_eflags(void)
1340{
1341 return CC_SRC;
1342}
1343
1344static int compute_c_eflags(void)
1345{
1346 return CC_SRC & CC_C;
1347}
1348
2c0262af
FB
1349CCTable cc_table[CC_OP_NB] = {
1350 [CC_OP_DYNAMIC] = { /* should never happen */ },
1351
1352 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1353
d36cd60e
FB
1354 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1355 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1356 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
2c0262af
FB
1357
1358 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1359 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1360 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1361
1362 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1363 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1364 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1365
1366 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1367 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1368 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
3b46e624 1369
2c0262af
FB
1370 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1371 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1372 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
3b46e624 1373
2c0262af
FB
1374 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1375 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1376 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
3b46e624 1377
2c0262af
FB
1378 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1379 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1380 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
3b46e624 1381
2c0262af
FB
1382 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1383 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1384 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
3b46e624 1385
2c0262af
FB
1386 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1387 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1388 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1389
1390 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1391 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1392 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
14ce26e7
FB
1393
1394#ifdef TARGET_X86_64
1395 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1396
1397 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1398
1399 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1400
1401 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
3b46e624 1402
14ce26e7 1403 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
3b46e624 1404
14ce26e7 1405 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
3b46e624 1406
14ce26e7
FB
1407 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1408
1409 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1410
1411 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1412
1413 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1414#endif
2c0262af
FB
1415};
1416
1417/* floating point support. Some of the code for complicated x87
1418 functions comes from the LGPL'ed x86 emulator found in the Willows
1419 TWIN windows emulator. */
1420
2c0262af
FB
1421/* fp load FT0 */
1422
1423void OPPROTO op_flds_FT0_A0(void)
1424{
1425#ifdef USE_FP_CONVERT
14ce26e7 1426 FP_CONVERT.i32 = ldl(A0);
2c0262af
FB
1427 FT0 = FP_CONVERT.f;
1428#else
14ce26e7 1429 FT0 = ldfl(A0);
2c0262af
FB
1430#endif
1431}
1432
1433void OPPROTO op_fldl_FT0_A0(void)
1434{
1435#ifdef USE_FP_CONVERT
14ce26e7 1436 FP_CONVERT.i64 = ldq(A0);
2c0262af
FB
1437 FT0 = FP_CONVERT.d;
1438#else
14ce26e7 1439 FT0 = ldfq(A0);
2c0262af
FB
1440#endif
1441}
1442
1443/* helpers are needed to avoid static constant reference. XXX: find a better way */
1444#ifdef USE_INT_TO_FLOAT_HELPERS
1445
1446void helper_fild_FT0_A0(void)
1447{
14ce26e7 1448 FT0 = (CPU86_LDouble)ldsw(A0);
2c0262af
FB
1449}
1450
1451void helper_fildl_FT0_A0(void)
1452{
14ce26e7 1453 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
2c0262af
FB
1454}
1455
1456void helper_fildll_FT0_A0(void)
1457{
14ce26e7 1458 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
2c0262af
FB
1459}
1460
1461void OPPROTO op_fild_FT0_A0(void)
1462{
1463 helper_fild_FT0_A0();
1464}
1465
1466void OPPROTO op_fildl_FT0_A0(void)
1467{
1468 helper_fildl_FT0_A0();
1469}
1470
1471void OPPROTO op_fildll_FT0_A0(void)
1472{
1473 helper_fildll_FT0_A0();
1474}
1475
1476#else
1477
1478void OPPROTO op_fild_FT0_A0(void)
1479{
1480#ifdef USE_FP_CONVERT
14ce26e7 1481 FP_CONVERT.i32 = ldsw(A0);
2c0262af
FB
1482 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1483#else
14ce26e7 1484 FT0 = (CPU86_LDouble)ldsw(A0);
2c0262af
FB
1485#endif
1486}
1487
1488void OPPROTO op_fildl_FT0_A0(void)
1489{
1490#ifdef USE_FP_CONVERT
14ce26e7 1491 FP_CONVERT.i32 = (int32_t) ldl(A0);
2c0262af
FB
1492 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1493#else
14ce26e7 1494 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
2c0262af
FB
1495#endif
1496}
1497
1498void OPPROTO op_fildll_FT0_A0(void)
1499{
1500#ifdef USE_FP_CONVERT
14ce26e7 1501 FP_CONVERT.i64 = (int64_t) ldq(A0);
2c0262af
FB
1502 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1503#else
14ce26e7 1504 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
2c0262af
FB
1505#endif
1506}
1507#endif
1508
1509/* fp load ST0 */
1510
1511void OPPROTO op_flds_ST0_A0(void)
1512{
1513 int new_fpstt;
1514 new_fpstt = (env->fpstt - 1) & 7;
1515#ifdef USE_FP_CONVERT
14ce26e7 1516 FP_CONVERT.i32 = ldl(A0);
664e0f19 1517 env->fpregs[new_fpstt].d = FP_CONVERT.f;
2c0262af 1518#else
664e0f19 1519 env->fpregs[new_fpstt].d = ldfl(A0);
2c0262af
FB
1520#endif
1521 env->fpstt = new_fpstt;
1522 env->fptags[new_fpstt] = 0; /* validate stack entry */
1523}
1524
1525void OPPROTO op_fldl_ST0_A0(void)
1526{
1527 int new_fpstt;
1528 new_fpstt = (env->fpstt - 1) & 7;
1529#ifdef USE_FP_CONVERT
14ce26e7 1530 FP_CONVERT.i64 = ldq(A0);
664e0f19 1531 env->fpregs[new_fpstt].d = FP_CONVERT.d;
2c0262af 1532#else
664e0f19 1533 env->fpregs[new_fpstt].d = ldfq(A0);
2c0262af
FB
1534#endif
1535 env->fpstt = new_fpstt;
1536 env->fptags[new_fpstt] = 0; /* validate stack entry */
1537}
1538
2c0262af
FB
1539void OPPROTO op_fldt_ST0_A0(void)
1540{
1541 helper_fldt_ST0_A0();
1542}
2c0262af
FB
1543
1544/* helpers are needed to avoid static constant reference. XXX: find a better way */
1545#ifdef USE_INT_TO_FLOAT_HELPERS
1546
1547void helper_fild_ST0_A0(void)
1548{
1549 int new_fpstt;
1550 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1551 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
2c0262af
FB
1552 env->fpstt = new_fpstt;
1553 env->fptags[new_fpstt] = 0; /* validate stack entry */
1554}
1555
1556void helper_fildl_ST0_A0(void)
1557{
1558 int new_fpstt;
1559 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1560 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
2c0262af
FB
1561 env->fpstt = new_fpstt;
1562 env->fptags[new_fpstt] = 0; /* validate stack entry */
1563}
1564
1565void helper_fildll_ST0_A0(void)
1566{
1567 int new_fpstt;
1568 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1569 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
2c0262af
FB
1570 env->fpstt = new_fpstt;
1571 env->fptags[new_fpstt] = 0; /* validate stack entry */
1572}
1573
1574void OPPROTO op_fild_ST0_A0(void)
1575{
1576 helper_fild_ST0_A0();
1577}
1578
1579void OPPROTO op_fildl_ST0_A0(void)
1580{
1581 helper_fildl_ST0_A0();
1582}
1583
1584void OPPROTO op_fildll_ST0_A0(void)
1585{
1586 helper_fildll_ST0_A0();
1587}
1588
1589#else
1590
1591void OPPROTO op_fild_ST0_A0(void)
1592{
1593 int new_fpstt;
1594 new_fpstt = (env->fpstt - 1) & 7;
1595#ifdef USE_FP_CONVERT
14ce26e7 1596 FP_CONVERT.i32 = ldsw(A0);
664e0f19 1597 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1598#else
664e0f19 1599 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
2c0262af
FB
1600#endif
1601 env->fpstt = new_fpstt;
1602 env->fptags[new_fpstt] = 0; /* validate stack entry */
1603}
1604
1605void OPPROTO op_fildl_ST0_A0(void)
1606{
1607 int new_fpstt;
1608 new_fpstt = (env->fpstt - 1) & 7;
1609#ifdef USE_FP_CONVERT
14ce26e7 1610 FP_CONVERT.i32 = (int32_t) ldl(A0);
664e0f19 1611 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1612#else
664e0f19 1613 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
2c0262af
FB
1614#endif
1615 env->fpstt = new_fpstt;
1616 env->fptags[new_fpstt] = 0; /* validate stack entry */
1617}
1618
1619void OPPROTO op_fildll_ST0_A0(void)
1620{
1621 int new_fpstt;
1622 new_fpstt = (env->fpstt - 1) & 7;
1623#ifdef USE_FP_CONVERT
14ce26e7 1624 FP_CONVERT.i64 = (int64_t) ldq(A0);
664e0f19 1625 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
2c0262af 1626#else
664e0f19 1627 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
2c0262af
FB
1628#endif
1629 env->fpstt = new_fpstt;
1630 env->fptags[new_fpstt] = 0; /* validate stack entry */
1631}
1632
1633#endif
1634
1635/* fp store */
1636
1637void OPPROTO op_fsts_ST0_A0(void)
1638{
1639#ifdef USE_FP_CONVERT
1640 FP_CONVERT.f = (float)ST0;
14ce26e7 1641 stfl(A0, FP_CONVERT.f);
2c0262af 1642#else
14ce26e7 1643 stfl(A0, (float)ST0);
2c0262af 1644#endif
6eea2b1b 1645 FORCE_RET();
2c0262af
FB
1646}
1647
1648void OPPROTO op_fstl_ST0_A0(void)
1649{
14ce26e7 1650 stfq(A0, (double)ST0);
6eea2b1b 1651 FORCE_RET();
2c0262af
FB
1652}
1653
2c0262af
FB
1654void OPPROTO op_fstt_ST0_A0(void)
1655{
1656 helper_fstt_ST0_A0();
1657}
2c0262af
FB
1658
1659void OPPROTO op_fist_ST0_A0(void)
1660{
1661#if defined(__sparc__) && !defined(__sparc_v9__)
1662 register CPU86_LDouble d asm("o0");
1663#else
1664 CPU86_LDouble d;
1665#endif
1666 int val;
1667
1668 d = ST0;
7a0e1f41 1669 val = floatx_to_int32(d, &env->fp_status);
2c0262af
FB
1670 if (val != (int16_t)val)
1671 val = -32768;
14ce26e7 1672 stw(A0, val);
6eea2b1b 1673 FORCE_RET();
2c0262af
FB
1674}
1675
1676void OPPROTO op_fistl_ST0_A0(void)
1677{
1678#if defined(__sparc__) && !defined(__sparc_v9__)
1679 register CPU86_LDouble d asm("o0");
1680#else
1681 CPU86_LDouble d;
1682#endif
1683 int val;
1684
1685 d = ST0;
7a0e1f41 1686 val = floatx_to_int32(d, &env->fp_status);
14ce26e7 1687 stl(A0, val);
6eea2b1b 1688 FORCE_RET();
2c0262af
FB
1689}
1690
1691void OPPROTO op_fistll_ST0_A0(void)
1692{
1693#if defined(__sparc__) && !defined(__sparc_v9__)
1694 register CPU86_LDouble d asm("o0");
1695#else
1696 CPU86_LDouble d;
1697#endif
1698 int64_t val;
1699
1700 d = ST0;
7a0e1f41 1701 val = floatx_to_int64(d, &env->fp_status);
14ce26e7 1702 stq(A0, val);
6eea2b1b 1703 FORCE_RET();
2c0262af
FB
1704}
1705
465e9838
FB
1706void OPPROTO op_fistt_ST0_A0(void)
1707{
1708#if defined(__sparc__) && !defined(__sparc_v9__)
1709 register CPU86_LDouble d asm("o0");
1710#else
1711 CPU86_LDouble d;
1712#endif
1713 int val;
1714
1715 d = ST0;
1716 val = floatx_to_int32_round_to_zero(d, &env->fp_status);
1717 if (val != (int16_t)val)
1718 val = -32768;
1719 stw(A0, val);
1720 FORCE_RET();
1721}
1722
1723void OPPROTO op_fisttl_ST0_A0(void)
1724{
1725#if defined(__sparc__) && !defined(__sparc_v9__)
1726 register CPU86_LDouble d asm("o0");
1727#else
1728 CPU86_LDouble d;
1729#endif
1730 int val;
1731
1732 d = ST0;
1733 val = floatx_to_int32_round_to_zero(d, &env->fp_status);
1734 stl(A0, val);
1735 FORCE_RET();
1736}
1737
1738void OPPROTO op_fisttll_ST0_A0(void)
1739{
1740#if defined(__sparc__) && !defined(__sparc_v9__)
1741 register CPU86_LDouble d asm("o0");
1742#else
1743 CPU86_LDouble d;
1744#endif
1745 int64_t val;
1746
1747 d = ST0;
1748 val = floatx_to_int64_round_to_zero(d, &env->fp_status);
1749 stq(A0, val);
1750 FORCE_RET();
1751}
1752
2c0262af
FB
1753void OPPROTO op_fbld_ST0_A0(void)
1754{
1755 helper_fbld_ST0_A0();
1756}
1757
1758void OPPROTO op_fbst_ST0_A0(void)
1759{
1760 helper_fbst_ST0_A0();
1761}
1762
1763/* FPU move */
1764
1765void OPPROTO op_fpush(void)
1766{
1767 fpush();
1768}
1769
1770void OPPROTO op_fpop(void)
1771{
1772 fpop();
1773}
1774
1775void OPPROTO op_fdecstp(void)
1776{
1777 env->fpstt = (env->fpstt - 1) & 7;
1778 env->fpus &= (~0x4700);
1779}
1780
1781void OPPROTO op_fincstp(void)
1782{
1783 env->fpstt = (env->fpstt + 1) & 7;
1784 env->fpus &= (~0x4700);
1785}
1786
5fef40fb
FB
1787void OPPROTO op_ffree_STN(void)
1788{
1789 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1790}
1791
2c0262af
FB
1792void OPPROTO op_fmov_ST0_FT0(void)
1793{
1794 ST0 = FT0;
1795}
1796
1797void OPPROTO op_fmov_FT0_STN(void)
1798{
1799 FT0 = ST(PARAM1);
1800}
1801
1802void OPPROTO op_fmov_ST0_STN(void)
1803{
1804 ST0 = ST(PARAM1);
1805}
1806
1807void OPPROTO op_fmov_STN_ST0(void)
1808{
1809 ST(PARAM1) = ST0;
1810}
1811
1812void OPPROTO op_fxchg_ST0_STN(void)
1813{
1814 CPU86_LDouble tmp;
1815 tmp = ST(PARAM1);
1816 ST(PARAM1) = ST0;
1817 ST0 = tmp;
1818}
1819
1820/* FPU operations */
1821
43fb823b
FB
1822const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
1823
2c0262af
FB
1824void OPPROTO op_fcom_ST0_FT0(void)
1825{
43fb823b
FB
1826 int ret;
1827
1828 ret = floatx_compare(ST0, FT0, &env->fp_status);
1829 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
2c0262af
FB
1830 FORCE_RET();
1831}
1832
2c0262af
FB
1833void OPPROTO op_fucom_ST0_FT0(void)
1834{
43fb823b
FB
1835 int ret;
1836
1837 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
1838 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
2c0262af
FB
1839 FORCE_RET();
1840}
1841
43fb823b
FB
1842const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
1843
2c0262af
FB
1844void OPPROTO op_fcomi_ST0_FT0(void)
1845{
43fb823b
FB
1846 int eflags;
1847 int ret;
1848
1849 ret = floatx_compare(ST0, FT0, &env->fp_status);
2c0262af 1850 eflags = cc_table[CC_OP].compute_all();
43fb823b 1851 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2c0262af
FB
1852 CC_SRC = eflags;
1853 FORCE_RET();
1854}
1855
2c0262af
FB
1856void OPPROTO op_fucomi_ST0_FT0(void)
1857{
43fb823b
FB
1858 int eflags;
1859 int ret;
1860
1861 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2c0262af 1862 eflags = cc_table[CC_OP].compute_all();
43fb823b 1863 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2c0262af
FB
1864 CC_SRC = eflags;
1865 FORCE_RET();
1866}
1867
80043406
FB
1868void OPPROTO op_fcmov_ST0_STN_T0(void)
1869{
1870 if (T0) {
1871 ST0 = ST(PARAM1);
1872 }
1873 FORCE_RET();
1874}
1875
2c0262af
FB
1876void OPPROTO op_fadd_ST0_FT0(void)
1877{
1878 ST0 += FT0;
1879}
1880
1881void OPPROTO op_fmul_ST0_FT0(void)
1882{
1883 ST0 *= FT0;
1884}
1885
1886void OPPROTO op_fsub_ST0_FT0(void)
1887{
1888 ST0 -= FT0;
1889}
1890
1891void OPPROTO op_fsubr_ST0_FT0(void)
1892{
1893 ST0 = FT0 - ST0;
1894}
1895
1896void OPPROTO op_fdiv_ST0_FT0(void)
1897{
2ee73ac3 1898 ST0 = helper_fdiv(ST0, FT0);
2c0262af
FB
1899}
1900
1901void OPPROTO op_fdivr_ST0_FT0(void)
1902{
2ee73ac3 1903 ST0 = helper_fdiv(FT0, ST0);
2c0262af
FB
1904}
1905
1906/* fp operations between STN and ST0 */
1907
1908void OPPROTO op_fadd_STN_ST0(void)
1909{
1910 ST(PARAM1) += ST0;
1911}
1912
1913void OPPROTO op_fmul_STN_ST0(void)
1914{
1915 ST(PARAM1) *= ST0;
1916}
1917
1918void OPPROTO op_fsub_STN_ST0(void)
1919{
1920 ST(PARAM1) -= ST0;
1921}
1922
1923void OPPROTO op_fsubr_STN_ST0(void)
1924{
1925 CPU86_LDouble *p;
1926 p = &ST(PARAM1);
1927 *p = ST0 - *p;
1928}
1929
1930void OPPROTO op_fdiv_STN_ST0(void)
1931{
2ee73ac3
FB
1932 CPU86_LDouble *p;
1933 p = &ST(PARAM1);
1934 *p = helper_fdiv(*p, ST0);
2c0262af
FB
1935}
1936
1937void OPPROTO op_fdivr_STN_ST0(void)
1938{
1939 CPU86_LDouble *p;
1940 p = &ST(PARAM1);
2ee73ac3 1941 *p = helper_fdiv(ST0, *p);
2c0262af
FB
1942}
1943
1944/* misc FPU operations */
1945void OPPROTO op_fchs_ST0(void)
1946{
7a0e1f41 1947 ST0 = floatx_chs(ST0);
2c0262af
FB
1948}
1949
1950void OPPROTO op_fabs_ST0(void)
1951{
7a0e1f41 1952 ST0 = floatx_abs(ST0);
2c0262af
FB
1953}
1954
1955void OPPROTO op_fxam_ST0(void)
1956{
1957 helper_fxam_ST0();
1958}
1959
1960void OPPROTO op_fld1_ST0(void)
1961{
1962 ST0 = f15rk[1];
1963}
1964
1965void OPPROTO op_fldl2t_ST0(void)
1966{
1967 ST0 = f15rk[6];
1968}
1969
1970void OPPROTO op_fldl2e_ST0(void)
1971{
1972 ST0 = f15rk[5];
1973}
1974
1975void OPPROTO op_fldpi_ST0(void)
1976{
1977 ST0 = f15rk[2];
1978}
1979
1980void OPPROTO op_fldlg2_ST0(void)
1981{
1982 ST0 = f15rk[3];
1983}
1984
1985void OPPROTO op_fldln2_ST0(void)
1986{
1987 ST0 = f15rk[4];
1988}
1989
1990void OPPROTO op_fldz_ST0(void)
1991{
1992 ST0 = f15rk[0];
1993}
1994
1995void OPPROTO op_fldz_FT0(void)
1996{
6a8c397d 1997 FT0 = f15rk[0];
2c0262af
FB
1998}
1999
2000/* associated heplers to reduce generated code length and to simplify
2001 relocation (FP constants are usually stored in .rodata section) */
2002
2003void OPPROTO op_f2xm1(void)
2004{
2005 helper_f2xm1();
2006}
2007
2008void OPPROTO op_fyl2x(void)
2009{
2010 helper_fyl2x();
2011}
2012
2013void OPPROTO op_fptan(void)
2014{
2015 helper_fptan();
2016}
2017
2018void OPPROTO op_fpatan(void)
2019{
2020 helper_fpatan();
2021}
2022
2023void OPPROTO op_fxtract(void)
2024{
2025 helper_fxtract();
2026}
2027
2028void OPPROTO op_fprem1(void)
2029{
2030 helper_fprem1();
2031}
2032
2033
2034void OPPROTO op_fprem(void)
2035{
2036 helper_fprem();
2037}
2038
2039void OPPROTO op_fyl2xp1(void)
2040{
2041 helper_fyl2xp1();
2042}
2043
2044void OPPROTO op_fsqrt(void)
2045{
2046 helper_fsqrt();
2047}
2048
2049void OPPROTO op_fsincos(void)
2050{
2051 helper_fsincos();
2052}
2053
2054void OPPROTO op_frndint(void)
2055{
2056 helper_frndint();
2057}
2058
2059void OPPROTO op_fscale(void)
2060{
2061 helper_fscale();
2062}
2063
2064void OPPROTO op_fsin(void)
2065{
2066 helper_fsin();
2067}
2068
2069void OPPROTO op_fcos(void)
2070{
2071 helper_fcos();
2072}
2073
2074void OPPROTO op_fnstsw_A0(void)
2075{
2076 int fpus;
2077 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2078 stw(A0, fpus);
6eea2b1b 2079 FORCE_RET();
2c0262af
FB
2080}
2081
2082void OPPROTO op_fnstsw_EAX(void)
2083{
2084 int fpus;
2085 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2086 EAX = (EAX & ~0xffff) | fpus;
2c0262af
FB
2087}
2088
2089void OPPROTO op_fnstcw_A0(void)
2090{
14ce26e7 2091 stw(A0, env->fpuc);
6eea2b1b 2092 FORCE_RET();
2c0262af
FB
2093}
2094
2095void OPPROTO op_fldcw_A0(void)
2096{
14ce26e7 2097 env->fpuc = lduw(A0);
7a0e1f41 2098 update_fp_status();
2c0262af
FB
2099}
2100
2101void OPPROTO op_fclex(void)
2102{
2103 env->fpus &= 0x7f00;
2104}
2105
2ee73ac3
FB
2106void OPPROTO op_fwait(void)
2107{
2108 if (env->fpus & FPUS_SE)
2109 fpu_raise_exception();
2110 FORCE_RET();
2111}
2112
2c0262af
FB
2113void OPPROTO op_fninit(void)
2114{
2115 env->fpus = 0;
2116 env->fpstt = 0;
2117 env->fpuc = 0x37f;
2118 env->fptags[0] = 1;
2119 env->fptags[1] = 1;
2120 env->fptags[2] = 1;
2121 env->fptags[3] = 1;
2122 env->fptags[4] = 1;
2123 env->fptags[5] = 1;
2124 env->fptags[6] = 1;
2125 env->fptags[7] = 1;
2126}
2127
2128void OPPROTO op_fnstenv_A0(void)
2129{
14ce26e7 2130 helper_fstenv(A0, PARAM1);
2c0262af
FB
2131}
2132
2133void OPPROTO op_fldenv_A0(void)
2134{
14ce26e7 2135 helper_fldenv(A0, PARAM1);
2c0262af
FB
2136}
2137
2138void OPPROTO op_fnsave_A0(void)
2139{
14ce26e7 2140 helper_fsave(A0, PARAM1);
2c0262af
FB
2141}
2142
2143void OPPROTO op_frstor_A0(void)
2144{
14ce26e7 2145 helper_frstor(A0, PARAM1);
2c0262af
FB
2146}
2147
2148/* threading support */
2149void OPPROTO op_lock(void)
2150{
2151 cpu_lock();
2152}
2153
2154void OPPROTO op_unlock(void)
2155{
2156 cpu_unlock();
2157}
2158
14ce26e7
FB
2159/* SSE support */
2160static inline void memcpy16(void *d, void *s)
2161{
2162 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2163 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2164 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2165 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2166}
2167
2168void OPPROTO op_movo(void)
2169{
2170 /* XXX: badly generated code */
2171 XMMReg *d, *s;
2172 d = (XMMReg *)((char *)env + PARAM1);
2173 s = (XMMReg *)((char *)env + PARAM2);
2174 memcpy16(d, s);
2175}
2176
664e0f19
FB
2177void OPPROTO op_movq(void)
2178{
2179 uint64_t *d, *s;
2180 d = (uint64_t *)((char *)env + PARAM1);
2181 s = (uint64_t *)((char *)env + PARAM2);
2182 *d = *s;
2183}
2184
2185void OPPROTO op_movl(void)
2186{
2187 uint32_t *d, *s;
2188 d = (uint32_t *)((char *)env + PARAM1);
2189 s = (uint32_t *)((char *)env + PARAM2);
2190 *d = *s;
2191}
2192
2193void OPPROTO op_movq_env_0(void)
2194{
2195 uint64_t *d;
2196 d = (uint64_t *)((char *)env + PARAM1);
2197 *d = 0;
2198}
2199
14ce26e7
FB
2200void OPPROTO op_fxsave_A0(void)
2201{
2202 helper_fxsave(A0, PARAM1);
2203}
2204
2205void OPPROTO op_fxrstor_A0(void)
2206{
2207 helper_fxrstor(A0, PARAM1);
2208}
664e0f19
FB
2209
2210/* XXX: optimize by storing fptt and fptags in the static cpu state */
2211void OPPROTO op_enter_mmx(void)
2212{
2213 env->fpstt = 0;
2214 *(uint32_t *)(env->fptags) = 0;
2215 *(uint32_t *)(env->fptags + 4) = 0;
2216}
2217
2218void OPPROTO op_emms(void)
2219{
2220 /* set to empty state */
2221 *(uint32_t *)(env->fptags) = 0x01010101;
2222 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2223}
2224
2225#define SHIFT 0
2226#include "ops_sse.h"
2227
2228#define SHIFT 1
2229#include "ops_sse.h"
0573fbfc
TS
2230
2231/* Secure Virtual Machine ops */
2232
2233void OPPROTO op_vmrun(void)
2234{
2235 helper_vmrun(EAX);
2236}
2237
2238void OPPROTO op_vmmcall(void)
2239{
2240 helper_vmmcall();
2241}
2242
2243void OPPROTO op_vmload(void)
2244{
2245 helper_vmload(EAX);
2246}
2247
2248void OPPROTO op_vmsave(void)
2249{
2250 helper_vmsave(EAX);
2251}
2252
2253void OPPROTO op_stgi(void)
2254{
2255 helper_stgi();
2256}
2257
2258void OPPROTO op_clgi(void)
2259{
2260 helper_clgi();
2261}
2262
2263void OPPROTO op_skinit(void)
2264{
2265 helper_skinit();
2266}
2267
2268void OPPROTO op_invlpga(void)
2269{
2270 helper_invlpga();
2271}