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1/*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
f68dd770 20
f68dd770 21#define ASM_SOFTMMU
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22#include "exec.h"
23
24/* n must be a constant to be efficient */
14ce26e7 25static inline target_long lshift(target_long x, int n)
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26{
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31}
32
33/* we define the various pieces of code used by the JIT */
34
35#define REG EAX
36#define REGNAME _EAX
37#include "opreg_template.h"
38#undef REG
39#undef REGNAME
40
41#define REG ECX
42#define REGNAME _ECX
43#include "opreg_template.h"
44#undef REG
45#undef REGNAME
46
47#define REG EDX
48#define REGNAME _EDX
49#include "opreg_template.h"
50#undef REG
51#undef REGNAME
52
53#define REG EBX
54#define REGNAME _EBX
55#include "opreg_template.h"
56#undef REG
57#undef REGNAME
58
59#define REG ESP
60#define REGNAME _ESP
61#include "opreg_template.h"
62#undef REG
63#undef REGNAME
64
65#define REG EBP
66#define REGNAME _EBP
67#include "opreg_template.h"
68#undef REG
69#undef REGNAME
70
71#define REG ESI
72#define REGNAME _ESI
73#include "opreg_template.h"
74#undef REG
75#undef REGNAME
76
77#define REG EDI
78#define REGNAME _EDI
79#include "opreg_template.h"
80#undef REG
81#undef REGNAME
82
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83#ifdef TARGET_X86_64
84
85#define REG (env->regs[8])
86#define REGNAME _R8
87#include "opreg_template.h"
88#undef REG
89#undef REGNAME
90
91#define REG (env->regs[9])
92#define REGNAME _R9
93#include "opreg_template.h"
94#undef REG
95#undef REGNAME
96
97#define REG (env->regs[10])
98#define REGNAME _R10
99#include "opreg_template.h"
100#undef REG
101#undef REGNAME
102
103#define REG (env->regs[11])
104#define REGNAME _R11
105#include "opreg_template.h"
106#undef REG
107#undef REGNAME
108
109#define REG (env->regs[12])
110#define REGNAME _R12
111#include "opreg_template.h"
112#undef REG
113#undef REGNAME
114
115#define REG (env->regs[13])
116#define REGNAME _R13
117#include "opreg_template.h"
118#undef REG
119#undef REGNAME
120
121#define REG (env->regs[14])
122#define REGNAME _R14
123#include "opreg_template.h"
124#undef REG
125#undef REGNAME
126
127#define REG (env->regs[15])
128#define REGNAME _R15
129#include "opreg_template.h"
130#undef REG
131#undef REGNAME
132
133#endif
134
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135/* operations with flags */
136
137/* update flags with T0 and T1 (add/sub case) */
138void OPPROTO op_update2_cc(void)
139{
140 CC_SRC = T1;
141 CC_DST = T0;
142}
143
144/* update flags with T0 (logic operation case) */
145void OPPROTO op_update1_cc(void)
146{
147 CC_DST = T0;
148}
149
150void OPPROTO op_update_neg_cc(void)
151{
152 CC_SRC = -T0;
153 CC_DST = T0;
154}
155
156void OPPROTO op_cmpl_T0_T1_cc(void)
157{
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160}
161
162void OPPROTO op_update_inc_cc(void)
163{
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166}
167
168void OPPROTO op_testl_T0_T1_cc(void)
169{
170 CC_DST = T0 & T1;
171}
172
173/* operations without flags */
174
175void OPPROTO op_addl_T0_T1(void)
176{
177 T0 += T1;
178}
179
180void OPPROTO op_orl_T0_T1(void)
181{
182 T0 |= T1;
183}
184
185void OPPROTO op_andl_T0_T1(void)
186{
187 T0 &= T1;
188}
189
190void OPPROTO op_subl_T0_T1(void)
191{
192 T0 -= T1;
193}
194
195void OPPROTO op_xorl_T0_T1(void)
196{
197 T0 ^= T1;
198}
199
200void OPPROTO op_negl_T0(void)
201{
202 T0 = -T0;
203}
204
205void OPPROTO op_incl_T0(void)
206{
207 T0++;
208}
209
210void OPPROTO op_decl_T0(void)
211{
212 T0--;
213}
214
215void OPPROTO op_notl_T0(void)
216{
217 T0 = ~T0;
218}
219
220void OPPROTO op_bswapl_T0(void)
221{
222 T0 = bswap32(T0);
223}
224
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225#ifdef TARGET_X86_64
226void OPPROTO op_bswapq_T0(void)
227{
228 T0 = bswap64(T0);
229}
230#endif
231
2c0262af 232/* multiply/divide */
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233
234/* XXX: add eflags optimizations */
235/* XXX: add non P4 style flags */
236
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237void OPPROTO op_mulb_AL_T0(void)
238{
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
14ce26e7 241 EAX = (EAX & ~0xffff) | res;
d36cd60e 242 CC_DST = res;
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243 CC_SRC = (res & 0xff00);
244}
245
246void OPPROTO op_imulb_AL_T0(void)
247{
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
14ce26e7 250 EAX = (EAX & ~0xffff) | (res & 0xffff);
d36cd60e 251 CC_DST = res;
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252 CC_SRC = (res != (int8_t)res);
253}
254
255void OPPROTO op_mulw_AX_T0(void)
256{
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
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259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 261 CC_DST = res;
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262 CC_SRC = res >> 16;
263}
264
265void OPPROTO op_imulw_AX_T0(void)
266{
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
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269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 271 CC_DST = res;
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272 CC_SRC = (res != (int16_t)res);
273}
274
275void OPPROTO op_mull_EAX_T0(void)
276{
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
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279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
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283}
284
285void OPPROTO op_imull_EAX_T0(void)
286{
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289 EAX = res;
290 EDX = res >> 32;
d36cd60e 291 CC_DST = res;
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292 CC_SRC = (res != (int32_t)res);
293}
294
295void OPPROTO op_imulw_T0_T1(void)
296{
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
d36cd60e 300 CC_DST = res;
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301 CC_SRC = (res != (int16_t)res);
302}
303
304void OPPROTO op_imull_T0_T1(void)
305{
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
d36cd60e 309 CC_DST = res;
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310 CC_SRC = (res != (int32_t)res);
311}
312
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313#ifdef TARGET_X86_64
314void OPPROTO op_mulq_EAX_T0(void)
315{
316 helper_mulq_EAX_T0();
317}
318
319void OPPROTO op_imulq_EAX_T0(void)
320{
321 helper_imulq_EAX_T0();
322}
323
324void OPPROTO op_imulq_T0_T1(void)
325{
326 helper_imulq_T0_T1();
327}
328#endif
329
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330/* division, flags are undefined */
331/* XXX: add exceptions for overflow */
332
333void OPPROTO op_divb_AL_T0(void)
334{
335 unsigned int num, den, q, r;
336
337 num = (EAX & 0xffff);
338 den = (T0 & 0xff);
339 if (den == 0) {
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340 raise_exception(EXCP00_DIVZ);
341 }
342 q = (num / den) & 0xff;
343 r = (num % den) & 0xff;
14ce26e7 344 EAX = (EAX & ~0xffff) | (r << 8) | q;
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345}
346
347void OPPROTO op_idivb_AL_T0(void)
348{
349 int num, den, q, r;
350
351 num = (int16_t)EAX;
352 den = (int8_t)T0;
353 if (den == 0) {
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354 raise_exception(EXCP00_DIVZ);
355 }
356 q = (num / den) & 0xff;
357 r = (num % den) & 0xff;
14ce26e7 358 EAX = (EAX & ~0xffff) | (r << 8) | q;
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359}
360
361void OPPROTO op_divw_AX_T0(void)
362{
363 unsigned int num, den, q, r;
364
365 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
366 den = (T0 & 0xffff);
367 if (den == 0) {
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368 raise_exception(EXCP00_DIVZ);
369 }
370 q = (num / den) & 0xffff;
371 r = (num % den) & 0xffff;
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372 EAX = (EAX & ~0xffff) | q;
373 EDX = (EDX & ~0xffff) | r;
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374}
375
376void OPPROTO op_idivw_AX_T0(void)
377{
378 int num, den, q, r;
379
380 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
381 den = (int16_t)T0;
382 if (den == 0) {
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383 raise_exception(EXCP00_DIVZ);
384 }
385 q = (num / den) & 0xffff;
386 r = (num % den) & 0xffff;
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387 EAX = (EAX & ~0xffff) | q;
388 EDX = (EDX & ~0xffff) | r;
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389}
390
391void OPPROTO op_divl_EAX_T0(void)
392{
14ce26e7 393 helper_divl_EAX_T0();
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394}
395
396void OPPROTO op_idivl_EAX_T0(void)
397{
14ce26e7 398 helper_idivl_EAX_T0();
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399}
400
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401#ifdef TARGET_X86_64
402void OPPROTO op_divq_EAX_T0(void)
403{
404 helper_divq_EAX_T0();
405}
406
407void OPPROTO op_idivq_EAX_T0(void)
408{
409 helper_idivq_EAX_T0();
410}
411#endif
412
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413/* constant load & misc op */
414
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415/* XXX: consistent names */
416void OPPROTO op_movl_T0_imu(void)
417{
418 T0 = (uint32_t)PARAM1;
419}
420
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421void OPPROTO op_movl_T0_im(void)
422{
14ce26e7 423 T0 = (int32_t)PARAM1;
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424}
425
426void OPPROTO op_addl_T0_im(void)
427{
428 T0 += PARAM1;
429}
430
431void OPPROTO op_andl_T0_ffff(void)
432{
433 T0 = T0 & 0xffff;
434}
435
436void OPPROTO op_andl_T0_im(void)
437{
438 T0 = T0 & PARAM1;
439}
440
441void OPPROTO op_movl_T0_T1(void)
442{
443 T0 = T1;
444}
445
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446void OPPROTO op_movl_T1_imu(void)
447{
448 T1 = (uint32_t)PARAM1;
449}
450
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451void OPPROTO op_movl_T1_im(void)
452{
14ce26e7 453 T1 = (int32_t)PARAM1;
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454}
455
456void OPPROTO op_addl_T1_im(void)
457{
458 T1 += PARAM1;
459}
460
461void OPPROTO op_movl_T1_A0(void)
462{
463 T1 = A0;
464}
465
466void OPPROTO op_movl_A0_im(void)
467{
14ce26e7 468 A0 = (uint32_t)PARAM1;
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469}
470
471void OPPROTO op_addl_A0_im(void)
472{
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473 A0 = (uint32_t)(A0 + PARAM1);
474}
475
476void OPPROTO op_movl_A0_seg(void)
477{
478 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
479}
480
481void OPPROTO op_addl_A0_seg(void)
482{
483 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
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484}
485
486void OPPROTO op_addl_A0_AL(void)
487{
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488 A0 = (uint32_t)(A0 + (EAX & 0xff));
489}
490
491#ifdef WORDS_BIGENDIAN
492typedef union UREG64 {
493 struct { uint16_t v3, v2, v1, v0; } w;
494 struct { uint32_t v1, v0; } l;
495 uint64_t q;
496} UREG64;
497#else
498typedef union UREG64 {
499 struct { uint16_t v0, v1, v2, v3; } w;
500 struct { uint32_t v0, v1; } l;
501 uint64_t q;
502} UREG64;
503#endif
504
505#ifdef TARGET_X86_64
506
507#define PARAMQ1 \
508({\
509 UREG64 __p;\
510 __p.l.v1 = PARAM1;\
511 __p.l.v0 = PARAM2;\
512 __p.q;\
513})
514
515void OPPROTO op_movq_T0_im64(void)
516{
517 T0 = PARAMQ1;
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518}
519
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520void OPPROTO op_movq_A0_im(void)
521{
522 A0 = (int32_t)PARAM1;
523}
524
525void OPPROTO op_movq_A0_im64(void)
526{
527 A0 = PARAMQ1;
528}
529
530void OPPROTO op_addq_A0_im(void)
531{
532 A0 = (A0 + (int32_t)PARAM1);
533}
534
535void OPPROTO op_addq_A0_im64(void)
536{
537 A0 = (A0 + PARAMQ1);
538}
539
540void OPPROTO op_movq_A0_seg(void)
541{
542 A0 = *(target_ulong *)((char *)env + PARAM1);
543}
544
545void OPPROTO op_addq_A0_seg(void)
546{
547 A0 += *(target_ulong *)((char *)env + PARAM1);
548}
549
550void OPPROTO op_addq_A0_AL(void)
551{
552 A0 = (A0 + (EAX & 0xff));
553}
554
555#endif
556
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557void OPPROTO op_andl_A0_ffff(void)
558{
559 A0 = A0 & 0xffff;
560}
561
562/* memory access */
563
61382a50 564#define MEMSUFFIX _raw
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565#include "ops_mem.h"
566
61382a50 567#if !defined(CONFIG_USER_ONLY)
f68dd770 568#define MEMSUFFIX _kernel
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569#include "ops_mem.h"
570
f68dd770 571#define MEMSUFFIX _user
2c0262af 572#include "ops_mem.h"
61382a50 573#endif
2c0262af 574
14ce26e7 575/* indirect jump */
2c0262af 576
14ce26e7 577void OPPROTO op_jmp_T0(void)
2c0262af 578{
14ce26e7 579 EIP = T0;
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580}
581
14ce26e7 582void OPPROTO op_movl_eip_im(void)
2c0262af 583{
14ce26e7 584 EIP = (uint32_t)PARAM1;
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585}
586
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587#ifdef TARGET_X86_64
588void OPPROTO op_movq_eip_im(void)
2c0262af 589{
14ce26e7 590 EIP = (int32_t)PARAM1;
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591}
592
14ce26e7 593void OPPROTO op_movq_eip_im64(void)
2c0262af 594{
14ce26e7 595 EIP = PARAMQ1;
2c0262af 596}
14ce26e7 597#endif
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598
599void OPPROTO op_hlt(void)
600{
acf5feac 601 env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
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602 env->exception_index = EXCP_HLT;
603 cpu_loop_exit();
604}
605
606void OPPROTO op_debug(void)
607{
608 env->exception_index = EXCP_DEBUG;
609 cpu_loop_exit();
610}
611
612void OPPROTO op_raise_interrupt(void)
613{
a8ede8ba 614 int intno, next_eip_addend;
2c0262af 615 intno = PARAM1;
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616 next_eip_addend = PARAM2;
617 raise_interrupt(intno, 1, 0, next_eip_addend);
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618}
619
620void OPPROTO op_raise_exception(void)
621{
622 int exception_index;
623 exception_index = PARAM1;
624 raise_exception(exception_index);
625}
626
627void OPPROTO op_into(void)
628{
629 int eflags;
630 eflags = cc_table[CC_OP].compute_all();
631 if (eflags & CC_O) {
632 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
633 }
634 FORCE_RET();
635}
636
637void OPPROTO op_cli(void)
638{
639 env->eflags &= ~IF_MASK;
640}
641
642void OPPROTO op_sti(void)
643{
644 env->eflags |= IF_MASK;
645}
646
647void OPPROTO op_set_inhibit_irq(void)
648{
649 env->hflags |= HF_INHIBIT_IRQ_MASK;
650}
651
652void OPPROTO op_reset_inhibit_irq(void)
653{
654 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
655}
656
657#if 0
658/* vm86plus instructions */
659void OPPROTO op_cli_vm(void)
660{
661 env->eflags &= ~VIF_MASK;
662}
663
664void OPPROTO op_sti_vm(void)
665{
666 env->eflags |= VIF_MASK;
667 if (env->eflags & VIP_MASK) {
668 EIP = PARAM1;
669 raise_exception(EXCP0D_GPF);
670 }
671 FORCE_RET();
672}
673#endif
674
675void OPPROTO op_boundw(void)
676{
677 int low, high, v;
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678 low = ldsw(A0);
679 high = ldsw(A0 + 2);
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680 v = (int16_t)T0;
681 if (v < low || v > high) {
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682 raise_exception(EXCP05_BOUND);
683 }
684 FORCE_RET();
685}
686
687void OPPROTO op_boundl(void)
688{
689 int low, high, v;
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690 low = ldl(A0);
691 high = ldl(A0 + 4);
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692 v = T0;
693 if (v < low || v > high) {
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694 raise_exception(EXCP05_BOUND);
695 }
696 FORCE_RET();
697}
698
699void OPPROTO op_cmpxchg8b(void)
700{
701 helper_cmpxchg8b();
702}
703
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704void OPPROTO op_movl_T0_0(void)
705{
706 T0 = 0;
707}
708
709void OPPROTO op_exit_tb(void)
710{
711 EXIT_TB();
712}
713
714/* multiple size ops */
715
716#define ldul ldl
717
718#define SHIFT 0
719#include "ops_template.h"
720#undef SHIFT
721
722#define SHIFT 1
723#include "ops_template.h"
724#undef SHIFT
725
726#define SHIFT 2
727#include "ops_template.h"
728#undef SHIFT
729
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730#ifdef TARGET_X86_64
731
732#define SHIFT 3
733#include "ops_template.h"
734#undef SHIFT
735
736#endif
737
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738/* sign extend */
739
740void OPPROTO op_movsbl_T0_T0(void)
741{
742 T0 = (int8_t)T0;
743}
744
745void OPPROTO op_movzbl_T0_T0(void)
746{
747 T0 = (uint8_t)T0;
748}
749
750void OPPROTO op_movswl_T0_T0(void)
751{
752 T0 = (int16_t)T0;
753}
754
755void OPPROTO op_movzwl_T0_T0(void)
756{
757 T0 = (uint16_t)T0;
758}
759
760void OPPROTO op_movswl_EAX_AX(void)
761{
762 EAX = (int16_t)EAX;
763}
764
14ce26e7 765#ifdef TARGET_X86_64
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766void OPPROTO op_movslq_T0_T0(void)
767{
768 T0 = (int32_t)T0;
769}
770
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771void OPPROTO op_movslq_RAX_EAX(void)
772{
773 EAX = (int32_t)EAX;
774}
775#endif
776
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777void OPPROTO op_movsbw_AX_AL(void)
778{
14ce26e7 779 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
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780}
781
782void OPPROTO op_movslq_EDX_EAX(void)
783{
784 EDX = (int32_t)EAX >> 31;
785}
786
787void OPPROTO op_movswl_DX_AX(void)
788{
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789 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
790}
791
792#ifdef TARGET_X86_64
793void OPPROTO op_movsqo_RDX_RAX(void)
794{
795 EDX = (int64_t)EAX >> 63;
2c0262af 796}
14ce26e7 797#endif
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798
799/* string ops helpers */
800
801void OPPROTO op_addl_ESI_T0(void)
802{
14ce26e7 803 ESI = (uint32_t)(ESI + T0);
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804}
805
806void OPPROTO op_addw_ESI_T0(void)
807{
808 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
809}
810
811void OPPROTO op_addl_EDI_T0(void)
812{
14ce26e7 813 EDI = (uint32_t)(EDI + T0);
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814}
815
816void OPPROTO op_addw_EDI_T0(void)
817{
818 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
819}
820
821void OPPROTO op_decl_ECX(void)
822{
14ce26e7 823 ECX = (uint32_t)(ECX - 1);
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824}
825
826void OPPROTO op_decw_ECX(void)
827{
828 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
829}
830
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831#ifdef TARGET_X86_64
832void OPPROTO op_addq_ESI_T0(void)
833{
834 ESI = (ESI + T0);
835}
836
837void OPPROTO op_addq_EDI_T0(void)
838{
839 EDI = (EDI + T0);
840}
841
842void OPPROTO op_decq_ECX(void)
843{
844 ECX--;
845}
846#endif
847
f68dd770 848/* push/pop utils */
2c0262af 849
f68dd770 850void op_addl_A0_SS(void)
2c0262af 851{
f68dd770 852 A0 += (long)env->segs[R_SS].base;
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853}
854
f68dd770 855void op_subl_A0_2(void)
2c0262af 856{
14ce26e7 857 A0 = (uint32_t)(A0 - 2);
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858}
859
f68dd770 860void op_subl_A0_4(void)
2c0262af 861{
14ce26e7 862 A0 = (uint32_t)(A0 - 4);
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863}
864
865void op_addl_ESP_4(void)
866{
14ce26e7 867 ESP = (uint32_t)(ESP + 4);
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868}
869
870void op_addl_ESP_2(void)
871{
14ce26e7 872 ESP = (uint32_t)(ESP + 2);
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873}
874
875void op_addw_ESP_4(void)
876{
877 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
878}
879
880void op_addw_ESP_2(void)
881{
882 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
883}
884
885void op_addl_ESP_im(void)
886{
14ce26e7 887 ESP = (uint32_t)(ESP + PARAM1);
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888}
889
890void op_addw_ESP_im(void)
891{
892 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
893}
894
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895#ifdef TARGET_X86_64
896void op_subq_A0_8(void)
897{
898 A0 -= 8;
899}
900
901void op_addq_ESP_8(void)
902{
903 ESP += 8;
904}
905
906void op_addq_ESP_im(void)
907{
908 ESP += PARAM1;
909}
910#endif
911
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912void OPPROTO op_rdtsc(void)
913{
914 helper_rdtsc();
915}
916
917void OPPROTO op_cpuid(void)
918{
919 helper_cpuid();
920}
921
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922void OPPROTO op_enter_level(void)
923{
924 helper_enter_level(PARAM1, PARAM2);
925}
926
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927void OPPROTO op_sysenter(void)
928{
929 helper_sysenter();
930}
931
932void OPPROTO op_sysexit(void)
933{
934 helper_sysexit();
935}
936
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937#ifdef TARGET_X86_64
938void OPPROTO op_syscall(void)
939{
06c2f506 940 helper_syscall(PARAM1);
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941}
942
943void OPPROTO op_sysret(void)
944{
945 helper_sysret(PARAM1);
946}
947#endif
948
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949void OPPROTO op_rdmsr(void)
950{
951 helper_rdmsr();
952}
953
954void OPPROTO op_wrmsr(void)
955{
956 helper_wrmsr();
957}
958
959/* bcd */
960
961/* XXX: exception */
962void OPPROTO op_aam(void)
963{
964 int base = PARAM1;
965 int al, ah;
966 al = EAX & 0xff;
967 ah = al / base;
968 al = al % base;
969 EAX = (EAX & ~0xffff) | al | (ah << 8);
970 CC_DST = al;
971}
972
973void OPPROTO op_aad(void)
974{
975 int base = PARAM1;
976 int al, ah;
977 al = EAX & 0xff;
978 ah = (EAX >> 8) & 0xff;
979 al = ((ah * base) + al) & 0xff;
980 EAX = (EAX & ~0xffff) | al;
981 CC_DST = al;
982}
983
984void OPPROTO op_aaa(void)
985{
986 int icarry;
987 int al, ah, af;
988 int eflags;
989
990 eflags = cc_table[CC_OP].compute_all();
991 af = eflags & CC_A;
992 al = EAX & 0xff;
993 ah = (EAX >> 8) & 0xff;
994
995 icarry = (al > 0xf9);
996 if (((al & 0x0f) > 9 ) || af) {
997 al = (al + 6) & 0x0f;
998 ah = (ah + 1 + icarry) & 0xff;
999 eflags |= CC_C | CC_A;
1000 } else {
1001 eflags &= ~(CC_C | CC_A);
1002 al &= 0x0f;
1003 }
1004 EAX = (EAX & ~0xffff) | al | (ah << 8);
1005 CC_SRC = eflags;
1006}
1007
1008void OPPROTO op_aas(void)
1009{
1010 int icarry;
1011 int al, ah, af;
1012 int eflags;
1013
1014 eflags = cc_table[CC_OP].compute_all();
1015 af = eflags & CC_A;
1016 al = EAX & 0xff;
1017 ah = (EAX >> 8) & 0xff;
1018
1019 icarry = (al < 6);
1020 if (((al & 0x0f) > 9 ) || af) {
1021 al = (al - 6) & 0x0f;
1022 ah = (ah - 1 - icarry) & 0xff;
1023 eflags |= CC_C | CC_A;
1024 } else {
1025 eflags &= ~(CC_C | CC_A);
1026 al &= 0x0f;
1027 }
1028 EAX = (EAX & ~0xffff) | al | (ah << 8);
1029 CC_SRC = eflags;
1030}
1031
1032void OPPROTO op_daa(void)
1033{
1034 int al, af, cf;
1035 int eflags;
1036
1037 eflags = cc_table[CC_OP].compute_all();
1038 cf = eflags & CC_C;
1039 af = eflags & CC_A;
1040 al = EAX & 0xff;
1041
1042 eflags = 0;
1043 if (((al & 0x0f) > 9 ) || af) {
1044 al = (al + 6) & 0xff;
1045 eflags |= CC_A;
1046 }
1047 if ((al > 0x9f) || cf) {
1048 al = (al + 0x60) & 0xff;
1049 eflags |= CC_C;
1050 }
1051 EAX = (EAX & ~0xff) | al;
1052 /* well, speed is not an issue here, so we compute the flags by hand */
1053 eflags |= (al == 0) << 6; /* zf */
1054 eflags |= parity_table[al]; /* pf */
1055 eflags |= (al & 0x80); /* sf */
1056 CC_SRC = eflags;
1057}
1058
1059void OPPROTO op_das(void)
1060{
1061 int al, al1, af, cf;
1062 int eflags;
1063
1064 eflags = cc_table[CC_OP].compute_all();
1065 cf = eflags & CC_C;
1066 af = eflags & CC_A;
1067 al = EAX & 0xff;
1068
1069 eflags = 0;
1070 al1 = al;
1071 if (((al & 0x0f) > 9 ) || af) {
1072 eflags |= CC_A;
1073 if (al < 6 || cf)
1074 eflags |= CC_C;
1075 al = (al - 6) & 0xff;
1076 }
1077 if ((al1 > 0x99) || cf) {
1078 al = (al - 0x60) & 0xff;
1079 eflags |= CC_C;
1080 }
1081 EAX = (EAX & ~0xff) | al;
1082 /* well, speed is not an issue here, so we compute the flags by hand */
1083 eflags |= (al == 0) << 6; /* zf */
1084 eflags |= parity_table[al]; /* pf */
1085 eflags |= (al & 0x80); /* sf */
1086 CC_SRC = eflags;
1087}
1088
1089/* segment handling */
1090
1091/* never use it with R_CS */
1092void OPPROTO op_movl_seg_T0(void)
1093{
3415a4dd 1094 load_seg(PARAM1, T0);
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1095}
1096
1097/* faster VM86 version */
1098void OPPROTO op_movl_seg_T0_vm(void)
1099{
1100 int selector;
1101 SegmentCache *sc;
1102
1103 selector = T0 & 0xffff;
1104 /* env->segs[] access */
1105 sc = (SegmentCache *)((char *)env + PARAM1);
1106 sc->selector = selector;
14ce26e7 1107 sc->base = (selector << 4);
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1108}
1109
1110void OPPROTO op_movl_T0_seg(void)
1111{
1112 T0 = env->segs[PARAM1].selector;
1113}
1114
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1115void OPPROTO op_lsl(void)
1116{
1117 helper_lsl();
1118}
1119
1120void OPPROTO op_lar(void)
1121{
1122 helper_lar();
1123}
1124
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1125void OPPROTO op_verr(void)
1126{
1127 helper_verr();
1128}
1129
1130void OPPROTO op_verw(void)
1131{
1132 helper_verw();
1133}
1134
1135void OPPROTO op_arpl(void)
1136{
1137 if ((T0 & 3) < (T1 & 3)) {
1138 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1139 T0 = (T0 & ~3) | (T1 & 3);
1140 T1 = CC_Z;
1141 } else {
1142 T1 = 0;
1143 }
1144 FORCE_RET();
1145}
1146
1147void OPPROTO op_arpl_update(void)
1148{
1149 int eflags;
1150 eflags = cc_table[CC_OP].compute_all();
1151 CC_SRC = (eflags & ~CC_Z) | T1;
1152}
1153
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FB
1154/* T0: segment, T1:eip */
1155void OPPROTO op_ljmp_protected_T0_T1(void)
1156{
08cea4ee 1157 helper_ljmp_protected_T0_T1(PARAM1);
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1158}
1159
1160void OPPROTO op_lcall_real_T0_T1(void)
1161{
1162 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1163}
1164
1165void OPPROTO op_lcall_protected_T0_T1(void)
1166{
1167 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1168}
1169
1170void OPPROTO op_iret_real(void)
1171{
1172 helper_iret_real(PARAM1);
1173}
1174
1175void OPPROTO op_iret_protected(void)
1176{
08cea4ee 1177 helper_iret_protected(PARAM1, PARAM2);
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1178}
1179
1180void OPPROTO op_lret_protected(void)
1181{
1182 helper_lret_protected(PARAM1, PARAM2);
1183}
1184
1185void OPPROTO op_lldt_T0(void)
1186{
1187 helper_lldt_T0();
1188}
1189
1190void OPPROTO op_ltr_T0(void)
1191{
1192 helper_ltr_T0();
1193}
1194
1195/* CR registers access */
1196void OPPROTO op_movl_crN_T0(void)
1197{
1198 helper_movl_crN_T0(PARAM1);
1199}
1200
1201/* DR registers access */
1202void OPPROTO op_movl_drN_T0(void)
1203{
1204 helper_movl_drN_T0(PARAM1);
1205}
1206
1207void OPPROTO op_lmsw_T0(void)
1208{
710c15a2
FB
1209 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1210 if already set to one. */
1211 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
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1212 helper_movl_crN_T0(0);
1213}
1214
1215void OPPROTO op_invlpg_A0(void)
1216{
1217 helper_invlpg(A0);
1218}
1219
1220void OPPROTO op_movl_T0_env(void)
1221{
1222 T0 = *(uint32_t *)((char *)env + PARAM1);
1223}
1224
1225void OPPROTO op_movl_env_T0(void)
1226{
1227 *(uint32_t *)((char *)env + PARAM1) = T0;
1228}
1229
1230void OPPROTO op_movl_env_T1(void)
1231{
1232 *(uint32_t *)((char *)env + PARAM1) = T1;
1233}
1234
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1235void OPPROTO op_movtl_T0_env(void)
1236{
1237 T0 = *(target_ulong *)((char *)env + PARAM1);
1238}
1239
1240void OPPROTO op_movtl_env_T0(void)
1241{
1242 *(target_ulong *)((char *)env + PARAM1) = T0;
1243}
1244
1245void OPPROTO op_movtl_T1_env(void)
1246{
1247 T1 = *(target_ulong *)((char *)env + PARAM1);
1248}
1249
1250void OPPROTO op_movtl_env_T1(void)
1251{
1252 *(target_ulong *)((char *)env + PARAM1) = T1;
1253}
1254
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1255void OPPROTO op_clts(void)
1256{
1257 env->cr[0] &= ~CR0_TS_MASK;
7eee2a50 1258 env->hflags &= ~HF_TS_MASK;
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1259}
1260
1261/* flags handling */
1262
14ce26e7 1263void OPPROTO op_goto_tb0(void)
2c0262af 1264{
14ce26e7
FB
1265 GOTO_TB(op_goto_tb0, 0);
1266}
1267
1268void OPPROTO op_goto_tb1(void)
1269{
1270 GOTO_TB(op_goto_tb1, 1);
1271}
1272
1273void OPPROTO op_jmp_label(void)
1274{
1275 GOTO_LABEL_PARAM(1);
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1276}
1277
14ce26e7 1278void OPPROTO op_jnz_T0_label(void)
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1279{
1280 if (T0)
14ce26e7
FB
1281 GOTO_LABEL_PARAM(1);
1282}
1283
1284void OPPROTO op_jz_T0_label(void)
1285{
1286 if (!T0)
1287 GOTO_LABEL_PARAM(1);
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1288}
1289
1290/* slow set cases (compute x86 flags) */
1291void OPPROTO op_seto_T0_cc(void)
1292{
1293 int eflags;
1294 eflags = cc_table[CC_OP].compute_all();
1295 T0 = (eflags >> 11) & 1;
1296}
1297
1298void OPPROTO op_setb_T0_cc(void)
1299{
1300 T0 = cc_table[CC_OP].compute_c();
1301}
1302
1303void OPPROTO op_setz_T0_cc(void)
1304{
1305 int eflags;
1306 eflags = cc_table[CC_OP].compute_all();
1307 T0 = (eflags >> 6) & 1;
1308}
1309
1310void OPPROTO op_setbe_T0_cc(void)
1311{
1312 int eflags;
1313 eflags = cc_table[CC_OP].compute_all();
1314 T0 = (eflags & (CC_Z | CC_C)) != 0;
1315}
1316
1317void OPPROTO op_sets_T0_cc(void)
1318{
1319 int eflags;
1320 eflags = cc_table[CC_OP].compute_all();
1321 T0 = (eflags >> 7) & 1;
1322}
1323
1324void OPPROTO op_setp_T0_cc(void)
1325{
1326 int eflags;
1327 eflags = cc_table[CC_OP].compute_all();
1328 T0 = (eflags >> 2) & 1;
1329}
1330
1331void OPPROTO op_setl_T0_cc(void)
1332{
1333 int eflags;
1334 eflags = cc_table[CC_OP].compute_all();
1335 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1336}
1337
1338void OPPROTO op_setle_T0_cc(void)
1339{
1340 int eflags;
1341 eflags = cc_table[CC_OP].compute_all();
1342 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1343}
1344
1345void OPPROTO op_xor_T0_1(void)
1346{
1347 T0 ^= 1;
1348}
1349
1350void OPPROTO op_set_cc_op(void)
1351{
1352 CC_OP = PARAM1;
1353}
1354
4136f33c 1355/* XXX: clear VIF/VIP in all ops ? */
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1356
1357void OPPROTO op_movl_eflags_T0(void)
1358{
4b7aba51 1359 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
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1360}
1361
1362void OPPROTO op_movw_eflags_T0(void)
1363{
4b7aba51 1364 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
4136f33c
FB
1365}
1366
1367void OPPROTO op_movl_eflags_T0_io(void)
1368{
4b7aba51 1369 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
4136f33c
FB
1370}
1371
1372void OPPROTO op_movw_eflags_T0_io(void)
1373{
4b7aba51 1374 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
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1375}
1376
1377void OPPROTO op_movl_eflags_T0_cpl0(void)
1378{
4b7aba51 1379 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
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1380}
1381
1382void OPPROTO op_movw_eflags_T0_cpl0(void)
1383{
4b7aba51 1384 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
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1385}
1386
1387#if 0
1388/* vm86plus version */
1389void OPPROTO op_movw_eflags_T0_vm(void)
1390{
1391 int eflags;
1392 eflags = T0;
1393 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1394 DF = 1 - (2 * ((eflags >> 10) & 1));
1395 /* we also update some system flags as in user mode */
1396 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1397 (eflags & FL_UPDATE_MASK16);
1398 if (eflags & IF_MASK) {
1399 env->eflags |= VIF_MASK;
1400 if (env->eflags & VIP_MASK) {
1401 EIP = PARAM1;
1402 raise_exception(EXCP0D_GPF);
1403 }
1404 }
1405 FORCE_RET();
1406}
1407
1408void OPPROTO op_movl_eflags_T0_vm(void)
1409{
1410 int eflags;
1411 eflags = T0;
1412 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1413 DF = 1 - (2 * ((eflags >> 10) & 1));
1414 /* we also update some system flags as in user mode */
1415 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1416 (eflags & FL_UPDATE_MASK32);
1417 if (eflags & IF_MASK) {
1418 env->eflags |= VIF_MASK;
1419 if (env->eflags & VIP_MASK) {
1420 EIP = PARAM1;
1421 raise_exception(EXCP0D_GPF);
1422 }
1423 }
1424 FORCE_RET();
1425}
1426#endif
1427
1428/* XXX: compute only O flag */
1429void OPPROTO op_movb_eflags_T0(void)
1430{
1431 int of;
1432 of = cc_table[CC_OP].compute_all() & CC_O;
1433 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1434}
1435
1436void OPPROTO op_movl_T0_eflags(void)
1437{
1438 int eflags;
1439 eflags = cc_table[CC_OP].compute_all();
1440 eflags |= (DF & DF_MASK);
1441 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1442 T0 = eflags;
1443}
1444
1445/* vm86plus version */
1446#if 0
1447void OPPROTO op_movl_T0_eflags_vm(void)
1448{
1449 int eflags;
1450 eflags = cc_table[CC_OP].compute_all();
1451 eflags |= (DF & DF_MASK);
1452 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1453 if (env->eflags & VIF_MASK)
1454 eflags |= IF_MASK;
1455 T0 = eflags;
1456}
1457#endif
1458
1459void OPPROTO op_cld(void)
1460{
1461 DF = 1;
1462}
1463
1464void OPPROTO op_std(void)
1465{
1466 DF = -1;
1467}
1468
1469void OPPROTO op_clc(void)
1470{
1471 int eflags;
1472 eflags = cc_table[CC_OP].compute_all();
1473 eflags &= ~CC_C;
1474 CC_SRC = eflags;
1475}
1476
1477void OPPROTO op_stc(void)
1478{
1479 int eflags;
1480 eflags = cc_table[CC_OP].compute_all();
1481 eflags |= CC_C;
1482 CC_SRC = eflags;
1483}
1484
1485void OPPROTO op_cmc(void)
1486{
1487 int eflags;
1488 eflags = cc_table[CC_OP].compute_all();
1489 eflags ^= CC_C;
1490 CC_SRC = eflags;
1491}
1492
1493void OPPROTO op_salc(void)
1494{
1495 int cf;
1496 cf = cc_table[CC_OP].compute_c();
1497 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1498}
1499
1500static int compute_all_eflags(void)
1501{
1502 return CC_SRC;
1503}
1504
1505static int compute_c_eflags(void)
1506{
1507 return CC_SRC & CC_C;
1508}
1509
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1510CCTable cc_table[CC_OP_NB] = {
1511 [CC_OP_DYNAMIC] = { /* should never happen */ },
1512
1513 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1514
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1515 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1516 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1517 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
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1518
1519 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1520 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1521 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1522
1523 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1524 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1525 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1526
1527 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1528 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1529 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1530
1531 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1532 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1533 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1534
1535 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1536 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1537 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1538
1539 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1540 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1541 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1542
1543 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1544 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1545 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1546
1547 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1548 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1549 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1550
1551 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1552 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1553 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
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1554
1555#ifdef TARGET_X86_64
1556 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1557
1558 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1559
1560 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1561
1562 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1563
1564 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1565
1566 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1567
1568 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1569
1570 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1571
1572 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1573
1574 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1575#endif
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1576};
1577
1578/* floating point support. Some of the code for complicated x87
1579 functions comes from the LGPL'ed x86 emulator found in the Willows
1580 TWIN windows emulator. */
1581
1582#if defined(__powerpc__)
1583extern CPU86_LDouble copysign(CPU86_LDouble, CPU86_LDouble);
1584
1585/* correct (but slow) PowerPC rint() (glibc version is incorrect) */
1586double qemu_rint(double x)
1587{
1588 double y = 4503599627370496.0;
1589 if (fabs(x) >= y)
1590 return x;
1591 if (x < 0)
1592 y = -y;
1593 y = (x + y) - y;
1594 if (y == 0.0)
1595 y = copysign(y, x);
1596 return y;
1597}
1598
1599#define rint qemu_rint
1600#endif
1601
1602/* fp load FT0 */
1603
1604void OPPROTO op_flds_FT0_A0(void)
1605{
1606#ifdef USE_FP_CONVERT
14ce26e7 1607 FP_CONVERT.i32 = ldl(A0);
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1608 FT0 = FP_CONVERT.f;
1609#else
14ce26e7 1610 FT0 = ldfl(A0);
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1611#endif
1612}
1613
1614void OPPROTO op_fldl_FT0_A0(void)
1615{
1616#ifdef USE_FP_CONVERT
14ce26e7 1617 FP_CONVERT.i64 = ldq(A0);
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1618 FT0 = FP_CONVERT.d;
1619#else
14ce26e7 1620 FT0 = ldfq(A0);
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1621#endif
1622}
1623
1624/* helpers are needed to avoid static constant reference. XXX: find a better way */
1625#ifdef USE_INT_TO_FLOAT_HELPERS
1626
1627void helper_fild_FT0_A0(void)
1628{
14ce26e7 1629 FT0 = (CPU86_LDouble)ldsw(A0);
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1630}
1631
1632void helper_fildl_FT0_A0(void)
1633{
14ce26e7 1634 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
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1635}
1636
1637void helper_fildll_FT0_A0(void)
1638{
14ce26e7 1639 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
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1640}
1641
1642void OPPROTO op_fild_FT0_A0(void)
1643{
1644 helper_fild_FT0_A0();
1645}
1646
1647void OPPROTO op_fildl_FT0_A0(void)
1648{
1649 helper_fildl_FT0_A0();
1650}
1651
1652void OPPROTO op_fildll_FT0_A0(void)
1653{
1654 helper_fildll_FT0_A0();
1655}
1656
1657#else
1658
1659void OPPROTO op_fild_FT0_A0(void)
1660{
1661#ifdef USE_FP_CONVERT
14ce26e7 1662 FP_CONVERT.i32 = ldsw(A0);
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1663 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1664#else
14ce26e7 1665 FT0 = (CPU86_LDouble)ldsw(A0);
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1666#endif
1667}
1668
1669void OPPROTO op_fildl_FT0_A0(void)
1670{
1671#ifdef USE_FP_CONVERT
14ce26e7 1672 FP_CONVERT.i32 = (int32_t) ldl(A0);
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1673 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1674#else
14ce26e7 1675 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
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1676#endif
1677}
1678
1679void OPPROTO op_fildll_FT0_A0(void)
1680{
1681#ifdef USE_FP_CONVERT
14ce26e7 1682 FP_CONVERT.i64 = (int64_t) ldq(A0);
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1683 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1684#else
14ce26e7 1685 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
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1686#endif
1687}
1688#endif
1689
1690/* fp load ST0 */
1691
1692void OPPROTO op_flds_ST0_A0(void)
1693{
1694 int new_fpstt;
1695 new_fpstt = (env->fpstt - 1) & 7;
1696#ifdef USE_FP_CONVERT
14ce26e7 1697 FP_CONVERT.i32 = ldl(A0);
664e0f19 1698 env->fpregs[new_fpstt].d = FP_CONVERT.f;
2c0262af 1699#else
664e0f19 1700 env->fpregs[new_fpstt].d = ldfl(A0);
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1701#endif
1702 env->fpstt = new_fpstt;
1703 env->fptags[new_fpstt] = 0; /* validate stack entry */
1704}
1705
1706void OPPROTO op_fldl_ST0_A0(void)
1707{
1708 int new_fpstt;
1709 new_fpstt = (env->fpstt - 1) & 7;
1710#ifdef USE_FP_CONVERT
14ce26e7 1711 FP_CONVERT.i64 = ldq(A0);
664e0f19 1712 env->fpregs[new_fpstt].d = FP_CONVERT.d;
2c0262af 1713#else
664e0f19 1714 env->fpregs[new_fpstt].d = ldfq(A0);
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1715#endif
1716 env->fpstt = new_fpstt;
1717 env->fptags[new_fpstt] = 0; /* validate stack entry */
1718}
1719
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1720void OPPROTO op_fldt_ST0_A0(void)
1721{
1722 helper_fldt_ST0_A0();
1723}
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1724
1725/* helpers are needed to avoid static constant reference. XXX: find a better way */
1726#ifdef USE_INT_TO_FLOAT_HELPERS
1727
1728void helper_fild_ST0_A0(void)
1729{
1730 int new_fpstt;
1731 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1732 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
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1733 env->fpstt = new_fpstt;
1734 env->fptags[new_fpstt] = 0; /* validate stack entry */
1735}
1736
1737void helper_fildl_ST0_A0(void)
1738{
1739 int new_fpstt;
1740 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1741 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
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1742 env->fpstt = new_fpstt;
1743 env->fptags[new_fpstt] = 0; /* validate stack entry */
1744}
1745
1746void helper_fildll_ST0_A0(void)
1747{
1748 int new_fpstt;
1749 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1750 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
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1751 env->fpstt = new_fpstt;
1752 env->fptags[new_fpstt] = 0; /* validate stack entry */
1753}
1754
1755void OPPROTO op_fild_ST0_A0(void)
1756{
1757 helper_fild_ST0_A0();
1758}
1759
1760void OPPROTO op_fildl_ST0_A0(void)
1761{
1762 helper_fildl_ST0_A0();
1763}
1764
1765void OPPROTO op_fildll_ST0_A0(void)
1766{
1767 helper_fildll_ST0_A0();
1768}
1769
1770#else
1771
1772void OPPROTO op_fild_ST0_A0(void)
1773{
1774 int new_fpstt;
1775 new_fpstt = (env->fpstt - 1) & 7;
1776#ifdef USE_FP_CONVERT
14ce26e7 1777 FP_CONVERT.i32 = ldsw(A0);
664e0f19 1778 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1779#else
664e0f19 1780 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
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1781#endif
1782 env->fpstt = new_fpstt;
1783 env->fptags[new_fpstt] = 0; /* validate stack entry */
1784}
1785
1786void OPPROTO op_fildl_ST0_A0(void)
1787{
1788 int new_fpstt;
1789 new_fpstt = (env->fpstt - 1) & 7;
1790#ifdef USE_FP_CONVERT
14ce26e7 1791 FP_CONVERT.i32 = (int32_t) ldl(A0);
664e0f19 1792 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1793#else
664e0f19 1794 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
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1795#endif
1796 env->fpstt = new_fpstt;
1797 env->fptags[new_fpstt] = 0; /* validate stack entry */
1798}
1799
1800void OPPROTO op_fildll_ST0_A0(void)
1801{
1802 int new_fpstt;
1803 new_fpstt = (env->fpstt - 1) & 7;
1804#ifdef USE_FP_CONVERT
14ce26e7 1805 FP_CONVERT.i64 = (int64_t) ldq(A0);
664e0f19 1806 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
2c0262af 1807#else
664e0f19 1808 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
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1809#endif
1810 env->fpstt = new_fpstt;
1811 env->fptags[new_fpstt] = 0; /* validate stack entry */
1812}
1813
1814#endif
1815
1816/* fp store */
1817
1818void OPPROTO op_fsts_ST0_A0(void)
1819{
1820#ifdef USE_FP_CONVERT
1821 FP_CONVERT.f = (float)ST0;
14ce26e7 1822 stfl(A0, FP_CONVERT.f);
2c0262af 1823#else
14ce26e7 1824 stfl(A0, (float)ST0);
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1825#endif
1826}
1827
1828void OPPROTO op_fstl_ST0_A0(void)
1829{
14ce26e7 1830 stfq(A0, (double)ST0);
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1831}
1832
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1833void OPPROTO op_fstt_ST0_A0(void)
1834{
1835 helper_fstt_ST0_A0();
1836}
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1837
1838void OPPROTO op_fist_ST0_A0(void)
1839{
1840#if defined(__sparc__) && !defined(__sparc_v9__)
1841 register CPU86_LDouble d asm("o0");
1842#else
1843 CPU86_LDouble d;
1844#endif
1845 int val;
1846
1847 d = ST0;
1848 val = lrint(d);
1849 if (val != (int16_t)val)
1850 val = -32768;
14ce26e7 1851 stw(A0, val);
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1852}
1853
1854void OPPROTO op_fistl_ST0_A0(void)
1855{
1856#if defined(__sparc__) && !defined(__sparc_v9__)
1857 register CPU86_LDouble d asm("o0");
1858#else
1859 CPU86_LDouble d;
1860#endif
1861 int val;
1862
1863 d = ST0;
1864 val = lrint(d);
14ce26e7 1865 stl(A0, val);
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1866}
1867
1868void OPPROTO op_fistll_ST0_A0(void)
1869{
1870#if defined(__sparc__) && !defined(__sparc_v9__)
1871 register CPU86_LDouble d asm("o0");
1872#else
1873 CPU86_LDouble d;
1874#endif
1875 int64_t val;
1876
1877 d = ST0;
1878 val = llrint(d);
14ce26e7 1879 stq(A0, val);
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1880}
1881
1882void OPPROTO op_fbld_ST0_A0(void)
1883{
1884 helper_fbld_ST0_A0();
1885}
1886
1887void OPPROTO op_fbst_ST0_A0(void)
1888{
1889 helper_fbst_ST0_A0();
1890}
1891
1892/* FPU move */
1893
1894void OPPROTO op_fpush(void)
1895{
1896 fpush();
1897}
1898
1899void OPPROTO op_fpop(void)
1900{
1901 fpop();
1902}
1903
1904void OPPROTO op_fdecstp(void)
1905{
1906 env->fpstt = (env->fpstt - 1) & 7;
1907 env->fpus &= (~0x4700);
1908}
1909
1910void OPPROTO op_fincstp(void)
1911{
1912 env->fpstt = (env->fpstt + 1) & 7;
1913 env->fpus &= (~0x4700);
1914}
1915
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1916void OPPROTO op_ffree_STN(void)
1917{
1918 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1919}
1920
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1921void OPPROTO op_fmov_ST0_FT0(void)
1922{
1923 ST0 = FT0;
1924}
1925
1926void OPPROTO op_fmov_FT0_STN(void)
1927{
1928 FT0 = ST(PARAM1);
1929}
1930
1931void OPPROTO op_fmov_ST0_STN(void)
1932{
1933 ST0 = ST(PARAM1);
1934}
1935
1936void OPPROTO op_fmov_STN_ST0(void)
1937{
1938 ST(PARAM1) = ST0;
1939}
1940
1941void OPPROTO op_fxchg_ST0_STN(void)
1942{
1943 CPU86_LDouble tmp;
1944 tmp = ST(PARAM1);
1945 ST(PARAM1) = ST0;
1946 ST0 = tmp;
1947}
1948
1949/* FPU operations */
1950
1951/* XXX: handle nans */
1952void OPPROTO op_fcom_ST0_FT0(void)
1953{
1954 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
1955 if (ST0 < FT0)
1956 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
1957 else if (ST0 == FT0)
1958 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1959 FORCE_RET();
1960}
1961
1962/* XXX: handle nans */
1963void OPPROTO op_fucom_ST0_FT0(void)
1964{
1965 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
1966 if (ST0 < FT0)
1967 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
1968 else if (ST0 == FT0)
1969 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1970 FORCE_RET();
1971}
1972
1973/* XXX: handle nans */
1974void OPPROTO op_fcomi_ST0_FT0(void)
1975{
1976 int eflags;
1977 eflags = cc_table[CC_OP].compute_all();
1978 eflags &= ~(CC_Z | CC_P | CC_C);
1979 if (ST0 < FT0)
1980 eflags |= CC_C;
1981 else if (ST0 == FT0)
1982 eflags |= CC_Z;
1983 CC_SRC = eflags;
1984 FORCE_RET();
1985}
1986
1987/* XXX: handle nans */
1988void OPPROTO op_fucomi_ST0_FT0(void)
1989{
1990 int eflags;
1991 eflags = cc_table[CC_OP].compute_all();
1992 eflags &= ~(CC_Z | CC_P | CC_C);
1993 if (ST0 < FT0)
1994 eflags |= CC_C;
1995 else if (ST0 == FT0)
1996 eflags |= CC_Z;
1997 CC_SRC = eflags;
1998 FORCE_RET();
1999}
2000
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2001void OPPROTO op_fcmov_ST0_STN_T0(void)
2002{
2003 if (T0) {
2004 ST0 = ST(PARAM1);
2005 }
2006 FORCE_RET();
2007}
2008
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2009void OPPROTO op_fadd_ST0_FT0(void)
2010{
2011 ST0 += FT0;
2012}
2013
2014void OPPROTO op_fmul_ST0_FT0(void)
2015{
2016 ST0 *= FT0;
2017}
2018
2019void OPPROTO op_fsub_ST0_FT0(void)
2020{
2021 ST0 -= FT0;
2022}
2023
2024void OPPROTO op_fsubr_ST0_FT0(void)
2025{
2026 ST0 = FT0 - ST0;
2027}
2028
2029void OPPROTO op_fdiv_ST0_FT0(void)
2030{
2ee73ac3 2031 ST0 = helper_fdiv(ST0, FT0);
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2032}
2033
2034void OPPROTO op_fdivr_ST0_FT0(void)
2035{
2ee73ac3 2036 ST0 = helper_fdiv(FT0, ST0);
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2037}
2038
2039/* fp operations between STN and ST0 */
2040
2041void OPPROTO op_fadd_STN_ST0(void)
2042{
2043 ST(PARAM1) += ST0;
2044}
2045
2046void OPPROTO op_fmul_STN_ST0(void)
2047{
2048 ST(PARAM1) *= ST0;
2049}
2050
2051void OPPROTO op_fsub_STN_ST0(void)
2052{
2053 ST(PARAM1) -= ST0;
2054}
2055
2056void OPPROTO op_fsubr_STN_ST0(void)
2057{
2058 CPU86_LDouble *p;
2059 p = &ST(PARAM1);
2060 *p = ST0 - *p;
2061}
2062
2063void OPPROTO op_fdiv_STN_ST0(void)
2064{
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2065 CPU86_LDouble *p;
2066 p = &ST(PARAM1);
2067 *p = helper_fdiv(*p, ST0);
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2068}
2069
2070void OPPROTO op_fdivr_STN_ST0(void)
2071{
2072 CPU86_LDouble *p;
2073 p = &ST(PARAM1);
2ee73ac3 2074 *p = helper_fdiv(ST0, *p);
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2075}
2076
2077/* misc FPU operations */
2078void OPPROTO op_fchs_ST0(void)
2079{
2080 ST0 = -ST0;
2081}
2082
2083void OPPROTO op_fabs_ST0(void)
2084{
2085 ST0 = fabs(ST0);
2086}
2087
2088void OPPROTO op_fxam_ST0(void)
2089{
2090 helper_fxam_ST0();
2091}
2092
2093void OPPROTO op_fld1_ST0(void)
2094{
2095 ST0 = f15rk[1];
2096}
2097
2098void OPPROTO op_fldl2t_ST0(void)
2099{
2100 ST0 = f15rk[6];
2101}
2102
2103void OPPROTO op_fldl2e_ST0(void)
2104{
2105 ST0 = f15rk[5];
2106}
2107
2108void OPPROTO op_fldpi_ST0(void)
2109{
2110 ST0 = f15rk[2];
2111}
2112
2113void OPPROTO op_fldlg2_ST0(void)
2114{
2115 ST0 = f15rk[3];
2116}
2117
2118void OPPROTO op_fldln2_ST0(void)
2119{
2120 ST0 = f15rk[4];
2121}
2122
2123void OPPROTO op_fldz_ST0(void)
2124{
2125 ST0 = f15rk[0];
2126}
2127
2128void OPPROTO op_fldz_FT0(void)
2129{
6a8c397d 2130 FT0 = f15rk[0];
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2131}
2132
2133/* associated heplers to reduce generated code length and to simplify
2134 relocation (FP constants are usually stored in .rodata section) */
2135
2136void OPPROTO op_f2xm1(void)
2137{
2138 helper_f2xm1();
2139}
2140
2141void OPPROTO op_fyl2x(void)
2142{
2143 helper_fyl2x();
2144}
2145
2146void OPPROTO op_fptan(void)
2147{
2148 helper_fptan();
2149}
2150
2151void OPPROTO op_fpatan(void)
2152{
2153 helper_fpatan();
2154}
2155
2156void OPPROTO op_fxtract(void)
2157{
2158 helper_fxtract();
2159}
2160
2161void OPPROTO op_fprem1(void)
2162{
2163 helper_fprem1();
2164}
2165
2166
2167void OPPROTO op_fprem(void)
2168{
2169 helper_fprem();
2170}
2171
2172void OPPROTO op_fyl2xp1(void)
2173{
2174 helper_fyl2xp1();
2175}
2176
2177void OPPROTO op_fsqrt(void)
2178{
2179 helper_fsqrt();
2180}
2181
2182void OPPROTO op_fsincos(void)
2183{
2184 helper_fsincos();
2185}
2186
2187void OPPROTO op_frndint(void)
2188{
2189 helper_frndint();
2190}
2191
2192void OPPROTO op_fscale(void)
2193{
2194 helper_fscale();
2195}
2196
2197void OPPROTO op_fsin(void)
2198{
2199 helper_fsin();
2200}
2201
2202void OPPROTO op_fcos(void)
2203{
2204 helper_fcos();
2205}
2206
2207void OPPROTO op_fnstsw_A0(void)
2208{
2209 int fpus;
2210 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2211 stw(A0, fpus);
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2212}
2213
2214void OPPROTO op_fnstsw_EAX(void)
2215{
2216 int fpus;
2217 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2218 EAX = (EAX & ~0xffff) | fpus;
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2219}
2220
2221void OPPROTO op_fnstcw_A0(void)
2222{
14ce26e7 2223 stw(A0, env->fpuc);
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2224}
2225
2226void OPPROTO op_fldcw_A0(void)
2227{
2228 int rnd_type;
14ce26e7 2229 env->fpuc = lduw(A0);
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2230 /* set rounding mode */
2231 switch(env->fpuc & RC_MASK) {
2232 default:
2233 case RC_NEAR:
2234 rnd_type = FE_TONEAREST;
2235 break;
2236 case RC_DOWN:
2237 rnd_type = FE_DOWNWARD;
2238 break;
2239 case RC_UP:
2240 rnd_type = FE_UPWARD;
2241 break;
2242 case RC_CHOP:
2243 rnd_type = FE_TOWARDZERO;
2244 break;
2245 }
2246 fesetround(rnd_type);
2247}
2248
2249void OPPROTO op_fclex(void)
2250{
2251 env->fpus &= 0x7f00;
2252}
2253
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2254void OPPROTO op_fwait(void)
2255{
2256 if (env->fpus & FPUS_SE)
2257 fpu_raise_exception();
2258 FORCE_RET();
2259}
2260
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2261void OPPROTO op_fninit(void)
2262{
2263 env->fpus = 0;
2264 env->fpstt = 0;
2265 env->fpuc = 0x37f;
2266 env->fptags[0] = 1;
2267 env->fptags[1] = 1;
2268 env->fptags[2] = 1;
2269 env->fptags[3] = 1;
2270 env->fptags[4] = 1;
2271 env->fptags[5] = 1;
2272 env->fptags[6] = 1;
2273 env->fptags[7] = 1;
2274}
2275
2276void OPPROTO op_fnstenv_A0(void)
2277{
14ce26e7 2278 helper_fstenv(A0, PARAM1);
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2279}
2280
2281void OPPROTO op_fldenv_A0(void)
2282{
14ce26e7 2283 helper_fldenv(A0, PARAM1);
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2284}
2285
2286void OPPROTO op_fnsave_A0(void)
2287{
14ce26e7 2288 helper_fsave(A0, PARAM1);
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2289}
2290
2291void OPPROTO op_frstor_A0(void)
2292{
14ce26e7 2293 helper_frstor(A0, PARAM1);
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2294}
2295
2296/* threading support */
2297void OPPROTO op_lock(void)
2298{
2299 cpu_lock();
2300}
2301
2302void OPPROTO op_unlock(void)
2303{
2304 cpu_unlock();
2305}
2306
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FB
2307/* SSE support */
2308static inline void memcpy16(void *d, void *s)
2309{
2310 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2311 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2312 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2313 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2314}
2315
2316void OPPROTO op_movo(void)
2317{
2318 /* XXX: badly generated code */
2319 XMMReg *d, *s;
2320 d = (XMMReg *)((char *)env + PARAM1);
2321 s = (XMMReg *)((char *)env + PARAM2);
2322 memcpy16(d, s);
2323}
2324
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2325void OPPROTO op_movq(void)
2326{
2327 uint64_t *d, *s;
2328 d = (uint64_t *)((char *)env + PARAM1);
2329 s = (uint64_t *)((char *)env + PARAM2);
2330 *d = *s;
2331}
2332
2333void OPPROTO op_movl(void)
2334{
2335 uint32_t *d, *s;
2336 d = (uint32_t *)((char *)env + PARAM1);
2337 s = (uint32_t *)((char *)env + PARAM2);
2338 *d = *s;
2339}
2340
2341void OPPROTO op_movq_env_0(void)
2342{
2343 uint64_t *d;
2344 d = (uint64_t *)((char *)env + PARAM1);
2345 *d = 0;
2346}
2347
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FB
2348void OPPROTO op_fxsave_A0(void)
2349{
2350 helper_fxsave(A0, PARAM1);
2351}
2352
2353void OPPROTO op_fxrstor_A0(void)
2354{
2355 helper_fxrstor(A0, PARAM1);
2356}
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FB
2357
2358/* XXX: optimize by storing fptt and fptags in the static cpu state */
2359void OPPROTO op_enter_mmx(void)
2360{
2361 env->fpstt = 0;
2362 *(uint32_t *)(env->fptags) = 0;
2363 *(uint32_t *)(env->fptags + 4) = 0;
2364}
2365
2366void OPPROTO op_emms(void)
2367{
2368 /* set to empty state */
2369 *(uint32_t *)(env->fptags) = 0x01010101;
2370 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2371}
2372
2373#define SHIFT 0
2374#include "ops_sse.h"
2375
2376#define SHIFT 1
2377#include "ops_sse.h"