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Attached patch fixes a series of this warning
[qemu.git] / target-i386 / ops_sse.h
CommitLineData
664e0f19 1/*
222a3336 2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
5fafdf24 3 *
664e0f19 4 * Copyright (c) 2005 Fabrice Bellard
222a3336 5 * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com>
664e0f19
FB		 6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#if SHIFT == 0
22#define Reg MMXReg
23#define XMM_ONLY(x...)
24#define B(n) MMX_B(n)
25#define W(n) MMX_W(n)
26#define L(n) MMX_L(n)
27#define Q(n) q
28#define SUFFIX _mmx
29#else
30#define Reg XMMReg
31#define XMM_ONLY(x...) x
32#define B(n) XMM_B(n)
33#define W(n) XMM_W(n)
34#define L(n) XMM_L(n)
35#define Q(n) XMM_Q(n)
36#define SUFFIX _xmm
37#endif
38
5af45186 39void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s)
664e0f19 40{
664e0f19
FB		 41 int shift;
42
664e0f19
FB		 43 if (s->Q(0) > 15) {
44 d->Q(0) = 0;
45#if SHIFT == 1
46 d->Q(1) = 0;
47#endif
48 } else {
49 shift = s->B(0);
50 d->W(0) >>= shift;
51 d->W(1) >>= shift;
52 d->W(2) >>= shift;
53 d->W(3) >>= shift;
54#if SHIFT == 1
55 d->W(4) >>= shift;
56 d->W(5) >>= shift;
57 d->W(6) >>= shift;
58 d->W(7) >>= shift;
59#endif
60 }
0523c6b7 61 FORCE_RET();
664e0f19
FB		 62}
63
5af45186 64void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s)
664e0f19 65{
664e0f19
FB		 66 int shift;
67
664e0f19
FB		 68 if (s->Q(0) > 15) {
69 shift = 15;
70 } else {
71 shift = s->B(0);
72 }
73 d->W(0) = (int16_t)d->W(0) >> shift;
74 d->W(1) = (int16_t)d->W(1) >> shift;
75 d->W(2) = (int16_t)d->W(2) >> shift;
76 d->W(3) = (int16_t)d->W(3) >> shift;
77#if SHIFT == 1
78 d->W(4) = (int16_t)d->W(4) >> shift;
79 d->W(5) = (int16_t)d->W(5) >> shift;
80 d->W(6) = (int16_t)d->W(6) >> shift;
81 d->W(7) = (int16_t)d->W(7) >> shift;
82#endif
83}
84
5af45186 85void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s)
664e0f19 86{
664e0f19
FB		 87 int shift;
88
664e0f19
FB		 89 if (s->Q(0) > 15) {
90 d->Q(0) = 0;
91#if SHIFT == 1
92 d->Q(1) = 0;
93#endif
94 } else {
95 shift = s->B(0);
96 d->W(0) <<= shift;
97 d->W(1) <<= shift;
98 d->W(2) <<= shift;
99 d->W(3) <<= shift;
100#if SHIFT == 1
101 d->W(4) <<= shift;
102 d->W(5) <<= shift;
103 d->W(6) <<= shift;
104 d->W(7) <<= shift;
105#endif
106 }
0523c6b7 107 FORCE_RET();
664e0f19
FB		 108}
109
5af45186 110void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s)
664e0f19 111{
664e0f19
FB		 112 int shift;
113
664e0f19
FB		 114 if (s->Q(0) > 31) {
115 d->Q(0) = 0;
116#if SHIFT == 1
117 d->Q(1) = 0;
118#endif
119 } else {
120 shift = s->B(0);
121 d->L(0) >>= shift;
122 d->L(1) >>= shift;
123#if SHIFT == 1
124 d->L(2) >>= shift;
125 d->L(3) >>= shift;
126#endif
127 }
0523c6b7 128 FORCE_RET();
664e0f19
FB		 129}
130
5af45186 131void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s)
664e0f19 132{
664e0f19
FB		 133 int shift;
134
664e0f19
FB		 135 if (s->Q(0) > 31) {
136 shift = 31;
137 } else {
138 shift = s->B(0);
139 }
140 d->L(0) = (int32_t)d->L(0) >> shift;
141 d->L(1) = (int32_t)d->L(1) >> shift;
142#if SHIFT == 1
143 d->L(2) = (int32_t)d->L(2) >> shift;
144 d->L(3) = (int32_t)d->L(3) >> shift;
145#endif
146}
147
5af45186 148void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s)
664e0f19 149{
664e0f19
FB		 150 int shift;
151
664e0f19
FB		 152 if (s->Q(0) > 31) {
153 d->Q(0) = 0;
154#if SHIFT == 1
155 d->Q(1) = 0;
156#endif
157 } else {
158 shift = s->B(0);
159 d->L(0) <<= shift;
160 d->L(1) <<= shift;
161#if SHIFT == 1
162 d->L(2) <<= shift;
163 d->L(3) <<= shift;
164#endif
165 }
0523c6b7 166 FORCE_RET();
664e0f19
FB		 167}
168
5af45186 169void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s)
664e0f19 170{
664e0f19
FB		 171 int shift;
172
664e0f19
FB		 173 if (s->Q(0) > 63) {
174 d->Q(0) = 0;
175#if SHIFT == 1
176 d->Q(1) = 0;
177#endif
178 } else {
179 shift = s->B(0);
180 d->Q(0) >>= shift;
181#if SHIFT == 1
182 d->Q(1) >>= shift;
183#endif
184 }
0523c6b7 185 FORCE_RET();
664e0f19
FB		 186}
187
5af45186 188void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s)
664e0f19 189{
664e0f19
FB		 190 int shift;
191
664e0f19
FB		 192 if (s->Q(0) > 63) {
193 d->Q(0) = 0;
194#if SHIFT == 1
195 d->Q(1) = 0;
196#endif
197 } else {
198 shift = s->B(0);
199 d->Q(0) <<= shift;
200#if SHIFT == 1
201 d->Q(1) <<= shift;
202#endif
203 }
0523c6b7 204 FORCE_RET();
664e0f19
FB		 205}
206
207#if SHIFT == 1
5af45186 208void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s)
664e0f19 209{
664e0f19
FB		 210 int shift, i;
211
664e0f19
FB		 212 shift = s->L(0);
213 if (shift > 16)
214 shift = 16;
215 for(i = 0; i < 16 - shift; i++)
216 d->B(i) = d->B(i + shift);
217 for(i = 16 - shift; i < 16; i++)
218 d->B(i) = 0;
219 FORCE_RET();
220}
221
5af45186 222void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s)
664e0f19 223{
664e0f19
FB		 224 int shift, i;
225
664e0f19
FB		 226 shift = s->L(0);
227 if (shift > 16)
228 shift = 16;
229 for(i = 15; i >= shift; i--)
230 d->B(i) = d->B(i - shift);
231 for(i = 0; i < shift; i++)
232 d->B(i) = 0;
233 FORCE_RET();
234}
235#endif
236
5af45186
FB		 237#define SSE_HELPER_B(name, F)\
238void glue(name, SUFFIX) (Reg *d, Reg *s)\
664e0f19 239{\
664e0f19
FB		 240 d->B(0) = F(d->B(0), s->B(0));\
241 d->B(1) = F(d->B(1), s->B(1));\
242 d->B(2) = F(d->B(2), s->B(2));\
243 d->B(3) = F(d->B(3), s->B(3));\
244 d->B(4) = F(d->B(4), s->B(4));\
245 d->B(5) = F(d->B(5), s->B(5));\
246 d->B(6) = F(d->B(6), s->B(6));\
247 d->B(7) = F(d->B(7), s->B(7));\
248 XMM_ONLY(\
249 d->B(8) = F(d->B(8), s->B(8));\
250 d->B(9) = F(d->B(9), s->B(9));\
251 d->B(10) = F(d->B(10), s->B(10));\
252 d->B(11) = F(d->B(11), s->B(11));\
253 d->B(12) = F(d->B(12), s->B(12));\
254 d->B(13) = F(d->B(13), s->B(13));\
255 d->B(14) = F(d->B(14), s->B(14));\
256 d->B(15) = F(d->B(15), s->B(15));\
257 )\
258}
259
5af45186
FB		 260#define SSE_HELPER_W(name, F)\
261void glue(name, SUFFIX) (Reg *d, Reg *s)\
664e0f19 262{\
664e0f19
FB		 263 d->W(0) = F(d->W(0), s->W(0));\
264 d->W(1) = F(d->W(1), s->W(1));\
265 d->W(2) = F(d->W(2), s->W(2));\
266 d->W(3) = F(d->W(3), s->W(3));\
267 XMM_ONLY(\
268 d->W(4) = F(d->W(4), s->W(4));\
269 d->W(5) = F(d->W(5), s->W(5));\
270 d->W(6) = F(d->W(6), s->W(6));\
271 d->W(7) = F(d->W(7), s->W(7));\
272 )\
273}
274
5af45186
FB		 275#define SSE_HELPER_L(name, F)\
276void glue(name, SUFFIX) (Reg *d, Reg *s)\
664e0f19 277{\
664e0f19
FB		 278 d->L(0) = F(d->L(0), s->L(0));\
279 d->L(1) = F(d->L(1), s->L(1));\
280 XMM_ONLY(\
281 d->L(2) = F(d->L(2), s->L(2));\
282 d->L(3) = F(d->L(3), s->L(3));\
283 )\
284}
285
5af45186
FB		 286#define SSE_HELPER_Q(name, F)\
287void glue(name, SUFFIX) (Reg *d, Reg *s)\
664e0f19 288{\
664e0f19
FB		 289 d->Q(0) = F(d->Q(0), s->Q(0));\
290 XMM_ONLY(\
291 d->Q(1) = F(d->Q(1), s->Q(1));\
292 )\
293}
294
295#if SHIFT == 0
296static inline int satub(int x)
297{
298 if (x < 0)
299 return 0;
300 else if (x > 255)
301 return 255;
302 else
303 return x;
304}
305
306static inline int satuw(int x)
307{
308 if (x < 0)
309 return 0;
310 else if (x > 65535)
311 return 65535;
312 else
313 return x;
314}
315
316static inline int satsb(int x)
317{
318 if (x < -128)
319 return -128;
320 else if (x > 127)
321 return 127;
322 else
323 return x;
324}
325
326static inline int satsw(int x)
327{
328 if (x < -32768)
329 return -32768;
330 else if (x > 32767)
331 return 32767;
332 else
333 return x;
334}
335
336#define FADD(a, b) ((a) + (b))
337#define FADDUB(a, b) satub((a) + (b))
338#define FADDUW(a, b) satuw((a) + (b))
339#define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
340#define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
341
342#define FSUB(a, b) ((a) - (b))
343#define FSUBUB(a, b) satub((a) - (b))
344#define FSUBUW(a, b) satuw((a) - (b))
345#define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
346#define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
347#define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
348#define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
349#define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
350#define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
351
352#define FAND(a, b) (a) & (b)
353#define FANDN(a, b) ((~(a)) & (b))
354#define FOR(a, b) (a) | (b)
355#define FXOR(a, b) (a) ^ (b)
356
357#define FCMPGTB(a, b) (int8_t)(a) > (int8_t)(b) ? -1 : 0
358#define FCMPGTW(a, b) (int16_t)(a) > (int16_t)(b) ? -1 : 0
359#define FCMPGTL(a, b) (int32_t)(a) > (int32_t)(b) ? -1 : 0
360#define FCMPEQ(a, b) (a) == (b) ? -1 : 0
361
362#define FMULLW(a, b) (a) * (b)
a35f3ec7 363#define FMULHRW(a, b) ((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16
664e0f19
FB		 364#define FMULHUW(a, b) (a) * (b) >> 16
365#define FMULHW(a, b) (int16_t)(a) * (int16_t)(b) >> 16
366
367#define FAVG(a, b) ((a) + (b) + 1) >> 1
368#endif
369
5af45186
FB		 370SSE_HELPER_B(helper_paddb, FADD)
371SSE_HELPER_W(helper_paddw, FADD)
372SSE_HELPER_L(helper_paddl, FADD)
373SSE_HELPER_Q(helper_paddq, FADD)
664e0f19 374
5af45186
FB		 375SSE_HELPER_B(helper_psubb, FSUB)
376SSE_HELPER_W(helper_psubw, FSUB)
377SSE_HELPER_L(helper_psubl, FSUB)
378SSE_HELPER_Q(helper_psubq, FSUB)
664e0f19 379
5af45186
FB		 380SSE_HELPER_B(helper_paddusb, FADDUB)
381SSE_HELPER_B(helper_paddsb, FADDSB)
382SSE_HELPER_B(helper_psubusb, FSUBUB)
383SSE_HELPER_B(helper_psubsb, FSUBSB)
664e0f19 384
5af45186
FB		 385SSE_HELPER_W(helper_paddusw, FADDUW)
386SSE_HELPER_W(helper_paddsw, FADDSW)
387SSE_HELPER_W(helper_psubusw, FSUBUW)
388SSE_HELPER_W(helper_psubsw, FSUBSW)
664e0f19 389
5af45186
FB		 390SSE_HELPER_B(helper_pminub, FMINUB)
391SSE_HELPER_B(helper_pmaxub, FMAXUB)
664e0f19 392
5af45186
FB		 393SSE_HELPER_W(helper_pminsw, FMINSW)
394SSE_HELPER_W(helper_pmaxsw, FMAXSW)
664e0f19 395
5af45186
FB		 396SSE_HELPER_Q(helper_pand, FAND)
397SSE_HELPER_Q(helper_pandn, FANDN)
398SSE_HELPER_Q(helper_por, FOR)
399SSE_HELPER_Q(helper_pxor, FXOR)
664e0f19 400
5af45186
FB		 401SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
402SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
403SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
664e0f19 404
5af45186
FB		 405SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
406SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
407SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
664e0f19 408
5af45186 409SSE_HELPER_W(helper_pmullw, FMULLW)
a35f3ec7 410#if SHIFT == 0
5af45186 411SSE_HELPER_W(helper_pmulhrw, FMULHRW)
a35f3ec7 412#endif
5af45186
FB		 413SSE_HELPER_W(helper_pmulhuw, FMULHUW)
414SSE_HELPER_W(helper_pmulhw, FMULHW)
664e0f19 415
5af45186
FB		 416SSE_HELPER_B(helper_pavgb, FAVG)
417SSE_HELPER_W(helper_pavgw, FAVG)
664e0f19 418
5af45186 419void glue(helper_pmuludq, SUFFIX) (Reg *d, Reg *s)
664e0f19 420{
664e0f19
FB		 421 d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0);
422#if SHIFT == 1
423 d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2);
424#endif
425}
426
5af45186 427void glue(helper_pmaddwd, SUFFIX) (Reg *d, Reg *s)
664e0f19
FB		 428{
429 int i;
664e0f19
FB		 430
431 for(i = 0; i < (2 << SHIFT); i++) {
432 d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) +
433 (int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1);
434 }
0523c6b7 435 FORCE_RET();
664e0f19
FB		 436}
437
438#if SHIFT == 0
439static inline int abs1(int a)
440{
441 if (a < 0)
442 return -a;
443 else
444 return a;
445}
446#endif
5af45186 447void glue(helper_psadbw, SUFFIX) (Reg *d, Reg *s)
664e0f19
FB		 448{
449 unsigned int val;
664e0f19
FB		 450
451 val = 0;
452 val += abs1(d->B(0) - s->B(0));
453 val += abs1(d->B(1) - s->B(1));
454 val += abs1(d->B(2) - s->B(2));
455 val += abs1(d->B(3) - s->B(3));
456 val += abs1(d->B(4) - s->B(4));
457 val += abs1(d->B(5) - s->B(5));
458 val += abs1(d->B(6) - s->B(6));
459 val += abs1(d->B(7) - s->B(7));
460 d->Q(0) = val;
461#if SHIFT == 1
462 val = 0;
463 val += abs1(d->B(8) - s->B(8));
464 val += abs1(d->B(9) - s->B(9));
465 val += abs1(d->B(10) - s->B(10));
466 val += abs1(d->B(11) - s->B(11));
467 val += abs1(d->B(12) - s->B(12));
468 val += abs1(d->B(13) - s->B(13));
469 val += abs1(d->B(14) - s->B(14));
470 val += abs1(d->B(15) - s->B(15));
471 d->Q(1) = val;
472#endif
473}
474
b8b6a50b 475void glue(helper_maskmov, SUFFIX) (Reg *d, Reg *s, target_ulong a0)
664e0f19
FB		 476{
477 int i;
664e0f19
FB		 478 for(i = 0; i < (8 << SHIFT); i++) {
479 if (s->B(i) & 0x80)
b8b6a50b 480 stb(a0 + i, d->B(i));
664e0f19 481 }
0523c6b7 482 FORCE_RET();
664e0f19
FB		 483}
484
5af45186 485void glue(helper_movl_mm_T0, SUFFIX) (Reg *d, uint32_t val)
664e0f19 486{
5af45186 487 d->L(0) = val;
664e0f19
FB		 488 d->L(1) = 0;
489#if SHIFT == 1
490 d->Q(1) = 0;
491#endif
492}
493
dabd98dd 494#ifdef TARGET_X86_64
5af45186 495void glue(helper_movq_mm_T0, SUFFIX) (Reg *d, uint64_t val)
dabd98dd 496{
5af45186 497 d->Q(0) = val;
dabd98dd
FB		 498#if SHIFT == 1
499 d->Q(1) = 0;
500#endif
501}
dabd98dd
FB		 502#endif
503
664e0f19 504#if SHIFT == 0
5af45186 505void glue(helper_pshufw, SUFFIX) (Reg *d, Reg *s, int order)
664e0f19 506{
5af45186 507 Reg r;
664e0f19
FB		 508 r.W(0) = s->W(order & 3);
509 r.W(1) = s->W((order >> 2) & 3);
510 r.W(2) = s->W((order >> 4) & 3);
511 r.W(3) = s->W((order >> 6) & 3);
512 *d = r;
513}
514#else
5af45186 515void helper_shufps(Reg *d, Reg *s, int order)
d52cf7a6 516{
5af45186 517 Reg r;
d52cf7a6
FB		 518 r.L(0) = d->L(order & 3);
519 r.L(1) = d->L((order >> 2) & 3);
520 r.L(2) = s->L((order >> 4) & 3);
521 r.L(3) = s->L((order >> 6) & 3);
522 *d = r;
523}
524
5af45186 525void helper_shufpd(Reg *d, Reg *s, int order)
664e0f19 526{
5af45186 527 Reg r;
d52cf7a6 528 r.Q(0) = d->Q(order & 1);
664e0f19
FB		 529 r.Q(1) = s->Q((order >> 1) & 1);
530 *d = r;
531}
532
5af45186 533void glue(helper_pshufd, SUFFIX) (Reg *d, Reg *s, int order)
664e0f19 534{
5af45186 535 Reg r;
664e0f19
FB		 536 r.L(0) = s->L(order & 3);
537 r.L(1) = s->L((order >> 2) & 3);
538 r.L(2) = s->L((order >> 4) & 3);
539 r.L(3) = s->L((order >> 6) & 3);
540 *d = r;
541}
542
5af45186 543void glue(helper_pshuflw, SUFFIX) (Reg *d, Reg *s, int order)
664e0f19 544{
5af45186 545 Reg r;
664e0f19
FB		 546 r.W(0) = s->W(order & 3);
547 r.W(1) = s->W((order >> 2) & 3);
548 r.W(2) = s->W((order >> 4) & 3);
549 r.W(3) = s->W((order >> 6) & 3);
550 r.Q(1) = s->Q(1);
551 *d = r;
552}
553
5af45186 554void glue(helper_pshufhw, SUFFIX) (Reg *d, Reg *s, int order)
664e0f19 555{
5af45186 556 Reg r;
664e0f19
FB		 557 r.Q(0) = s->Q(0);
558 r.W(4) = s->W(4 + (order & 3));
559 r.W(5) = s->W(4 + ((order >> 2) & 3));
560 r.W(6) = s->W(4 + ((order >> 4) & 3));
561 r.W(7) = s->W(4 + ((order >> 6) & 3));
562 *d = r;
563}
564#endif
565
566#if SHIFT == 1
567/* FPU ops */
568/* XXX: not accurate */
569
5af45186
FB		 570#define SSE_HELPER_S(name, F)\
571void helper_ ## name ## ps (Reg *d, Reg *s)\
664e0f19 572{\
7a0e1f41
FB		 573 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
574 d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
575 d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
576 d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
664e0f19
FB		 577}\
578\
5af45186 579void helper_ ## name ## ss (Reg *d, Reg *s)\
664e0f19 580{\
7a0e1f41 581 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
664e0f19 582}\
5af45186 583void helper_ ## name ## pd (Reg *d, Reg *s)\
664e0f19 584{\
7a0e1f41
FB		 585 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
586 d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
664e0f19
FB		 587}\
588\
5af45186 589void helper_ ## name ## sd (Reg *d, Reg *s)\
664e0f19 590{\
7a0e1f41 591 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
664e0f19
FB		 592}
593
7a0e1f41
FB		 594#define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
595#define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
596#define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
597#define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
598#define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b)
599#define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b)
600#define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
664e0f19 601
5af45186
FB		 602SSE_HELPER_S(add, FPU_ADD)
603SSE_HELPER_S(sub, FPU_SUB)
604SSE_HELPER_S(mul, FPU_MUL)
605SSE_HELPER_S(div, FPU_DIV)
606SSE_HELPER_S(min, FPU_MIN)
607SSE_HELPER_S(max, FPU_MAX)
608SSE_HELPER_S(sqrt, FPU_SQRT)
664e0f19
FB		 609
610
611/* float to float conversions */
5af45186 612void helper_cvtps2pd(Reg *d, Reg *s)
664e0f19 613{
8422b113 614 float32 s0, s1;
664e0f19
FB		 615 s0 = s->XMM_S(0);
616 s1 = s->XMM_S(1);
7a0e1f41
FB		 617 d->XMM_D(0) = float32_to_float64(s0, &env->sse_status);
618 d->XMM_D(1) = float32_to_float64(s1, &env->sse_status);
664e0f19
FB		 619}
620
5af45186 621void helper_cvtpd2ps(Reg *d, Reg *s)
664e0f19 622{
7a0e1f41
FB		 623 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
624 d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status);
664e0f19
FB		 625 d->Q(1) = 0;
626}
627
5af45186 628void helper_cvtss2sd(Reg *d, Reg *s)
664e0f19 629{
7a0e1f41 630 d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status);
664e0f19
FB		 631}
632
5af45186 633void helper_cvtsd2ss(Reg *d, Reg *s)
664e0f19 634{
7a0e1f41 635 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
664e0f19
FB		 636}
637
638/* integer to float */
5af45186 639void helper_cvtdq2ps(Reg *d, Reg *s)
664e0f19 640{
7a0e1f41
FB		 641 d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status);
642 d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status);
643 d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status);
644 d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status);
664e0f19
FB		 645}
646
5af45186 647void helper_cvtdq2pd(Reg *d, Reg *s)
664e0f19 648{
664e0f19
FB		 649 int32_t l0, l1;
650 l0 = (int32_t)s->XMM_L(0);
651 l1 = (int32_t)s->XMM_L(1);
7a0e1f41
FB		 652 d->XMM_D(0) = int32_to_float64(l0, &env->sse_status);
653 d->XMM_D(1) = int32_to_float64(l1, &env->sse_status);
664e0f19
FB		 654}
655
5af45186 656void helper_cvtpi2ps(XMMReg *d, MMXReg *s)
664e0f19 657{
7a0e1f41
FB		 658 d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
659 d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
664e0f19
FB		 660}
661
5af45186 662void helper_cvtpi2pd(XMMReg *d, MMXReg *s)
664e0f19 663{
7a0e1f41
FB		 664 d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
665 d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
664e0f19
FB		 666}
667
5af45186 668void helper_cvtsi2ss(XMMReg *d, uint32_t val)
664e0f19 669{
5af45186 670 d->XMM_S(0) = int32_to_float32(val, &env->sse_status);
664e0f19
FB		 671}
672
5af45186 673void helper_cvtsi2sd(XMMReg *d, uint32_t val)
664e0f19 674{
5af45186 675 d->XMM_D(0) = int32_to_float64(val, &env->sse_status);
664e0f19
FB		 676}
677
678#ifdef TARGET_X86_64
5af45186 679void helper_cvtsq2ss(XMMReg *d, uint64_t val)
664e0f19 680{
5af45186 681 d->XMM_S(0) = int64_to_float32(val, &env->sse_status);
664e0f19
FB		 682}
683
5af45186 684void helper_cvtsq2sd(XMMReg *d, uint64_t val)
664e0f19 685{
5af45186 686 d->XMM_D(0) = int64_to_float64(val, &env->sse_status);
664e0f19
FB		 687}
688#endif
689
690/* float to integer */
5af45186 691void helper_cvtps2dq(XMMReg *d, XMMReg *s)
664e0f19 692{
7a0e1f41
FB		 693 d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
694 d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
695 d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status);
696 d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status);
664e0f19
FB		 697}
698
5af45186 699void helper_cvtpd2dq(XMMReg *d, XMMReg *s)
664e0f19 700{
7a0e1f41
FB		 701 d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
702 d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
664e0f19
FB		 703 d->XMM_Q(1) = 0;
704}
705
5af45186 706void helper_cvtps2pi(MMXReg *d, XMMReg *s)
664e0f19 707{
7a0e1f41
FB		 708 d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
709 d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
664e0f19
FB		 710}
711
5af45186 712void helper_cvtpd2pi(MMXReg *d, XMMReg *s)
664e0f19 713{
7a0e1f41
FB		 714 d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
715 d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
664e0f19
FB		 716}
717
5af45186 718int32_t helper_cvtss2si(XMMReg *s)
664e0f19 719{
5af45186 720 return float32_to_int32(s->XMM_S(0), &env->sse_status);
664e0f19
FB		 721}
722
5af45186 723int32_t helper_cvtsd2si(XMMReg *s)
664e0f19 724{
5af45186 725 return float64_to_int32(s->XMM_D(0), &env->sse_status);
664e0f19
FB		 726}
727
728#ifdef TARGET_X86_64
5af45186 729int64_t helper_cvtss2sq(XMMReg *s)
664e0f19 730{
5af45186 731 return float32_to_int64(s->XMM_S(0), &env->sse_status);
664e0f19
FB		 732}
733
5af45186 734int64_t helper_cvtsd2sq(XMMReg *s)
664e0f19 735{
5af45186 736 return float64_to_int64(s->XMM_D(0), &env->sse_status);
664e0f19
FB		 737}
738#endif
739
740/* float to integer truncated */
5af45186 741void helper_cvttps2dq(XMMReg *d, XMMReg *s)
664e0f19 742{
7a0e1f41
FB		 743 d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
744 d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
745 d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status);
746 d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status);
664e0f19
FB		 747}
748
5af45186 749void helper_cvttpd2dq(XMMReg *d, XMMReg *s)
664e0f19 750{
7a0e1f41
FB		 751 d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
752 d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
664e0f19
FB		 753 d->XMM_Q(1) = 0;
754}
755
5af45186 756void helper_cvttps2pi(MMXReg *d, XMMReg *s)
664e0f19 757{
7a0e1f41
FB		 758 d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
759 d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
664e0f19
FB		 760}
761
5af45186 762void helper_cvttpd2pi(MMXReg *d, XMMReg *s)
664e0f19 763{
7a0e1f41
FB		 764 d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
765 d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
664e0f19
FB		 766}
767
5af45186 768int32_t helper_cvttss2si(XMMReg *s)
664e0f19 769{
5af45186 770 return float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
664e0f19
FB		 771}
772
5af45186 773int32_t helper_cvttsd2si(XMMReg *s)
664e0f19 774{
5af45186 775 return float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
664e0f19
FB		 776}
777
778#ifdef TARGET_X86_64
5af45186 779int64_t helper_cvttss2sq(XMMReg *s)
664e0f19 780{
5af45186 781 return float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status);
664e0f19
FB		 782}
783
5af45186 784int64_t helper_cvttsd2sq(XMMReg *s)
664e0f19 785{
5af45186 786 return float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status);
664e0f19
FB		 787}
788#endif
789
5af45186 790void helper_rsqrtps(XMMReg *d, XMMReg *s)
664e0f19 791{
664e0f19
FB		 792 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
793 d->XMM_S(1) = approx_rsqrt(s->XMM_S(1));
794 d->XMM_S(2) = approx_rsqrt(s->XMM_S(2));
795 d->XMM_S(3) = approx_rsqrt(s->XMM_S(3));
796}
797
5af45186 798void helper_rsqrtss(XMMReg *d, XMMReg *s)
664e0f19 799{
664e0f19
FB		 800 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
801}
802
5af45186 803void helper_rcpps(XMMReg *d, XMMReg *s)
664e0f19 804{
664e0f19
FB		 805 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
806 d->XMM_S(1) = approx_rcp(s->XMM_S(1));
807 d->XMM_S(2) = approx_rcp(s->XMM_S(2));
808 d->XMM_S(3) = approx_rcp(s->XMM_S(3));
809}
810
5af45186 811void helper_rcpss(XMMReg *d, XMMReg *s)
664e0f19 812{
664e0f19
FB		 813 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
814}
815
5af45186 816void helper_haddps(XMMReg *d, XMMReg *s)
664e0f19 817{
664e0f19
FB		 818 XMMReg r;
819 r.XMM_S(0) = d->XMM_S(0) + d->XMM_S(1);
820 r.XMM_S(1) = d->XMM_S(2) + d->XMM_S(3);
821 r.XMM_S(2) = s->XMM_S(0) + s->XMM_S(1);
822 r.XMM_S(3) = s->XMM_S(2) + s->XMM_S(3);
823 *d = r;
824}
825
5af45186 826void helper_haddpd(XMMReg *d, XMMReg *s)
664e0f19 827{
664e0f19
FB		 828 XMMReg r;
829 r.XMM_D(0) = d->XMM_D(0) + d->XMM_D(1);
830 r.XMM_D(1) = s->XMM_D(0) + s->XMM_D(1);
831 *d = r;
832}
833
5af45186 834void helper_hsubps(XMMReg *d, XMMReg *s)
664e0f19 835{
664e0f19
FB		 836 XMMReg r;
837 r.XMM_S(0) = d->XMM_S(0) - d->XMM_S(1);
838 r.XMM_S(1) = d->XMM_S(2) - d->XMM_S(3);
839 r.XMM_S(2) = s->XMM_S(0) - s->XMM_S(1);
840 r.XMM_S(3) = s->XMM_S(2) - s->XMM_S(3);
841 *d = r;
842}
843
5af45186 844void helper_hsubpd(XMMReg *d, XMMReg *s)
664e0f19 845{
664e0f19
FB		 846 XMMReg r;
847 r.XMM_D(0) = d->XMM_D(0) - d->XMM_D(1);
848 r.XMM_D(1) = s->XMM_D(0) - s->XMM_D(1);
849 *d = r;
850}
851
5af45186 852void helper_addsubps(XMMReg *d, XMMReg *s)
664e0f19 853{
664e0f19
FB		 854 d->XMM_S(0) = d->XMM_S(0) - s->XMM_S(0);
855 d->XMM_S(1) = d->XMM_S(1) + s->XMM_S(1);
856 d->XMM_S(2) = d->XMM_S(2) - s->XMM_S(2);
857 d->XMM_S(3) = d->XMM_S(3) + s->XMM_S(3);
858}
859
5af45186 860void helper_addsubpd(XMMReg *d, XMMReg *s)
664e0f19 861{
664e0f19
FB		 862 d->XMM_D(0) = d->XMM_D(0) - s->XMM_D(0);
863 d->XMM_D(1) = d->XMM_D(1) + s->XMM_D(1);
864}
865
866/* XXX: unordered */
5af45186
FB		 867#define SSE_HELPER_CMP(name, F)\
868void helper_ ## name ## ps (Reg *d, Reg *s)\
664e0f19 869{\
8422b113
FB		 870 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
871 d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
872 d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
873 d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
664e0f19
FB		 874}\
875\
5af45186 876void helper_ ## name ## ss (Reg *d, Reg *s)\
664e0f19 877{\
8422b113 878 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
664e0f19 879}\
5af45186 880void helper_ ## name ## pd (Reg *d, Reg *s)\
664e0f19 881{\
8422b113
FB		 882 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
883 d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
664e0f19
FB		 884}\
885\
5af45186 886void helper_ ## name ## sd (Reg *d, Reg *s)\
664e0f19 887{\
8422b113 888 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
664e0f19
FB		 889}
890
8422b113
FB		 891#define FPU_CMPEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? -1 : 0
892#define FPU_CMPLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0
893#define FPU_CMPLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? -1 : 0
894#define FPU_CMPUNORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? - 1 : 0
895#define FPU_CMPNEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? 0 : -1
896#define FPU_CMPNLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1
897#define FPU_CMPNLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? 0 : -1
898#define FPU_CMPORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? 0 : -1
664e0f19 899
5af45186
FB		 900SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
901SSE_HELPER_CMP(cmplt, FPU_CMPLT)
902SSE_HELPER_CMP(cmple, FPU_CMPLE)
903SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD)
904SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ)
905SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
906SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
907SSE_HELPER_CMP(cmpord, FPU_CMPORD)
664e0f19 908
43fb823b
FB		 909const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
910
5af45186 911void helper_ucomiss(Reg *d, Reg *s)
664e0f19 912{
43fb823b 913 int ret;
8422b113 914 float32 s0, s1;
664e0f19
FB		 915
916 s0 = d->XMM_S(0);
917 s1 = s->XMM_S(0);
43fb823b
FB		 918 ret = float32_compare_quiet(s0, s1, &env->sse_status);
919 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB		 920 FORCE_RET();
921}
922
5af45186 923void helper_comiss(Reg *d, Reg *s)
664e0f19 924{
43fb823b 925 int ret;
8422b113 926 float32 s0, s1;
664e0f19
FB		 927
928 s0 = d->XMM_S(0);
929 s1 = s->XMM_S(0);
43fb823b
FB		 930 ret = float32_compare(s0, s1, &env->sse_status);
931 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB		 932 FORCE_RET();
933}
934
5af45186 935void helper_ucomisd(Reg *d, Reg *s)
664e0f19 936{
43fb823b 937 int ret;
8422b113 938 float64 d0, d1;
664e0f19
FB		 939
940 d0 = d->XMM_D(0);
941 d1 = s->XMM_D(0);
43fb823b
FB		 942 ret = float64_compare_quiet(d0, d1, &env->sse_status);
943 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB		 944 FORCE_RET();
945}
946
5af45186 947void helper_comisd(Reg *d, Reg *s)
664e0f19 948{
43fb823b 949 int ret;
8422b113 950 float64 d0, d1;
664e0f19
FB		 951
952 d0 = d->XMM_D(0);
953 d1 = s->XMM_D(0);
43fb823b
FB		 954 ret = float64_compare(d0, d1, &env->sse_status);
955 CC_SRC = comis_eflags[ret + 1];
664e0f19
FB		 956 FORCE_RET();
957}
958
5af45186 959uint32_t helper_movmskps(Reg *s)
664e0f19
FB		 960{
961 int b0, b1, b2, b3;
664e0f19
FB		 962 b0 = s->XMM_L(0) >> 31;
963 b1 = s->XMM_L(1) >> 31;
964 b2 = s->XMM_L(2) >> 31;
965 b3 = s->XMM_L(3) >> 31;
5af45186 966 return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3);
664e0f19
FB		 967}
968
5af45186 969uint32_t helper_movmskpd(Reg *s)
664e0f19
FB		 970{
971 int b0, b1;
664e0f19
FB		 972 b0 = s->XMM_L(1) >> 31;
973 b1 = s->XMM_L(3) >> 31;
5af45186 974 return b0 | (b1 << 1);
664e0f19
FB		 975}
976
977#endif
978
5af45186
FB		 979uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s)
980{
981 uint32_t val;
982 val = 0;
983 val |= (s->XMM_B(0) >> 7);
984 val |= (s->XMM_B(1) >> 6) & 0x02;
985 val |= (s->XMM_B(2) >> 5) & 0x04;
986 val |= (s->XMM_B(3) >> 4) & 0x08;
987 val |= (s->XMM_B(4) >> 3) & 0x10;
988 val |= (s->XMM_B(5) >> 2) & 0x20;
989 val |= (s->XMM_B(6) >> 1) & 0x40;
990 val |= (s->XMM_B(7)) & 0x80;
664e0f19 991#if SHIFT == 1
5af45186
FB		 992 val |= (s->XMM_B(8) << 1) & 0x0100;
993 val |= (s->XMM_B(9) << 2) & 0x0200;
994 val |= (s->XMM_B(10) << 3) & 0x0400;
995 val |= (s->XMM_B(11) << 4) & 0x0800;
996 val |= (s->XMM_B(12) << 5) & 0x1000;
997 val |= (s->XMM_B(13) << 6) & 0x2000;
998 val |= (s->XMM_B(14) << 7) & 0x4000;
999 val |= (s->XMM_B(15) << 8) & 0x8000;
664e0f19 1000#endif
5af45186 1001 return val;
664e0f19
FB		 1002}
1003
5af45186 1004void glue(helper_packsswb, SUFFIX) (Reg *d, Reg *s)
664e0f19 1005{
5af45186 1006 Reg r;
664e0f19
FB		 1007
1008 r.B(0) = satsb((int16_t)d->W(0));
1009 r.B(1) = satsb((int16_t)d->W(1));
1010 r.B(2) = satsb((int16_t)d->W(2));
1011 r.B(3) = satsb((int16_t)d->W(3));
1012#if SHIFT == 1
1013 r.B(4) = satsb((int16_t)d->W(4));
1014 r.B(5) = satsb((int16_t)d->W(5));
1015 r.B(6) = satsb((int16_t)d->W(6));
1016 r.B(7) = satsb((int16_t)d->W(7));
1017#endif
1018 r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0));
1019 r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1));
1020 r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2));
1021 r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3));
1022#if SHIFT == 1
1023 r.B(12) = satsb((int16_t)s->W(4));
1024 r.B(13) = satsb((int16_t)s->W(5));
1025 r.B(14) = satsb((int16_t)s->W(6));
1026 r.B(15) = satsb((int16_t)s->W(7));
1027#endif
1028 *d = r;
1029}
1030
5af45186 1031void glue(helper_packuswb, SUFFIX) (Reg *d, Reg *s)
664e0f19 1032{
5af45186 1033 Reg r;
664e0f19
FB		 1034
1035 r.B(0) = satub((int16_t)d->W(0));
1036 r.B(1) = satub((int16_t)d->W(1));
1037 r.B(2) = satub((int16_t)d->W(2));
1038 r.B(3) = satub((int16_t)d->W(3));
1039#if SHIFT == 1
1040 r.B(4) = satub((int16_t)d->W(4));
1041 r.B(5) = satub((int16_t)d->W(5));
1042 r.B(6) = satub((int16_t)d->W(6));
1043 r.B(7) = satub((int16_t)d->W(7));
1044#endif
1045 r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0));
1046 r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1));
1047 r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2));
1048 r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3));
1049#if SHIFT == 1
1050 r.B(12) = satub((int16_t)s->W(4));
1051 r.B(13) = satub((int16_t)s->W(5));
1052 r.B(14) = satub((int16_t)s->W(6));
1053 r.B(15) = satub((int16_t)s->W(7));
1054#endif
1055 *d = r;
1056}
1057
5af45186 1058void glue(helper_packssdw, SUFFIX) (Reg *d, Reg *s)
664e0f19 1059{
5af45186 1060 Reg r;
664e0f19
FB		 1061
1062 r.W(0) = satsw(d->L(0));
1063 r.W(1) = satsw(d->L(1));
1064#if SHIFT == 1
1065 r.W(2) = satsw(d->L(2));
1066 r.W(3) = satsw(d->L(3));
1067#endif
1068 r.W((2 << SHIFT) + 0) = satsw(s->L(0));
1069 r.W((2 << SHIFT) + 1) = satsw(s->L(1));
1070#if SHIFT == 1
1071 r.W(6) = satsw(s->L(2));
1072 r.W(7) = satsw(s->L(3));
1073#endif
1074 *d = r;
1075}
1076
1077#define UNPCK_OP(base_name, base) \
1078 \
5af45186 1079void glue(helper_punpck ## base_name ## bw, SUFFIX) (Reg *d, Reg *s) \
664e0f19 1080{ \
5af45186 1081 Reg r; \
664e0f19
FB		 1082 \
1083 r.B(0) = d->B((base << (SHIFT + 2)) + 0); \
1084 r.B(1) = s->B((base << (SHIFT + 2)) + 0); \
1085 r.B(2) = d->B((base << (SHIFT + 2)) + 1); \
1086 r.B(3) = s->B((base << (SHIFT + 2)) + 1); \
1087 r.B(4) = d->B((base << (SHIFT + 2)) + 2); \
1088 r.B(5) = s->B((base << (SHIFT + 2)) + 2); \
1089 r.B(6) = d->B((base << (SHIFT + 2)) + 3); \
1090 r.B(7) = s->B((base << (SHIFT + 2)) + 3); \
1091XMM_ONLY( \
1092 r.B(8) = d->B((base << (SHIFT + 2)) + 4); \
1093 r.B(9) = s->B((base << (SHIFT + 2)) + 4); \
1094 r.B(10) = d->B((base << (SHIFT + 2)) + 5); \
1095 r.B(11) = s->B((base << (SHIFT + 2)) + 5); \
1096 r.B(12) = d->B((base << (SHIFT + 2)) + 6); \
1097 r.B(13) = s->B((base << (SHIFT + 2)) + 6); \
1098 r.B(14) = d->B((base << (SHIFT + 2)) + 7); \
1099 r.B(15) = s->B((base << (SHIFT + 2)) + 7); \
1100) \
1101 *d = r; \
1102} \
1103 \
5af45186 1104void glue(helper_punpck ## base_name ## wd, SUFFIX) (Reg *d, Reg *s) \
664e0f19 1105{ \
5af45186 1106 Reg r; \
664e0f19
FB		 1107 \
1108 r.W(0) = d->W((base << (SHIFT + 1)) + 0); \
1109 r.W(1) = s->W((base << (SHIFT + 1)) + 0); \
1110 r.W(2) = d->W((base << (SHIFT + 1)) + 1); \
1111 r.W(3) = s->W((base << (SHIFT + 1)) + 1); \
1112XMM_ONLY( \
1113 r.W(4) = d->W((base << (SHIFT + 1)) + 2); \
1114 r.W(5) = s->W((base << (SHIFT + 1)) + 2); \
1115 r.W(6) = d->W((base << (SHIFT + 1)) + 3); \
1116 r.W(7) = s->W((base << (SHIFT + 1)) + 3); \
1117) \
1118 *d = r; \
1119} \
1120 \
5af45186 1121void glue(helper_punpck ## base_name ## dq, SUFFIX) (Reg *d, Reg *s) \
664e0f19 1122{ \
5af45186 1123 Reg r; \
664e0f19
FB		 1124 \
1125 r.L(0) = d->L((base << SHIFT) + 0); \
1126 r.L(1) = s->L((base << SHIFT) + 0); \
1127XMM_ONLY( \
1128 r.L(2) = d->L((base << SHIFT) + 1); \
1129 r.L(3) = s->L((base << SHIFT) + 1); \
1130) \
1131 *d = r; \
1132} \
1133 \
1134XMM_ONLY( \
5af45186 1135void glue(helper_punpck ## base_name ## qdq, SUFFIX) (Reg *d, Reg *s) \
664e0f19 1136{ \
5af45186 1137 Reg r; \
664e0f19
FB		 1138 \
1139 r.Q(0) = d->Q(base); \
1140 r.Q(1) = s->Q(base); \
1141 *d = r; \
1142} \
1143)
1144
1145UNPCK_OP(l, 0)
1146UNPCK_OP(h, 1)
1147
a35f3ec7
AJ		 1148/* 3DNow! float ops */
1149#if SHIFT == 0
5af45186 1150void helper_pi2fd(MMXReg *d, MMXReg *s)
a35f3ec7 1151{
a35f3ec7
AJ		 1152 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status);
1153 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status);
1154}
1155
5af45186 1156void helper_pi2fw(MMXReg *d, MMXReg *s)
a35f3ec7 1157{
a35f3ec7
AJ		 1158 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status);
1159 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status);
1160}
1161
5af45186 1162void helper_pf2id(MMXReg *d, MMXReg *s)
a35f3ec7 1163{
a35f3ec7
AJ		 1164 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status);
1165 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status);
1166}
1167
5af45186 1168void helper_pf2iw(MMXReg *d, MMXReg *s)
a35f3ec7 1169{
a35f3ec7
AJ		 1170 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status));
1171 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status));
1172}
1173
5af45186 1174void helper_pfacc(MMXReg *d, MMXReg *s)
a35f3ec7 1175{
a35f3ec7
AJ		 1176 MMXReg r;
1177 r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1178 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1179 *d = r;
1180}
1181
5af45186 1182void helper_pfadd(MMXReg *d, MMXReg *s)
a35f3ec7 1183{
a35f3ec7
AJ		 1184 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1185 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1186}
1187
5af45186 1188void helper_pfcmpeq(MMXReg *d, MMXReg *s)
a35f3ec7 1189{
a35f3ec7
AJ		 1190 d->MMX_L(0) = float32_eq(d->MMX_S(0), s->MMX_S(0), &env->mmx_status) ? -1 : 0;
1191 d->MMX_L(1) = float32_eq(d->MMX_S(1), s->MMX_S(1), &env->mmx_status) ? -1 : 0;
1192}
1193
5af45186 1194void helper_pfcmpge(MMXReg *d, MMXReg *s)
a35f3ec7 1195{
a35f3ec7
AJ		 1196 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1197 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1198}
1199
5af45186 1200void helper_pfcmpgt(MMXReg *d, MMXReg *s)
a35f3ec7 1201{
a35f3ec7
AJ		 1202 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1203 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1204}
1205
5af45186 1206void helper_pfmax(MMXReg *d, MMXReg *s)
a35f3ec7 1207{
a35f3ec7
AJ		 1208 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status))
1209 d->MMX_S(0) = s->MMX_S(0);
1210 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status))
1211 d->MMX_S(1) = s->MMX_S(1);
1212}
1213
5af45186 1214void helper_pfmin(MMXReg *d, MMXReg *s)
a35f3ec7 1215{
a35f3ec7
AJ		 1216 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status))
1217 d->MMX_S(0) = s->MMX_S(0);
1218 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status))
1219 d->MMX_S(1) = s->MMX_S(1);
1220}
1221
5af45186 1222void helper_pfmul(MMXReg *d, MMXReg *s)
a35f3ec7 1223{
a35f3ec7
AJ		 1224 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1225 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1226}
1227
5af45186 1228void helper_pfnacc(MMXReg *d, MMXReg *s)
a35f3ec7 1229{
a35f3ec7
AJ		 1230 MMXReg r;
1231 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1232 r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1233 *d = r;
1234}
1235
5af45186 1236void helper_pfpnacc(MMXReg *d, MMXReg *s)
a35f3ec7 1237{
a35f3ec7
AJ		 1238 MMXReg r;
1239 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1240 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1241 *d = r;
1242}
1243
5af45186 1244void helper_pfrcp(MMXReg *d, MMXReg *s)
a35f3ec7 1245{
a35f3ec7
AJ		 1246 d->MMX_S(0) = approx_rcp(s->MMX_S(0));
1247 d->MMX_S(1) = d->MMX_S(0);
1248}
1249
5af45186 1250void helper_pfrsqrt(MMXReg *d, MMXReg *s)
a35f3ec7 1251{
a35f3ec7
AJ		 1252 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff;
1253 d->MMX_S(1) = approx_rsqrt(d->MMX_S(1));
1254 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000;
1255 d->MMX_L(0) = d->MMX_L(1);
1256}
1257
5af45186 1258void helper_pfsub(MMXReg *d, MMXReg *s)
a35f3ec7 1259{
a35f3ec7
AJ		 1260 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1261 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1262}
1263
5af45186 1264void helper_pfsubr(MMXReg *d, MMXReg *s)
a35f3ec7 1265{
a35f3ec7
AJ		 1266 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status);
1267 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status);
1268}
1269
5af45186 1270void helper_pswapd(MMXReg *d, MMXReg *s)
a35f3ec7 1271{
a35f3ec7
AJ		 1272 MMXReg r;
1273 r.MMX_L(0) = s->MMX_L(1);
1274 r.MMX_L(1) = s->MMX_L(0);
1275 *d = r;
1276}
1277#endif
1278
4242b1bd
AZ		 1279/* SSSE3 op helpers */
1280void glue(helper_pshufb, SUFFIX) (Reg *d, Reg *s)
1281{
1282 int i;
1283 Reg r;
1284
1285 for (i = 0; i < (8 << SHIFT); i++)
1286 r.B(i) = (s->B(i) & 0x80) ? 0 : (d->B(s->B(i) & ((8 << SHIFT) - 1)));
1287
1288 *d = r;
1289}
1290
1291void glue(helper_phaddw, SUFFIX) (Reg *d, Reg *s)
1292{
1293 d->W(0) = (int16_t)d->W(0) + (int16_t)d->W(1);
1294 d->W(1) = (int16_t)d->W(2) + (int16_t)d->W(3);
1295 XMM_ONLY(d->W(2) = (int16_t)d->W(4) + (int16_t)d->W(5));
1296 XMM_ONLY(d->W(3) = (int16_t)d->W(6) + (int16_t)d->W(7));
1297 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) + (int16_t)s->W(1);
1298 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) + (int16_t)s->W(3);
1299 XMM_ONLY(d->W(6) = (int16_t)s->W(4) + (int16_t)s->W(5));
1300 XMM_ONLY(d->W(7) = (int16_t)s->W(6) + (int16_t)s->W(7));
1301}
1302
1303void glue(helper_phaddd, SUFFIX) (Reg *d, Reg *s)
1304{
1305 d->L(0) = (int32_t)d->L(0) + (int32_t)d->L(1);
1306 XMM_ONLY(d->L(1) = (int32_t)d->L(2) + (int32_t)d->L(3));
1307 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) + (int32_t)s->L(1);
1308 XMM_ONLY(d->L(3) = (int32_t)s->L(2) + (int32_t)s->L(3));
1309}
1310
1311void glue(helper_phaddsw, SUFFIX) (Reg *d, Reg *s)
1312{
1313 d->W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1));
1314 d->W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3));
1315 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) + (int16_t)d->W(5)));
1316 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) + (int16_t)d->W(7)));
1317 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) + (int16_t)s->W(1));
1318 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) + (int16_t)s->W(3));
1319 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) + (int16_t)s->W(5)));
1320 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7)));
1321}
1322
1323void glue(helper_pmaddubsw, SUFFIX) (Reg *d, Reg *s)
1324{
1325 d->W(0) = satsw((int8_t)s->B( 0) * (uint8_t)d->B( 0) +
1326 (int8_t)s->B( 1) * (uint8_t)d->B( 1));
1327 d->W(1) = satsw((int8_t)s->B( 2) * (uint8_t)d->B( 2) +
1328 (int8_t)s->B( 3) * (uint8_t)d->B( 3));
1329 d->W(2) = satsw((int8_t)s->B( 4) * (uint8_t)d->B( 4) +
1330 (int8_t)s->B( 5) * (uint8_t)d->B( 5));
1331 d->W(3) = satsw((int8_t)s->B( 6) * (uint8_t)d->B( 6) +
1332 (int8_t)s->B( 7) * (uint8_t)d->B( 7));
1333#if SHIFT == 1
1334 d->W(4) = satsw((int8_t)s->B( 8) * (uint8_t)d->B( 8) +
1335 (int8_t)s->B( 9) * (uint8_t)d->B( 9));
1336 d->W(5) = satsw((int8_t)s->B(10) * (uint8_t)d->B(10) +
1337 (int8_t)s->B(11) * (uint8_t)d->B(11));
1338 d->W(6) = satsw((int8_t)s->B(12) * (uint8_t)d->B(12) +
1339 (int8_t)s->B(13) * (uint8_t)d->B(13));
1340 d->W(7) = satsw((int8_t)s->B(14) * (uint8_t)d->B(14) +
1341 (int8_t)s->B(15) * (uint8_t)d->B(15));
1342#endif
1343}
1344
1345void glue(helper_phsubw, SUFFIX) (Reg *d, Reg *s)
1346{
1347 d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1);
1348 d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3);
1349 XMM_ONLY(d->W(2) = (int16_t)d->W(4) - (int16_t)d->W(5));
1350 XMM_ONLY(d->W(3) = (int16_t)d->W(6) - (int16_t)d->W(7));
1351 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) - (int16_t)s->W(1);
1352 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) - (int16_t)s->W(3);
1353 XMM_ONLY(d->W(6) = (int16_t)s->W(4) - (int16_t)s->W(5));
1354 XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7));
1355}
1356
1357void glue(helper_phsubd, SUFFIX) (Reg *d, Reg *s)
1358{
1359 d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1);
1360 XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3));
1361 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) - (int32_t)s->L(1);
1362 XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3));
1363}
1364
1365void glue(helper_phsubsw, SUFFIX) (Reg *d, Reg *s)
1366{
1367 d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1));
1368 d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3));
1369 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) - (int16_t)d->W(5)));
1370 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) - (int16_t)d->W(7)));
1371 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) - (int16_t)s->W(1));
1372 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) - (int16_t)s->W(3));
1373 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) - (int16_t)s->W(5)));
1374 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) - (int16_t)s->W(7)));
1375}
1376
1377#define FABSB(_, x) x > INT8_MAX ? -(int8_t ) x : x
1378#define FABSW(_, x) x > INT16_MAX ? -(int16_t) x : x
1379#define FABSL(_, x) x > INT32_MAX ? -(int32_t) x : x
1380SSE_HELPER_B(helper_pabsb, FABSB)
1381SSE_HELPER_W(helper_pabsw, FABSW)
1382SSE_HELPER_L(helper_pabsd, FABSL)
1383
1384#define FMULHRSW(d, s) ((int16_t) d * (int16_t) s + 0x4000) >> 15
1385SSE_HELPER_W(helper_pmulhrsw, FMULHRSW)
1386
1387#define FSIGNB(d, s) s <= INT8_MAX ? s ? d : 0 : -(int8_t ) d
1388#define FSIGNW(d, s) s <= INT16_MAX ? s ? d : 0 : -(int16_t) d
1389#define FSIGNL(d, s) s <= INT32_MAX ? s ? d : 0 : -(int32_t) d
1390SSE_HELPER_B(helper_psignb, FSIGNB)
1391SSE_HELPER_W(helper_psignw, FSIGNW)
1392SSE_HELPER_L(helper_psignd, FSIGNL)
1393
1394void glue(helper_palignr, SUFFIX) (Reg *d, Reg *s, int32_t shift)
1395{
1396 Reg r;
1397
1398 /* XXX could be checked during translation */
1399 if (shift >= (16 << SHIFT)) {
1400 r.Q(0) = 0;
1401 XMM_ONLY(r.Q(1) = 0);
1402 } else {
1403 shift <<= 3;
1404#define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0)
1405#if SHIFT == 0
1406 r.Q(0) = SHR(s->Q(0), shift - 0) |
1407 SHR(d->Q(0), shift - 64);
1408#else
1409 r.Q(0) = SHR(s->Q(0), shift - 0) |
1410 SHR(s->Q(1), shift - 64) |
1411 SHR(d->Q(0), shift - 128) |
1412 SHR(d->Q(1), shift - 192);
1413 r.Q(1) = SHR(s->Q(0), shift + 64) |
1414 SHR(s->Q(1), shift - 0) |
1415 SHR(d->Q(0), shift - 64) |
1416 SHR(d->Q(1), shift - 128);
1417#endif
1418#undef SHR
1419 }
1420
1421 *d = r;
1422}
1423
222a3336
AZ		 1424#define XMM0 env->xmm_regs[0]
1425
1426#if SHIFT == 1
1427#define SSE_HELPER_V(name, elem, num, F)\
1428void glue(name, SUFFIX) (Reg *d, Reg *s)\
1429{\
1430 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0));\
1431 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1));\
1432 if (num > 2) {\
1433 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2));\
1434 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3));\
1435 if (num > 4) {\
1436 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4));\
1437 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5));\
1438 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6));\
1439 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7));\
1440 if (num > 8) {\
1441 d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8));\
1442 d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9));\
1443 d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10));\
1444 d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11));\
1445 d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12));\
1446 d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13));\
1447 d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14));\
1448 d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15));\
1449 }\
1450 }\
1451 }\
1452}
1453
1454#define SSE_HELPER_I(name, elem, num, F)\
1455void glue(name, SUFFIX) (Reg *d, Reg *s, uint32_t imm)\
1456{\
1457 d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1));\
1458 d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1));\
1459 if (num > 2) {\
1460 d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1));\
1461 d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1));\
1462 if (num > 4) {\
1463 d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1));\
1464 d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1));\
1465 d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1));\
1466 d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1));\
1467 if (num > 8) {\
1468 d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1));\
1469 d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1));\
1470 d->elem(10) = F(d->elem(10), s->elem(10), ((imm >> 10) & 1));\
1471 d->elem(11) = F(d->elem(11), s->elem(11), ((imm >> 11) & 1));\
1472 d->elem(12) = F(d->elem(12), s->elem(12), ((imm >> 12) & 1));\
1473 d->elem(13) = F(d->elem(13), s->elem(13), ((imm >> 13) & 1));\
1474 d->elem(14) = F(d->elem(14), s->elem(14), ((imm >> 14) & 1));\
1475 d->elem(15) = F(d->elem(15), s->elem(15), ((imm >> 15) & 1));\
1476 }\
1477 }\
1478 }\
1479}
1480
1481/* SSE4.1 op helpers */
1482#define FBLENDVB(d, s, m) (m & 0x80) ? s : d
1483#define FBLENDVPS(d, s, m) (m & 0x80000000) ? s : d
000cacf6 1484#define FBLENDVPD(d, s, m) (m & 0x8000000000000000LL) ? s : d
222a3336
AZ		 1485SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB)
1486SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS)
1487SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD)
1488
1489void glue(helper_ptest, SUFFIX) (Reg *d, Reg *s)
1490{
1491 uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1));
1492 uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1));
1493
1494 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C);
1495}
1496
1497#define SSE_HELPER_F(name, elem, num, F)\
1498void glue(name, SUFFIX) (Reg *d, Reg *s)\
1499{\
1500 d->elem(0) = F(0);\
1501 d->elem(1) = F(1);\
1502 d->elem(2) = F(2);\
1503 d->elem(3) = F(3);\
1504 if (num > 3) {\
1505 d->elem(4) = F(4);\
1506 d->elem(5) = F(5);\
1507 if (num > 5) {\
1508 d->elem(6) = F(6);\
1509 d->elem(7) = F(7);\
1510 }\
1511 }\
1512}
1513
1514SSE_HELPER_F(helper_pmovsxbw, W, 8, (int8_t) s->B)
1515SSE_HELPER_F(helper_pmovsxbd, L, 4, (int8_t) s->B)
1516SSE_HELPER_F(helper_pmovsxbq, Q, 2, (int8_t) s->B)
1517SSE_HELPER_F(helper_pmovsxwd, L, 4, (int16_t) s->W)
1518SSE_HELPER_F(helper_pmovsxwq, Q, 2, (int16_t) s->W)
1519SSE_HELPER_F(helper_pmovsxdq, Q, 2, (int32_t) s->L)
1520SSE_HELPER_F(helper_pmovzxbw, W, 8, s->B)
1521SSE_HELPER_F(helper_pmovzxbd, L, 4, s->B)
1522SSE_HELPER_F(helper_pmovzxbq, Q, 2, s->B)
1523SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W)
1524SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W)
1525SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L)
1526
1527void glue(helper_pmuldq, SUFFIX) (Reg *d, Reg *s)
1528{
1529 d->Q(0) = (int64_t) (int32_t) d->L(0) * (int32_t) s->L(0);
1530 d->Q(1) = (int64_t) (int32_t) d->L(2) * (int32_t) s->L(2);
1531}
1532
1533#define FCMPEQQ(d, s) d == s ? -1 : 0
1534SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ)
1535
1536void glue(helper_packusdw, SUFFIX) (Reg *d, Reg *s)
1537{
1538 d->W(0) = satuw((int32_t) d->L(0));
1539 d->W(1) = satuw((int32_t) d->L(1));
1540 d->W(2) = satuw((int32_t) d->L(2));
1541 d->W(3) = satuw((int32_t) d->L(3));
1542 d->W(4) = satuw((int32_t) s->L(0));
1543 d->W(5) = satuw((int32_t) s->L(1));
1544 d->W(6) = satuw((int32_t) s->L(2));
1545 d->W(7) = satuw((int32_t) s->L(3));
1546}
1547
1548#define FMINSB(d, s) MIN((int8_t) d, (int8_t) s)
1549#define FMINSD(d, s) MIN((int32_t) d, (int32_t) s)
1550#define FMAXSB(d, s) MAX((int8_t) d, (int8_t) s)
1551#define FMAXSD(d, s) MAX((int32_t) d, (int32_t) s)
1552SSE_HELPER_B(helper_pminsb, FMINSB)
1553SSE_HELPER_L(helper_pminsd, FMINSD)
1554SSE_HELPER_W(helper_pminuw, MIN)
1555SSE_HELPER_L(helper_pminud, MIN)
1556SSE_HELPER_B(helper_pmaxsb, FMAXSB)
1557SSE_HELPER_L(helper_pmaxsd, FMAXSD)
1558SSE_HELPER_W(helper_pmaxuw, MAX)
1559SSE_HELPER_L(helper_pmaxud, MAX)
1560
1561#define FMULLD(d, s) (int32_t) d * (int32_t) s
1562SSE_HELPER_L(helper_pmulld, FMULLD)
1563
1564void glue(helper_phminposuw, SUFFIX) (Reg *d, Reg *s)
1565{
1566 int idx = 0;
1567
1568 if (s->W(1) < s->W(idx))
1569 idx = 1;
1570 if (s->W(2) < s->W(idx))
1571 idx = 2;
1572 if (s->W(3) < s->W(idx))
1573 idx = 3;
1574 if (s->W(4) < s->W(idx))
1575 idx = 4;
1576 if (s->W(5) < s->W(idx))
1577 idx = 5;
1578 if (s->W(6) < s->W(idx))
1579 idx = 6;
1580 if (s->W(7) < s->W(idx))
1581 idx = 7;
1582
1583 d->Q(1) = 0;
1584 d->L(1) = 0;
1585 d->W(1) = idx;
1586 d->W(0) = s->W(idx);
1587}
1588
1589void glue(helper_roundps, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1590{
1591 signed char prev_rounding_mode;
1592
1593 prev_rounding_mode = env->sse_status.float_rounding_mode;
1594 if (!(mode & (1 << 2)))
1595 switch (mode & 3) {
1596 case 0:
1597 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1598 break;
1599 case 1:
1600 set_float_rounding_mode(float_round_down, &env->sse_status);
1601 break;
1602 case 2:
1603 set_float_rounding_mode(float_round_up, &env->sse_status);
1604 break;
1605 case 3:
1606 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1607 break;
1608 }
1609
1610 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1611 d->L(1) = float64_round_to_int(s->L(1), &env->sse_status);
1612 d->L(2) = float64_round_to_int(s->L(2), &env->sse_status);
1613 d->L(3) = float64_round_to_int(s->L(3), &env->sse_status);
1614
1615#if 0 /* TODO */
1616 if (mode & (1 << 3))
1617 set_float_exception_flags(
1618 get_float_exception_flags(&env->sse_status) &
1619 ~float_flag_inexact,
1620 &env->sse_status);
1621#endif
1622 env->sse_status.float_rounding_mode = prev_rounding_mode;
1623}
1624
1625void glue(helper_roundpd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1626{
1627 signed char prev_rounding_mode;
1628
1629 prev_rounding_mode = env->sse_status.float_rounding_mode;
1630 if (!(mode & (1 << 2)))
1631 switch (mode & 3) {
1632 case 0:
1633 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1634 break;
1635 case 1:
1636 set_float_rounding_mode(float_round_down, &env->sse_status);
1637 break;
1638 case 2:
1639 set_float_rounding_mode(float_round_up, &env->sse_status);
1640 break;
1641 case 3:
1642 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1643 break;
1644 }
1645
1646 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1647 d->Q(1) = float64_round_to_int(s->Q(1), &env->sse_status);
1648
1649#if 0 /* TODO */
1650 if (mode & (1 << 3))
1651 set_float_exception_flags(
1652 get_float_exception_flags(&env->sse_status) &
1653 ~float_flag_inexact,
1654 &env->sse_status);
1655#endif
1656 env->sse_status.float_rounding_mode = prev_rounding_mode;
1657}
1658
1659void glue(helper_roundss, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1660{
1661 signed char prev_rounding_mode;
1662
1663 prev_rounding_mode = env->sse_status.float_rounding_mode;
1664 if (!(mode & (1 << 2)))
1665 switch (mode & 3) {
1666 case 0:
1667 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1668 break;
1669 case 1:
1670 set_float_rounding_mode(float_round_down, &env->sse_status);
1671 break;
1672 case 2:
1673 set_float_rounding_mode(float_round_up, &env->sse_status);
1674 break;
1675 case 3:
1676 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1677 break;
1678 }
1679
1680 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1681
1682#if 0 /* TODO */
1683 if (mode & (1 << 3))
1684 set_float_exception_flags(
1685 get_float_exception_flags(&env->sse_status) &
1686 ~float_flag_inexact,
1687 &env->sse_status);
1688#endif
1689 env->sse_status.float_rounding_mode = prev_rounding_mode;
1690}
1691
1692void glue(helper_roundsd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1693{
1694 signed char prev_rounding_mode;
1695
1696 prev_rounding_mode = env->sse_status.float_rounding_mode;
1697 if (!(mode & (1 << 2)))
1698 switch (mode & 3) {
1699 case 0:
1700 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1701 break;
1702 case 1:
1703 set_float_rounding_mode(float_round_down, &env->sse_status);
1704 break;
1705 case 2:
1706 set_float_rounding_mode(float_round_up, &env->sse_status);
1707 break;
1708 case 3:
1709 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1710 break;
1711 }
1712
1713 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1714
1715#if 0 /* TODO */
1716 if (mode & (1 << 3))
1717 set_float_exception_flags(
1718 get_float_exception_flags(&env->sse_status) &
1719 ~float_flag_inexact,
1720 &env->sse_status);
1721#endif
1722 env->sse_status.float_rounding_mode = prev_rounding_mode;
1723}
1724
1725#define FBLENDP(d, s, m) m ? s : d
1726SSE_HELPER_I(helper_blendps, L, 4, FBLENDP)
1727SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP)
1728SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
1729
1730void glue(helper_dpps, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1731{
1732 float32 iresult = 0 /*float32_zero*/;
1733
1734 if (mask & (1 << 4))
1735 iresult = float32_add(iresult,
1736 float32_mul(d->L(0), s->L(0), &env->sse_status),
1737 &env->sse_status);
1738 if (mask & (1 << 5))
1739 iresult = float32_add(iresult,
1740 float32_mul(d->L(1), s->L(1), &env->sse_status),
1741 &env->sse_status);
1742 if (mask & (1 << 6))
1743 iresult = float32_add(iresult,
1744 float32_mul(d->L(2), s->L(2), &env->sse_status),
1745 &env->sse_status);
1746 if (mask & (1 << 7))
1747 iresult = float32_add(iresult,
1748 float32_mul(d->L(3), s->L(3), &env->sse_status),
1749 &env->sse_status);
1750 d->L(0) = (mask & (1 << 0)) ? iresult : 0 /*float32_zero*/;
1751 d->L(1) = (mask & (1 << 1)) ? iresult : 0 /*float32_zero*/;
1752 d->L(2) = (mask & (1 << 2)) ? iresult : 0 /*float32_zero*/;
1753 d->L(3) = (mask & (1 << 3)) ? iresult : 0 /*float32_zero*/;
1754}
1755
1756void glue(helper_dppd, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1757{
1758 float64 iresult = 0 /*float64_zero*/;
1759
1760 if (mask & (1 << 4))
1761 iresult = float64_add(iresult,
1762 float64_mul(d->Q(0), s->Q(0), &env->sse_status),
1763 &env->sse_status);
1764 if (mask & (1 << 5))
1765 iresult = float64_add(iresult,
1766 float64_mul(d->Q(1), s->Q(1), &env->sse_status),
1767 &env->sse_status);
1768 d->Q(0) = (mask & (1 << 0)) ? iresult : 0 /*float64_zero*/;
1769 d->Q(1) = (mask & (1 << 1)) ? iresult : 0 /*float64_zero*/;
1770}
1771
1772void glue(helper_mpsadbw, SUFFIX) (Reg *d, Reg *s, uint32_t offset)
1773{
1774 int s0 = (offset & 3) << 2;
1775 int d0 = (offset & 4) << 0;
1776 int i;
1777 Reg r;
1778
1779 for (i = 0; i < 8; i++, d0++) {
1780 r.W(i) = 0;
1781 r.W(i) += abs1(d->B(d0 + 0) - s->B(s0 + 0));
1782 r.W(i) += abs1(d->B(d0 + 1) - s->B(s0 + 1));
1783 r.W(i) += abs1(d->B(d0 + 2) - s->B(s0 + 2));
1784 r.W(i) += abs1(d->B(d0 + 3) - s->B(s0 + 3));
1785 }
1786
1787 *d = r;
1788}
1789
1790/* SSE4.2 op helpers */
1791/* it's unclear whether signed or unsigned */
1792#define FCMPGTQ(d, s) d > s ? -1 : 0
1793SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ)
1794
1795static inline int pcmp_elen(int reg, uint32_t ctrl)
1796{
1797 int val;
1798
1799 /* Presence of REX.W is indicated by a bit higher than 7 set */
1800 if (ctrl >> 8)
1801 val = abs1((int64_t) env->regs[reg]);
1802 else
1803 val = abs1((int32_t) env->regs[reg]);
1804
1805 if (ctrl & 1) {
1806 if (val > 8)
1807 return 8;
1808 } else
1809 if (val > 16)
1810 return 16;
1811
1812 return val;
1813}
1814
1815static inline int pcmp_ilen(Reg *r, uint8_t ctrl)
1816{
1817 int val = 0;
1818
1819 if (ctrl & 1) {
1820 while (val < 8 && r->W(val))
1821 val++;
1822 } else
1823 while (val < 16 && r->B(val))
1824 val++;
1825
1826 return val;
1827}
1828
1829static inline int pcmp_val(Reg *r, uint8_t ctrl, int i)
1830{
1831 switch ((ctrl >> 0) & 3) {
1832 case 0:
1833 return r->B(i);
1834 case 1:
1835 return r->W(i);
1836 case 2:
1837 return (int8_t) r->B(i);
1838 case 3:
1839 default:
1840 return (int16_t) r->W(i);
1841 }
1842}
1843
1844static inline unsigned pcmpxstrx(Reg *d, Reg *s,
1845 int8_t ctrl, int valids, int validd)
1846{
1847 unsigned int res = 0;
1848 int v;
1849 int j, i;
1850 int upper = (ctrl & 1) ? 7 : 15;
1851
1852 valids--;
1853 validd--;
1854
1855 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0);
1856
1857 switch ((ctrl >> 2) & 3) {
1858 case 0:
1859 for (j = valids; j >= 0; j--) {
1860 res <<= 1;
1861 v = pcmp_val(s, ctrl, j);
1862 for (i = validd; i >= 0; i--)
1863 res |= (v == pcmp_val(d, ctrl, i));
1864 }
1865 break;
1866 case 1:
1867 for (j = valids; j >= 0; j--) {
1868 res <<= 1;
1869 v = pcmp_val(s, ctrl, j);
1870 for (i = ((validd - 1) | 1); i >= 0; i -= 2)
1871 res |= (pcmp_val(d, ctrl, i - 0) <= v &&
1872 pcmp_val(d, ctrl, i - 1) >= v);
1873 }
1874 break;
1875 case 2:
1876 res = (2 << (upper - MAX(valids, validd))) - 1;
1877 res <<= MAX(valids, validd) - MIN(valids, validd);
1878 for (i = MIN(valids, validd); i >= 0; i--) {
1879 res <<= 1;
1880 v = pcmp_val(s, ctrl, i);
1881 res |= (v == pcmp_val(d, ctrl, i));
1882 }
1883 break;
1884 case 3:
1885 for (j = valids - validd; j >= 0; j--) {
1886 res <<= 1;
1887 res |= 1;
1888 for (i = MIN(upper - j, validd); i >= 0; i--)
1889 res &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i));
1890 }
1891 break;
1892 }
1893
1894 switch ((ctrl >> 4) & 3) {
1895 case 1:
1896 res ^= (2 << upper) - 1;
1897 break;
1898 case 3:
1899 res ^= (2 << valids) - 1;
1900 break;
1901 }
1902
1903 if (res)
1904 CC_SRC |= CC_C;
1905 if (res & 1)
1906 CC_SRC |= CC_O;
1907
1908 return res;
1909}
1910
1911static inline int rffs1(unsigned int val)
1912{
1913 int ret = 1, hi;
1914
1915 for (hi = sizeof(val) * 4; hi; hi /= 2)
1916 if (val >> hi) {
1917 val >>= hi;
1918 ret += hi;
1919 }
1920
1921 return ret;
1922}
1923
1924static inline int ffs1(unsigned int val)
1925{
1926 int ret = 1, hi;
1927
1928 for (hi = sizeof(val) * 4; hi; hi /= 2)
1929 if (val << hi) {
1930 val <<= hi;
1931 ret += hi;
1932 }
1933
1934 return ret;
1935}
1936
1937void glue(helper_pcmpestri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1938{
1939 unsigned int res = pcmpxstrx(d, s, ctrl,
1940 pcmp_elen(R_EDX, ctrl),
1941 pcmp_elen(R_EAX, ctrl));
1942
1943 if (res)
1944 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1945 else
1946 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1947}
1948
1949void glue(helper_pcmpestrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1950{
1951 int i;
1952 unsigned int res = pcmpxstrx(d, s, ctrl,
1953 pcmp_elen(R_EDX, ctrl),
1954 pcmp_elen(R_EAX, ctrl));
1955
1956 if ((ctrl >> 6) & 1) {
1957 if (ctrl & 1)
1958 for (i = 0; i <= 8; i--, res >>= 1)
1959 d->W(i) = (res & 1) ? ~0 : 0;
1960 else
1961 for (i = 0; i <= 16; i--, res >>= 1)
1962 d->B(i) = (res & 1) ? ~0 : 0;
1963 } else {
1964 d->Q(1) = 0;
1965 d->Q(0) = res;
1966 }
1967}
1968
1969void glue(helper_pcmpistri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1970{
1971 unsigned int res = pcmpxstrx(d, s, ctrl,
1972 pcmp_ilen(s, ctrl),
1973 pcmp_ilen(d, ctrl));
1974
1975 if (res)
1976 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1977 else
1978 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1979}
1980
1981void glue(helper_pcmpistrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1982{
1983 int i;
1984 unsigned int res = pcmpxstrx(d, s, ctrl,
1985 pcmp_ilen(s, ctrl),
1986 pcmp_ilen(d, ctrl));
1987
1988 if ((ctrl >> 6) & 1) {
1989 if (ctrl & 1)
1990 for (i = 0; i <= 8; i--, res >>= 1)
1991 d->W(i) = (res & 1) ? ~0 : 0;
1992 else
1993 for (i = 0; i <= 16; i--, res >>= 1)
1994 d->B(i) = (res & 1) ? ~0 : 0;
1995 } else {
1996 d->Q(1) = 0;
1997 d->Q(0) = res;
1998 }
1999}
2000
2001#define CRCPOLY 0x1edc6f41
2002#define CRCPOLY_BITREV 0x82f63b78
2003target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len)
2004{
2005 target_ulong crc = (msg & ((target_ulong) -1 >>
2006 (TARGET_LONG_BITS - len))) ^ crc1;
2007
2008 while (len--)
2009 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0);
2010
2011 return crc;
2012}
2013
2014#define POPMASK(i) ((target_ulong) -1 / ((1LL << (1 << i)) + 1))
2015#define POPCOUNT(n, i) (n & POPMASK(i)) + ((n >> (1 << i)) & POPMASK(i))
2016target_ulong helper_popcnt(target_ulong n, uint32_t type)
2017{
2018 CC_SRC = n ? 0 : CC_Z;
2019
2020 n = POPCOUNT(n, 0);
2021 n = POPCOUNT(n, 1);
2022 n = POPCOUNT(n, 2);
2023 n = POPCOUNT(n, 3);
2024 if (type == 1)
2025 return n & 0xff;
2026
2027 n = POPCOUNT(n, 4);
2028#ifndef TARGET_X86_64
2029 return n;
2030#else
2031 if (type == 2)
2032 return n & 0xff;
2033
2034 return POPCOUNT(n, 5);
2035#endif
2036}
2037#endif
2038
664e0f19
FB		 2039#undef SHIFT
2040#undef XMM_ONLY
2041#undef Reg
2042#undef B
2043#undef W
2044#undef L
2045#undef Q
2046#undef SUFFIX
Qemu copy for testing