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[qemu.git] / target-lm32 / cpu.c
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1/*
2 * QEMU LatticeMico32 CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
19 */
20
0347d689 21#include "cpu.h"
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22#include "qemu-common.h"
23
24
25/* CPUClass::reset() */
26static void lm32_cpu_reset(CPUState *s)
27{
28 LM32CPU *cpu = LM32_CPU(s);
29 LM32CPUClass *lcc = LM32_CPU_GET_CLASS(cpu);
30 CPULM32State *env = &cpu->env;
31
32 lcc->parent_reset(s);
33
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34 /* reset cpu state */
35 memset(env, 0, offsetof(CPULM32State, breakpoints));
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36
37 tlb_flush(env, 1);
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38}
39
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40static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
41{
42 LM32CPU *cpu = LM32_CPU(dev);
43 LM32CPUClass *lcc = LM32_CPU_GET_CLASS(dev);
44
45 cpu_reset(CPU(cpu));
46
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47 lcc->parent_realize(dev, errp);
48}
49
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50static void lm32_cpu_initfn(Object *obj)
51{
c05efcb1 52 CPUState *cs = CPU(obj);
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53 LM32CPU *cpu = LM32_CPU(obj);
54 CPULM32State *env = &cpu->env;
868e2824 55 static bool tcg_initialized;
8d7d505a 56
c05efcb1 57 cs->env_ptr = env;
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58 cpu_exec_init(env);
59
60 env->flags = 0;
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61
62 if (tcg_enabled() && !tcg_initialized) {
63 tcg_initialized = true;
64 lm32_translate_init();
65 }
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66}
67
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68static void lm32_cpu_class_init(ObjectClass *oc, void *data)
69{
70 LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
71 CPUClass *cc = CPU_CLASS(oc);
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72 DeviceClass *dc = DEVICE_CLASS(oc);
73
74 lcc->parent_realize = dc->realize;
75 dc->realize = lm32_cpu_realizefn;
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76
77 lcc->parent_reset = cc->reset;
78 cc->reset = lm32_cpu_reset;
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79
80 cc->do_interrupt = lm32_cpu_do_interrupt;
878096ee 81 cc->dump_state = lm32_cpu_dump_state;
0ad6773f 82 cpu_class_set_vmsd(cc, &vmstate_lm32_cpu);
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83}
84
85static const TypeInfo lm32_cpu_type_info = {
86 .name = TYPE_LM32_CPU,
87 .parent = TYPE_CPU,
88 .instance_size = sizeof(LM32CPU),
8d7d505a 89 .instance_init = lm32_cpu_initfn,
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90 .abstract = false,
91 .class_size = sizeof(LM32CPUClass),
92 .class_init = lm32_cpu_class_init,
93};
94
95static void lm32_cpu_register_types(void)
96{
97 type_register_static(&lm32_cpu_type_info);
98}
99
100type_init(lm32_cpu_register_types)