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b9e7a234 AF |
1 | /* |
2 | * QEMU Motorola 68k CPU | |
3 | * | |
4 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2.1 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see | |
18 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
19 | */ | |
20 | ||
21 | #include "cpu.h" | |
22 | #include "qemu-common.h" | |
087fe4f8 | 23 | #include "migration/vmstate.h" |
b9e7a234 AF |
24 | |
25 | ||
11150915 AF |
26 | static void m68k_set_feature(CPUM68KState *env, int feature) |
27 | { | |
28 | env->features |= (1u << feature); | |
29 | } | |
30 | ||
b9e7a234 AF |
31 | /* CPUClass::reset() */ |
32 | static void m68k_cpu_reset(CPUState *s) | |
33 | { | |
34 | M68kCPU *cpu = M68K_CPU(s); | |
35 | M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); | |
36 | CPUM68KState *env = &cpu->env; | |
37 | ||
38 | mcc->parent_reset(s); | |
39 | ||
11c19868 AF |
40 | memset(env, 0, offsetof(CPUM68KState, breakpoints)); |
41 | #if !defined(CONFIG_USER_ONLY) | |
42 | env->sr = 0x2700; | |
43 | #endif | |
44 | m68k_switch_sp(env); | |
45 | /* ??? FP regs should be initialized to NaN. */ | |
46 | env->cc_op = CC_OP_FLAGS; | |
47 | /* TODO: We should set PC from the interrupt vector. */ | |
48 | env->pc = 0; | |
49 | tlb_flush(env, 1); | |
b9e7a234 AF |
50 | } |
51 | ||
11150915 AF |
52 | /* CPU models */ |
53 | ||
bc5b2da3 AF |
54 | static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model) |
55 | { | |
56 | ObjectClass *oc; | |
7a9f812b | 57 | char *typename; |
bc5b2da3 AF |
58 | |
59 | if (cpu_model == NULL) { | |
60 | return NULL; | |
61 | } | |
62 | ||
7a9f812b AF |
63 | typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model); |
64 | oc = object_class_by_name(typename); | |
65 | g_free(typename); | |
cae85065 AF |
66 | if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL || |
67 | object_class_is_abstract(oc))) { | |
bc5b2da3 AF |
68 | return NULL; |
69 | } | |
70 | return oc; | |
71 | } | |
72 | ||
11150915 AF |
73 | static void m5206_cpu_initfn(Object *obj) |
74 | { | |
75 | M68kCPU *cpu = M68K_CPU(obj); | |
76 | CPUM68KState *env = &cpu->env; | |
77 | ||
78 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
79 | } | |
80 | ||
81 | static void m5208_cpu_initfn(Object *obj) | |
82 | { | |
83 | M68kCPU *cpu = M68K_CPU(obj); | |
84 | CPUM68KState *env = &cpu->env; | |
85 | ||
86 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
87 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); | |
88 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
89 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
90 | m68k_set_feature(env, M68K_FEATURE_USP); | |
91 | } | |
92 | ||
93 | static void cfv4e_cpu_initfn(Object *obj) | |
94 | { | |
95 | M68kCPU *cpu = M68K_CPU(obj); | |
96 | CPUM68KState *env = &cpu->env; | |
97 | ||
98 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
99 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
100 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
101 | m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
102 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
103 | m68k_set_feature(env, M68K_FEATURE_USP); | |
104 | } | |
105 | ||
106 | static void any_cpu_initfn(Object *obj) | |
107 | { | |
108 | M68kCPU *cpu = M68K_CPU(obj); | |
109 | CPUM68KState *env = &cpu->env; | |
110 | ||
111 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
112 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
113 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); | |
114 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
115 | m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
116 | /* MAC and EMAC are mututally exclusive, so pick EMAC. | |
117 | It's mostly backwards compatible. */ | |
118 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
119 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B); | |
120 | m68k_set_feature(env, M68K_FEATURE_USP); | |
121 | m68k_set_feature(env, M68K_FEATURE_EXT_FULL); | |
122 | m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); | |
123 | } | |
124 | ||
125 | typedef struct M68kCPUInfo { | |
126 | const char *name; | |
127 | void (*instance_init)(Object *obj); | |
128 | } M68kCPUInfo; | |
129 | ||
130 | static const M68kCPUInfo m68k_cpus[] = { | |
131 | { .name = "m5206", .instance_init = m5206_cpu_initfn }, | |
132 | { .name = "m5208", .instance_init = m5208_cpu_initfn }, | |
133 | { .name = "cfv4e", .instance_init = cfv4e_cpu_initfn }, | |
134 | { .name = "any", .instance_init = any_cpu_initfn }, | |
135 | }; | |
136 | ||
6d1bbc62 AF |
137 | static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) |
138 | { | |
139 | M68kCPU *cpu = M68K_CPU(dev); | |
140 | M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev); | |
141 | ||
142 | m68k_cpu_init_gdb(cpu); | |
143 | ||
144 | cpu_reset(CPU(cpu)); | |
6d1bbc62 AF |
145 | |
146 | mcc->parent_realize(dev, errp); | |
147 | } | |
148 | ||
9b706039 AF |
149 | static void m68k_cpu_initfn(Object *obj) |
150 | { | |
c05efcb1 | 151 | CPUState *cs = CPU(obj); |
9b706039 AF |
152 | M68kCPU *cpu = M68K_CPU(obj); |
153 | CPUM68KState *env = &cpu->env; | |
1cc89619 | 154 | static bool inited; |
9b706039 | 155 | |
c05efcb1 | 156 | cs->env_ptr = env; |
9b706039 | 157 | cpu_exec_init(env); |
1cc89619 AF |
158 | |
159 | if (tcg_enabled() && !inited) { | |
160 | inited = true; | |
161 | m68k_tcg_init(); | |
162 | } | |
9b706039 AF |
163 | } |
164 | ||
087fe4f8 AF |
165 | static const VMStateDescription vmstate_m68k_cpu = { |
166 | .name = "cpu", | |
167 | .unmigratable = 1, | |
168 | }; | |
169 | ||
b9e7a234 AF |
170 | static void m68k_cpu_class_init(ObjectClass *c, void *data) |
171 | { | |
172 | M68kCPUClass *mcc = M68K_CPU_CLASS(c); | |
173 | CPUClass *cc = CPU_CLASS(c); | |
087fe4f8 | 174 | DeviceClass *dc = DEVICE_CLASS(c); |
b9e7a234 | 175 | |
6d1bbc62 AF |
176 | mcc->parent_realize = dc->realize; |
177 | dc->realize = m68k_cpu_realizefn; | |
178 | ||
b9e7a234 AF |
179 | mcc->parent_reset = cc->reset; |
180 | cc->reset = m68k_cpu_reset; | |
bc5b2da3 AF |
181 | |
182 | cc->class_by_name = m68k_cpu_class_by_name; | |
97a8ea5a | 183 | cc->do_interrupt = m68k_cpu_do_interrupt; |
878096ee | 184 | cc->dump_state = m68k_cpu_dump_state; |
087fe4f8 | 185 | dc->vmsd = &vmstate_m68k_cpu; |
b9e7a234 AF |
186 | } |
187 | ||
11150915 AF |
188 | static void register_cpu_type(const M68kCPUInfo *info) |
189 | { | |
190 | TypeInfo type_info = { | |
11150915 AF |
191 | .parent = TYPE_M68K_CPU, |
192 | .instance_init = info->instance_init, | |
193 | }; | |
194 | ||
7a9f812b | 195 | type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name); |
2dddbc21 | 196 | type_register(&type_info); |
7a9f812b | 197 | g_free((void *)type_info.name); |
11150915 AF |
198 | } |
199 | ||
b9e7a234 AF |
200 | static const TypeInfo m68k_cpu_type_info = { |
201 | .name = TYPE_M68K_CPU, | |
202 | .parent = TYPE_CPU, | |
203 | .instance_size = sizeof(M68kCPU), | |
9b706039 | 204 | .instance_init = m68k_cpu_initfn, |
11150915 | 205 | .abstract = true, |
b9e7a234 AF |
206 | .class_size = sizeof(M68kCPUClass), |
207 | .class_init = m68k_cpu_class_init, | |
208 | }; | |
209 | ||
210 | static void m68k_cpu_register_types(void) | |
211 | { | |
11150915 AF |
212 | int i; |
213 | ||
b9e7a234 | 214 | type_register_static(&m68k_cpu_type_info); |
11150915 AF |
215 | for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) { |
216 | register_cpu_type(&m68k_cpus[i]); | |
217 | } | |
b9e7a234 AF |
218 | } |
219 | ||
220 | type_init(m68k_cpu_register_types) |