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Commit | Line | Data |
---|---|---|
2c52c816 TS |
1 | Unsolved issues/bugs in the mips/mipsel backend |
2 | ----------------------------------------------- | |
3 | ||
15dcf5aa TS |
4 | General |
5 | ------- | |
d0f48074 TS |
6 | - Unimplemented ASEs: |
7 | - MIPS16 | |
8 | - MDMX | |
9 | - SmartMIPS | |
10 | - DSP r1 | |
11 | - DSP r2 | |
12 | - MT ASE only partially implemented and not functional | |
13 | - Shadow register support only partially implemented, | |
14 | lacks set switching on interrupt/exception. | |
15 | - 34K ITC not implemented. | |
16 | - A general lack of documentation, especially for technical internals. | |
17 | Existing documentation is x86-centric. | |
18 | - Reverse endianness bit not implemented | |
19 | - The TLB emulation is very inefficient: | |
20 | Qemu's softmmu implements a x86-style MMU, with separate entries | |
21 | for read/write/execute, a TLB index which is just a modulo of the | |
22 | virtual address, and a set of TLBs for each user/kernel/supervisor | |
23 | MMU mode. | |
24 | MIPS has a single entry for read/write/execute and only one MMU mode. | |
25 | But it is fully associative with randomized entry indices, and uses | |
26 | up to 256 ASID tags as additional matching criterion (which roughly | |
27 | equates to 256 MMU modes). It also has a global flag which causes | |
28 | entries to match regardless of ASID. | |
29 | To cope with these differences, Qemu currently flushes the TLB at | |
30 | each ASID change. Using the MMU modes to implement ASIDs hinges on | |
31 | implementing the global bit efficiently. | |
bec19c09 | 32 | - save/restore of the CPU state is not implemented (see machine.c). |
2c52c816 | 33 | |
15dcf5aa TS |
34 | MIPS64 |
35 | ------ | |
540635ba | 36 | - Userland emulation (both n32 and n64) not functional. |
15dcf5aa TS |
37 | |
38 | "Generic" 4Kc system emulation | |
39 | ------------------------------ | |
ebbd0ffd TS |
40 | - Doesn't correspond to any real hardware. Should be removed some day, |
41 | U-Boot is the last remaining user. | |
15dcf5aa | 42 | |
509b8ab2 TS |
43 | PICA 61 system emulation |
44 | ------------------------ | |
45 | - No framebuffer support yet. | |
46 | ||
15dcf5aa TS |
47 | MALTA system emulation |
48 | ---------------------- | |
2c52c816 | 49 | - We fake firmware support instead of doing the real thing |
ebbd0ffd TS |
50 | - Real firmware (YAMON) falls over when trying to init RAM, presumably |
51 | due to lacking system controller emulation. | |
0300e3fa TS |
52 | - Bonito system controller not implemented |
53 | - MSC1 system controller not implemented |