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Commit | Line | Data |
---|---|---|
2c52c816 TS |
1 | Unsolved issues/bugs in the mips/mipsel backend |
2 | ----------------------------------------------- | |
3 | ||
15dcf5aa TS |
4 | General |
5 | ------- | |
2c52c816 TS |
6 | - [ls][dw][lr] report broken (aligned) BadVAddr |
7 | - Missing per-CPU instruction decoding, currently all implemented | |
8 | instructions are regarded as valid | |
2c52c816 | 9 | |
15dcf5aa TS |
10 | MIPS64 |
11 | ------ | |
12 | - No 64bit TLB support | |
13 | - no 64bit wide registers for FPU | |
14 | - 64bit mul/div handling broken | |
15dcf5aa TS |
15 | |
16 | "Generic" 4Kc system emulation | |
17 | ------------------------------ | |
18 | - Doesn't correspond to any real hardware. | |
19 | ||
20 | MALTA system emulation | |
21 | ---------------------- | |
2c52c816 | 22 | - We fake firmware support instead of doing the real thing |
4a109bfb | 23 | - Real firmware falls over when trying to init RAM, presumably due |
7246bb21 | 24 | to lacking system controller emulation. |