projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| 10b46525 DG |
1 | #if !defined (__MMU_HASH64_H__) |
| 2 | #define __MMU_HASH64_H__ | |
| 3 | ||
| 4 | #ifndef CONFIG_USER_ONLY | |
| 5 | ||
| 6 | #ifdef TARGET_PPC64 | |
| 10b46525 DG |
7 | void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env); |
| 8 | int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs); | |
| f2ad6be8 | 9 | hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr); |
| 25de24ab DG |
10 | int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw, |
| 11 | int mmu_idx); | |
| 10b46525 DG |
12 | #endif |
| 13 | ||
| d5aea6f3 DG |
14 | /* |
| 15 | * SLB definitions | |
| 16 | */ | |
| 17 | ||
| 18 | /* Bits in the SLB ESID word */ | |
| 19 | #define SLB_ESID_ESID 0xFFFFFFFFF0000000ULL | |
| 20 | #define SLB_ESID_V 0x0000000008000000ULL /* valid */ | |
| 21 | ||
| 22 | /* Bits in the SLB VSID word */ | |
| 23 | #define SLB_VSID_SHIFT 12 | |
| 24 | #define SLB_VSID_SHIFT_1T 24 | |
| 25 | #define SLB_VSID_SSIZE_SHIFT 62 | |
| 26 | #define SLB_VSID_B 0xc000000000000000ULL | |
| 27 | #define SLB_VSID_B_256M 0x0000000000000000ULL | |
| 28 | #define SLB_VSID_B_1T 0x4000000000000000ULL | |
| 29 | #define SLB_VSID_VSID 0x3FFFFFFFFFFFF000ULL | |
| 30 | #define SLB_VSID_PTEM (SLB_VSID_B | SLB_VSID_VSID) | |
| 31 | #define SLB_VSID_KS 0x0000000000000800ULL | |
| 32 | #define SLB_VSID_KP 0x0000000000000400ULL | |
| 33 | #define SLB_VSID_N 0x0000000000000200ULL /* no-execute */ | |
| 34 | #define SLB_VSID_L 0x0000000000000100ULL | |
| 35 | #define SLB_VSID_C 0x0000000000000080ULL /* class */ | |
| 36 | #define SLB_VSID_LP 0x0000000000000030ULL | |
| 37 | #define SLB_VSID_ATTR 0x0000000000000FFFULL | |
| 38 | ||
| 39 | /* | |
| 40 | * Hash page table definitions | |
| 41 | */ | |
| 42 | ||
| 43 | #define HPTES_PER_GROUP 8 | |
| 44 | #define HASH_PTE_SIZE_64 16 | |
| 45 | #define HASH_PTEG_SIZE_64 (HASH_PTE_SIZE_64 * HPTES_PER_GROUP) | |
| 46 | ||
| 47 | #define HPTE64_V_SSIZE_SHIFT 62 | |
| 48 | #define HPTE64_V_AVPN_SHIFT 7 | |
| 49 | #define HPTE64_V_AVPN 0x3fffffffffffff80ULL | |
| 50 | #define HPTE64_V_AVPN_VAL(x) (((x) & HPTE64_V_AVPN) >> HPTE64_V_AVPN_SHIFT) | |
| 51 | #define HPTE64_V_COMPARE(x, y) (!(((x) ^ (y)) & 0xffffffffffffff80ULL)) | |
| 52 | #define HPTE64_V_LARGE 0x0000000000000004ULL | |
| 53 | #define HPTE64_V_SECONDARY 0x0000000000000002ULL | |
| 54 | #define HPTE64_V_VALID 0x0000000000000001ULL | |
| 55 | ||
| 56 | #define HPTE64_R_PP0 0x8000000000000000ULL | |
| 57 | #define HPTE64_R_TS 0x4000000000000000ULL | |
| 58 | #define HPTE64_R_KEY_HI 0x3000000000000000ULL | |
| 59 | #define HPTE64_R_RPN_SHIFT 12 | |
| 60 | #define HPTE64_R_RPN 0x0ffffffffffff000ULL | |
| 61 | #define HPTE64_R_FLAGS 0x00000000000003ffULL | |
| 62 | #define HPTE64_R_PP 0x0000000000000003ULL | |
| 63 | #define HPTE64_R_N 0x0000000000000004ULL | |
| 64 | #define HPTE64_R_G 0x0000000000000008ULL | |
| 65 | #define HPTE64_R_M 0x0000000000000010ULL | |
| 66 | #define HPTE64_R_I 0x0000000000000020ULL | |
| 67 | #define HPTE64_R_W 0x0000000000000040ULL | |
| 68 | #define HPTE64_R_WIMG 0x0000000000000078ULL | |
| 69 | #define HPTE64_R_C 0x0000000000000080ULL | |
| 70 | #define HPTE64_R_R 0x0000000000000100ULL | |
| 71 | #define HPTE64_R_KEY_LO 0x0000000000000e00ULL | |
| 72 | ||
| 73 | #define HPTE64_V_1TB_SEG 0x4000000000000000ULL | |
| 74 | #define HPTE64_V_VRMA_MASK 0x4001ffffff000000ULL | |
| 75 | ||
| 10b46525 DG |
76 | #endif /* CONFIG_USER_ONLY */ |
| 77 | ||
| 78 | #endif /* !defined (__MMU_HASH64_H__) */ |