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Commit | Line | Data |
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79aceca5 | 1 | /* |
3fc6c082 | 2 | * PowerPC emulation micro-operations for qemu. |
5fafdf24 | 3 | * |
76a66253 | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
79aceca5 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
a541f297 FB |
21 | //#define DEBUG_OP |
22 | ||
79aceca5 FB |
23 | #include "config.h" |
24 | #include "exec.h" | |
603fccce | 25 | #include "host-utils.h" |
0411a972 | 26 | #include "helper_regs.h" |
76a66253 | 27 | #include "op_helper.h" |
79aceca5 | 28 | |
28b6751f FB |
29 | #define REG 0 |
30 | #include "op_template.h" | |
31 | ||
32 | #define REG 1 | |
33 | #include "op_template.h" | |
34 | ||
35 | #define REG 2 | |
36 | #include "op_template.h" | |
37 | ||
38 | #define REG 3 | |
39 | #include "op_template.h" | |
40 | ||
41 | #define REG 4 | |
42 | #include "op_template.h" | |
43 | ||
44 | #define REG 5 | |
45 | #include "op_template.h" | |
46 | ||
47 | #define REG 6 | |
48 | #include "op_template.h" | |
49 | ||
50 | #define REG 7 | |
51 | #include "op_template.h" | |
52 | ||
53 | #define REG 8 | |
54 | #include "op_template.h" | |
55 | ||
56 | #define REG 9 | |
57 | #include "op_template.h" | |
58 | ||
59 | #define REG 10 | |
60 | #include "op_template.h" | |
61 | ||
62 | #define REG 11 | |
63 | #include "op_template.h" | |
64 | ||
65 | #define REG 12 | |
66 | #include "op_template.h" | |
67 | ||
68 | #define REG 13 | |
69 | #include "op_template.h" | |
70 | ||
71 | #define REG 14 | |
72 | #include "op_template.h" | |
73 | ||
74 | #define REG 15 | |
75 | #include "op_template.h" | |
76 | ||
77 | #define REG 16 | |
78 | #include "op_template.h" | |
79 | ||
80 | #define REG 17 | |
81 | #include "op_template.h" | |
82 | ||
83 | #define REG 18 | |
84 | #include "op_template.h" | |
85 | ||
86 | #define REG 19 | |
87 | #include "op_template.h" | |
88 | ||
89 | #define REG 20 | |
90 | #include "op_template.h" | |
91 | ||
92 | #define REG 21 | |
93 | #include "op_template.h" | |
94 | ||
95 | #define REG 22 | |
96 | #include "op_template.h" | |
97 | ||
98 | #define REG 23 | |
99 | #include "op_template.h" | |
100 | ||
101 | #define REG 24 | |
102 | #include "op_template.h" | |
103 | ||
104 | #define REG 25 | |
105 | #include "op_template.h" | |
106 | ||
107 | #define REG 26 | |
108 | #include "op_template.h" | |
109 | ||
110 | #define REG 27 | |
111 | #include "op_template.h" | |
112 | ||
113 | #define REG 28 | |
114 | #include "op_template.h" | |
115 | ||
116 | #define REG 29 | |
117 | #include "op_template.h" | |
118 | ||
119 | #define REG 30 | |
120 | #include "op_template.h" | |
121 | ||
122 | #define REG 31 | |
123 | #include "op_template.h" | |
124 | ||
a496775f JM |
125 | void OPPROTO op_print_mem_EA (void) |
126 | { | |
127 | do_print_mem_EA(T0); | |
128 | RETURN(); | |
129 | } | |
130 | ||
3fc6c082 | 131 | /* PowerPC state maintenance operations */ |
79aceca5 | 132 | /* set_Rc0 */ |
36081602 | 133 | void OPPROTO op_set_Rc0 (void) |
79aceca5 | 134 | { |
966439a6 | 135 | env->crf[0] = T0 | xer_so; |
79aceca5 FB |
136 | RETURN(); |
137 | } | |
138 | ||
9a64fbe4 | 139 | /* Constants load */ |
76a66253 JM |
140 | void OPPROTO op_reset_T0 (void) |
141 | { | |
142 | T0 = 0; | |
143 | RETURN(); | |
144 | } | |
145 | ||
36081602 | 146 | void OPPROTO op_set_T0 (void) |
79aceca5 | 147 | { |
d9bce9d9 | 148 | T0 = (uint32_t)PARAM1; |
79aceca5 FB |
149 | RETURN(); |
150 | } | |
151 | ||
d9bce9d9 JM |
152 | #if defined(TARGET_PPC64) |
153 | void OPPROTO op_set_T0_64 (void) | |
154 | { | |
155 | T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
156 | RETURN(); | |
157 | } | |
158 | #endif | |
159 | ||
36081602 | 160 | void OPPROTO op_set_T1 (void) |
79aceca5 | 161 | { |
d9bce9d9 JM |
162 | T1 = (uint32_t)PARAM1; |
163 | RETURN(); | |
164 | } | |
165 | ||
166 | #if defined(TARGET_PPC64) | |
167 | void OPPROTO op_set_T1_64 (void) | |
168 | { | |
169 | T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
79aceca5 FB |
170 | RETURN(); |
171 | } | |
d9bce9d9 | 172 | #endif |
79aceca5 | 173 | |
76a66253 | 174 | #if 0 // unused |
36081602 | 175 | void OPPROTO op_set_T2 (void) |
79aceca5 | 176 | { |
2f401176 | 177 | T2 = (uint32_t)PARAM1; |
79aceca5 FB |
178 | RETURN(); |
179 | } | |
76a66253 | 180 | #endif |
79aceca5 | 181 | |
76a66253 | 182 | void OPPROTO op_move_T1_T0 (void) |
79aceca5 | 183 | { |
76a66253 JM |
184 | T1 = T0; |
185 | RETURN(); | |
9a64fbe4 FB |
186 | } |
187 | ||
d9bce9d9 JM |
188 | void OPPROTO op_move_T2_T0 (void) |
189 | { | |
190 | T2 = T0; | |
191 | RETURN(); | |
192 | } | |
193 | ||
c3e10c7b JM |
194 | void OPPROTO op_moven_T2_T0 (void) |
195 | { | |
196 | T2 = ~T0; | |
197 | RETURN(); | |
198 | } | |
199 | ||
76a66253 | 200 | /* Generate exceptions */ |
36081602 | 201 | void OPPROTO op_raise_exception_err (void) |
9a64fbe4 | 202 | { |
36081602 | 203 | do_raise_exception_err(PARAM1, PARAM2); |
9a64fbe4 FB |
204 | } |
205 | ||
36081602 | 206 | void OPPROTO op_update_nip (void) |
9a64fbe4 | 207 | { |
d9bce9d9 | 208 | env->nip = (uint32_t)PARAM1; |
76a66253 | 209 | RETURN(); |
9a64fbe4 FB |
210 | } |
211 | ||
d9bce9d9 JM |
212 | #if defined(TARGET_PPC64) |
213 | void OPPROTO op_update_nip_64 (void) | |
214 | { | |
215 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
216 | RETURN(); | |
217 | } | |
218 | #endif | |
219 | ||
36081602 | 220 | void OPPROTO op_debug (void) |
ea4e754f FB |
221 | { |
222 | do_raise_exception(EXCP_DEBUG); | |
223 | } | |
224 | ||
76a66253 | 225 | /* Load/store special registers */ |
36081602 | 226 | void OPPROTO op_load_cr (void) |
9a64fbe4 | 227 | { |
76a66253 | 228 | do_load_cr(); |
79aceca5 FB |
229 | RETURN(); |
230 | } | |
231 | ||
36081602 | 232 | void OPPROTO op_store_cr (void) |
79aceca5 | 233 | { |
36081602 | 234 | do_store_cr(PARAM1); |
79aceca5 FB |
235 | RETURN(); |
236 | } | |
237 | ||
76a66253 | 238 | void OPPROTO op_load_cro (void) |
79aceca5 | 239 | { |
76a66253 | 240 | T0 = env->crf[PARAM1]; |
79aceca5 FB |
241 | RETURN(); |
242 | } | |
243 | ||
76a66253 | 244 | void OPPROTO op_store_cro (void) |
79aceca5 | 245 | { |
76a66253 | 246 | env->crf[PARAM1] = T0; |
79aceca5 FB |
247 | RETURN(); |
248 | } | |
249 | ||
36081602 | 250 | void OPPROTO op_load_xer_cr (void) |
79aceca5 FB |
251 | { |
252 | T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1); | |
253 | RETURN(); | |
254 | } | |
255 | ||
36081602 | 256 | void OPPROTO op_clear_xer_ov (void) |
79aceca5 FB |
257 | { |
258 | xer_so = 0; | |
259 | xer_ov = 0; | |
e864cabd JM |
260 | RETURN(); |
261 | } | |
262 | ||
36081602 | 263 | void OPPROTO op_clear_xer_ca (void) |
e864cabd | 264 | { |
79aceca5 FB |
265 | xer_ca = 0; |
266 | RETURN(); | |
267 | } | |
268 | ||
36081602 | 269 | void OPPROTO op_load_xer_bc (void) |
79aceca5 | 270 | { |
9a64fbe4 | 271 | T1 = xer_bc; |
79aceca5 FB |
272 | RETURN(); |
273 | } | |
274 | ||
76a66253 JM |
275 | void OPPROTO op_store_xer_bc (void) |
276 | { | |
277 | xer_bc = T0; | |
278 | RETURN(); | |
279 | } | |
280 | ||
36081602 | 281 | void OPPROTO op_load_xer (void) |
79aceca5 | 282 | { |
0411a972 | 283 | T0 = hreg_load_xer(env); |
79aceca5 FB |
284 | RETURN(); |
285 | } | |
286 | ||
36081602 | 287 | void OPPROTO op_store_xer (void) |
79aceca5 | 288 | { |
0411a972 | 289 | hreg_store_xer(env, T0); |
76a66253 JM |
290 | RETURN(); |
291 | } | |
292 | ||
c80f84e3 JM |
293 | #if defined(TARGET_PPC64) |
294 | void OPPROTO op_store_pri (void) | |
295 | { | |
296 | do_store_pri(PARAM1); | |
297 | RETURN(); | |
298 | } | |
299 | #endif | |
300 | ||
76a66253 JM |
301 | #if !defined(CONFIG_USER_ONLY) |
302 | /* Segment registers load and store */ | |
36081602 | 303 | void OPPROTO op_load_sr (void) |
76a66253 | 304 | { |
36081602 | 305 | T0 = env->sr[T1]; |
76a66253 JM |
306 | RETURN(); |
307 | } | |
308 | ||
36081602 | 309 | void OPPROTO op_store_sr (void) |
76a66253 JM |
310 | { |
311 | do_store_sr(env, T1, T0); | |
312 | RETURN(); | |
313 | } | |
314 | ||
12de9a39 JM |
315 | #if defined(TARGET_PPC64) |
316 | void OPPROTO op_load_slb (void) | |
317 | { | |
318 | T0 = ppc_load_slb(env, T1); | |
319 | RETURN(); | |
320 | } | |
321 | ||
322 | void OPPROTO op_store_slb (void) | |
323 | { | |
324 | ppc_store_slb(env, T1, T0); | |
325 | RETURN(); | |
326 | } | |
327 | #endif /* defined(TARGET_PPC64) */ | |
328 | ||
36081602 | 329 | void OPPROTO op_load_sdr1 (void) |
76a66253 | 330 | { |
36081602 | 331 | T0 = env->sdr1; |
76a66253 JM |
332 | RETURN(); |
333 | } | |
334 | ||
36081602 | 335 | void OPPROTO op_store_sdr1 (void) |
76a66253 JM |
336 | { |
337 | do_store_sdr1(env, T0); | |
79aceca5 FB |
338 | RETURN(); |
339 | } | |
340 | ||
d9bce9d9 JM |
341 | #if defined (TARGET_PPC64) |
342 | void OPPROTO op_load_asr (void) | |
343 | { | |
344 | T0 = env->asr; | |
345 | RETURN(); | |
346 | } | |
347 | ||
348 | void OPPROTO op_store_asr (void) | |
349 | { | |
350 | ppc_store_asr(env, T0); | |
351 | RETURN(); | |
352 | } | |
353 | #endif | |
354 | ||
36081602 | 355 | void OPPROTO op_load_msr (void) |
79aceca5 | 356 | { |
0411a972 | 357 | T0 = env->msr; |
79aceca5 FB |
358 | RETURN(); |
359 | } | |
360 | ||
36081602 | 361 | void OPPROTO op_store_msr (void) |
79aceca5 | 362 | { |
0411a972 | 363 | do_store_msr(); |
9a64fbe4 FB |
364 | RETURN(); |
365 | } | |
d9bce9d9 | 366 | |
0411a972 JM |
367 | #if defined (TARGET_PPC64) |
368 | void OPPROTO op_store_msr_32 (void) | |
be147d08 | 369 | { |
0411a972 JM |
370 | T0 = (env->msr & ~0xFFFFFFFFULL) | (T0 & 0xFFFFFFFF); |
371 | do_store_msr(); | |
be147d08 JM |
372 | RETURN(); |
373 | } | |
0411a972 | 374 | #endif |
be147d08 | 375 | |
0411a972 | 376 | void OPPROTO op_update_riee (void) |
d9bce9d9 | 377 | { |
0411a972 JM |
378 | /* We don't call do_store_msr here as we won't trigger |
379 | * any special case nor change hflags | |
380 | */ | |
381 | T0 &= (1 << MSR_RI) | (1 << MSR_EE); | |
382 | env->msr &= ~(1 << MSR_RI) | (1 << MSR_EE); | |
383 | env->msr |= T0; | |
d9bce9d9 JM |
384 | RETURN(); |
385 | } | |
386 | #endif | |
9a64fbe4 FB |
387 | |
388 | /* SPR */ | |
a496775f JM |
389 | void OPPROTO op_load_spr (void) |
390 | { | |
391 | T0 = env->spr[PARAM1]; | |
392 | RETURN(); | |
393 | } | |
394 | ||
395 | void OPPROTO op_store_spr (void) | |
396 | { | |
397 | env->spr[PARAM1] = T0; | |
398 | RETURN(); | |
399 | } | |
400 | ||
401 | void OPPROTO op_load_dump_spr (void) | |
402 | { | |
403 | T0 = ppc_load_dump_spr(PARAM1); | |
404 | RETURN(); | |
405 | } | |
406 | ||
407 | void OPPROTO op_store_dump_spr (void) | |
9a64fbe4 | 408 | { |
a496775f | 409 | ppc_store_dump_spr(PARAM1, T0); |
9a64fbe4 FB |
410 | RETURN(); |
411 | } | |
412 | ||
a496775f | 413 | void OPPROTO op_mask_spr (void) |
9a64fbe4 | 414 | { |
a496775f | 415 | env->spr[PARAM1] &= ~T0; |
79aceca5 FB |
416 | RETURN(); |
417 | } | |
418 | ||
36081602 | 419 | void OPPROTO op_load_lr (void) |
79aceca5 | 420 | { |
36081602 | 421 | T0 = env->lr; |
9a64fbe4 FB |
422 | RETURN(); |
423 | } | |
424 | ||
36081602 | 425 | void OPPROTO op_store_lr (void) |
9a64fbe4 | 426 | { |
36081602 | 427 | env->lr = T0; |
9a64fbe4 FB |
428 | RETURN(); |
429 | } | |
430 | ||
36081602 | 431 | void OPPROTO op_load_ctr (void) |
9a64fbe4 | 432 | { |
36081602 | 433 | T0 = env->ctr; |
9a64fbe4 FB |
434 | RETURN(); |
435 | } | |
436 | ||
36081602 | 437 | void OPPROTO op_store_ctr (void) |
9a64fbe4 | 438 | { |
36081602 | 439 | env->ctr = T0; |
9a64fbe4 FB |
440 | RETURN(); |
441 | } | |
442 | ||
36081602 | 443 | void OPPROTO op_load_tbl (void) |
9a64fbe4 | 444 | { |
36081602 | 445 | T0 = cpu_ppc_load_tbl(env); |
9a64fbe4 FB |
446 | RETURN(); |
447 | } | |
448 | ||
36081602 | 449 | void OPPROTO op_load_tbu (void) |
9a64fbe4 | 450 | { |
36081602 | 451 | T0 = cpu_ppc_load_tbu(env); |
9a64fbe4 FB |
452 | RETURN(); |
453 | } | |
454 | ||
a062e36c JM |
455 | void OPPROTO op_load_atbl (void) |
456 | { | |
457 | T0 = cpu_ppc_load_atbl(env); | |
458 | RETURN(); | |
459 | } | |
460 | ||
461 | void OPPROTO op_load_atbu (void) | |
462 | { | |
463 | T0 = cpu_ppc_load_atbu(env); | |
464 | RETURN(); | |
465 | } | |
466 | ||
76a66253 | 467 | #if !defined(CONFIG_USER_ONLY) |
36081602 | 468 | void OPPROTO op_store_tbl (void) |
9a64fbe4 | 469 | { |
36081602 | 470 | cpu_ppc_store_tbl(env, T0); |
79aceca5 FB |
471 | RETURN(); |
472 | } | |
473 | ||
36081602 | 474 | void OPPROTO op_store_tbu (void) |
9a64fbe4 | 475 | { |
36081602 | 476 | cpu_ppc_store_tbu(env, T0); |
9a64fbe4 FB |
477 | RETURN(); |
478 | } | |
479 | ||
a062e36c JM |
480 | void OPPROTO op_store_atbl (void) |
481 | { | |
482 | cpu_ppc_store_atbl(env, T0); | |
483 | RETURN(); | |
484 | } | |
485 | ||
486 | void OPPROTO op_store_atbu (void) | |
487 | { | |
488 | cpu_ppc_store_atbu(env, T0); | |
489 | RETURN(); | |
490 | } | |
491 | ||
36081602 | 492 | void OPPROTO op_load_decr (void) |
9a64fbe4 | 493 | { |
36081602 | 494 | T0 = cpu_ppc_load_decr(env); |
76a66253 JM |
495 | RETURN(); |
496 | } | |
9fddaa0c | 497 | |
36081602 | 498 | void OPPROTO op_store_decr (void) |
9fddaa0c | 499 | { |
36081602 | 500 | cpu_ppc_store_decr(env, T0); |
9a64fbe4 FB |
501 | RETURN(); |
502 | } | |
503 | ||
36081602 | 504 | void OPPROTO op_load_ibat (void) |
9a64fbe4 | 505 | { |
36081602 | 506 | T0 = env->IBAT[PARAM1][PARAM2]; |
76a66253 | 507 | RETURN(); |
9a64fbe4 FB |
508 | } |
509 | ||
76a66253 | 510 | void OPPROTO op_store_ibatu (void) |
9a64fbe4 | 511 | { |
3fc6c082 FB |
512 | do_store_ibatu(env, PARAM1, T0); |
513 | RETURN(); | |
514 | } | |
515 | ||
76a66253 | 516 | void OPPROTO op_store_ibatl (void) |
3fc6c082 FB |
517 | { |
518 | #if 1 | |
519 | env->IBAT[1][PARAM1] = T0; | |
520 | #else | |
521 | do_store_ibatl(env, PARAM1, T0); | |
522 | #endif | |
523 | RETURN(); | |
9a64fbe4 FB |
524 | } |
525 | ||
36081602 | 526 | void OPPROTO op_load_dbat (void) |
9a64fbe4 | 527 | { |
36081602 | 528 | T0 = env->DBAT[PARAM1][PARAM2]; |
76a66253 | 529 | RETURN(); |
9a64fbe4 FB |
530 | } |
531 | ||
76a66253 | 532 | void OPPROTO op_store_dbatu (void) |
3fc6c082 FB |
533 | { |
534 | do_store_dbatu(env, PARAM1, T0); | |
535 | RETURN(); | |
536 | } | |
537 | ||
76a66253 | 538 | void OPPROTO op_store_dbatl (void) |
9a64fbe4 | 539 | { |
3fc6c082 FB |
540 | #if 1 |
541 | env->DBAT[1][PARAM1] = T0; | |
542 | #else | |
543 | do_store_dbatl(env, PARAM1, T0); | |
544 | #endif | |
545 | RETURN(); | |
9a64fbe4 | 546 | } |
76a66253 | 547 | #endif /* !defined(CONFIG_USER_ONLY) */ |
9a64fbe4 | 548 | |
fb0eaffc | 549 | /* FPSCR */ |
7c58044c JM |
550 | #ifdef CONFIG_SOFTFLOAT |
551 | void OPPROTO op_reset_fpstatus (void) | |
fb0eaffc | 552 | { |
7c58044c | 553 | env->fp_status.float_exception_flags = 0; |
fb0eaffc FB |
554 | RETURN(); |
555 | } | |
7c58044c | 556 | #endif |
fb0eaffc | 557 | |
7c58044c | 558 | void OPPROTO op_compute_fprf (void) |
fb0eaffc | 559 | { |
7c58044c JM |
560 | do_compute_fprf(PARAM1); |
561 | RETURN(); | |
562 | } | |
563 | ||
564 | #ifdef CONFIG_SOFTFLOAT | |
565 | void OPPROTO op_float_check_status (void) | |
566 | { | |
567 | do_float_check_status(); | |
568 | RETURN(); | |
569 | } | |
570 | #else | |
571 | void OPPROTO op_float_check_status (void) | |
572 | { | |
573 | if (env->exception_index == POWERPC_EXCP_PROGRAM && | |
574 | (env->error_code & POWERPC_EXCP_FP)) { | |
575 | /* Differred floating-point exception after target FPR update */ | |
576 | if (msr_fe0 != 0 || msr_fe1 != 0) | |
577 | do_raise_exception_err(env->exception_index, env->error_code); | |
578 | } | |
fb0eaffc FB |
579 | RETURN(); |
580 | } | |
7c58044c JM |
581 | #endif |
582 | ||
583 | #if defined(WORDS_BIGENDIAN) | |
584 | #define WORD0 0 | |
585 | #define WORD1 1 | |
586 | #else | |
587 | #define WORD0 1 | |
588 | #define WORD1 0 | |
589 | #endif | |
590 | void OPPROTO op_load_fpscr_FT0 (void) | |
591 | { | |
592 | /* The 32 MSB of the target fpr are undefined. | |
593 | * They'll be zero... | |
594 | */ | |
595 | union { | |
596 | float64 d; | |
597 | struct { | |
598 | uint32_t u[2]; | |
599 | } s; | |
600 | } u; | |
601 | ||
602 | u.s.u[WORD0] = 0; | |
603 | u.s.u[WORD1] = env->fpscr; | |
604 | FT0 = u.d; | |
605 | RETURN(); | |
606 | } | |
607 | ||
608 | void OPPROTO op_set_FT0 (void) | |
609 | { | |
610 | union { | |
611 | float64 d; | |
612 | struct { | |
613 | uint32_t u[2]; | |
614 | } s; | |
615 | } u; | |
616 | ||
617 | u.s.u[WORD0] = 0; | |
618 | u.s.u[WORD1] = PARAM1; | |
619 | FT0 = u.d; | |
620 | RETURN(); | |
621 | } | |
622 | #undef WORD0 | |
623 | #undef WORD1 | |
fb0eaffc | 624 | |
7c58044c | 625 | void OPPROTO op_load_fpscr_T0 (void) |
fb0eaffc | 626 | { |
7c58044c JM |
627 | T0 = (env->fpscr >> PARAM1) & 0xF; |
628 | RETURN(); | |
629 | } | |
630 | ||
631 | void OPPROTO op_load_fpcc (void) | |
632 | { | |
633 | T0 = fpscr_fpcc; | |
634 | RETURN(); | |
635 | } | |
636 | ||
637 | void OPPROTO op_fpscr_resetbit (void) | |
638 | { | |
639 | env->fpscr &= PARAM1; | |
640 | RETURN(); | |
641 | } | |
642 | ||
643 | void OPPROTO op_fpscr_setbit (void) | |
644 | { | |
645 | do_fpscr_setbit(PARAM1); | |
646 | RETURN(); | |
647 | } | |
648 | ||
649 | void OPPROTO op_store_fpscr (void) | |
650 | { | |
651 | do_store_fpscr(PARAM1); | |
fb0eaffc FB |
652 | RETURN(); |
653 | } | |
654 | ||
79aceca5 | 655 | /* Branch */ |
36081602 | 656 | #define EIP env->nip |
9a64fbe4 | 657 | |
36081602 | 658 | void OPPROTO op_setlr (void) |
e98a6e40 | 659 | { |
36081602 | 660 | env->lr = (uint32_t)PARAM1; |
76a66253 | 661 | RETURN(); |
e98a6e40 FB |
662 | } |
663 | ||
d9bce9d9 JM |
664 | #if defined (TARGET_PPC64) |
665 | void OPPROTO op_setlr_64 (void) | |
666 | { | |
36081602 | 667 | env->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
668 | RETURN(); |
669 | } | |
670 | #endif | |
671 | ||
d9bce9d9 | 672 | void OPPROTO op_b_T1 (void) |
e98a6e40 | 673 | { |
36081602 | 674 | env->nip = (uint32_t)(T1 & ~3); |
76a66253 | 675 | RETURN(); |
e98a6e40 FB |
676 | } |
677 | ||
d9bce9d9 JM |
678 | #if defined (TARGET_PPC64) |
679 | void OPPROTO op_b_T1_64 (void) | |
680 | { | |
36081602 | 681 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 JM |
682 | RETURN(); |
683 | } | |
684 | #endif | |
685 | ||
36081602 | 686 | void OPPROTO op_jz_T0 (void) |
e98a6e40 | 687 | { |
c53be334 FB |
688 | if (!T0) |
689 | GOTO_LABEL_PARAM(1); | |
e98a6e40 FB |
690 | RETURN(); |
691 | } | |
692 | ||
d9bce9d9 | 693 | void OPPROTO op_btest_T1 (void) |
e98a6e40 FB |
694 | { |
695 | if (T0) { | |
36081602 | 696 | env->nip = (uint32_t)(T1 & ~3); |
e98a6e40 | 697 | } else { |
36081602 | 698 | env->nip = (uint32_t)PARAM1; |
e98a6e40 FB |
699 | } |
700 | RETURN(); | |
701 | } | |
702 | ||
d9bce9d9 JM |
703 | #if defined (TARGET_PPC64) |
704 | void OPPROTO op_btest_T1_64 (void) | |
705 | { | |
706 | if (T0) { | |
36081602 | 707 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 | 708 | } else { |
36081602 | 709 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
710 | } |
711 | RETURN(); | |
712 | } | |
713 | #endif | |
714 | ||
36081602 | 715 | void OPPROTO op_movl_T1_ctr (void) |
e98a6e40 | 716 | { |
36081602 | 717 | T1 = env->ctr; |
76a66253 | 718 | RETURN(); |
e98a6e40 FB |
719 | } |
720 | ||
36081602 | 721 | void OPPROTO op_movl_T1_lr (void) |
e98a6e40 | 722 | { |
36081602 | 723 | T1 = env->lr; |
76a66253 | 724 | RETURN(); |
e98a6e40 FB |
725 | } |
726 | ||
727 | /* tests with result in T0 */ | |
d9bce9d9 JM |
728 | void OPPROTO op_test_ctr (void) |
729 | { | |
36081602 | 730 | T0 = (uint32_t)env->ctr; |
d9bce9d9 JM |
731 | RETURN(); |
732 | } | |
e98a6e40 | 733 | |
d9bce9d9 JM |
734 | #if defined(TARGET_PPC64) |
735 | void OPPROTO op_test_ctr_64 (void) | |
e98a6e40 | 736 | { |
36081602 | 737 | T0 = (uint64_t)env->ctr; |
d9bce9d9 JM |
738 | RETURN(); |
739 | } | |
740 | #endif | |
741 | ||
742 | void OPPROTO op_test_ctr_true (void) | |
743 | { | |
36081602 | 744 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 745 | RETURN(); |
e98a6e40 FB |
746 | } |
747 | ||
d9bce9d9 JM |
748 | #if defined(TARGET_PPC64) |
749 | void OPPROTO op_test_ctr_true_64 (void) | |
e98a6e40 | 750 | { |
36081602 | 751 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 752 | RETURN(); |
e98a6e40 | 753 | } |
d9bce9d9 | 754 | #endif |
e98a6e40 | 755 | |
d9bce9d9 | 756 | void OPPROTO op_test_ctr_false (void) |
e98a6e40 | 757 | { |
36081602 | 758 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 759 | RETURN(); |
e98a6e40 FB |
760 | } |
761 | ||
d9bce9d9 JM |
762 | #if defined(TARGET_PPC64) |
763 | void OPPROTO op_test_ctr_false_64 (void) | |
e98a6e40 | 764 | { |
36081602 | 765 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 766 | RETURN(); |
e98a6e40 | 767 | } |
d9bce9d9 JM |
768 | #endif |
769 | ||
770 | void OPPROTO op_test_ctrz (void) | |
771 | { | |
36081602 | 772 | T0 = ((uint32_t)env->ctr == 0); |
d9bce9d9 JM |
773 | RETURN(); |
774 | } | |
775 | ||
776 | #if defined(TARGET_PPC64) | |
777 | void OPPROTO op_test_ctrz_64 (void) | |
778 | { | |
36081602 | 779 | T0 = ((uint64_t)env->ctr == 0); |
d9bce9d9 JM |
780 | RETURN(); |
781 | } | |
782 | #endif | |
783 | ||
784 | void OPPROTO op_test_ctrz_true (void) | |
785 | { | |
36081602 | 786 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
787 | RETURN(); |
788 | } | |
789 | ||
790 | #if defined(TARGET_PPC64) | |
791 | void OPPROTO op_test_ctrz_true_64 (void) | |
792 | { | |
36081602 | 793 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
794 | RETURN(); |
795 | } | |
796 | #endif | |
e98a6e40 | 797 | |
d9bce9d9 | 798 | void OPPROTO op_test_ctrz_false (void) |
e98a6e40 | 799 | { |
36081602 | 800 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 801 | RETURN(); |
e98a6e40 FB |
802 | } |
803 | ||
d9bce9d9 JM |
804 | #if defined(TARGET_PPC64) |
805 | void OPPROTO op_test_ctrz_false_64 (void) | |
e98a6e40 | 806 | { |
36081602 | 807 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 808 | RETURN(); |
e98a6e40 | 809 | } |
d9bce9d9 | 810 | #endif |
e98a6e40 | 811 | |
36081602 | 812 | void OPPROTO op_test_true (void) |
e98a6e40 | 813 | { |
36081602 | 814 | T0 = (T0 & PARAM1); |
76a66253 | 815 | RETURN(); |
e98a6e40 FB |
816 | } |
817 | ||
36081602 | 818 | void OPPROTO op_test_false (void) |
e98a6e40 | 819 | { |
36081602 | 820 | T0 = ((T0 & PARAM1) == 0); |
76a66253 | 821 | RETURN(); |
e98a6e40 | 822 | } |
79aceca5 FB |
823 | |
824 | /* CTR maintenance */ | |
36081602 | 825 | void OPPROTO op_dec_ctr (void) |
79aceca5 | 826 | { |
36081602 | 827 | env->ctr--; |
79aceca5 FB |
828 | RETURN(); |
829 | } | |
830 | ||
831 | /*** Integer arithmetic ***/ | |
832 | /* add */ | |
36081602 | 833 | void OPPROTO op_add (void) |
79aceca5 FB |
834 | { |
835 | T0 += T1; | |
836 | RETURN(); | |
837 | } | |
838 | ||
d9bce9d9 | 839 | void OPPROTO op_check_addo (void) |
79aceca5 | 840 | { |
c3e10c7b JM |
841 | xer_ov = (((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & |
842 | ((uint32_t)T2 ^ (uint32_t)T0)) >> 31; | |
843 | xer_so |= xer_ov; | |
e864cabd | 844 | RETURN(); |
79aceca5 FB |
845 | } |
846 | ||
d9bce9d9 JM |
847 | #if defined(TARGET_PPC64) |
848 | void OPPROTO op_check_addo_64 (void) | |
79aceca5 | 849 | { |
c3e10c7b JM |
850 | xer_ov = (((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) & |
851 | ((uint64_t)T2 ^ (uint64_t)T0)) >> 63; | |
852 | xer_so |= xer_ov; | |
e864cabd | 853 | RETURN(); |
d9bce9d9 JM |
854 | } |
855 | #endif | |
856 | ||
857 | /* add carrying */ | |
858 | void OPPROTO op_check_addc (void) | |
859 | { | |
860 | if (likely((uint32_t)T0 >= (uint32_t)T2)) { | |
79aceca5 | 861 | xer_ca = 0; |
d9bce9d9 JM |
862 | } else { |
863 | xer_ca = 1; | |
79aceca5 FB |
864 | } |
865 | RETURN(); | |
866 | } | |
867 | ||
d9bce9d9 JM |
868 | #if defined(TARGET_PPC64) |
869 | void OPPROTO op_check_addc_64 (void) | |
79aceca5 | 870 | { |
d9bce9d9 JM |
871 | if (likely((uint64_t)T0 >= (uint64_t)T2)) { |
872 | xer_ca = 0; | |
873 | } else { | |
874 | xer_ca = 1; | |
875 | } | |
79aceca5 FB |
876 | RETURN(); |
877 | } | |
d9bce9d9 | 878 | #endif |
79aceca5 FB |
879 | |
880 | /* add extended */ | |
76a66253 | 881 | void OPPROTO op_adde (void) |
79aceca5 | 882 | { |
fdabc366 | 883 | do_adde(); |
76a66253 | 884 | RETURN(); |
79aceca5 FB |
885 | } |
886 | ||
d9bce9d9 JM |
887 | #if defined(TARGET_PPC64) |
888 | void OPPROTO op_adde_64 (void) | |
79aceca5 | 889 | { |
d9bce9d9 | 890 | do_adde_64(); |
79aceca5 FB |
891 | RETURN(); |
892 | } | |
d9bce9d9 | 893 | #endif |
79aceca5 FB |
894 | |
895 | /* add immediate */ | |
36081602 | 896 | void OPPROTO op_addi (void) |
79aceca5 | 897 | { |
36081602 | 898 | T0 += (int32_t)PARAM1; |
79aceca5 FB |
899 | RETURN(); |
900 | } | |
901 | ||
d9bce9d9 JM |
902 | /* add to minus one extended */ |
903 | void OPPROTO op_add_me (void) | |
79aceca5 | 904 | { |
d9bce9d9 JM |
905 | T0 += xer_ca + (-1); |
906 | if (likely((uint32_t)T1 != 0)) | |
79aceca5 | 907 | xer_ca = 1; |
c3e10c7b JM |
908 | else |
909 | xer_ca = 0; | |
79aceca5 FB |
910 | RETURN(); |
911 | } | |
912 | ||
d9bce9d9 JM |
913 | #if defined(TARGET_PPC64) |
914 | void OPPROTO op_add_me_64 (void) | |
79aceca5 | 915 | { |
79aceca5 | 916 | T0 += xer_ca + (-1); |
d9bce9d9 | 917 | if (likely((uint64_t)T1 != 0)) |
79aceca5 | 918 | xer_ca = 1; |
c3e10c7b JM |
919 | else |
920 | xer_ca = 0; | |
79aceca5 FB |
921 | RETURN(); |
922 | } | |
d9bce9d9 | 923 | #endif |
79aceca5 | 924 | |
76a66253 | 925 | void OPPROTO op_addmeo (void) |
79aceca5 | 926 | { |
fdabc366 | 927 | do_addmeo(); |
79aceca5 FB |
928 | RETURN(); |
929 | } | |
930 | ||
d9bce9d9 JM |
931 | void OPPROTO op_addmeo_64 (void) |
932 | { | |
933 | do_addmeo(); | |
934 | RETURN(); | |
935 | } | |
936 | ||
79aceca5 | 937 | /* add to zero extended */ |
d9bce9d9 | 938 | void OPPROTO op_add_ze (void) |
79aceca5 | 939 | { |
79aceca5 | 940 | T0 += xer_ca; |
79aceca5 FB |
941 | RETURN(); |
942 | } | |
943 | ||
d9bce9d9 JM |
944 | /* divide word */ |
945 | void OPPROTO op_divw (void) | |
79aceca5 | 946 | { |
6f2d8978 | 947 | if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) || |
d9bce9d9 | 948 | (int32_t)T1 == 0)) { |
6f2d8978 | 949 | T0 = (int32_t)(UINT32_MAX * ((uint32_t)T0 >> 31)); |
d9bce9d9 JM |
950 | } else { |
951 | T0 = (int32_t)T0 / (int32_t)T1; | |
952 | } | |
79aceca5 FB |
953 | RETURN(); |
954 | } | |
955 | ||
d9bce9d9 JM |
956 | #if defined(TARGET_PPC64) |
957 | void OPPROTO op_divd (void) | |
79aceca5 | 958 | { |
6f2d8978 | 959 | if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == (int64_t)-1LL) || |
d9bce9d9 | 960 | (int64_t)T1 == 0)) { |
6f2d8978 | 961 | T0 = (int64_t)(UINT64_MAX * ((uint64_t)T0 >> 63)); |
79aceca5 | 962 | } else { |
d9bce9d9 | 963 | T0 = (int64_t)T0 / (int64_t)T1; |
79aceca5 FB |
964 | } |
965 | RETURN(); | |
966 | } | |
d9bce9d9 | 967 | #endif |
79aceca5 | 968 | |
76a66253 | 969 | void OPPROTO op_divwo (void) |
79aceca5 | 970 | { |
fdabc366 | 971 | do_divwo(); |
79aceca5 FB |
972 | RETURN(); |
973 | } | |
974 | ||
d9bce9d9 JM |
975 | #if defined(TARGET_PPC64) |
976 | void OPPROTO op_divdo (void) | |
977 | { | |
978 | do_divdo(); | |
979 | RETURN(); | |
980 | } | |
981 | #endif | |
982 | ||
79aceca5 | 983 | /* divide word unsigned */ |
d9bce9d9 JM |
984 | void OPPROTO op_divwu (void) |
985 | { | |
986 | if (unlikely(T1 == 0)) { | |
987 | T0 = 0; | |
988 | } else { | |
989 | T0 = (uint32_t)T0 / (uint32_t)T1; | |
990 | } | |
991 | RETURN(); | |
992 | } | |
993 | ||
994 | #if defined(TARGET_PPC64) | |
995 | void OPPROTO op_divdu (void) | |
79aceca5 | 996 | { |
d9bce9d9 | 997 | if (unlikely(T1 == 0)) { |
79aceca5 FB |
998 | T0 = 0; |
999 | } else { | |
1000 | T0 /= T1; | |
1001 | } | |
1002 | RETURN(); | |
1003 | } | |
d9bce9d9 | 1004 | #endif |
79aceca5 | 1005 | |
76a66253 | 1006 | void OPPROTO op_divwuo (void) |
79aceca5 | 1007 | { |
fdabc366 | 1008 | do_divwuo(); |
79aceca5 FB |
1009 | RETURN(); |
1010 | } | |
1011 | ||
d9bce9d9 JM |
1012 | #if defined(TARGET_PPC64) |
1013 | void OPPROTO op_divduo (void) | |
1014 | { | |
1015 | do_divduo(); | |
1016 | RETURN(); | |
1017 | } | |
1018 | #endif | |
1019 | ||
79aceca5 | 1020 | /* multiply high word */ |
d9bce9d9 | 1021 | void OPPROTO op_mulhw (void) |
79aceca5 | 1022 | { |
d9bce9d9 | 1023 | T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32; |
79aceca5 FB |
1024 | RETURN(); |
1025 | } | |
1026 | ||
d9bce9d9 JM |
1027 | #if defined(TARGET_PPC64) |
1028 | void OPPROTO op_mulhd (void) | |
1029 | { | |
1030 | uint64_t tl, th; | |
1031 | ||
9d901a20 | 1032 | muls64(&tl, &th, T0, T1); |
d9bce9d9 JM |
1033 | T0 = th; |
1034 | RETURN(); | |
1035 | } | |
1036 | #endif | |
1037 | ||
79aceca5 | 1038 | /* multiply high word unsigned */ |
d9bce9d9 | 1039 | void OPPROTO op_mulhwu (void) |
79aceca5 | 1040 | { |
d9bce9d9 | 1041 | T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32; |
79aceca5 FB |
1042 | RETURN(); |
1043 | } | |
1044 | ||
d9bce9d9 JM |
1045 | #if defined(TARGET_PPC64) |
1046 | void OPPROTO op_mulhdu (void) | |
1047 | { | |
1048 | uint64_t tl, th; | |
1049 | ||
9d901a20 | 1050 | mulu64(&tl, &th, T0, T1); |
d9bce9d9 JM |
1051 | T0 = th; |
1052 | RETURN(); | |
1053 | } | |
1054 | #endif | |
1055 | ||
79aceca5 | 1056 | /* multiply low immediate */ |
36081602 | 1057 | void OPPROTO op_mulli (void) |
79aceca5 | 1058 | { |
d9bce9d9 | 1059 | T0 = ((int32_t)T0 * (int32_t)PARAM1); |
79aceca5 FB |
1060 | RETURN(); |
1061 | } | |
1062 | ||
1063 | /* multiply low word */ | |
36081602 | 1064 | void OPPROTO op_mullw (void) |
d9bce9d9 JM |
1065 | { |
1066 | T0 = (int32_t)(T0 * T1); | |
1067 | RETURN(); | |
1068 | } | |
1069 | ||
1070 | #if defined(TARGET_PPC64) | |
1071 | void OPPROTO op_mulld (void) | |
79aceca5 FB |
1072 | { |
1073 | T0 *= T1; | |
1074 | RETURN(); | |
1075 | } | |
d9bce9d9 | 1076 | #endif |
79aceca5 | 1077 | |
76a66253 | 1078 | void OPPROTO op_mullwo (void) |
79aceca5 | 1079 | { |
fdabc366 | 1080 | do_mullwo(); |
79aceca5 FB |
1081 | RETURN(); |
1082 | } | |
1083 | ||
d9bce9d9 JM |
1084 | #if defined(TARGET_PPC64) |
1085 | void OPPROTO op_mulldo (void) | |
1086 | { | |
1087 | do_mulldo(); | |
1088 | RETURN(); | |
1089 | } | |
1090 | #endif | |
1091 | ||
79aceca5 | 1092 | /* negate */ |
d9bce9d9 | 1093 | void OPPROTO op_neg (void) |
79aceca5 | 1094 | { |
d9bce9d9 JM |
1095 | if (likely(T0 != INT32_MIN)) { |
1096 | T0 = -(int32_t)T0; | |
79aceca5 FB |
1097 | } |
1098 | RETURN(); | |
1099 | } | |
1100 | ||
d9bce9d9 JM |
1101 | #if defined(TARGET_PPC64) |
1102 | void OPPROTO op_neg_64 (void) | |
1103 | { | |
1104 | if (likely(T0 != INT64_MIN)) { | |
1105 | T0 = -(int64_t)T0; | |
1106 | } | |
1107 | RETURN(); | |
1108 | } | |
1109 | #endif | |
1110 | ||
76a66253 | 1111 | void OPPROTO op_nego (void) |
79aceca5 | 1112 | { |
fdabc366 | 1113 | do_nego(); |
79aceca5 FB |
1114 | RETURN(); |
1115 | } | |
1116 | ||
d9bce9d9 JM |
1117 | #if defined(TARGET_PPC64) |
1118 | void OPPROTO op_nego_64 (void) | |
1119 | { | |
1120 | do_nego_64(); | |
1121 | RETURN(); | |
1122 | } | |
1123 | #endif | |
1124 | ||
0cfec834 | 1125 | /* subtract from */ |
36081602 | 1126 | void OPPROTO op_subf (void) |
79aceca5 FB |
1127 | { |
1128 | T0 = T1 - T0; | |
1129 | RETURN(); | |
1130 | } | |
1131 | ||
0cfec834 | 1132 | /* subtract from carrying */ |
d9bce9d9 | 1133 | void OPPROTO op_check_subfc (void) |
79aceca5 | 1134 | { |
d9bce9d9 | 1135 | if (likely((uint32_t)T0 > (uint32_t)T1)) { |
79aceca5 | 1136 | xer_ca = 0; |
d9bce9d9 JM |
1137 | } else { |
1138 | xer_ca = 1; | |
79aceca5 FB |
1139 | } |
1140 | RETURN(); | |
1141 | } | |
1142 | ||
d9bce9d9 JM |
1143 | #if defined(TARGET_PPC64) |
1144 | void OPPROTO op_check_subfc_64 (void) | |
79aceca5 | 1145 | { |
d9bce9d9 JM |
1146 | if (likely((uint64_t)T0 > (uint64_t)T1)) { |
1147 | xer_ca = 0; | |
1148 | } else { | |
1149 | xer_ca = 1; | |
1150 | } | |
79aceca5 FB |
1151 | RETURN(); |
1152 | } | |
d9bce9d9 | 1153 | #endif |
79aceca5 | 1154 | |
0cfec834 | 1155 | /* subtract from extended */ |
76a66253 | 1156 | void OPPROTO op_subfe (void) |
79aceca5 | 1157 | { |
fdabc366 | 1158 | do_subfe(); |
79aceca5 FB |
1159 | RETURN(); |
1160 | } | |
1161 | ||
d9bce9d9 JM |
1162 | #if defined(TARGET_PPC64) |
1163 | void OPPROTO op_subfe_64 (void) | |
79aceca5 | 1164 | { |
d9bce9d9 | 1165 | do_subfe_64(); |
79aceca5 FB |
1166 | RETURN(); |
1167 | } | |
d9bce9d9 | 1168 | #endif |
79aceca5 | 1169 | |
0cfec834 | 1170 | /* subtract from immediate carrying */ |
d9bce9d9 | 1171 | void OPPROTO op_subfic (void) |
79aceca5 | 1172 | { |
b6e27ab8 | 1173 | T0 = (int32_t)PARAM1 + ~T0 + 1; |
d9bce9d9 | 1174 | if ((uint32_t)T0 <= (uint32_t)PARAM1) { |
79aceca5 FB |
1175 | xer_ca = 1; |
1176 | } else { | |
1177 | xer_ca = 0; | |
1178 | } | |
1179 | RETURN(); | |
1180 | } | |
1181 | ||
d9bce9d9 JM |
1182 | #if defined(TARGET_PPC64) |
1183 | void OPPROTO op_subfic_64 (void) | |
1184 | { | |
2f401176 | 1185 | T0 = (int64_t)PARAM1 + ~T0 + 1; |
d9bce9d9 JM |
1186 | if ((uint64_t)T0 <= (uint64_t)PARAM1) { |
1187 | xer_ca = 1; | |
1188 | } else { | |
1189 | xer_ca = 0; | |
1190 | } | |
1191 | RETURN(); | |
1192 | } | |
1193 | #endif | |
1194 | ||
0cfec834 | 1195 | /* subtract from minus one extended */ |
d9bce9d9 | 1196 | void OPPROTO op_subfme (void) |
79aceca5 FB |
1197 | { |
1198 | T0 = ~T0 + xer_ca - 1; | |
c3e10c7b | 1199 | if (likely((uint32_t)T0 != UINT32_MAX)) |
d9bce9d9 | 1200 | xer_ca = 1; |
c3e10c7b JM |
1201 | else |
1202 | xer_ca = 0; | |
d9bce9d9 JM |
1203 | RETURN(); |
1204 | } | |
79aceca5 | 1205 | |
d9bce9d9 JM |
1206 | #if defined(TARGET_PPC64) |
1207 | void OPPROTO op_subfme_64 (void) | |
1208 | { | |
1209 | T0 = ~T0 + xer_ca - 1; | |
c3e10c7b | 1210 | if (likely((uint64_t)T0 != UINT64_MAX)) |
79aceca5 | 1211 | xer_ca = 1; |
c3e10c7b JM |
1212 | else |
1213 | xer_ca = 0; | |
79aceca5 FB |
1214 | RETURN(); |
1215 | } | |
d9bce9d9 | 1216 | #endif |
79aceca5 | 1217 | |
76a66253 | 1218 | void OPPROTO op_subfmeo (void) |
79aceca5 | 1219 | { |
fdabc366 | 1220 | do_subfmeo(); |
79aceca5 FB |
1221 | RETURN(); |
1222 | } | |
1223 | ||
d9bce9d9 JM |
1224 | #if defined(TARGET_PPC64) |
1225 | void OPPROTO op_subfmeo_64 (void) | |
1226 | { | |
1227 | do_subfmeo_64(); | |
1228 | RETURN(); | |
1229 | } | |
1230 | #endif | |
1231 | ||
0cfec834 | 1232 | /* subtract from zero extended */ |
d9bce9d9 | 1233 | void OPPROTO op_subfze (void) |
79aceca5 FB |
1234 | { |
1235 | T1 = ~T0; | |
1236 | T0 = T1 + xer_ca; | |
d9bce9d9 | 1237 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 FB |
1238 | xer_ca = 1; |
1239 | } else { | |
1240 | xer_ca = 0; | |
1241 | } | |
1242 | RETURN(); | |
1243 | } | |
1244 | ||
d9bce9d9 JM |
1245 | #if defined(TARGET_PPC64) |
1246 | void OPPROTO op_subfze_64 (void) | |
1247 | { | |
1248 | T1 = ~T0; | |
1249 | T0 = T1 + xer_ca; | |
1250 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1251 | xer_ca = 1; | |
1252 | } else { | |
1253 | xer_ca = 0; | |
1254 | } | |
1255 | RETURN(); | |
1256 | } | |
1257 | #endif | |
1258 | ||
76a66253 | 1259 | void OPPROTO op_subfzeo (void) |
79aceca5 | 1260 | { |
fdabc366 | 1261 | do_subfzeo(); |
79aceca5 FB |
1262 | RETURN(); |
1263 | } | |
1264 | ||
d9bce9d9 JM |
1265 | #if defined(TARGET_PPC64) |
1266 | void OPPROTO op_subfzeo_64 (void) | |
1267 | { | |
1268 | do_subfzeo_64(); | |
1269 | RETURN(); | |
1270 | } | |
1271 | #endif | |
1272 | ||
79aceca5 FB |
1273 | /*** Integer comparison ***/ |
1274 | /* compare */ | |
d9bce9d9 JM |
1275 | void OPPROTO op_cmp (void) |
1276 | { | |
1277 | if ((int32_t)T0 < (int32_t)T1) { | |
1278 | T0 = 0x08; | |
1279 | } else if ((int32_t)T0 > (int32_t)T1) { | |
1280 | T0 = 0x04; | |
1281 | } else { | |
1282 | T0 = 0x02; | |
1283 | } | |
966439a6 | 1284 | T0 |= xer_so; |
d9bce9d9 JM |
1285 | RETURN(); |
1286 | } | |
1287 | ||
1288 | #if defined(TARGET_PPC64) | |
1289 | void OPPROTO op_cmp_64 (void) | |
79aceca5 | 1290 | { |
d9bce9d9 | 1291 | if ((int64_t)T0 < (int64_t)T1) { |
79aceca5 | 1292 | T0 = 0x08; |
d9bce9d9 | 1293 | } else if ((int64_t)T0 > (int64_t)T1) { |
79aceca5 FB |
1294 | T0 = 0x04; |
1295 | } else { | |
1296 | T0 = 0x02; | |
1297 | } | |
966439a6 | 1298 | T0 |= xer_so; |
79aceca5 FB |
1299 | RETURN(); |
1300 | } | |
d9bce9d9 | 1301 | #endif |
79aceca5 FB |
1302 | |
1303 | /* compare immediate */ | |
d9bce9d9 | 1304 | void OPPROTO op_cmpi (void) |
79aceca5 | 1305 | { |
d9bce9d9 | 1306 | if ((int32_t)T0 < (int32_t)PARAM1) { |
79aceca5 | 1307 | T0 = 0x08; |
d9bce9d9 | 1308 | } else if ((int32_t)T0 > (int32_t)PARAM1) { |
79aceca5 FB |
1309 | T0 = 0x04; |
1310 | } else { | |
1311 | T0 = 0x02; | |
1312 | } | |
966439a6 | 1313 | T0 |= xer_so; |
79aceca5 FB |
1314 | RETURN(); |
1315 | } | |
1316 | ||
d9bce9d9 JM |
1317 | #if defined(TARGET_PPC64) |
1318 | void OPPROTO op_cmpi_64 (void) | |
1319 | { | |
1320 | if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) { | |
1321 | T0 = 0x08; | |
1322 | } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) { | |
1323 | T0 = 0x04; | |
1324 | } else { | |
1325 | T0 = 0x02; | |
1326 | } | |
966439a6 | 1327 | T0 |= xer_so; |
d9bce9d9 JM |
1328 | RETURN(); |
1329 | } | |
1330 | #endif | |
1331 | ||
79aceca5 | 1332 | /* compare logical */ |
d9bce9d9 | 1333 | void OPPROTO op_cmpl (void) |
79aceca5 | 1334 | { |
d9bce9d9 | 1335 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 | 1336 | T0 = 0x08; |
d9bce9d9 | 1337 | } else if ((uint32_t)T0 > (uint32_t)T1) { |
79aceca5 FB |
1338 | T0 = 0x04; |
1339 | } else { | |
1340 | T0 = 0x02; | |
1341 | } | |
966439a6 | 1342 | T0 |= xer_so; |
79aceca5 FB |
1343 | RETURN(); |
1344 | } | |
1345 | ||
d9bce9d9 JM |
1346 | #if defined(TARGET_PPC64) |
1347 | void OPPROTO op_cmpl_64 (void) | |
1348 | { | |
1349 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1350 | T0 = 0x08; | |
1351 | } else if ((uint64_t)T0 > (uint64_t)T1) { | |
1352 | T0 = 0x04; | |
1353 | } else { | |
1354 | T0 = 0x02; | |
1355 | } | |
966439a6 | 1356 | T0 |= xer_so; |
d9bce9d9 JM |
1357 | RETURN(); |
1358 | } | |
1359 | #endif | |
1360 | ||
79aceca5 | 1361 | /* compare logical immediate */ |
d9bce9d9 JM |
1362 | void OPPROTO op_cmpli (void) |
1363 | { | |
1364 | if ((uint32_t)T0 < (uint32_t)PARAM1) { | |
1365 | T0 = 0x08; | |
1366 | } else if ((uint32_t)T0 > (uint32_t)PARAM1) { | |
1367 | T0 = 0x04; | |
1368 | } else { | |
1369 | T0 = 0x02; | |
1370 | } | |
966439a6 | 1371 | T0 |= xer_so; |
d9bce9d9 JM |
1372 | RETURN(); |
1373 | } | |
1374 | ||
1375 | #if defined(TARGET_PPC64) | |
1376 | void OPPROTO op_cmpli_64 (void) | |
79aceca5 | 1377 | { |
d9bce9d9 | 1378 | if ((uint64_t)T0 < (uint64_t)PARAM1) { |
79aceca5 | 1379 | T0 = 0x08; |
d9bce9d9 | 1380 | } else if ((uint64_t)T0 > (uint64_t)PARAM1) { |
79aceca5 FB |
1381 | T0 = 0x04; |
1382 | } else { | |
1383 | T0 = 0x02; | |
1384 | } | |
966439a6 | 1385 | T0 |= xer_so; |
79aceca5 FB |
1386 | RETURN(); |
1387 | } | |
d9bce9d9 JM |
1388 | #endif |
1389 | ||
1390 | void OPPROTO op_isel (void) | |
1391 | { | |
1392 | if (T0) | |
1393 | T0 = T1; | |
1394 | else | |
1395 | T0 = T2; | |
1396 | RETURN(); | |
1397 | } | |
1398 | ||
1399 | void OPPROTO op_popcntb (void) | |
1400 | { | |
1401 | do_popcntb(); | |
1402 | RETURN(); | |
1403 | } | |
1404 | ||
1405 | #if defined(TARGET_PPC64) | |
1406 | void OPPROTO op_popcntb_64 (void) | |
1407 | { | |
1408 | do_popcntb_64(); | |
1409 | RETURN(); | |
1410 | } | |
1411 | #endif | |
79aceca5 FB |
1412 | |
1413 | /*** Integer logical ***/ | |
1414 | /* and */ | |
36081602 | 1415 | void OPPROTO op_and (void) |
79aceca5 FB |
1416 | { |
1417 | T0 &= T1; | |
1418 | RETURN(); | |
1419 | } | |
1420 | ||
1421 | /* andc */ | |
36081602 | 1422 | void OPPROTO op_andc (void) |
79aceca5 FB |
1423 | { |
1424 | T0 &= ~T1; | |
1425 | RETURN(); | |
1426 | } | |
1427 | ||
1428 | /* andi. */ | |
76a66253 | 1429 | void OPPROTO op_andi_T0 (void) |
79aceca5 | 1430 | { |
2f401176 | 1431 | T0 &= (uint32_t)PARAM1; |
79aceca5 FB |
1432 | RETURN(); |
1433 | } | |
1434 | ||
76a66253 JM |
1435 | void OPPROTO op_andi_T1 (void) |
1436 | { | |
2f401176 | 1437 | T1 &= (uint32_t)PARAM1; |
76a66253 JM |
1438 | RETURN(); |
1439 | } | |
1440 | ||
40d0591e JM |
1441 | #if defined(TARGET_PPC64) |
1442 | void OPPROTO op_andi_T0_64 (void) | |
1443 | { | |
2f401176 | 1444 | T0 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1445 | RETURN(); |
1446 | } | |
1447 | ||
1448 | void OPPROTO op_andi_T1_64 (void) | |
1449 | { | |
2f401176 | 1450 | T1 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1451 | RETURN(); |
1452 | } | |
1453 | #endif | |
1454 | ||
79aceca5 | 1455 | /* count leading zero */ |
76a66253 | 1456 | void OPPROTO op_cntlzw (void) |
79aceca5 | 1457 | { |
603fccce | 1458 | do_cntlzw(); |
79aceca5 FB |
1459 | RETURN(); |
1460 | } | |
1461 | ||
d9bce9d9 JM |
1462 | #if defined(TARGET_PPC64) |
1463 | void OPPROTO op_cntlzd (void) | |
1464 | { | |
603fccce | 1465 | do_cntlzd(); |
d9bce9d9 JM |
1466 | RETURN(); |
1467 | } | |
1468 | #endif | |
1469 | ||
79aceca5 | 1470 | /* eqv */ |
36081602 | 1471 | void OPPROTO op_eqv (void) |
79aceca5 FB |
1472 | { |
1473 | T0 = ~(T0 ^ T1); | |
1474 | RETURN(); | |
1475 | } | |
1476 | ||
1477 | /* extend sign byte */ | |
d9bce9d9 | 1478 | void OPPROTO op_extsb (void) |
79aceca5 | 1479 | { |
d9bce9d9 JM |
1480 | #if defined (TARGET_PPC64) |
1481 | T0 = (int64_t)((int8_t)T0); | |
1482 | #else | |
1483 | T0 = (int32_t)((int8_t)T0); | |
1484 | #endif | |
79aceca5 FB |
1485 | RETURN(); |
1486 | } | |
1487 | ||
1488 | /* extend sign half word */ | |
d9bce9d9 | 1489 | void OPPROTO op_extsh (void) |
79aceca5 | 1490 | { |
d9bce9d9 JM |
1491 | #if defined (TARGET_PPC64) |
1492 | T0 = (int64_t)((int16_t)T0); | |
1493 | #else | |
1494 | T0 = (int32_t)((int16_t)T0); | |
1495 | #endif | |
79aceca5 FB |
1496 | RETURN(); |
1497 | } | |
1498 | ||
d9bce9d9 JM |
1499 | #if defined (TARGET_PPC64) |
1500 | void OPPROTO op_extsw (void) | |
1501 | { | |
1502 | T0 = (int64_t)((int32_t)T0); | |
1503 | RETURN(); | |
1504 | } | |
1505 | #endif | |
1506 | ||
79aceca5 | 1507 | /* nand */ |
36081602 | 1508 | void OPPROTO op_nand (void) |
79aceca5 FB |
1509 | { |
1510 | T0 = ~(T0 & T1); | |
1511 | RETURN(); | |
1512 | } | |
1513 | ||
1514 | /* nor */ | |
36081602 | 1515 | void OPPROTO op_nor (void) |
79aceca5 FB |
1516 | { |
1517 | T0 = ~(T0 | T1); | |
1518 | RETURN(); | |
1519 | } | |
1520 | ||
1521 | /* or */ | |
36081602 | 1522 | void OPPROTO op_or (void) |
79aceca5 FB |
1523 | { |
1524 | T0 |= T1; | |
1525 | RETURN(); | |
1526 | } | |
1527 | ||
1528 | /* orc */ | |
36081602 | 1529 | void OPPROTO op_orc (void) |
79aceca5 FB |
1530 | { |
1531 | T0 |= ~T1; | |
1532 | RETURN(); | |
1533 | } | |
1534 | ||
1535 | /* ori */ | |
36081602 | 1536 | void OPPROTO op_ori (void) |
79aceca5 | 1537 | { |
2f401176 | 1538 | T0 |= (uint32_t)PARAM1; |
79aceca5 FB |
1539 | RETURN(); |
1540 | } | |
1541 | ||
1542 | /* xor */ | |
36081602 | 1543 | void OPPROTO op_xor (void) |
79aceca5 FB |
1544 | { |
1545 | T0 ^= T1; | |
1546 | RETURN(); | |
1547 | } | |
1548 | ||
1549 | /* xori */ | |
36081602 | 1550 | void OPPROTO op_xori (void) |
79aceca5 | 1551 | { |
2f401176 | 1552 | T0 ^= (uint32_t)PARAM1; |
79aceca5 FB |
1553 | RETURN(); |
1554 | } | |
1555 | ||
1556 | /*** Integer rotate ***/ | |
76a66253 | 1557 | void OPPROTO op_rotl32_T0_T1 (void) |
79aceca5 | 1558 | { |
76a66253 | 1559 | T0 = rotl32(T0, T1 & 0x1F); |
79aceca5 FB |
1560 | RETURN(); |
1561 | } | |
1562 | ||
76a66253 | 1563 | void OPPROTO op_rotli32_T0 (void) |
79aceca5 | 1564 | { |
76a66253 | 1565 | T0 = rotl32(T0, PARAM1); |
79aceca5 FB |
1566 | RETURN(); |
1567 | } | |
1568 | ||
51789c41 JM |
1569 | #if defined(TARGET_PPC64) |
1570 | void OPPROTO op_rotl64_T0_T1 (void) | |
1571 | { | |
1572 | T0 = rotl64(T0, T1 & 0x3F); | |
1573 | RETURN(); | |
1574 | } | |
1575 | ||
1576 | void OPPROTO op_rotli64_T0 (void) | |
1577 | { | |
1578 | T0 = rotl64(T0, PARAM1); | |
1579 | RETURN(); | |
1580 | } | |
1581 | #endif | |
1582 | ||
79aceca5 FB |
1583 | /*** Integer shift ***/ |
1584 | /* shift left word */ | |
d9bce9d9 | 1585 | void OPPROTO op_slw (void) |
79aceca5 FB |
1586 | { |
1587 | if (T1 & 0x20) { | |
1588 | T0 = 0; | |
d9bce9d9 JM |
1589 | } else { |
1590 | T0 = (uint32_t)(T0 << T1); | |
1591 | } | |
1592 | RETURN(); | |
1593 | } | |
1594 | ||
1595 | #if defined(TARGET_PPC64) | |
1596 | void OPPROTO op_sld (void) | |
1597 | { | |
1598 | if (T1 & 0x40) { | |
1599 | T0 = 0; | |
79aceca5 FB |
1600 | } else { |
1601 | T0 = T0 << T1; | |
1602 | } | |
1603 | RETURN(); | |
1604 | } | |
d9bce9d9 | 1605 | #endif |
79aceca5 FB |
1606 | |
1607 | /* shift right algebraic word */ | |
76a66253 | 1608 | void OPPROTO op_sraw (void) |
79aceca5 | 1609 | { |
9a64fbe4 | 1610 | do_sraw(); |
79aceca5 FB |
1611 | RETURN(); |
1612 | } | |
1613 | ||
d9bce9d9 JM |
1614 | #if defined(TARGET_PPC64) |
1615 | void OPPROTO op_srad (void) | |
1616 | { | |
1617 | do_srad(); | |
1618 | RETURN(); | |
1619 | } | |
1620 | #endif | |
1621 | ||
79aceca5 | 1622 | /* shift right algebraic word immediate */ |
d9bce9d9 | 1623 | void OPPROTO op_srawi (void) |
79aceca5 | 1624 | { |
d9bce9d9 JM |
1625 | uint32_t mask = (uint32_t)PARAM2; |
1626 | ||
1627 | T0 = (int32_t)T0 >> PARAM1; | |
1628 | if ((int32_t)T1 < 0 && (T1 & mask) != 0) { | |
79aceca5 FB |
1629 | xer_ca = 1; |
1630 | } else { | |
1631 | xer_ca = 0; | |
1632 | } | |
1633 | RETURN(); | |
1634 | } | |
1635 | ||
d9bce9d9 JM |
1636 | #if defined(TARGET_PPC64) |
1637 | void OPPROTO op_sradi (void) | |
1638 | { | |
1639 | uint64_t mask = ((uint64_t)PARAM2 << 32) | (uint64_t)PARAM3; | |
1640 | ||
1641 | T0 = (int64_t)T0 >> PARAM1; | |
1642 | if ((int64_t)T1 < 0 && ((uint64_t)T1 & mask) != 0) { | |
1643 | xer_ca = 1; | |
1644 | } else { | |
1645 | xer_ca = 0; | |
1646 | } | |
1647 | RETURN(); | |
1648 | } | |
1649 | #endif | |
1650 | ||
79aceca5 | 1651 | /* shift right word */ |
d9bce9d9 | 1652 | void OPPROTO op_srw (void) |
79aceca5 FB |
1653 | { |
1654 | if (T1 & 0x20) { | |
1655 | T0 = 0; | |
1656 | } else { | |
d9bce9d9 JM |
1657 | T0 = (uint32_t)T0 >> T1; |
1658 | } | |
1659 | RETURN(); | |
1660 | } | |
1661 | ||
1662 | #if defined(TARGET_PPC64) | |
1663 | void OPPROTO op_srd (void) | |
1664 | { | |
1665 | if (T1 & 0x40) { | |
1666 | T0 = 0; | |
1667 | } else { | |
1668 | T0 = (uint64_t)T0 >> T1; | |
79aceca5 FB |
1669 | } |
1670 | RETURN(); | |
1671 | } | |
d9bce9d9 | 1672 | #endif |
79aceca5 | 1673 | |
76a66253 JM |
1674 | void OPPROTO op_sl_T0_T1 (void) |
1675 | { | |
1676 | T0 = T0 << T1; | |
1677 | RETURN(); | |
1678 | } | |
1679 | ||
1680 | void OPPROTO op_sli_T0 (void) | |
1681 | { | |
1682 | T0 = T0 << PARAM1; | |
1683 | RETURN(); | |
1684 | } | |
1685 | ||
fc0d441e JM |
1686 | void OPPROTO op_sli_T1 (void) |
1687 | { | |
1688 | T1 = T1 << PARAM1; | |
1689 | RETURN(); | |
1690 | } | |
1691 | ||
76a66253 JM |
1692 | void OPPROTO op_srl_T0_T1 (void) |
1693 | { | |
d9bce9d9 JM |
1694 | T0 = (uint32_t)T0 >> T1; |
1695 | RETURN(); | |
1696 | } | |
1697 | ||
1698 | #if defined(TARGET_PPC64) | |
1699 | void OPPROTO op_srl_T0_T1_64 (void) | |
1700 | { | |
1701 | T0 = (uint32_t)T0 >> T1; | |
76a66253 JM |
1702 | RETURN(); |
1703 | } | |
d9bce9d9 | 1704 | #endif |
76a66253 JM |
1705 | |
1706 | void OPPROTO op_srli_T0 (void) | |
1707 | { | |
d9bce9d9 | 1708 | T0 = (uint32_t)T0 >> PARAM1; |
76a66253 JM |
1709 | RETURN(); |
1710 | } | |
1711 | ||
d9bce9d9 JM |
1712 | #if defined(TARGET_PPC64) |
1713 | void OPPROTO op_srli_T0_64 (void) | |
1714 | { | |
1715 | T0 = (uint64_t)T0 >> PARAM1; | |
1716 | RETURN(); | |
1717 | } | |
1718 | #endif | |
1719 | ||
76a66253 JM |
1720 | void OPPROTO op_srli_T1 (void) |
1721 | { | |
d9bce9d9 | 1722 | T1 = (uint32_t)T1 >> PARAM1; |
76a66253 JM |
1723 | RETURN(); |
1724 | } | |
1725 | ||
d9bce9d9 JM |
1726 | #if defined(TARGET_PPC64) |
1727 | void OPPROTO op_srli_T1_64 (void) | |
1728 | { | |
1729 | T1 = (uint64_t)T1 >> PARAM1; | |
1730 | RETURN(); | |
1731 | } | |
1732 | #endif | |
1733 | ||
79aceca5 | 1734 | /*** Floating-Point arithmetic ***/ |
9a64fbe4 | 1735 | /* fadd - fadd. */ |
36081602 | 1736 | void OPPROTO op_fadd (void) |
79aceca5 | 1737 | { |
7c58044c JM |
1738 | #if USE_PRECISE_EMULATION |
1739 | do_fadd(); | |
1740 | #else | |
76a66253 | 1741 | FT0 = float64_add(FT0, FT1, &env->fp_status); |
7c58044c | 1742 | #endif |
79aceca5 FB |
1743 | RETURN(); |
1744 | } | |
1745 | ||
9a64fbe4 | 1746 | /* fsub - fsub. */ |
36081602 | 1747 | void OPPROTO op_fsub (void) |
79aceca5 | 1748 | { |
7c58044c JM |
1749 | #if USE_PRECISE_EMULATION |
1750 | do_fsub(); | |
1751 | #else | |
76a66253 | 1752 | FT0 = float64_sub(FT0, FT1, &env->fp_status); |
7c58044c | 1753 | #endif |
79aceca5 FB |
1754 | RETURN(); |
1755 | } | |
1756 | ||
9a64fbe4 | 1757 | /* fmul - fmul. */ |
36081602 | 1758 | void OPPROTO op_fmul (void) |
79aceca5 | 1759 | { |
7c58044c JM |
1760 | #if USE_PRECISE_EMULATION |
1761 | do_fmul(); | |
1762 | #else | |
76a66253 | 1763 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
7c58044c | 1764 | #endif |
79aceca5 FB |
1765 | RETURN(); |
1766 | } | |
1767 | ||
9a64fbe4 | 1768 | /* fdiv - fdiv. */ |
36081602 | 1769 | void OPPROTO op_fdiv (void) |
79aceca5 | 1770 | { |
7c58044c JM |
1771 | #if USE_PRECISE_EMULATION |
1772 | do_fdiv(); | |
1773 | #else | |
fdabc366 | 1774 | FT0 = float64_div(FT0, FT1, &env->fp_status); |
7c58044c | 1775 | #endif |
79aceca5 FB |
1776 | RETURN(); |
1777 | } | |
28b6751f | 1778 | |
9a64fbe4 | 1779 | /* fsqrt - fsqrt. */ |
36081602 | 1780 | void OPPROTO op_fsqrt (void) |
28b6751f | 1781 | { |
9a64fbe4 FB |
1782 | do_fsqrt(); |
1783 | RETURN(); | |
28b6751f FB |
1784 | } |
1785 | ||
d7e4b87e JM |
1786 | /* fre - fre. */ |
1787 | void OPPROTO op_fre (void) | |
1788 | { | |
1789 | do_fre(); | |
1790 | RETURN(); | |
1791 | } | |
1792 | ||
9a64fbe4 | 1793 | /* fres - fres. */ |
36081602 | 1794 | void OPPROTO op_fres (void) |
28b6751f | 1795 | { |
9a64fbe4 FB |
1796 | do_fres(); |
1797 | RETURN(); | |
28b6751f FB |
1798 | } |
1799 | ||
9a64fbe4 | 1800 | /* frsqrte - frsqrte. */ |
36081602 | 1801 | void OPPROTO op_frsqrte (void) |
28b6751f | 1802 | { |
4ecc3190 | 1803 | do_frsqrte(); |
9a64fbe4 | 1804 | RETURN(); |
28b6751f FB |
1805 | } |
1806 | ||
9a64fbe4 | 1807 | /* fsel - fsel. */ |
36081602 | 1808 | void OPPROTO op_fsel (void) |
28b6751f | 1809 | { |
9a64fbe4 FB |
1810 | do_fsel(); |
1811 | RETURN(); | |
28b6751f FB |
1812 | } |
1813 | ||
9a64fbe4 FB |
1814 | /*** Floating-Point multiply-and-add ***/ |
1815 | /* fmadd - fmadd. */ | |
36081602 | 1816 | void OPPROTO op_fmadd (void) |
28b6751f | 1817 | { |
e864cabd JM |
1818 | #if USE_PRECISE_EMULATION |
1819 | do_fmadd(); | |
1820 | #else | |
76a66253 JM |
1821 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1822 | FT0 = float64_add(FT0, FT2, &env->fp_status); | |
e864cabd | 1823 | #endif |
9a64fbe4 | 1824 | RETURN(); |
28b6751f FB |
1825 | } |
1826 | ||
9a64fbe4 | 1827 | /* fmsub - fmsub. */ |
36081602 | 1828 | void OPPROTO op_fmsub (void) |
28b6751f | 1829 | { |
e864cabd JM |
1830 | #if USE_PRECISE_EMULATION |
1831 | do_fmsub(); | |
1832 | #else | |
76a66253 JM |
1833 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1834 | FT0 = float64_sub(FT0, FT2, &env->fp_status); | |
e864cabd | 1835 | #endif |
9a64fbe4 | 1836 | RETURN(); |
28b6751f FB |
1837 | } |
1838 | ||
9a64fbe4 | 1839 | /* fnmadd - fnmadd. - fnmadds - fnmadds. */ |
36081602 | 1840 | void OPPROTO op_fnmadd (void) |
28b6751f | 1841 | { |
4b3686fa | 1842 | do_fnmadd(); |
9a64fbe4 | 1843 | RETURN(); |
28b6751f FB |
1844 | } |
1845 | ||
9a64fbe4 | 1846 | /* fnmsub - fnmsub. */ |
36081602 | 1847 | void OPPROTO op_fnmsub (void) |
28b6751f | 1848 | { |
4b3686fa | 1849 | do_fnmsub(); |
9a64fbe4 | 1850 | RETURN(); |
28b6751f FB |
1851 | } |
1852 | ||
9a64fbe4 FB |
1853 | /*** Floating-Point round & convert ***/ |
1854 | /* frsp - frsp. */ | |
36081602 | 1855 | void OPPROTO op_frsp (void) |
28b6751f | 1856 | { |
7c58044c JM |
1857 | #if USE_PRECISE_EMULATION |
1858 | do_frsp(); | |
1859 | #else | |
76a66253 | 1860 | FT0 = float64_to_float32(FT0, &env->fp_status); |
7c58044c | 1861 | #endif |
9a64fbe4 | 1862 | RETURN(); |
28b6751f FB |
1863 | } |
1864 | ||
9a64fbe4 | 1865 | /* fctiw - fctiw. */ |
36081602 | 1866 | void OPPROTO op_fctiw (void) |
28b6751f | 1867 | { |
9a64fbe4 FB |
1868 | do_fctiw(); |
1869 | RETURN(); | |
28b6751f FB |
1870 | } |
1871 | ||
9a64fbe4 | 1872 | /* fctiwz - fctiwz. */ |
36081602 | 1873 | void OPPROTO op_fctiwz (void) |
28b6751f | 1874 | { |
9a64fbe4 FB |
1875 | do_fctiwz(); |
1876 | RETURN(); | |
28b6751f FB |
1877 | } |
1878 | ||
426613db JM |
1879 | #if defined(TARGET_PPC64) |
1880 | /* fcfid - fcfid. */ | |
36081602 | 1881 | void OPPROTO op_fcfid (void) |
426613db JM |
1882 | { |
1883 | do_fcfid(); | |
1884 | RETURN(); | |
1885 | } | |
1886 | ||
1887 | /* fctid - fctid. */ | |
36081602 | 1888 | void OPPROTO op_fctid (void) |
426613db JM |
1889 | { |
1890 | do_fctid(); | |
1891 | RETURN(); | |
1892 | } | |
1893 | ||
1894 | /* fctidz - fctidz. */ | |
36081602 | 1895 | void OPPROTO op_fctidz (void) |
426613db JM |
1896 | { |
1897 | do_fctidz(); | |
1898 | RETURN(); | |
1899 | } | |
1900 | #endif | |
1901 | ||
d7e4b87e JM |
1902 | void OPPROTO op_frin (void) |
1903 | { | |
1904 | do_frin(); | |
1905 | RETURN(); | |
1906 | } | |
1907 | ||
1908 | void OPPROTO op_friz (void) | |
1909 | { | |
1910 | do_friz(); | |
1911 | RETURN(); | |
1912 | } | |
1913 | ||
1914 | void OPPROTO op_frip (void) | |
1915 | { | |
1916 | do_frip(); | |
1917 | RETURN(); | |
1918 | } | |
1919 | ||
1920 | void OPPROTO op_frim (void) | |
1921 | { | |
1922 | do_frim(); | |
1923 | RETURN(); | |
1924 | } | |
1925 | ||
9a64fbe4 FB |
1926 | /*** Floating-Point compare ***/ |
1927 | /* fcmpu */ | |
36081602 | 1928 | void OPPROTO op_fcmpu (void) |
28b6751f | 1929 | { |
9a64fbe4 FB |
1930 | do_fcmpu(); |
1931 | RETURN(); | |
28b6751f FB |
1932 | } |
1933 | ||
9a64fbe4 | 1934 | /* fcmpo */ |
36081602 | 1935 | void OPPROTO op_fcmpo (void) |
fb0eaffc | 1936 | { |
9a64fbe4 FB |
1937 | do_fcmpo(); |
1938 | RETURN(); | |
fb0eaffc FB |
1939 | } |
1940 | ||
9a64fbe4 FB |
1941 | /*** Floating-point move ***/ |
1942 | /* fabs */ | |
36081602 | 1943 | void OPPROTO op_fabs (void) |
fb0eaffc | 1944 | { |
fdabc366 | 1945 | FT0 = float64_abs(FT0); |
fb0eaffc FB |
1946 | RETURN(); |
1947 | } | |
1948 | ||
9a64fbe4 | 1949 | /* fnabs */ |
36081602 | 1950 | void OPPROTO op_fnabs (void) |
fb0eaffc | 1951 | { |
fdabc366 FB |
1952 | FT0 = float64_abs(FT0); |
1953 | FT0 = float64_chs(FT0); | |
fb0eaffc FB |
1954 | RETURN(); |
1955 | } | |
1956 | ||
9a64fbe4 | 1957 | /* fneg */ |
36081602 | 1958 | void OPPROTO op_fneg (void) |
fb0eaffc | 1959 | { |
fdabc366 | 1960 | FT0 = float64_chs(FT0); |
fb0eaffc FB |
1961 | RETURN(); |
1962 | } | |
1963 | ||
9a64fbe4 | 1964 | /* Load and store */ |
9a64fbe4 | 1965 | #define MEMSUFFIX _raw |
76a66253 | 1966 | #include "op_helper.h" |
9a64fbe4 | 1967 | #include "op_mem.h" |
a541f297 | 1968 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 1969 | #define MEMSUFFIX _user |
76a66253 | 1970 | #include "op_helper.h" |
9a64fbe4 | 1971 | #include "op_mem.h" |
9a64fbe4 | 1972 | #define MEMSUFFIX _kernel |
76a66253 | 1973 | #include "op_helper.h" |
9a64fbe4 | 1974 | #include "op_mem.h" |
1e42b8f0 JM |
1975 | #define MEMSUFFIX _hypv |
1976 | #include "op_helper.h" | |
1977 | #include "op_mem.h" | |
1978 | #endif | |
9a64fbe4 | 1979 | |
4b3686fa | 1980 | /* Special op to check and maybe clear reservation */ |
d9bce9d9 | 1981 | void OPPROTO op_check_reservation (void) |
4b3686fa | 1982 | { |
fdabc366 | 1983 | if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003)) |
a73666f6 | 1984 | env->reserve = (target_ulong)-1ULL; |
4b3686fa FB |
1985 | RETURN(); |
1986 | } | |
1987 | ||
d9bce9d9 JM |
1988 | #if defined(TARGET_PPC64) |
1989 | void OPPROTO op_check_reservation_64 (void) | |
1990 | { | |
1991 | if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003)) | |
6f2d8978 | 1992 | env->reserve = (target_ulong)-1ULL; |
d9bce9d9 JM |
1993 | RETURN(); |
1994 | } | |
1995 | #endif | |
1996 | ||
be147d08 JM |
1997 | void OPPROTO op_wait (void) |
1998 | { | |
1999 | env->halted = 1; | |
2000 | RETURN(); | |
2001 | } | |
2002 | ||
9a64fbe4 | 2003 | /* Return from interrupt */ |
76a66253 JM |
2004 | #if !defined(CONFIG_USER_ONLY) |
2005 | void OPPROTO op_rfi (void) | |
28b6751f | 2006 | { |
fdabc366 | 2007 | do_rfi(); |
fb0eaffc FB |
2008 | RETURN(); |
2009 | } | |
d9bce9d9 JM |
2010 | |
2011 | #if defined(TARGET_PPC64) | |
426613db JM |
2012 | void OPPROTO op_rfid (void) |
2013 | { | |
2014 | do_rfid(); | |
2015 | RETURN(); | |
2016 | } | |
be147d08 | 2017 | |
be147d08 JM |
2018 | void OPPROTO op_hrfid (void) |
2019 | { | |
2020 | do_hrfid(); | |
2021 | RETURN(); | |
2022 | } | |
2023 | #endif | |
6f5d427d JM |
2024 | |
2025 | /* Exception vectors */ | |
2026 | void OPPROTO op_store_excp_prefix (void) | |
2027 | { | |
2028 | T0 &= env->ivpr_mask; | |
2029 | env->excp_prefix = T0; | |
2030 | RETURN(); | |
2031 | } | |
2032 | ||
2033 | void OPPROTO op_store_excp_vector (void) | |
2034 | { | |
2035 | T0 &= env->ivor_mask; | |
2036 | env->excp_vectors[PARAM1] = T0; | |
2037 | RETURN(); | |
2038 | } | |
76a66253 | 2039 | #endif |
fb0eaffc | 2040 | |
9a64fbe4 | 2041 | /* Trap word */ |
76a66253 | 2042 | void OPPROTO op_tw (void) |
fb0eaffc | 2043 | { |
76a66253 | 2044 | do_tw(PARAM1); |
fb0eaffc FB |
2045 | RETURN(); |
2046 | } | |
2047 | ||
d9bce9d9 JM |
2048 | #if defined(TARGET_PPC64) |
2049 | void OPPROTO op_td (void) | |
2050 | { | |
2051 | do_td(PARAM1); | |
2052 | RETURN(); | |
2053 | } | |
2054 | #endif | |
2055 | ||
76a66253 | 2056 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 2057 | /* tlbia */ |
36081602 | 2058 | void OPPROTO op_tlbia (void) |
fb0eaffc | 2059 | { |
daf4f96e | 2060 | ppc_tlb_invalidate_all(env); |
9a64fbe4 FB |
2061 | RETURN(); |
2062 | } | |
2063 | ||
2064 | /* tlbie */ | |
d9bce9d9 | 2065 | void OPPROTO op_tlbie (void) |
9a64fbe4 | 2066 | { |
daf4f96e | 2067 | ppc_tlb_invalidate_one(env, (uint32_t)T0); |
fb0eaffc | 2068 | RETURN(); |
28b6751f | 2069 | } |
d9bce9d9 JM |
2070 | |
2071 | #if defined(TARGET_PPC64) | |
2072 | void OPPROTO op_tlbie_64 (void) | |
2073 | { | |
daf4f96e | 2074 | ppc_tlb_invalidate_one(env, T0); |
d9bce9d9 JM |
2075 | RETURN(); |
2076 | } | |
2077 | #endif | |
2078 | ||
2079 | #if defined(TARGET_PPC64) | |
2080 | void OPPROTO op_slbia (void) | |
2081 | { | |
daf4f96e | 2082 | ppc_slb_invalidate_all(env); |
d9bce9d9 JM |
2083 | RETURN(); |
2084 | } | |
2085 | ||
2086 | void OPPROTO op_slbie (void) | |
2087 | { | |
daf4f96e JM |
2088 | ppc_slb_invalidate_one(env, (uint32_t)T0); |
2089 | RETURN(); | |
2090 | } | |
2091 | ||
2092 | void OPPROTO op_slbie_64 (void) | |
2093 | { | |
2094 | ppc_slb_invalidate_one(env, T0); | |
d9bce9d9 JM |
2095 | RETURN(); |
2096 | } | |
2097 | #endif | |
76a66253 | 2098 | #endif |
3fc6c082 | 2099 | |
76a66253 | 2100 | #if !defined(CONFIG_USER_ONLY) |
7dbe11ac | 2101 | /* PowerPC 602/603/755 software TLB load instructions */ |
76a66253 JM |
2102 | void OPPROTO op_6xx_tlbld (void) |
2103 | { | |
2104 | do_load_6xx_tlb(0); | |
2105 | RETURN(); | |
2106 | } | |
2107 | ||
2108 | void OPPROTO op_6xx_tlbli (void) | |
2109 | { | |
2110 | do_load_6xx_tlb(1); | |
2111 | RETURN(); | |
2112 | } | |
7dbe11ac JM |
2113 | |
2114 | /* PowerPC 74xx software TLB load instructions */ | |
2115 | void OPPROTO op_74xx_tlbld (void) | |
2116 | { | |
2117 | do_load_74xx_tlb(0); | |
2118 | RETURN(); | |
2119 | } | |
2120 | ||
2121 | void OPPROTO op_74xx_tlbli (void) | |
2122 | { | |
2123 | do_load_74xx_tlb(1); | |
2124 | RETURN(); | |
2125 | } | |
76a66253 JM |
2126 | #endif |
2127 | ||
2128 | /* 601 specific */ | |
76a66253 JM |
2129 | void OPPROTO op_load_601_rtcl (void) |
2130 | { | |
2131 | T0 = cpu_ppc601_load_rtcl(env); | |
2132 | RETURN(); | |
2133 | } | |
2134 | ||
76a66253 JM |
2135 | void OPPROTO op_load_601_rtcu (void) |
2136 | { | |
2137 | T0 = cpu_ppc601_load_rtcu(env); | |
2138 | RETURN(); | |
2139 | } | |
2140 | ||
2141 | #if !defined(CONFIG_USER_ONLY) | |
76a66253 JM |
2142 | void OPPROTO op_store_601_rtcl (void) |
2143 | { | |
2144 | cpu_ppc601_store_rtcl(env, T0); | |
2145 | RETURN(); | |
2146 | } | |
2147 | ||
76a66253 JM |
2148 | void OPPROTO op_store_601_rtcu (void) |
2149 | { | |
2150 | cpu_ppc601_store_rtcu(env, T0); | |
2151 | RETURN(); | |
2152 | } | |
2153 | ||
056401ea JM |
2154 | void OPPROTO op_store_hid0_601 (void) |
2155 | { | |
2156 | do_store_hid0_601(); | |
2157 | RETURN(); | |
2158 | } | |
2159 | ||
76a66253 JM |
2160 | void OPPROTO op_load_601_bat (void) |
2161 | { | |
2162 | T0 = env->IBAT[PARAM1][PARAM2]; | |
2163 | RETURN(); | |
2164 | } | |
76a66253 | 2165 | |
76a66253 JM |
2166 | void OPPROTO op_store_601_batl (void) |
2167 | { | |
056401ea | 2168 | do_store_ibatl_601(env, PARAM1, T0); |
76a66253 JM |
2169 | RETURN(); |
2170 | } | |
2171 | ||
2172 | void OPPROTO op_store_601_batu (void) | |
2173 | { | |
056401ea | 2174 | do_store_ibatu_601(env, PARAM1, T0); |
76a66253 JM |
2175 | RETURN(); |
2176 | } | |
2177 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2178 | ||
2179 | /* PowerPC 601 specific instructions (POWER bridge) */ | |
2180 | /* XXX: those micro-ops need tests ! */ | |
2181 | void OPPROTO op_POWER_abs (void) | |
2182 | { | |
9c7e37e7 | 2183 | if ((int32_t)T0 == INT32_MIN) |
76a66253 | 2184 | T0 = INT32_MAX; |
9c7e37e7 | 2185 | else if ((int32_t)T0 < 0) |
76a66253 JM |
2186 | T0 = -T0; |
2187 | RETURN(); | |
2188 | } | |
2189 | ||
2190 | void OPPROTO op_POWER_abso (void) | |
2191 | { | |
2192 | do_POWER_abso(); | |
2193 | RETURN(); | |
2194 | } | |
2195 | ||
2196 | void OPPROTO op_POWER_clcs (void) | |
2197 | { | |
2198 | do_POWER_clcs(); | |
2199 | RETURN(); | |
2200 | } | |
2201 | ||
2202 | void OPPROTO op_POWER_div (void) | |
2203 | { | |
2204 | do_POWER_div(); | |
2205 | RETURN(); | |
2206 | } | |
2207 | ||
2208 | void OPPROTO op_POWER_divo (void) | |
2209 | { | |
2210 | do_POWER_divo(); | |
2211 | RETURN(); | |
2212 | } | |
2213 | ||
2214 | void OPPROTO op_POWER_divs (void) | |
2215 | { | |
2216 | do_POWER_divs(); | |
2217 | RETURN(); | |
2218 | } | |
2219 | ||
2220 | void OPPROTO op_POWER_divso (void) | |
2221 | { | |
2222 | do_POWER_divso(); | |
2223 | RETURN(); | |
2224 | } | |
2225 | ||
2226 | void OPPROTO op_POWER_doz (void) | |
2227 | { | |
d9bce9d9 | 2228 | if ((int32_t)T1 > (int32_t)T0) |
76a66253 JM |
2229 | T0 = T1 - T0; |
2230 | else | |
2231 | T0 = 0; | |
2232 | RETURN(); | |
2233 | } | |
2234 | ||
2235 | void OPPROTO op_POWER_dozo (void) | |
2236 | { | |
2237 | do_POWER_dozo(); | |
2238 | RETURN(); | |
2239 | } | |
2240 | ||
2241 | void OPPROTO op_load_xer_cmp (void) | |
2242 | { | |
2243 | T2 = xer_cmp; | |
2244 | RETURN(); | |
2245 | } | |
2246 | ||
2247 | void OPPROTO op_POWER_maskg (void) | |
2248 | { | |
2249 | do_POWER_maskg(); | |
2250 | RETURN(); | |
2251 | } | |
2252 | ||
2253 | void OPPROTO op_POWER_maskir (void) | |
2254 | { | |
2255 | T0 = (T0 & ~T2) | (T1 & T2); | |
2256 | RETURN(); | |
2257 | } | |
2258 | ||
2259 | void OPPROTO op_POWER_mul (void) | |
2260 | { | |
2261 | uint64_t tmp; | |
2262 | ||
2263 | tmp = (uint64_t)T0 * (uint64_t)T1; | |
2264 | env->spr[SPR_MQ] = tmp >> 32; | |
2265 | T0 = tmp; | |
2266 | RETURN(); | |
2267 | } | |
2268 | ||
2269 | void OPPROTO op_POWER_mulo (void) | |
2270 | { | |
2271 | do_POWER_mulo(); | |
2272 | RETURN(); | |
2273 | } | |
2274 | ||
2275 | void OPPROTO op_POWER_nabs (void) | |
2276 | { | |
2277 | if (T0 > 0) | |
2278 | T0 = -T0; | |
2279 | RETURN(); | |
2280 | } | |
2281 | ||
2282 | void OPPROTO op_POWER_nabso (void) | |
2283 | { | |
2284 | /* nabs never overflows */ | |
2285 | if (T0 > 0) | |
2286 | T0 = -T0; | |
2287 | xer_ov = 0; | |
2288 | RETURN(); | |
2289 | } | |
2290 | ||
2291 | /* XXX: factorise POWER rotates... */ | |
2292 | void OPPROTO op_POWER_rlmi (void) | |
2293 | { | |
2294 | T0 = rotl32(T0, T2) & PARAM1; | |
2f401176 | 2295 | T0 |= T1 & (uint32_t)PARAM2; |
76a66253 JM |
2296 | RETURN(); |
2297 | } | |
2298 | ||
2299 | void OPPROTO op_POWER_rrib (void) | |
2300 | { | |
2301 | T2 &= 0x1FUL; | |
2302 | T0 = rotl32(T0 & INT32_MIN, T2); | |
2303 | T0 |= T1 & ~rotl32(INT32_MIN, T2); | |
2304 | RETURN(); | |
2305 | } | |
2306 | ||
2307 | void OPPROTO op_POWER_sle (void) | |
2308 | { | |
2309 | T1 &= 0x1FUL; | |
2310 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2311 | T0 = T0 << T1; | |
2312 | RETURN(); | |
2313 | } | |
2314 | ||
2315 | void OPPROTO op_POWER_sleq (void) | |
2316 | { | |
2317 | uint32_t tmp = env->spr[SPR_MQ]; | |
2318 | ||
2319 | T1 &= 0x1FUL; | |
2320 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2321 | T0 = T0 << T1; | |
2322 | T0 |= tmp >> (32 - T1); | |
2323 | RETURN(); | |
2324 | } | |
2325 | ||
2326 | void OPPROTO op_POWER_sllq (void) | |
2327 | { | |
6f2d8978 | 2328 | uint32_t msk = UINT32_MAX; |
76a66253 JM |
2329 | |
2330 | msk = msk << (T1 & 0x1FUL); | |
2331 | if (T1 & 0x20UL) | |
2332 | msk = ~msk; | |
2333 | T1 &= 0x1FUL; | |
2334 | T0 = (T0 << T1) & msk; | |
2335 | T0 |= env->spr[SPR_MQ] & ~msk; | |
2336 | RETURN(); | |
2337 | } | |
2338 | ||
2339 | void OPPROTO op_POWER_slq (void) | |
2340 | { | |
6f2d8978 | 2341 | uint32_t msk = UINT32_MAX, tmp; |
76a66253 JM |
2342 | |
2343 | msk = msk << (T1 & 0x1FUL); | |
2344 | if (T1 & 0x20UL) | |
2345 | msk = ~msk; | |
2346 | T1 &= 0x1FUL; | |
2347 | tmp = rotl32(T0, T1); | |
2348 | T0 = tmp & msk; | |
2349 | env->spr[SPR_MQ] = tmp; | |
2350 | RETURN(); | |
2351 | } | |
2352 | ||
2353 | void OPPROTO op_POWER_sraq (void) | |
2354 | { | |
2355 | env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL)); | |
2356 | if (T1 & 0x20UL) | |
6f2d8978 | 2357 | T0 = UINT32_MAX; |
76a66253 | 2358 | else |
d9bce9d9 | 2359 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2360 | RETURN(); |
2361 | } | |
2362 | ||
2363 | void OPPROTO op_POWER_sre (void) | |
2364 | { | |
2365 | T1 &= 0x1FUL; | |
2366 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
d9bce9d9 | 2367 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2368 | RETURN(); |
2369 | } | |
2370 | ||
2371 | void OPPROTO op_POWER_srea (void) | |
2372 | { | |
2373 | T1 &= 0x1FUL; | |
2374 | env->spr[SPR_MQ] = T0 >> T1; | |
d9bce9d9 | 2375 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2376 | RETURN(); |
2377 | } | |
2378 | ||
2379 | void OPPROTO op_POWER_sreq (void) | |
2380 | { | |
2381 | uint32_t tmp; | |
2382 | int32_t msk; | |
2383 | ||
2384 | T1 &= 0x1FUL; | |
2385 | msk = INT32_MIN >> T1; | |
2386 | tmp = env->spr[SPR_MQ]; | |
2387 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2388 | T0 = T0 >> T1; | |
2389 | T0 |= tmp & msk; | |
2390 | RETURN(); | |
2391 | } | |
2392 | ||
2393 | void OPPROTO op_POWER_srlq (void) | |
2394 | { | |
2395 | uint32_t tmp; | |
2396 | int32_t msk; | |
2397 | ||
2398 | msk = INT32_MIN >> (T1 & 0x1FUL); | |
2399 | if (T1 & 0x20UL) | |
2400 | msk = ~msk; | |
2401 | T1 &= 0x1FUL; | |
2402 | tmp = env->spr[SPR_MQ]; | |
2403 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2404 | T0 = T0 >> T1; | |
2405 | T0 &= msk; | |
2406 | T0 |= tmp & ~msk; | |
2407 | RETURN(); | |
2408 | } | |
2409 | ||
2410 | void OPPROTO op_POWER_srq (void) | |
2411 | { | |
2412 | T1 &= 0x1FUL; | |
2413 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2414 | T0 = T0 >> T1; | |
2415 | RETURN(); | |
2416 | } | |
2417 | ||
2418 | /* POWER instructions not implemented in PowerPC 601 */ | |
2419 | #if !defined(CONFIG_USER_ONLY) | |
2420 | void OPPROTO op_POWER_mfsri (void) | |
2421 | { | |
2422 | T1 = T0 >> 28; | |
2423 | T0 = env->sr[T1]; | |
2424 | RETURN(); | |
2425 | } | |
2426 | ||
2427 | void OPPROTO op_POWER_rac (void) | |
2428 | { | |
2429 | do_POWER_rac(); | |
2430 | RETURN(); | |
2431 | } | |
2432 | ||
2433 | void OPPROTO op_POWER_rfsvc (void) | |
2434 | { | |
2435 | do_POWER_rfsvc(); | |
2436 | RETURN(); | |
2437 | } | |
2438 | #endif | |
2439 | ||
2440 | /* PowerPC 602 specific instruction */ | |
2441 | #if !defined(CONFIG_USER_ONLY) | |
2442 | void OPPROTO op_602_mfrom (void) | |
2443 | { | |
2444 | do_op_602_mfrom(); | |
2445 | RETURN(); | |
2446 | } | |
2447 | #endif | |
2448 | ||
2449 | /* PowerPC 4xx specific micro-ops */ | |
2450 | void OPPROTO op_405_add_T0_T2 (void) | |
2451 | { | |
2452 | T0 = (int32_t)T0 + (int32_t)T2; | |
2453 | RETURN(); | |
2454 | } | |
2455 | ||
2456 | void OPPROTO op_405_mulchw (void) | |
2457 | { | |
2458 | T0 = ((int16_t)T0) * ((int16_t)(T1 >> 16)); | |
2459 | RETURN(); | |
2460 | } | |
2461 | ||
2462 | void OPPROTO op_405_mulchwu (void) | |
2463 | { | |
2464 | T0 = ((uint16_t)T0) * ((uint16_t)(T1 >> 16)); | |
2465 | RETURN(); | |
2466 | } | |
2467 | ||
2468 | void OPPROTO op_405_mulhhw (void) | |
2469 | { | |
2470 | T0 = ((int16_t)(T0 >> 16)) * ((int16_t)(T1 >> 16)); | |
2471 | RETURN(); | |
2472 | } | |
2473 | ||
2474 | void OPPROTO op_405_mulhhwu (void) | |
2475 | { | |
2476 | T0 = ((uint16_t)(T0 >> 16)) * ((uint16_t)(T1 >> 16)); | |
2477 | RETURN(); | |
2478 | } | |
2479 | ||
2480 | void OPPROTO op_405_mullhw (void) | |
2481 | { | |
2482 | T0 = ((int16_t)T0) * ((int16_t)T1); | |
2483 | RETURN(); | |
2484 | } | |
2485 | ||
2486 | void OPPROTO op_405_mullhwu (void) | |
2487 | { | |
2488 | T0 = ((uint16_t)T0) * ((uint16_t)T1); | |
2489 | RETURN(); | |
2490 | } | |
2491 | ||
76a66253 JM |
2492 | void OPPROTO op_405_check_sat (void) |
2493 | { | |
2494 | do_405_check_sat(); | |
2495 | RETURN(); | |
2496 | } | |
2497 | ||
2498 | void OPPROTO op_405_check_ovu (void) | |
2499 | { | |
2500 | if (likely(T0 >= T2)) { | |
2501 | xer_ov = 0; | |
2502 | } else { | |
2503 | xer_ov = 1; | |
2504 | xer_so = 1; | |
2505 | } | |
2506 | RETURN(); | |
2507 | } | |
2508 | ||
2509 | void OPPROTO op_405_check_satu (void) | |
2510 | { | |
2511 | if (unlikely(T0 < T2)) { | |
2512 | /* Saturate result */ | |
6f2d8978 | 2513 | T0 = UINT32_MAX; |
76a66253 JM |
2514 | } |
2515 | RETURN(); | |
2516 | } | |
2517 | ||
a42bd6cc | 2518 | void OPPROTO op_load_dcr (void) |
76a66253 | 2519 | { |
a42bd6cc | 2520 | do_load_dcr(); |
76a66253 JM |
2521 | RETURN(); |
2522 | } | |
2523 | ||
a42bd6cc | 2524 | void OPPROTO op_store_dcr (void) |
76a66253 | 2525 | { |
a42bd6cc | 2526 | do_store_dcr(); |
76a66253 JM |
2527 | RETURN(); |
2528 | } | |
2529 | ||
a750fc0b | 2530 | #if !defined(CONFIG_USER_ONLY) |
76a66253 JM |
2531 | /* Return from critical interrupt : |
2532 | * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1 | |
2533 | */ | |
a42bd6cc JM |
2534 | void OPPROTO op_40x_rfci (void) |
2535 | { | |
2536 | do_40x_rfci(); | |
2537 | RETURN(); | |
2538 | } | |
2539 | ||
2540 | void OPPROTO op_rfci (void) | |
2541 | { | |
2542 | do_rfci(); | |
2543 | RETURN(); | |
2544 | } | |
2545 | ||
2546 | void OPPROTO op_rfdi (void) | |
2547 | { | |
2548 | do_rfdi(); | |
2549 | RETURN(); | |
2550 | } | |
2551 | ||
2552 | void OPPROTO op_rfmci (void) | |
76a66253 | 2553 | { |
a42bd6cc | 2554 | do_rfmci(); |
76a66253 JM |
2555 | RETURN(); |
2556 | } | |
2557 | ||
a42bd6cc | 2558 | void OPPROTO op_wrte (void) |
76a66253 | 2559 | { |
0411a972 JM |
2560 | /* We don't call do_store_msr here as we won't trigger |
2561 | * any special case nor change hflags | |
2562 | */ | |
2563 | T0 &= 1 << MSR_EE; | |
2564 | env->msr &= ~(1 << MSR_EE); | |
2565 | env->msr |= T0; | |
76a66253 JM |
2566 | RETURN(); |
2567 | } | |
2568 | ||
a4bb6c3e | 2569 | void OPPROTO op_440_tlbre (void) |
5eb7995e | 2570 | { |
a4bb6c3e | 2571 | do_440_tlbre(PARAM1); |
5eb7995e JM |
2572 | RETURN(); |
2573 | } | |
2574 | ||
a4bb6c3e | 2575 | void OPPROTO op_440_tlbsx (void) |
5eb7995e | 2576 | { |
daf4f96e | 2577 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF); |
5eb7995e JM |
2578 | RETURN(); |
2579 | } | |
2580 | ||
daf4f96e | 2581 | void OPPROTO op_4xx_tlbsx_check (void) |
5eb7995e | 2582 | { |
daf4f96e JM |
2583 | int tmp; |
2584 | ||
2585 | tmp = xer_so; | |
6f2d8978 | 2586 | if ((int)T0 != -1) |
daf4f96e JM |
2587 | tmp |= 0x02; |
2588 | env->crf[0] = tmp; | |
5eb7995e JM |
2589 | RETURN(); |
2590 | } | |
2591 | ||
a4bb6c3e | 2592 | void OPPROTO op_440_tlbwe (void) |
5eb7995e | 2593 | { |
a4bb6c3e | 2594 | do_440_tlbwe(PARAM1); |
5eb7995e JM |
2595 | RETURN(); |
2596 | } | |
2597 | ||
76a66253 JM |
2598 | void OPPROTO op_4xx_tlbre_lo (void) |
2599 | { | |
2600 | do_4xx_tlbre_lo(); | |
2601 | RETURN(); | |
2602 | } | |
2603 | ||
2604 | void OPPROTO op_4xx_tlbre_hi (void) | |
2605 | { | |
2606 | do_4xx_tlbre_hi(); | |
2607 | RETURN(); | |
2608 | } | |
2609 | ||
2610 | void OPPROTO op_4xx_tlbsx (void) | |
2611 | { | |
daf4f96e | 2612 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
76a66253 JM |
2613 | RETURN(); |
2614 | } | |
2615 | ||
2616 | void OPPROTO op_4xx_tlbwe_lo (void) | |
2617 | { | |
2618 | do_4xx_tlbwe_lo(); | |
2619 | RETURN(); | |
2620 | } | |
2621 | ||
2622 | void OPPROTO op_4xx_tlbwe_hi (void) | |
2623 | { | |
2624 | do_4xx_tlbwe_hi(); | |
2625 | RETURN(); | |
2626 | } | |
2627 | #endif | |
2628 | ||
2629 | /* SPR micro-ops */ | |
2630 | /* 440 specific */ | |
2631 | void OPPROTO op_440_dlmzb (void) | |
2632 | { | |
2633 | do_440_dlmzb(); | |
2634 | RETURN(); | |
2635 | } | |
2636 | ||
2637 | void OPPROTO op_440_dlmzb_update_Rc (void) | |
2638 | { | |
2639 | if (T0 == 8) | |
2640 | T0 = 0x2; | |
2641 | else if (T0 < 4) | |
2642 | T0 = 0x4; | |
2643 | else | |
2644 | T0 = 0x8; | |
2645 | RETURN(); | |
2646 | } | |
2647 | ||
2648 | #if !defined(CONFIG_USER_ONLY) | |
2649 | void OPPROTO op_store_pir (void) | |
3fc6c082 FB |
2650 | { |
2651 | env->spr[SPR_PIR] = T0 & 0x0000000FUL; | |
2652 | RETURN(); | |
2653 | } | |
76a66253 JM |
2654 | |
2655 | void OPPROTO op_load_403_pb (void) | |
2656 | { | |
2657 | do_load_403_pb(PARAM1); | |
2658 | RETURN(); | |
2659 | } | |
2660 | ||
2661 | void OPPROTO op_store_403_pb (void) | |
2662 | { | |
2663 | do_store_403_pb(PARAM1); | |
2664 | RETURN(); | |
2665 | } | |
2666 | ||
76a66253 JM |
2667 | void OPPROTO op_load_40x_pit (void) |
2668 | { | |
2669 | T0 = load_40x_pit(env); | |
2670 | RETURN(); | |
2671 | } | |
2672 | ||
76a66253 JM |
2673 | void OPPROTO op_store_40x_pit (void) |
2674 | { | |
2675 | store_40x_pit(env, T0); | |
2676 | RETURN(); | |
2677 | } | |
2678 | ||
8ecc7913 JM |
2679 | void OPPROTO op_store_40x_dbcr0 (void) |
2680 | { | |
2681 | store_40x_dbcr0(env, T0); | |
be147d08 | 2682 | RETURN(); |
8ecc7913 JM |
2683 | } |
2684 | ||
c294fc58 JM |
2685 | void OPPROTO op_store_40x_sler (void) |
2686 | { | |
2687 | store_40x_sler(env, T0); | |
2688 | RETURN(); | |
2689 | } | |
2690 | ||
76a66253 JM |
2691 | void OPPROTO op_store_booke_tcr (void) |
2692 | { | |
2693 | store_booke_tcr(env, T0); | |
2694 | RETURN(); | |
2695 | } | |
2696 | ||
76a66253 JM |
2697 | void OPPROTO op_store_booke_tsr (void) |
2698 | { | |
2699 | store_booke_tsr(env, T0); | |
2700 | RETURN(); | |
2701 | } | |
2702 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
0487d6a8 | 2703 | |
0487d6a8 JM |
2704 | /* SPE extension */ |
2705 | void OPPROTO op_splatw_T1_64 (void) | |
2706 | { | |
2707 | T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
e864cabd | 2708 | RETURN(); |
0487d6a8 JM |
2709 | } |
2710 | ||
2711 | void OPPROTO op_splatwi_T0_64 (void) | |
2712 | { | |
2713 | uint64_t tmp = PARAM1; | |
2714 | ||
2715 | T0_64 = (tmp << 32) | tmp; | |
e864cabd | 2716 | RETURN(); |
0487d6a8 JM |
2717 | } |
2718 | ||
2719 | void OPPROTO op_splatwi_T1_64 (void) | |
2720 | { | |
2721 | uint64_t tmp = PARAM1; | |
2722 | ||
2723 | T1_64 = (tmp << 32) | tmp; | |
e864cabd | 2724 | RETURN(); |
0487d6a8 JM |
2725 | } |
2726 | ||
2727 | void OPPROTO op_extsh_T1_64 (void) | |
2728 | { | |
2729 | T1_64 = (int32_t)((int16_t)T1_64); | |
2730 | RETURN(); | |
2731 | } | |
2732 | ||
2733 | void OPPROTO op_sli16_T1_64 (void) | |
2734 | { | |
2735 | T1_64 = T1_64 << 16; | |
2736 | RETURN(); | |
2737 | } | |
2738 | ||
2739 | void OPPROTO op_sli32_T1_64 (void) | |
2740 | { | |
2741 | T1_64 = T1_64 << 32; | |
2742 | RETURN(); | |
2743 | } | |
2744 | ||
2745 | void OPPROTO op_srli32_T1_64 (void) | |
2746 | { | |
2747 | T1_64 = T1_64 >> 32; | |
2748 | RETURN(); | |
2749 | } | |
2750 | ||
2751 | void OPPROTO op_evsel (void) | |
2752 | { | |
2753 | do_evsel(); | |
2754 | RETURN(); | |
2755 | } | |
2756 | ||
2757 | void OPPROTO op_evaddw (void) | |
2758 | { | |
2759 | do_evaddw(); | |
2760 | RETURN(); | |
2761 | } | |
2762 | ||
2763 | void OPPROTO op_evsubfw (void) | |
2764 | { | |
2765 | do_evsubfw(); | |
2766 | RETURN(); | |
2767 | } | |
2768 | ||
2769 | void OPPROTO op_evneg (void) | |
2770 | { | |
2771 | do_evneg(); | |
2772 | RETURN(); | |
2773 | } | |
2774 | ||
2775 | void OPPROTO op_evabs (void) | |
2776 | { | |
2777 | do_evabs(); | |
2778 | RETURN(); | |
2779 | } | |
2780 | ||
2781 | void OPPROTO op_evextsh (void) | |
2782 | { | |
2783 | T0_64 = ((uint64_t)((int32_t)(int16_t)(T0_64 >> 32)) << 32) | | |
2784 | (uint64_t)((int32_t)(int16_t)T0_64); | |
2785 | RETURN(); | |
2786 | } | |
2787 | ||
2788 | void OPPROTO op_evextsb (void) | |
2789 | { | |
2790 | T0_64 = ((uint64_t)((int32_t)(int8_t)(T0_64 >> 32)) << 32) | | |
2791 | (uint64_t)((int32_t)(int8_t)T0_64); | |
2792 | RETURN(); | |
2793 | } | |
2794 | ||
2795 | void OPPROTO op_evcntlzw (void) | |
2796 | { | |
2797 | do_evcntlzw(); | |
2798 | RETURN(); | |
2799 | } | |
2800 | ||
2801 | void OPPROTO op_evrndw (void) | |
2802 | { | |
2803 | do_evrndw(); | |
2804 | RETURN(); | |
2805 | } | |
2806 | ||
2807 | void OPPROTO op_brinc (void) | |
2808 | { | |
2809 | do_brinc(); | |
2810 | RETURN(); | |
2811 | } | |
2812 | ||
2813 | void OPPROTO op_evcntlsw (void) | |
2814 | { | |
2815 | do_evcntlsw(); | |
2816 | RETURN(); | |
2817 | } | |
2818 | ||
2819 | void OPPROTO op_evand (void) | |
2820 | { | |
2821 | T0_64 &= T1_64; | |
2822 | RETURN(); | |
2823 | } | |
2824 | ||
2825 | void OPPROTO op_evandc (void) | |
2826 | { | |
2827 | T0_64 &= ~T1_64; | |
2828 | RETURN(); | |
2829 | } | |
2830 | ||
2831 | void OPPROTO op_evor (void) | |
2832 | { | |
2833 | T0_64 |= T1_64; | |
2834 | RETURN(); | |
2835 | } | |
2836 | ||
2837 | void OPPROTO op_evxor (void) | |
2838 | { | |
2839 | T0_64 ^= T1_64; | |
2840 | RETURN(); | |
2841 | } | |
2842 | ||
2843 | void OPPROTO op_eveqv (void) | |
2844 | { | |
2845 | T0_64 = ~(T0_64 ^ T1_64); | |
2846 | RETURN(); | |
2847 | } | |
2848 | ||
2849 | void OPPROTO op_evnor (void) | |
2850 | { | |
2851 | T0_64 = ~(T0_64 | T1_64); | |
2852 | RETURN(); | |
2853 | } | |
2854 | ||
2855 | void OPPROTO op_evorc (void) | |
2856 | { | |
2857 | T0_64 |= ~T1_64; | |
2858 | RETURN(); | |
2859 | } | |
2860 | ||
2861 | void OPPROTO op_evnand (void) | |
2862 | { | |
2863 | T0_64 = ~(T0_64 & T1_64); | |
2864 | RETURN(); | |
2865 | } | |
2866 | ||
2867 | void OPPROTO op_evsrws (void) | |
2868 | { | |
2869 | do_evsrws(); | |
2870 | RETURN(); | |
2871 | } | |
2872 | ||
2873 | void OPPROTO op_evsrwu (void) | |
2874 | { | |
2875 | do_evsrwu(); | |
2876 | RETURN(); | |
2877 | } | |
2878 | ||
2879 | void OPPROTO op_evslw (void) | |
2880 | { | |
2881 | do_evslw(); | |
2882 | RETURN(); | |
2883 | } | |
2884 | ||
2885 | void OPPROTO op_evrlw (void) | |
2886 | { | |
2887 | do_evrlw(); | |
2888 | RETURN(); | |
2889 | } | |
2890 | ||
2891 | void OPPROTO op_evmergelo (void) | |
2892 | { | |
2893 | T0_64 = (T0_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2894 | RETURN(); | |
2895 | } | |
2896 | ||
2897 | void OPPROTO op_evmergehi (void) | |
2898 | { | |
2899 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 >> 32); | |
2900 | RETURN(); | |
2901 | } | |
2902 | ||
2903 | void OPPROTO op_evmergelohi (void) | |
2904 | { | |
2905 | T0_64 = (T0_64 << 32) | (T1_64 >> 32); | |
2906 | RETURN(); | |
2907 | } | |
2908 | ||
2909 | void OPPROTO op_evmergehilo (void) | |
2910 | { | |
2911 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2912 | RETURN(); | |
2913 | } | |
2914 | ||
2915 | void OPPROTO op_evcmpgts (void) | |
2916 | { | |
2917 | do_evcmpgts(); | |
2918 | RETURN(); | |
2919 | } | |
2920 | ||
2921 | void OPPROTO op_evcmpgtu (void) | |
2922 | { | |
2923 | do_evcmpgtu(); | |
2924 | RETURN(); | |
2925 | } | |
2926 | ||
2927 | void OPPROTO op_evcmplts (void) | |
2928 | { | |
2929 | do_evcmplts(); | |
2930 | RETURN(); | |
2931 | } | |
2932 | ||
2933 | void OPPROTO op_evcmpltu (void) | |
2934 | { | |
2935 | do_evcmpltu(); | |
2936 | RETURN(); | |
2937 | } | |
2938 | ||
2939 | void OPPROTO op_evcmpeq (void) | |
2940 | { | |
2941 | do_evcmpeq(); | |
2942 | RETURN(); | |
2943 | } | |
2944 | ||
2945 | void OPPROTO op_evfssub (void) | |
2946 | { | |
2947 | do_evfssub(); | |
2948 | RETURN(); | |
2949 | } | |
2950 | ||
2951 | void OPPROTO op_evfsadd (void) | |
2952 | { | |
2953 | do_evfsadd(); | |
2954 | RETURN(); | |
2955 | } | |
2956 | ||
2957 | void OPPROTO op_evfsnabs (void) | |
2958 | { | |
2959 | do_evfsnabs(); | |
2960 | RETURN(); | |
2961 | } | |
2962 | ||
2963 | void OPPROTO op_evfsabs (void) | |
2964 | { | |
2965 | do_evfsabs(); | |
2966 | RETURN(); | |
2967 | } | |
2968 | ||
2969 | void OPPROTO op_evfsneg (void) | |
2970 | { | |
2971 | do_evfsneg(); | |
2972 | RETURN(); | |
2973 | } | |
2974 | ||
2975 | void OPPROTO op_evfsdiv (void) | |
2976 | { | |
2977 | do_evfsdiv(); | |
2978 | RETURN(); | |
2979 | } | |
2980 | ||
2981 | void OPPROTO op_evfsmul (void) | |
2982 | { | |
2983 | do_evfsmul(); | |
2984 | RETURN(); | |
2985 | } | |
2986 | ||
2987 | void OPPROTO op_evfscmplt (void) | |
2988 | { | |
2989 | do_evfscmplt(); | |
2990 | RETURN(); | |
2991 | } | |
2992 | ||
2993 | void OPPROTO op_evfscmpgt (void) | |
2994 | { | |
2995 | do_evfscmpgt(); | |
2996 | RETURN(); | |
2997 | } | |
2998 | ||
2999 | void OPPROTO op_evfscmpeq (void) | |
3000 | { | |
3001 | do_evfscmpeq(); | |
3002 | RETURN(); | |
3003 | } | |
3004 | ||
3005 | void OPPROTO op_evfscfsi (void) | |
3006 | { | |
3007 | do_evfscfsi(); | |
3008 | RETURN(); | |
3009 | } | |
3010 | ||
3011 | void OPPROTO op_evfscfui (void) | |
3012 | { | |
3013 | do_evfscfui(); | |
3014 | RETURN(); | |
3015 | } | |
3016 | ||
3017 | void OPPROTO op_evfscfsf (void) | |
3018 | { | |
3019 | do_evfscfsf(); | |
3020 | RETURN(); | |
3021 | } | |
3022 | ||
3023 | void OPPROTO op_evfscfuf (void) | |
3024 | { | |
3025 | do_evfscfuf(); | |
3026 | RETURN(); | |
3027 | } | |
3028 | ||
3029 | void OPPROTO op_evfsctsi (void) | |
3030 | { | |
3031 | do_evfsctsi(); | |
3032 | RETURN(); | |
3033 | } | |
3034 | ||
3035 | void OPPROTO op_evfsctui (void) | |
3036 | { | |
3037 | do_evfsctui(); | |
3038 | RETURN(); | |
3039 | } | |
3040 | ||
3041 | void OPPROTO op_evfsctsf (void) | |
3042 | { | |
3043 | do_evfsctsf(); | |
3044 | RETURN(); | |
3045 | } | |
3046 | ||
3047 | void OPPROTO op_evfsctuf (void) | |
3048 | { | |
3049 | do_evfsctuf(); | |
3050 | RETURN(); | |
3051 | } | |
3052 | ||
3053 | void OPPROTO op_evfsctuiz (void) | |
3054 | { | |
3055 | do_evfsctuiz(); | |
3056 | RETURN(); | |
3057 | } | |
3058 | ||
3059 | void OPPROTO op_evfsctsiz (void) | |
3060 | { | |
3061 | do_evfsctsiz(); | |
3062 | RETURN(); | |
3063 | } | |
3064 | ||
3065 | void OPPROTO op_evfststlt (void) | |
3066 | { | |
3067 | do_evfststlt(); | |
3068 | RETURN(); | |
3069 | } | |
3070 | ||
3071 | void OPPROTO op_evfststgt (void) | |
3072 | { | |
3073 | do_evfststgt(); | |
3074 | RETURN(); | |
3075 | } | |
3076 | ||
3077 | void OPPROTO op_evfststeq (void) | |
3078 | { | |
3079 | do_evfststeq(); | |
3080 | RETURN(); | |
3081 | } | |
3082 | ||
3083 | void OPPROTO op_efssub (void) | |
3084 | { | |
3085 | T0_64 = _do_efssub(T0_64, T1_64); | |
3086 | RETURN(); | |
3087 | } | |
3088 | ||
3089 | void OPPROTO op_efsadd (void) | |
3090 | { | |
3091 | T0_64 = _do_efsadd(T0_64, T1_64); | |
3092 | RETURN(); | |
3093 | } | |
3094 | ||
3095 | void OPPROTO op_efsnabs (void) | |
3096 | { | |
3097 | T0_64 = _do_efsnabs(T0_64); | |
3098 | RETURN(); | |
3099 | } | |
3100 | ||
3101 | void OPPROTO op_efsabs (void) | |
3102 | { | |
3103 | T0_64 = _do_efsabs(T0_64); | |
3104 | RETURN(); | |
3105 | } | |
3106 | ||
3107 | void OPPROTO op_efsneg (void) | |
3108 | { | |
3109 | T0_64 = _do_efsneg(T0_64); | |
3110 | RETURN(); | |
3111 | } | |
3112 | ||
3113 | void OPPROTO op_efsdiv (void) | |
3114 | { | |
3115 | T0_64 = _do_efsdiv(T0_64, T1_64); | |
3116 | RETURN(); | |
3117 | } | |
3118 | ||
3119 | void OPPROTO op_efsmul (void) | |
3120 | { | |
3121 | T0_64 = _do_efsmul(T0_64, T1_64); | |
3122 | RETURN(); | |
3123 | } | |
3124 | ||
3125 | void OPPROTO op_efscmplt (void) | |
3126 | { | |
3127 | do_efscmplt(); | |
3128 | RETURN(); | |
3129 | } | |
3130 | ||
3131 | void OPPROTO op_efscmpgt (void) | |
3132 | { | |
3133 | do_efscmpgt(); | |
3134 | RETURN(); | |
3135 | } | |
3136 | ||
3137 | void OPPROTO op_efscfd (void) | |
3138 | { | |
3139 | do_efscfd(); | |
3140 | RETURN(); | |
3141 | } | |
3142 | ||
3143 | void OPPROTO op_efscmpeq (void) | |
3144 | { | |
3145 | do_efscmpeq(); | |
3146 | RETURN(); | |
3147 | } | |
3148 | ||
3149 | void OPPROTO op_efscfsi (void) | |
3150 | { | |
3151 | do_efscfsi(); | |
3152 | RETURN(); | |
3153 | } | |
3154 | ||
3155 | void OPPROTO op_efscfui (void) | |
3156 | { | |
3157 | do_efscfui(); | |
3158 | RETURN(); | |
3159 | } | |
3160 | ||
3161 | void OPPROTO op_efscfsf (void) | |
3162 | { | |
3163 | do_efscfsf(); | |
3164 | RETURN(); | |
3165 | } | |
3166 | ||
3167 | void OPPROTO op_efscfuf (void) | |
3168 | { | |
3169 | do_efscfuf(); | |
3170 | RETURN(); | |
3171 | } | |
3172 | ||
3173 | void OPPROTO op_efsctsi (void) | |
3174 | { | |
3175 | do_efsctsi(); | |
3176 | RETURN(); | |
3177 | } | |
3178 | ||
3179 | void OPPROTO op_efsctui (void) | |
3180 | { | |
3181 | do_efsctui(); | |
3182 | RETURN(); | |
3183 | } | |
3184 | ||
3185 | void OPPROTO op_efsctsf (void) | |
3186 | { | |
3187 | do_efsctsf(); | |
3188 | RETURN(); | |
3189 | } | |
3190 | ||
3191 | void OPPROTO op_efsctuf (void) | |
3192 | { | |
3193 | do_efsctuf(); | |
3194 | RETURN(); | |
3195 | } | |
3196 | ||
3197 | void OPPROTO op_efsctsiz (void) | |
3198 | { | |
3199 | do_efsctsiz(); | |
3200 | RETURN(); | |
3201 | } | |
3202 | ||
3203 | void OPPROTO op_efsctuiz (void) | |
3204 | { | |
3205 | do_efsctuiz(); | |
3206 | RETURN(); | |
3207 | } | |
3208 | ||
3209 | void OPPROTO op_efststlt (void) | |
3210 | { | |
3211 | T0 = _do_efststlt(T0_64, T1_64); | |
3212 | RETURN(); | |
3213 | } | |
3214 | ||
3215 | void OPPROTO op_efststgt (void) | |
3216 | { | |
3217 | T0 = _do_efststgt(T0_64, T1_64); | |
3218 | RETURN(); | |
3219 | } | |
3220 | ||
3221 | void OPPROTO op_efststeq (void) | |
3222 | { | |
3223 | T0 = _do_efststeq(T0_64, T1_64); | |
3224 | RETURN(); | |
3225 | } | |
3226 | ||
3227 | void OPPROTO op_efdsub (void) | |
3228 | { | |
3229 | union { | |
3230 | uint64_t u; | |
3231 | float64 f; | |
3232 | } u1, u2; | |
3233 | u1.u = T0_64; | |
3234 | u2.u = T1_64; | |
3235 | u1.f = float64_sub(u1.f, u2.f, &env->spe_status); | |
3236 | T0_64 = u1.u; | |
3237 | RETURN(); | |
3238 | } | |
3239 | ||
3240 | void OPPROTO op_efdadd (void) | |
3241 | { | |
3242 | union { | |
3243 | uint64_t u; | |
3244 | float64 f; | |
3245 | } u1, u2; | |
3246 | u1.u = T0_64; | |
3247 | u2.u = T1_64; | |
3248 | u1.f = float64_add(u1.f, u2.f, &env->spe_status); | |
3249 | T0_64 = u1.u; | |
3250 | RETURN(); | |
3251 | } | |
3252 | ||
3253 | void OPPROTO op_efdcfsid (void) | |
3254 | { | |
3255 | do_efdcfsi(); | |
3256 | RETURN(); | |
3257 | } | |
3258 | ||
3259 | void OPPROTO op_efdcfuid (void) | |
3260 | { | |
3261 | do_efdcfui(); | |
3262 | RETURN(); | |
3263 | } | |
3264 | ||
3265 | void OPPROTO op_efdnabs (void) | |
3266 | { | |
3267 | T0_64 |= 0x8000000000000000ULL; | |
3268 | RETURN(); | |
3269 | } | |
3270 | ||
3271 | void OPPROTO op_efdabs (void) | |
3272 | { | |
3273 | T0_64 &= ~0x8000000000000000ULL; | |
3274 | RETURN(); | |
3275 | } | |
3276 | ||
3277 | void OPPROTO op_efdneg (void) | |
3278 | { | |
3279 | T0_64 ^= 0x8000000000000000ULL; | |
3280 | RETURN(); | |
3281 | } | |
3282 | ||
3283 | void OPPROTO op_efddiv (void) | |
3284 | { | |
3285 | union { | |
3286 | uint64_t u; | |
3287 | float64 f; | |
3288 | } u1, u2; | |
3289 | u1.u = T0_64; | |
3290 | u2.u = T1_64; | |
3291 | u1.f = float64_div(u1.f, u2.f, &env->spe_status); | |
3292 | T0_64 = u1.u; | |
3293 | RETURN(); | |
3294 | } | |
3295 | ||
3296 | void OPPROTO op_efdmul (void) | |
3297 | { | |
3298 | union { | |
3299 | uint64_t u; | |
3300 | float64 f; | |
3301 | } u1, u2; | |
3302 | u1.u = T0_64; | |
3303 | u2.u = T1_64; | |
3304 | u1.f = float64_mul(u1.f, u2.f, &env->spe_status); | |
3305 | T0_64 = u1.u; | |
3306 | RETURN(); | |
3307 | } | |
3308 | ||
3309 | void OPPROTO op_efdctsidz (void) | |
3310 | { | |
3311 | do_efdctsiz(); | |
3312 | RETURN(); | |
3313 | } | |
3314 | ||
3315 | void OPPROTO op_efdctuidz (void) | |
3316 | { | |
3317 | do_efdctuiz(); | |
3318 | RETURN(); | |
3319 | } | |
3320 | ||
3321 | void OPPROTO op_efdcmplt (void) | |
3322 | { | |
3323 | do_efdcmplt(); | |
3324 | RETURN(); | |
3325 | } | |
3326 | ||
3327 | void OPPROTO op_efdcmpgt (void) | |
3328 | { | |
3329 | do_efdcmpgt(); | |
3330 | RETURN(); | |
3331 | } | |
3332 | ||
3333 | void OPPROTO op_efdcfs (void) | |
3334 | { | |
3335 | do_efdcfs(); | |
3336 | RETURN(); | |
3337 | } | |
3338 | ||
3339 | void OPPROTO op_efdcmpeq (void) | |
3340 | { | |
3341 | do_efdcmpeq(); | |
3342 | RETURN(); | |
3343 | } | |
3344 | ||
3345 | void OPPROTO op_efdcfsi (void) | |
3346 | { | |
3347 | do_efdcfsi(); | |
3348 | RETURN(); | |
3349 | } | |
3350 | ||
3351 | void OPPROTO op_efdcfui (void) | |
3352 | { | |
3353 | do_efdcfui(); | |
3354 | RETURN(); | |
3355 | } | |
3356 | ||
3357 | void OPPROTO op_efdcfsf (void) | |
3358 | { | |
3359 | do_efdcfsf(); | |
3360 | RETURN(); | |
3361 | } | |
3362 | ||
3363 | void OPPROTO op_efdcfuf (void) | |
3364 | { | |
3365 | do_efdcfuf(); | |
3366 | RETURN(); | |
3367 | } | |
3368 | ||
3369 | void OPPROTO op_efdctsi (void) | |
3370 | { | |
3371 | do_efdctsi(); | |
3372 | RETURN(); | |
3373 | } | |
3374 | ||
3375 | void OPPROTO op_efdctui (void) | |
3376 | { | |
3377 | do_efdctui(); | |
3378 | RETURN(); | |
3379 | } | |
3380 | ||
3381 | void OPPROTO op_efdctsf (void) | |
3382 | { | |
3383 | do_efdctsf(); | |
3384 | RETURN(); | |
3385 | } | |
3386 | ||
3387 | void OPPROTO op_efdctuf (void) | |
3388 | { | |
3389 | do_efdctuf(); | |
3390 | RETURN(); | |
3391 | } | |
3392 | ||
3393 | void OPPROTO op_efdctuiz (void) | |
3394 | { | |
3395 | do_efdctuiz(); | |
3396 | RETURN(); | |
3397 | } | |
3398 | ||
3399 | void OPPROTO op_efdctsiz (void) | |
3400 | { | |
3401 | do_efdctsiz(); | |
3402 | RETURN(); | |
3403 | } | |
3404 | ||
3405 | void OPPROTO op_efdtstlt (void) | |
3406 | { | |
3407 | T0 = _do_efdtstlt(T0_64, T1_64); | |
3408 | RETURN(); | |
3409 | } | |
3410 | ||
3411 | void OPPROTO op_efdtstgt (void) | |
3412 | { | |
3413 | T0 = _do_efdtstgt(T0_64, T1_64); | |
3414 | RETURN(); | |
3415 | } | |
3416 | ||
3417 | void OPPROTO op_efdtsteq (void) | |
3418 | { | |
3419 | T0 = _do_efdtsteq(T0_64, T1_64); | |
3420 | RETURN(); | |
3421 | } |