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Commit | Line | Data |
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79aceca5 | 1 | /* |
3fc6c082 | 2 | * PowerPC emulation micro-operations for qemu. |
5fafdf24 | 3 | * |
76a66253 | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
79aceca5 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
a541f297 FB |
21 | //#define DEBUG_OP |
22 | ||
79aceca5 FB |
23 | #include "config.h" |
24 | #include "exec.h" | |
0411a972 | 25 | #include "helper_regs.h" |
76a66253 | 26 | #include "op_helper.h" |
79aceca5 | 27 | |
28b6751f FB |
28 | #define REG 0 |
29 | #include "op_template.h" | |
30 | ||
31 | #define REG 1 | |
32 | #include "op_template.h" | |
33 | ||
34 | #define REG 2 | |
35 | #include "op_template.h" | |
36 | ||
37 | #define REG 3 | |
38 | #include "op_template.h" | |
39 | ||
40 | #define REG 4 | |
41 | #include "op_template.h" | |
42 | ||
43 | #define REG 5 | |
44 | #include "op_template.h" | |
45 | ||
46 | #define REG 6 | |
47 | #include "op_template.h" | |
48 | ||
49 | #define REG 7 | |
50 | #include "op_template.h" | |
51 | ||
52 | #define REG 8 | |
53 | #include "op_template.h" | |
54 | ||
55 | #define REG 9 | |
56 | #include "op_template.h" | |
57 | ||
58 | #define REG 10 | |
59 | #include "op_template.h" | |
60 | ||
61 | #define REG 11 | |
62 | #include "op_template.h" | |
63 | ||
64 | #define REG 12 | |
65 | #include "op_template.h" | |
66 | ||
67 | #define REG 13 | |
68 | #include "op_template.h" | |
69 | ||
70 | #define REG 14 | |
71 | #include "op_template.h" | |
72 | ||
73 | #define REG 15 | |
74 | #include "op_template.h" | |
75 | ||
76 | #define REG 16 | |
77 | #include "op_template.h" | |
78 | ||
79 | #define REG 17 | |
80 | #include "op_template.h" | |
81 | ||
82 | #define REG 18 | |
83 | #include "op_template.h" | |
84 | ||
85 | #define REG 19 | |
86 | #include "op_template.h" | |
87 | ||
88 | #define REG 20 | |
89 | #include "op_template.h" | |
90 | ||
91 | #define REG 21 | |
92 | #include "op_template.h" | |
93 | ||
94 | #define REG 22 | |
95 | #include "op_template.h" | |
96 | ||
97 | #define REG 23 | |
98 | #include "op_template.h" | |
99 | ||
100 | #define REG 24 | |
101 | #include "op_template.h" | |
102 | ||
103 | #define REG 25 | |
104 | #include "op_template.h" | |
105 | ||
106 | #define REG 26 | |
107 | #include "op_template.h" | |
108 | ||
109 | #define REG 27 | |
110 | #include "op_template.h" | |
111 | ||
112 | #define REG 28 | |
113 | #include "op_template.h" | |
114 | ||
115 | #define REG 29 | |
116 | #include "op_template.h" | |
117 | ||
118 | #define REG 30 | |
119 | #include "op_template.h" | |
120 | ||
121 | #define REG 31 | |
122 | #include "op_template.h" | |
123 | ||
a496775f JM |
124 | void OPPROTO op_print_mem_EA (void) |
125 | { | |
126 | do_print_mem_EA(T0); | |
127 | RETURN(); | |
128 | } | |
129 | ||
3fc6c082 | 130 | /* PowerPC state maintenance operations */ |
79aceca5 | 131 | /* set_Rc0 */ |
36081602 | 132 | void OPPROTO op_set_Rc0 (void) |
79aceca5 | 133 | { |
966439a6 | 134 | env->crf[0] = T0 | xer_so; |
79aceca5 FB |
135 | RETURN(); |
136 | } | |
137 | ||
9a64fbe4 | 138 | /* Constants load */ |
76a66253 JM |
139 | void OPPROTO op_reset_T0 (void) |
140 | { | |
141 | T0 = 0; | |
142 | RETURN(); | |
143 | } | |
144 | ||
36081602 | 145 | void OPPROTO op_set_T0 (void) |
79aceca5 | 146 | { |
d9bce9d9 | 147 | T0 = (uint32_t)PARAM1; |
79aceca5 FB |
148 | RETURN(); |
149 | } | |
150 | ||
d9bce9d9 JM |
151 | #if defined(TARGET_PPC64) |
152 | void OPPROTO op_set_T0_64 (void) | |
153 | { | |
154 | T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
155 | RETURN(); | |
156 | } | |
157 | #endif | |
158 | ||
36081602 | 159 | void OPPROTO op_set_T1 (void) |
79aceca5 | 160 | { |
d9bce9d9 JM |
161 | T1 = (uint32_t)PARAM1; |
162 | RETURN(); | |
163 | } | |
164 | ||
165 | #if defined(TARGET_PPC64) | |
166 | void OPPROTO op_set_T1_64 (void) | |
167 | { | |
168 | T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
79aceca5 FB |
169 | RETURN(); |
170 | } | |
d9bce9d9 | 171 | #endif |
79aceca5 | 172 | |
76a66253 | 173 | #if 0 // unused |
36081602 | 174 | void OPPROTO op_set_T2 (void) |
79aceca5 | 175 | { |
2f401176 | 176 | T2 = (uint32_t)PARAM1; |
79aceca5 FB |
177 | RETURN(); |
178 | } | |
76a66253 | 179 | #endif |
79aceca5 | 180 | |
76a66253 | 181 | void OPPROTO op_move_T1_T0 (void) |
79aceca5 | 182 | { |
76a66253 JM |
183 | T1 = T0; |
184 | RETURN(); | |
9a64fbe4 FB |
185 | } |
186 | ||
d9bce9d9 JM |
187 | void OPPROTO op_move_T2_T0 (void) |
188 | { | |
189 | T2 = T0; | |
190 | RETURN(); | |
191 | } | |
192 | ||
76a66253 | 193 | /* Generate exceptions */ |
36081602 | 194 | void OPPROTO op_raise_exception_err (void) |
9a64fbe4 | 195 | { |
36081602 | 196 | do_raise_exception_err(PARAM1, PARAM2); |
9a64fbe4 FB |
197 | } |
198 | ||
36081602 | 199 | void OPPROTO op_update_nip (void) |
9a64fbe4 | 200 | { |
d9bce9d9 | 201 | env->nip = (uint32_t)PARAM1; |
76a66253 | 202 | RETURN(); |
9a64fbe4 FB |
203 | } |
204 | ||
d9bce9d9 JM |
205 | #if defined(TARGET_PPC64) |
206 | void OPPROTO op_update_nip_64 (void) | |
207 | { | |
208 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
209 | RETURN(); | |
210 | } | |
211 | #endif | |
212 | ||
36081602 | 213 | void OPPROTO op_debug (void) |
ea4e754f FB |
214 | { |
215 | do_raise_exception(EXCP_DEBUG); | |
216 | } | |
217 | ||
36081602 | 218 | void OPPROTO op_exit_tb (void) |
9a64fbe4 | 219 | { |
76a66253 | 220 | EXIT_TB(); |
9a64fbe4 FB |
221 | } |
222 | ||
76a66253 | 223 | /* Load/store special registers */ |
36081602 | 224 | void OPPROTO op_load_cr (void) |
9a64fbe4 | 225 | { |
76a66253 | 226 | do_load_cr(); |
79aceca5 FB |
227 | RETURN(); |
228 | } | |
229 | ||
36081602 | 230 | void OPPROTO op_store_cr (void) |
79aceca5 | 231 | { |
36081602 | 232 | do_store_cr(PARAM1); |
79aceca5 FB |
233 | RETURN(); |
234 | } | |
235 | ||
76a66253 | 236 | void OPPROTO op_load_cro (void) |
79aceca5 | 237 | { |
76a66253 | 238 | T0 = env->crf[PARAM1]; |
79aceca5 FB |
239 | RETURN(); |
240 | } | |
241 | ||
76a66253 | 242 | void OPPROTO op_store_cro (void) |
79aceca5 | 243 | { |
76a66253 | 244 | env->crf[PARAM1] = T0; |
79aceca5 FB |
245 | RETURN(); |
246 | } | |
247 | ||
36081602 | 248 | void OPPROTO op_load_xer_cr (void) |
79aceca5 FB |
249 | { |
250 | T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1); | |
251 | RETURN(); | |
252 | } | |
253 | ||
36081602 | 254 | void OPPROTO op_clear_xer_ov (void) |
79aceca5 FB |
255 | { |
256 | xer_so = 0; | |
257 | xer_ov = 0; | |
e864cabd JM |
258 | RETURN(); |
259 | } | |
260 | ||
36081602 | 261 | void OPPROTO op_clear_xer_ca (void) |
e864cabd | 262 | { |
79aceca5 FB |
263 | xer_ca = 0; |
264 | RETURN(); | |
265 | } | |
266 | ||
36081602 | 267 | void OPPROTO op_load_xer_bc (void) |
79aceca5 | 268 | { |
9a64fbe4 | 269 | T1 = xer_bc; |
79aceca5 FB |
270 | RETURN(); |
271 | } | |
272 | ||
76a66253 JM |
273 | void OPPROTO op_store_xer_bc (void) |
274 | { | |
275 | xer_bc = T0; | |
276 | RETURN(); | |
277 | } | |
278 | ||
36081602 | 279 | void OPPROTO op_load_xer (void) |
79aceca5 | 280 | { |
0411a972 | 281 | T0 = hreg_load_xer(env); |
79aceca5 FB |
282 | RETURN(); |
283 | } | |
284 | ||
36081602 | 285 | void OPPROTO op_store_xer (void) |
79aceca5 | 286 | { |
0411a972 | 287 | hreg_store_xer(env, T0); |
76a66253 JM |
288 | RETURN(); |
289 | } | |
290 | ||
c80f84e3 JM |
291 | #if defined(TARGET_PPC64) |
292 | void OPPROTO op_store_pri (void) | |
293 | { | |
294 | do_store_pri(PARAM1); | |
295 | RETURN(); | |
296 | } | |
297 | #endif | |
298 | ||
76a66253 JM |
299 | #if !defined(CONFIG_USER_ONLY) |
300 | /* Segment registers load and store */ | |
36081602 | 301 | void OPPROTO op_load_sr (void) |
76a66253 | 302 | { |
36081602 | 303 | T0 = env->sr[T1]; |
76a66253 JM |
304 | RETURN(); |
305 | } | |
306 | ||
36081602 | 307 | void OPPROTO op_store_sr (void) |
76a66253 JM |
308 | { |
309 | do_store_sr(env, T1, T0); | |
310 | RETURN(); | |
311 | } | |
312 | ||
12de9a39 JM |
313 | #if defined(TARGET_PPC64) |
314 | void OPPROTO op_load_slb (void) | |
315 | { | |
316 | T0 = ppc_load_slb(env, T1); | |
317 | RETURN(); | |
318 | } | |
319 | ||
320 | void OPPROTO op_store_slb (void) | |
321 | { | |
322 | ppc_store_slb(env, T1, T0); | |
323 | RETURN(); | |
324 | } | |
325 | #endif /* defined(TARGET_PPC64) */ | |
326 | ||
36081602 | 327 | void OPPROTO op_load_sdr1 (void) |
76a66253 | 328 | { |
36081602 | 329 | T0 = env->sdr1; |
76a66253 JM |
330 | RETURN(); |
331 | } | |
332 | ||
36081602 | 333 | void OPPROTO op_store_sdr1 (void) |
76a66253 JM |
334 | { |
335 | do_store_sdr1(env, T0); | |
79aceca5 FB |
336 | RETURN(); |
337 | } | |
338 | ||
d9bce9d9 JM |
339 | #if defined (TARGET_PPC64) |
340 | void OPPROTO op_load_asr (void) | |
341 | { | |
342 | T0 = env->asr; | |
343 | RETURN(); | |
344 | } | |
345 | ||
346 | void OPPROTO op_store_asr (void) | |
347 | { | |
348 | ppc_store_asr(env, T0); | |
349 | RETURN(); | |
350 | } | |
351 | #endif | |
352 | ||
36081602 | 353 | void OPPROTO op_load_msr (void) |
79aceca5 | 354 | { |
0411a972 | 355 | T0 = env->msr; |
79aceca5 FB |
356 | RETURN(); |
357 | } | |
358 | ||
36081602 | 359 | void OPPROTO op_store_msr (void) |
79aceca5 | 360 | { |
0411a972 | 361 | do_store_msr(); |
9a64fbe4 FB |
362 | RETURN(); |
363 | } | |
d9bce9d9 | 364 | |
0411a972 JM |
365 | #if defined (TARGET_PPC64) |
366 | void OPPROTO op_store_msr_32 (void) | |
be147d08 | 367 | { |
0411a972 JM |
368 | T0 = (env->msr & ~0xFFFFFFFFULL) | (T0 & 0xFFFFFFFF); |
369 | do_store_msr(); | |
be147d08 JM |
370 | RETURN(); |
371 | } | |
0411a972 | 372 | #endif |
be147d08 | 373 | |
0411a972 | 374 | void OPPROTO op_update_riee (void) |
d9bce9d9 | 375 | { |
0411a972 JM |
376 | /* We don't call do_store_msr here as we won't trigger |
377 | * any special case nor change hflags | |
378 | */ | |
379 | T0 &= (1 << MSR_RI) | (1 << MSR_EE); | |
380 | env->msr &= ~(1 << MSR_RI) | (1 << MSR_EE); | |
381 | env->msr |= T0; | |
d9bce9d9 JM |
382 | RETURN(); |
383 | } | |
384 | #endif | |
9a64fbe4 FB |
385 | |
386 | /* SPR */ | |
a496775f JM |
387 | void OPPROTO op_load_spr (void) |
388 | { | |
389 | T0 = env->spr[PARAM1]; | |
390 | RETURN(); | |
391 | } | |
392 | ||
393 | void OPPROTO op_store_spr (void) | |
394 | { | |
395 | env->spr[PARAM1] = T0; | |
396 | RETURN(); | |
397 | } | |
398 | ||
399 | void OPPROTO op_load_dump_spr (void) | |
400 | { | |
401 | T0 = ppc_load_dump_spr(PARAM1); | |
402 | RETURN(); | |
403 | } | |
404 | ||
405 | void OPPROTO op_store_dump_spr (void) | |
9a64fbe4 | 406 | { |
a496775f | 407 | ppc_store_dump_spr(PARAM1, T0); |
9a64fbe4 FB |
408 | RETURN(); |
409 | } | |
410 | ||
a496775f | 411 | void OPPROTO op_mask_spr (void) |
9a64fbe4 | 412 | { |
a496775f | 413 | env->spr[PARAM1] &= ~T0; |
79aceca5 FB |
414 | RETURN(); |
415 | } | |
416 | ||
36081602 | 417 | void OPPROTO op_load_lr (void) |
79aceca5 | 418 | { |
36081602 | 419 | T0 = env->lr; |
9a64fbe4 FB |
420 | RETURN(); |
421 | } | |
422 | ||
36081602 | 423 | void OPPROTO op_store_lr (void) |
9a64fbe4 | 424 | { |
36081602 | 425 | env->lr = T0; |
9a64fbe4 FB |
426 | RETURN(); |
427 | } | |
428 | ||
36081602 | 429 | void OPPROTO op_load_ctr (void) |
9a64fbe4 | 430 | { |
36081602 | 431 | T0 = env->ctr; |
9a64fbe4 FB |
432 | RETURN(); |
433 | } | |
434 | ||
36081602 | 435 | void OPPROTO op_store_ctr (void) |
9a64fbe4 | 436 | { |
36081602 | 437 | env->ctr = T0; |
9a64fbe4 FB |
438 | RETURN(); |
439 | } | |
440 | ||
36081602 | 441 | void OPPROTO op_load_tbl (void) |
9a64fbe4 | 442 | { |
36081602 | 443 | T0 = cpu_ppc_load_tbl(env); |
9a64fbe4 FB |
444 | RETURN(); |
445 | } | |
446 | ||
36081602 | 447 | void OPPROTO op_load_tbu (void) |
9a64fbe4 | 448 | { |
36081602 | 449 | T0 = cpu_ppc_load_tbu(env); |
9a64fbe4 FB |
450 | RETURN(); |
451 | } | |
452 | ||
a062e36c JM |
453 | void OPPROTO op_load_atbl (void) |
454 | { | |
455 | T0 = cpu_ppc_load_atbl(env); | |
456 | RETURN(); | |
457 | } | |
458 | ||
459 | void OPPROTO op_load_atbu (void) | |
460 | { | |
461 | T0 = cpu_ppc_load_atbu(env); | |
462 | RETURN(); | |
463 | } | |
464 | ||
76a66253 | 465 | #if !defined(CONFIG_USER_ONLY) |
36081602 | 466 | void OPPROTO op_store_tbl (void) |
9a64fbe4 | 467 | { |
36081602 | 468 | cpu_ppc_store_tbl(env, T0); |
79aceca5 FB |
469 | RETURN(); |
470 | } | |
471 | ||
36081602 | 472 | void OPPROTO op_store_tbu (void) |
9a64fbe4 | 473 | { |
36081602 | 474 | cpu_ppc_store_tbu(env, T0); |
9a64fbe4 FB |
475 | RETURN(); |
476 | } | |
477 | ||
a062e36c JM |
478 | void OPPROTO op_store_atbl (void) |
479 | { | |
480 | cpu_ppc_store_atbl(env, T0); | |
481 | RETURN(); | |
482 | } | |
483 | ||
484 | void OPPROTO op_store_atbu (void) | |
485 | { | |
486 | cpu_ppc_store_atbu(env, T0); | |
487 | RETURN(); | |
488 | } | |
489 | ||
36081602 | 490 | void OPPROTO op_load_decr (void) |
9a64fbe4 | 491 | { |
36081602 | 492 | T0 = cpu_ppc_load_decr(env); |
76a66253 JM |
493 | RETURN(); |
494 | } | |
9fddaa0c | 495 | |
36081602 | 496 | void OPPROTO op_store_decr (void) |
9fddaa0c | 497 | { |
36081602 | 498 | cpu_ppc_store_decr(env, T0); |
9a64fbe4 FB |
499 | RETURN(); |
500 | } | |
501 | ||
36081602 | 502 | void OPPROTO op_load_ibat (void) |
9a64fbe4 | 503 | { |
36081602 | 504 | T0 = env->IBAT[PARAM1][PARAM2]; |
76a66253 | 505 | RETURN(); |
9a64fbe4 FB |
506 | } |
507 | ||
76a66253 | 508 | void OPPROTO op_store_ibatu (void) |
9a64fbe4 | 509 | { |
3fc6c082 FB |
510 | do_store_ibatu(env, PARAM1, T0); |
511 | RETURN(); | |
512 | } | |
513 | ||
76a66253 | 514 | void OPPROTO op_store_ibatl (void) |
3fc6c082 FB |
515 | { |
516 | #if 1 | |
517 | env->IBAT[1][PARAM1] = T0; | |
518 | #else | |
519 | do_store_ibatl(env, PARAM1, T0); | |
520 | #endif | |
521 | RETURN(); | |
9a64fbe4 FB |
522 | } |
523 | ||
36081602 | 524 | void OPPROTO op_load_dbat (void) |
9a64fbe4 | 525 | { |
36081602 | 526 | T0 = env->DBAT[PARAM1][PARAM2]; |
76a66253 | 527 | RETURN(); |
9a64fbe4 FB |
528 | } |
529 | ||
76a66253 | 530 | void OPPROTO op_store_dbatu (void) |
3fc6c082 FB |
531 | { |
532 | do_store_dbatu(env, PARAM1, T0); | |
533 | RETURN(); | |
534 | } | |
535 | ||
76a66253 | 536 | void OPPROTO op_store_dbatl (void) |
9a64fbe4 | 537 | { |
3fc6c082 FB |
538 | #if 1 |
539 | env->DBAT[1][PARAM1] = T0; | |
540 | #else | |
541 | do_store_dbatl(env, PARAM1, T0); | |
542 | #endif | |
543 | RETURN(); | |
9a64fbe4 | 544 | } |
76a66253 | 545 | #endif /* !defined(CONFIG_USER_ONLY) */ |
9a64fbe4 | 546 | |
fb0eaffc | 547 | /* FPSCR */ |
7c58044c JM |
548 | #ifdef CONFIG_SOFTFLOAT |
549 | void OPPROTO op_reset_fpstatus (void) | |
fb0eaffc | 550 | { |
7c58044c | 551 | env->fp_status.float_exception_flags = 0; |
fb0eaffc FB |
552 | RETURN(); |
553 | } | |
7c58044c | 554 | #endif |
fb0eaffc | 555 | |
7c58044c | 556 | void OPPROTO op_compute_fprf (void) |
fb0eaffc | 557 | { |
7c58044c JM |
558 | do_compute_fprf(PARAM1); |
559 | RETURN(); | |
560 | } | |
561 | ||
562 | #ifdef CONFIG_SOFTFLOAT | |
563 | void OPPROTO op_float_check_status (void) | |
564 | { | |
565 | do_float_check_status(); | |
566 | RETURN(); | |
567 | } | |
568 | #else | |
569 | void OPPROTO op_float_check_status (void) | |
570 | { | |
571 | if (env->exception_index == POWERPC_EXCP_PROGRAM && | |
572 | (env->error_code & POWERPC_EXCP_FP)) { | |
573 | /* Differred floating-point exception after target FPR update */ | |
574 | if (msr_fe0 != 0 || msr_fe1 != 0) | |
575 | do_raise_exception_err(env->exception_index, env->error_code); | |
576 | } | |
fb0eaffc FB |
577 | RETURN(); |
578 | } | |
7c58044c JM |
579 | #endif |
580 | ||
581 | #if defined(WORDS_BIGENDIAN) | |
582 | #define WORD0 0 | |
583 | #define WORD1 1 | |
584 | #else | |
585 | #define WORD0 1 | |
586 | #define WORD1 0 | |
587 | #endif | |
588 | void OPPROTO op_load_fpscr_FT0 (void) | |
589 | { | |
590 | /* The 32 MSB of the target fpr are undefined. | |
591 | * They'll be zero... | |
592 | */ | |
593 | union { | |
594 | float64 d; | |
595 | struct { | |
596 | uint32_t u[2]; | |
597 | } s; | |
598 | } u; | |
599 | ||
600 | u.s.u[WORD0] = 0; | |
601 | u.s.u[WORD1] = env->fpscr; | |
602 | FT0 = u.d; | |
603 | RETURN(); | |
604 | } | |
605 | ||
606 | void OPPROTO op_set_FT0 (void) | |
607 | { | |
608 | union { | |
609 | float64 d; | |
610 | struct { | |
611 | uint32_t u[2]; | |
612 | } s; | |
613 | } u; | |
614 | ||
615 | u.s.u[WORD0] = 0; | |
616 | u.s.u[WORD1] = PARAM1; | |
617 | FT0 = u.d; | |
618 | RETURN(); | |
619 | } | |
620 | #undef WORD0 | |
621 | #undef WORD1 | |
fb0eaffc | 622 | |
7c58044c | 623 | void OPPROTO op_load_fpscr_T0 (void) |
fb0eaffc | 624 | { |
7c58044c JM |
625 | T0 = (env->fpscr >> PARAM1) & 0xF; |
626 | RETURN(); | |
627 | } | |
628 | ||
629 | void OPPROTO op_load_fpcc (void) | |
630 | { | |
631 | T0 = fpscr_fpcc; | |
632 | RETURN(); | |
633 | } | |
634 | ||
635 | void OPPROTO op_fpscr_resetbit (void) | |
636 | { | |
637 | env->fpscr &= PARAM1; | |
638 | RETURN(); | |
639 | } | |
640 | ||
641 | void OPPROTO op_fpscr_setbit (void) | |
642 | { | |
643 | do_fpscr_setbit(PARAM1); | |
644 | RETURN(); | |
645 | } | |
646 | ||
647 | void OPPROTO op_store_fpscr (void) | |
648 | { | |
649 | do_store_fpscr(PARAM1); | |
fb0eaffc FB |
650 | RETURN(); |
651 | } | |
652 | ||
79aceca5 | 653 | /* crf operations */ |
36081602 | 654 | void OPPROTO op_getbit_T0 (void) |
79aceca5 | 655 | { |
36081602 | 656 | T0 = (T0 >> PARAM1) & 1; |
79aceca5 FB |
657 | RETURN(); |
658 | } | |
659 | ||
36081602 | 660 | void OPPROTO op_getbit_T1 (void) |
79aceca5 | 661 | { |
36081602 | 662 | T1 = (T1 >> PARAM1) & 1; |
79aceca5 FB |
663 | RETURN(); |
664 | } | |
665 | ||
36081602 | 666 | void OPPROTO op_setcrfbit (void) |
79aceca5 | 667 | { |
2f401176 | 668 | T1 = (T1 & (uint32_t)PARAM1) | (T0 << PARAM2); |
79aceca5 FB |
669 | RETURN(); |
670 | } | |
671 | ||
672 | /* Branch */ | |
36081602 | 673 | #define EIP env->nip |
9a64fbe4 | 674 | |
36081602 | 675 | void OPPROTO op_setlr (void) |
e98a6e40 | 676 | { |
36081602 | 677 | env->lr = (uint32_t)PARAM1; |
76a66253 | 678 | RETURN(); |
e98a6e40 FB |
679 | } |
680 | ||
d9bce9d9 JM |
681 | #if defined (TARGET_PPC64) |
682 | void OPPROTO op_setlr_64 (void) | |
683 | { | |
36081602 | 684 | env->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
685 | RETURN(); |
686 | } | |
687 | #endif | |
688 | ||
36081602 | 689 | void OPPROTO op_goto_tb0 (void) |
e98a6e40 | 690 | { |
c53be334 FB |
691 | GOTO_TB(op_goto_tb0, PARAM1, 0); |
692 | } | |
693 | ||
36081602 | 694 | void OPPROTO op_goto_tb1 (void) |
c53be334 FB |
695 | { |
696 | GOTO_TB(op_goto_tb1, PARAM1, 1); | |
e98a6e40 FB |
697 | } |
698 | ||
d9bce9d9 | 699 | void OPPROTO op_b_T1 (void) |
e98a6e40 | 700 | { |
36081602 | 701 | env->nip = (uint32_t)(T1 & ~3); |
76a66253 | 702 | RETURN(); |
e98a6e40 FB |
703 | } |
704 | ||
d9bce9d9 JM |
705 | #if defined (TARGET_PPC64) |
706 | void OPPROTO op_b_T1_64 (void) | |
707 | { | |
36081602 | 708 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 JM |
709 | RETURN(); |
710 | } | |
711 | #endif | |
712 | ||
36081602 | 713 | void OPPROTO op_jz_T0 (void) |
e98a6e40 | 714 | { |
c53be334 FB |
715 | if (!T0) |
716 | GOTO_LABEL_PARAM(1); | |
e98a6e40 FB |
717 | RETURN(); |
718 | } | |
719 | ||
d9bce9d9 | 720 | void OPPROTO op_btest_T1 (void) |
e98a6e40 FB |
721 | { |
722 | if (T0) { | |
36081602 | 723 | env->nip = (uint32_t)(T1 & ~3); |
e98a6e40 | 724 | } else { |
36081602 | 725 | env->nip = (uint32_t)PARAM1; |
e98a6e40 FB |
726 | } |
727 | RETURN(); | |
728 | } | |
729 | ||
d9bce9d9 JM |
730 | #if defined (TARGET_PPC64) |
731 | void OPPROTO op_btest_T1_64 (void) | |
732 | { | |
733 | if (T0) { | |
36081602 | 734 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 | 735 | } else { |
36081602 | 736 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
737 | } |
738 | RETURN(); | |
739 | } | |
740 | #endif | |
741 | ||
36081602 | 742 | void OPPROTO op_movl_T1_ctr (void) |
e98a6e40 | 743 | { |
36081602 | 744 | T1 = env->ctr; |
76a66253 | 745 | RETURN(); |
e98a6e40 FB |
746 | } |
747 | ||
36081602 | 748 | void OPPROTO op_movl_T1_lr (void) |
e98a6e40 | 749 | { |
36081602 | 750 | T1 = env->lr; |
76a66253 | 751 | RETURN(); |
e98a6e40 FB |
752 | } |
753 | ||
754 | /* tests with result in T0 */ | |
d9bce9d9 JM |
755 | void OPPROTO op_test_ctr (void) |
756 | { | |
36081602 | 757 | T0 = (uint32_t)env->ctr; |
d9bce9d9 JM |
758 | RETURN(); |
759 | } | |
e98a6e40 | 760 | |
d9bce9d9 JM |
761 | #if defined(TARGET_PPC64) |
762 | void OPPROTO op_test_ctr_64 (void) | |
e98a6e40 | 763 | { |
36081602 | 764 | T0 = (uint64_t)env->ctr; |
d9bce9d9 JM |
765 | RETURN(); |
766 | } | |
767 | #endif | |
768 | ||
769 | void OPPROTO op_test_ctr_true (void) | |
770 | { | |
36081602 | 771 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 772 | RETURN(); |
e98a6e40 FB |
773 | } |
774 | ||
d9bce9d9 JM |
775 | #if defined(TARGET_PPC64) |
776 | void OPPROTO op_test_ctr_true_64 (void) | |
e98a6e40 | 777 | { |
36081602 | 778 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 779 | RETURN(); |
e98a6e40 | 780 | } |
d9bce9d9 | 781 | #endif |
e98a6e40 | 782 | |
d9bce9d9 | 783 | void OPPROTO op_test_ctr_false (void) |
e98a6e40 | 784 | { |
36081602 | 785 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 786 | RETURN(); |
e98a6e40 FB |
787 | } |
788 | ||
d9bce9d9 JM |
789 | #if defined(TARGET_PPC64) |
790 | void OPPROTO op_test_ctr_false_64 (void) | |
e98a6e40 | 791 | { |
36081602 | 792 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 793 | RETURN(); |
e98a6e40 | 794 | } |
d9bce9d9 JM |
795 | #endif |
796 | ||
797 | void OPPROTO op_test_ctrz (void) | |
798 | { | |
36081602 | 799 | T0 = ((uint32_t)env->ctr == 0); |
d9bce9d9 JM |
800 | RETURN(); |
801 | } | |
802 | ||
803 | #if defined(TARGET_PPC64) | |
804 | void OPPROTO op_test_ctrz_64 (void) | |
805 | { | |
36081602 | 806 | T0 = ((uint64_t)env->ctr == 0); |
d9bce9d9 JM |
807 | RETURN(); |
808 | } | |
809 | #endif | |
810 | ||
811 | void OPPROTO op_test_ctrz_true (void) | |
812 | { | |
36081602 | 813 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
814 | RETURN(); |
815 | } | |
816 | ||
817 | #if defined(TARGET_PPC64) | |
818 | void OPPROTO op_test_ctrz_true_64 (void) | |
819 | { | |
36081602 | 820 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
821 | RETURN(); |
822 | } | |
823 | #endif | |
e98a6e40 | 824 | |
d9bce9d9 | 825 | void OPPROTO op_test_ctrz_false (void) |
e98a6e40 | 826 | { |
36081602 | 827 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 828 | RETURN(); |
e98a6e40 FB |
829 | } |
830 | ||
d9bce9d9 JM |
831 | #if defined(TARGET_PPC64) |
832 | void OPPROTO op_test_ctrz_false_64 (void) | |
e98a6e40 | 833 | { |
36081602 | 834 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 835 | RETURN(); |
e98a6e40 | 836 | } |
d9bce9d9 | 837 | #endif |
e98a6e40 | 838 | |
36081602 | 839 | void OPPROTO op_test_true (void) |
e98a6e40 | 840 | { |
36081602 | 841 | T0 = (T0 & PARAM1); |
76a66253 | 842 | RETURN(); |
e98a6e40 FB |
843 | } |
844 | ||
36081602 | 845 | void OPPROTO op_test_false (void) |
e98a6e40 | 846 | { |
36081602 | 847 | T0 = ((T0 & PARAM1) == 0); |
76a66253 | 848 | RETURN(); |
e98a6e40 | 849 | } |
79aceca5 FB |
850 | |
851 | /* CTR maintenance */ | |
36081602 | 852 | void OPPROTO op_dec_ctr (void) |
79aceca5 | 853 | { |
36081602 | 854 | env->ctr--; |
79aceca5 FB |
855 | RETURN(); |
856 | } | |
857 | ||
858 | /*** Integer arithmetic ***/ | |
859 | /* add */ | |
36081602 | 860 | void OPPROTO op_add (void) |
79aceca5 FB |
861 | { |
862 | T0 += T1; | |
863 | RETURN(); | |
864 | } | |
865 | ||
d9bce9d9 | 866 | void OPPROTO op_check_addo (void) |
79aceca5 | 867 | { |
d9bce9d9 JM |
868 | if (likely(!(((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & |
869 | ((uint32_t)T2 ^ (uint32_t)T0) & (1UL << 31)))) { | |
870 | xer_ov = 0; | |
871 | } else { | |
d9bce9d9 | 872 | xer_ov = 1; |
966439a6 | 873 | xer_so = 1; |
d9bce9d9 | 874 | } |
e864cabd | 875 | RETURN(); |
79aceca5 FB |
876 | } |
877 | ||
d9bce9d9 JM |
878 | #if defined(TARGET_PPC64) |
879 | void OPPROTO op_check_addo_64 (void) | |
79aceca5 | 880 | { |
d9bce9d9 | 881 | if (likely(!(((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) & |
1698b741 | 882 | ((uint64_t)T2 ^ (uint64_t)T0) & (1ULL << 63)))) { |
d9bce9d9 | 883 | xer_ov = 0; |
79aceca5 | 884 | } else { |
d9bce9d9 | 885 | xer_ov = 1; |
966439a6 | 886 | xer_so = 1; |
d9bce9d9 | 887 | } |
e864cabd | 888 | RETURN(); |
d9bce9d9 JM |
889 | } |
890 | #endif | |
891 | ||
892 | /* add carrying */ | |
893 | void OPPROTO op_check_addc (void) | |
894 | { | |
895 | if (likely((uint32_t)T0 >= (uint32_t)T2)) { | |
79aceca5 | 896 | xer_ca = 0; |
d9bce9d9 JM |
897 | } else { |
898 | xer_ca = 1; | |
79aceca5 FB |
899 | } |
900 | RETURN(); | |
901 | } | |
902 | ||
d9bce9d9 JM |
903 | #if defined(TARGET_PPC64) |
904 | void OPPROTO op_check_addc_64 (void) | |
79aceca5 | 905 | { |
d9bce9d9 JM |
906 | if (likely((uint64_t)T0 >= (uint64_t)T2)) { |
907 | xer_ca = 0; | |
908 | } else { | |
909 | xer_ca = 1; | |
910 | } | |
79aceca5 FB |
911 | RETURN(); |
912 | } | |
d9bce9d9 | 913 | #endif |
79aceca5 FB |
914 | |
915 | /* add extended */ | |
76a66253 | 916 | void OPPROTO op_adde (void) |
79aceca5 | 917 | { |
fdabc366 | 918 | do_adde(); |
76a66253 | 919 | RETURN(); |
79aceca5 FB |
920 | } |
921 | ||
d9bce9d9 JM |
922 | #if defined(TARGET_PPC64) |
923 | void OPPROTO op_adde_64 (void) | |
79aceca5 | 924 | { |
d9bce9d9 | 925 | do_adde_64(); |
79aceca5 FB |
926 | RETURN(); |
927 | } | |
d9bce9d9 | 928 | #endif |
79aceca5 FB |
929 | |
930 | /* add immediate */ | |
36081602 | 931 | void OPPROTO op_addi (void) |
79aceca5 | 932 | { |
36081602 | 933 | T0 += (int32_t)PARAM1; |
79aceca5 FB |
934 | RETURN(); |
935 | } | |
936 | ||
d9bce9d9 JM |
937 | /* add to minus one extended */ |
938 | void OPPROTO op_add_me (void) | |
79aceca5 | 939 | { |
d9bce9d9 JM |
940 | T0 += xer_ca + (-1); |
941 | if (likely((uint32_t)T1 != 0)) | |
79aceca5 | 942 | xer_ca = 1; |
79aceca5 FB |
943 | RETURN(); |
944 | } | |
945 | ||
d9bce9d9 JM |
946 | #if defined(TARGET_PPC64) |
947 | void OPPROTO op_add_me_64 (void) | |
79aceca5 | 948 | { |
79aceca5 | 949 | T0 += xer_ca + (-1); |
d9bce9d9 | 950 | if (likely((uint64_t)T1 != 0)) |
79aceca5 FB |
951 | xer_ca = 1; |
952 | RETURN(); | |
953 | } | |
d9bce9d9 | 954 | #endif |
79aceca5 | 955 | |
76a66253 | 956 | void OPPROTO op_addmeo (void) |
79aceca5 | 957 | { |
fdabc366 | 958 | do_addmeo(); |
79aceca5 FB |
959 | RETURN(); |
960 | } | |
961 | ||
d9bce9d9 JM |
962 | void OPPROTO op_addmeo_64 (void) |
963 | { | |
964 | do_addmeo(); | |
965 | RETURN(); | |
966 | } | |
967 | ||
79aceca5 | 968 | /* add to zero extended */ |
d9bce9d9 | 969 | void OPPROTO op_add_ze (void) |
79aceca5 | 970 | { |
79aceca5 | 971 | T0 += xer_ca; |
79aceca5 FB |
972 | RETURN(); |
973 | } | |
974 | ||
d9bce9d9 JM |
975 | /* divide word */ |
976 | void OPPROTO op_divw (void) | |
79aceca5 | 977 | { |
d9bce9d9 JM |
978 | if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
979 | (int32_t)T1 == 0)) { | |
980 | T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31)); | |
981 | } else { | |
982 | T0 = (int32_t)T0 / (int32_t)T1; | |
983 | } | |
79aceca5 FB |
984 | RETURN(); |
985 | } | |
986 | ||
d9bce9d9 JM |
987 | #if defined(TARGET_PPC64) |
988 | void OPPROTO op_divd (void) | |
79aceca5 | 989 | { |
d9bce9d9 JM |
990 | if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) || |
991 | (int64_t)T1 == 0)) { | |
992 | T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63)); | |
79aceca5 | 993 | } else { |
d9bce9d9 | 994 | T0 = (int64_t)T0 / (int64_t)T1; |
79aceca5 FB |
995 | } |
996 | RETURN(); | |
997 | } | |
d9bce9d9 | 998 | #endif |
79aceca5 | 999 | |
76a66253 | 1000 | void OPPROTO op_divwo (void) |
79aceca5 | 1001 | { |
fdabc366 | 1002 | do_divwo(); |
79aceca5 FB |
1003 | RETURN(); |
1004 | } | |
1005 | ||
d9bce9d9 JM |
1006 | #if defined(TARGET_PPC64) |
1007 | void OPPROTO op_divdo (void) | |
1008 | { | |
1009 | do_divdo(); | |
1010 | RETURN(); | |
1011 | } | |
1012 | #endif | |
1013 | ||
79aceca5 | 1014 | /* divide word unsigned */ |
d9bce9d9 JM |
1015 | void OPPROTO op_divwu (void) |
1016 | { | |
1017 | if (unlikely(T1 == 0)) { | |
1018 | T0 = 0; | |
1019 | } else { | |
1020 | T0 = (uint32_t)T0 / (uint32_t)T1; | |
1021 | } | |
1022 | RETURN(); | |
1023 | } | |
1024 | ||
1025 | #if defined(TARGET_PPC64) | |
1026 | void OPPROTO op_divdu (void) | |
79aceca5 | 1027 | { |
d9bce9d9 | 1028 | if (unlikely(T1 == 0)) { |
79aceca5 FB |
1029 | T0 = 0; |
1030 | } else { | |
1031 | T0 /= T1; | |
1032 | } | |
1033 | RETURN(); | |
1034 | } | |
d9bce9d9 | 1035 | #endif |
79aceca5 | 1036 | |
76a66253 | 1037 | void OPPROTO op_divwuo (void) |
79aceca5 | 1038 | { |
fdabc366 | 1039 | do_divwuo(); |
79aceca5 FB |
1040 | RETURN(); |
1041 | } | |
1042 | ||
d9bce9d9 JM |
1043 | #if defined(TARGET_PPC64) |
1044 | void OPPROTO op_divduo (void) | |
1045 | { | |
1046 | do_divduo(); | |
1047 | RETURN(); | |
1048 | } | |
1049 | #endif | |
1050 | ||
79aceca5 | 1051 | /* multiply high word */ |
d9bce9d9 | 1052 | void OPPROTO op_mulhw (void) |
79aceca5 | 1053 | { |
d9bce9d9 | 1054 | T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32; |
79aceca5 FB |
1055 | RETURN(); |
1056 | } | |
1057 | ||
d9bce9d9 JM |
1058 | #if defined(TARGET_PPC64) |
1059 | void OPPROTO op_mulhd (void) | |
1060 | { | |
1061 | uint64_t tl, th; | |
1062 | ||
9d901a20 | 1063 | muls64(&tl, &th, T0, T1); |
d9bce9d9 JM |
1064 | T0 = th; |
1065 | RETURN(); | |
1066 | } | |
1067 | #endif | |
1068 | ||
79aceca5 | 1069 | /* multiply high word unsigned */ |
d9bce9d9 | 1070 | void OPPROTO op_mulhwu (void) |
79aceca5 | 1071 | { |
d9bce9d9 | 1072 | T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32; |
79aceca5 FB |
1073 | RETURN(); |
1074 | } | |
1075 | ||
d9bce9d9 JM |
1076 | #if defined(TARGET_PPC64) |
1077 | void OPPROTO op_mulhdu (void) | |
1078 | { | |
1079 | uint64_t tl, th; | |
1080 | ||
9d901a20 | 1081 | mulu64(&tl, &th, T0, T1); |
d9bce9d9 JM |
1082 | T0 = th; |
1083 | RETURN(); | |
1084 | } | |
1085 | #endif | |
1086 | ||
79aceca5 | 1087 | /* multiply low immediate */ |
36081602 | 1088 | void OPPROTO op_mulli (void) |
79aceca5 | 1089 | { |
d9bce9d9 | 1090 | T0 = ((int32_t)T0 * (int32_t)PARAM1); |
79aceca5 FB |
1091 | RETURN(); |
1092 | } | |
1093 | ||
1094 | /* multiply low word */ | |
36081602 | 1095 | void OPPROTO op_mullw (void) |
d9bce9d9 JM |
1096 | { |
1097 | T0 = (int32_t)(T0 * T1); | |
1098 | RETURN(); | |
1099 | } | |
1100 | ||
1101 | #if defined(TARGET_PPC64) | |
1102 | void OPPROTO op_mulld (void) | |
79aceca5 FB |
1103 | { |
1104 | T0 *= T1; | |
1105 | RETURN(); | |
1106 | } | |
d9bce9d9 | 1107 | #endif |
79aceca5 | 1108 | |
76a66253 | 1109 | void OPPROTO op_mullwo (void) |
79aceca5 | 1110 | { |
fdabc366 | 1111 | do_mullwo(); |
79aceca5 FB |
1112 | RETURN(); |
1113 | } | |
1114 | ||
d9bce9d9 JM |
1115 | #if defined(TARGET_PPC64) |
1116 | void OPPROTO op_mulldo (void) | |
1117 | { | |
1118 | do_mulldo(); | |
1119 | RETURN(); | |
1120 | } | |
1121 | #endif | |
1122 | ||
79aceca5 | 1123 | /* negate */ |
d9bce9d9 | 1124 | void OPPROTO op_neg (void) |
79aceca5 | 1125 | { |
d9bce9d9 JM |
1126 | if (likely(T0 != INT32_MIN)) { |
1127 | T0 = -(int32_t)T0; | |
79aceca5 FB |
1128 | } |
1129 | RETURN(); | |
1130 | } | |
1131 | ||
d9bce9d9 JM |
1132 | #if defined(TARGET_PPC64) |
1133 | void OPPROTO op_neg_64 (void) | |
1134 | { | |
1135 | if (likely(T0 != INT64_MIN)) { | |
1136 | T0 = -(int64_t)T0; | |
1137 | } | |
1138 | RETURN(); | |
1139 | } | |
1140 | #endif | |
1141 | ||
76a66253 | 1142 | void OPPROTO op_nego (void) |
79aceca5 | 1143 | { |
fdabc366 | 1144 | do_nego(); |
79aceca5 FB |
1145 | RETURN(); |
1146 | } | |
1147 | ||
d9bce9d9 JM |
1148 | #if defined(TARGET_PPC64) |
1149 | void OPPROTO op_nego_64 (void) | |
1150 | { | |
1151 | do_nego_64(); | |
1152 | RETURN(); | |
1153 | } | |
1154 | #endif | |
1155 | ||
0cfec834 | 1156 | /* subtract from */ |
36081602 | 1157 | void OPPROTO op_subf (void) |
79aceca5 FB |
1158 | { |
1159 | T0 = T1 - T0; | |
1160 | RETURN(); | |
1161 | } | |
1162 | ||
d9bce9d9 JM |
1163 | void OPPROTO op_check_subfo (void) |
1164 | { | |
1165 | if (likely(!(((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) & | |
1166 | ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)))) { | |
1167 | xer_ov = 0; | |
1168 | } else { | |
d9bce9d9 | 1169 | xer_ov = 1; |
966439a6 | 1170 | xer_so = 1; |
d9bce9d9 JM |
1171 | } |
1172 | RETURN(); | |
1173 | } | |
1174 | ||
1175 | #if defined(TARGET_PPC64) | |
1176 | void OPPROTO op_check_subfo_64 (void) | |
79aceca5 | 1177 | { |
d9bce9d9 JM |
1178 | if (likely(!(((uint64_t)(~T2) ^ (uint64_t)T1 ^ UINT64_MAX) & |
1179 | ((uint64_t)(~T2) ^ (uint64_t)T0) & (1ULL << 63)))) { | |
1180 | xer_ov = 0; | |
1181 | } else { | |
d9bce9d9 | 1182 | xer_ov = 1; |
966439a6 | 1183 | xer_so = 1; |
d9bce9d9 | 1184 | } |
79aceca5 FB |
1185 | RETURN(); |
1186 | } | |
d9bce9d9 | 1187 | #endif |
79aceca5 | 1188 | |
0cfec834 | 1189 | /* subtract from carrying */ |
d9bce9d9 | 1190 | void OPPROTO op_check_subfc (void) |
79aceca5 | 1191 | { |
d9bce9d9 | 1192 | if (likely((uint32_t)T0 > (uint32_t)T1)) { |
79aceca5 | 1193 | xer_ca = 0; |
d9bce9d9 JM |
1194 | } else { |
1195 | xer_ca = 1; | |
79aceca5 FB |
1196 | } |
1197 | RETURN(); | |
1198 | } | |
1199 | ||
d9bce9d9 JM |
1200 | #if defined(TARGET_PPC64) |
1201 | void OPPROTO op_check_subfc_64 (void) | |
79aceca5 | 1202 | { |
d9bce9d9 JM |
1203 | if (likely((uint64_t)T0 > (uint64_t)T1)) { |
1204 | xer_ca = 0; | |
1205 | } else { | |
1206 | xer_ca = 1; | |
1207 | } | |
79aceca5 FB |
1208 | RETURN(); |
1209 | } | |
d9bce9d9 | 1210 | #endif |
79aceca5 | 1211 | |
0cfec834 | 1212 | /* subtract from extended */ |
76a66253 | 1213 | void OPPROTO op_subfe (void) |
79aceca5 | 1214 | { |
fdabc366 | 1215 | do_subfe(); |
79aceca5 FB |
1216 | RETURN(); |
1217 | } | |
1218 | ||
d9bce9d9 JM |
1219 | #if defined(TARGET_PPC64) |
1220 | void OPPROTO op_subfe_64 (void) | |
79aceca5 | 1221 | { |
d9bce9d9 | 1222 | do_subfe_64(); |
79aceca5 FB |
1223 | RETURN(); |
1224 | } | |
d9bce9d9 | 1225 | #endif |
79aceca5 | 1226 | |
0cfec834 | 1227 | /* subtract from immediate carrying */ |
d9bce9d9 | 1228 | void OPPROTO op_subfic (void) |
79aceca5 | 1229 | { |
b6e27ab8 | 1230 | T0 = (int32_t)PARAM1 + ~T0 + 1; |
d9bce9d9 | 1231 | if ((uint32_t)T0 <= (uint32_t)PARAM1) { |
79aceca5 FB |
1232 | xer_ca = 1; |
1233 | } else { | |
1234 | xer_ca = 0; | |
1235 | } | |
1236 | RETURN(); | |
1237 | } | |
1238 | ||
d9bce9d9 JM |
1239 | #if defined(TARGET_PPC64) |
1240 | void OPPROTO op_subfic_64 (void) | |
1241 | { | |
2f401176 | 1242 | T0 = (int64_t)PARAM1 + ~T0 + 1; |
d9bce9d9 JM |
1243 | if ((uint64_t)T0 <= (uint64_t)PARAM1) { |
1244 | xer_ca = 1; | |
1245 | } else { | |
1246 | xer_ca = 0; | |
1247 | } | |
1248 | RETURN(); | |
1249 | } | |
1250 | #endif | |
1251 | ||
0cfec834 | 1252 | /* subtract from minus one extended */ |
d9bce9d9 | 1253 | void OPPROTO op_subfme (void) |
79aceca5 FB |
1254 | { |
1255 | T0 = ~T0 + xer_ca - 1; | |
d9bce9d9 JM |
1256 | if (likely((uint32_t)T0 != (uint32_t)-1)) |
1257 | xer_ca = 1; | |
1258 | RETURN(); | |
1259 | } | |
79aceca5 | 1260 | |
d9bce9d9 JM |
1261 | #if defined(TARGET_PPC64) |
1262 | void OPPROTO op_subfme_64 (void) | |
1263 | { | |
1264 | T0 = ~T0 + xer_ca - 1; | |
1265 | if (likely((uint64_t)T0 != (uint64_t)-1)) | |
79aceca5 FB |
1266 | xer_ca = 1; |
1267 | RETURN(); | |
1268 | } | |
d9bce9d9 | 1269 | #endif |
79aceca5 | 1270 | |
76a66253 | 1271 | void OPPROTO op_subfmeo (void) |
79aceca5 | 1272 | { |
fdabc366 | 1273 | do_subfmeo(); |
79aceca5 FB |
1274 | RETURN(); |
1275 | } | |
1276 | ||
d9bce9d9 JM |
1277 | #if defined(TARGET_PPC64) |
1278 | void OPPROTO op_subfmeo_64 (void) | |
1279 | { | |
1280 | do_subfmeo_64(); | |
1281 | RETURN(); | |
1282 | } | |
1283 | #endif | |
1284 | ||
0cfec834 | 1285 | /* subtract from zero extended */ |
d9bce9d9 | 1286 | void OPPROTO op_subfze (void) |
79aceca5 FB |
1287 | { |
1288 | T1 = ~T0; | |
1289 | T0 = T1 + xer_ca; | |
d9bce9d9 | 1290 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 FB |
1291 | xer_ca = 1; |
1292 | } else { | |
1293 | xer_ca = 0; | |
1294 | } | |
1295 | RETURN(); | |
1296 | } | |
1297 | ||
d9bce9d9 JM |
1298 | #if defined(TARGET_PPC64) |
1299 | void OPPROTO op_subfze_64 (void) | |
1300 | { | |
1301 | T1 = ~T0; | |
1302 | T0 = T1 + xer_ca; | |
1303 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1304 | xer_ca = 1; | |
1305 | } else { | |
1306 | xer_ca = 0; | |
1307 | } | |
1308 | RETURN(); | |
1309 | } | |
1310 | #endif | |
1311 | ||
76a66253 | 1312 | void OPPROTO op_subfzeo (void) |
79aceca5 | 1313 | { |
fdabc366 | 1314 | do_subfzeo(); |
79aceca5 FB |
1315 | RETURN(); |
1316 | } | |
1317 | ||
d9bce9d9 JM |
1318 | #if defined(TARGET_PPC64) |
1319 | void OPPROTO op_subfzeo_64 (void) | |
1320 | { | |
1321 | do_subfzeo_64(); | |
1322 | RETURN(); | |
1323 | } | |
1324 | #endif | |
1325 | ||
79aceca5 FB |
1326 | /*** Integer comparison ***/ |
1327 | /* compare */ | |
d9bce9d9 JM |
1328 | void OPPROTO op_cmp (void) |
1329 | { | |
1330 | if ((int32_t)T0 < (int32_t)T1) { | |
1331 | T0 = 0x08; | |
1332 | } else if ((int32_t)T0 > (int32_t)T1) { | |
1333 | T0 = 0x04; | |
1334 | } else { | |
1335 | T0 = 0x02; | |
1336 | } | |
966439a6 | 1337 | T0 |= xer_so; |
d9bce9d9 JM |
1338 | RETURN(); |
1339 | } | |
1340 | ||
1341 | #if defined(TARGET_PPC64) | |
1342 | void OPPROTO op_cmp_64 (void) | |
79aceca5 | 1343 | { |
d9bce9d9 | 1344 | if ((int64_t)T0 < (int64_t)T1) { |
79aceca5 | 1345 | T0 = 0x08; |
d9bce9d9 | 1346 | } else if ((int64_t)T0 > (int64_t)T1) { |
79aceca5 FB |
1347 | T0 = 0x04; |
1348 | } else { | |
1349 | T0 = 0x02; | |
1350 | } | |
966439a6 | 1351 | T0 |= xer_so; |
79aceca5 FB |
1352 | RETURN(); |
1353 | } | |
d9bce9d9 | 1354 | #endif |
79aceca5 FB |
1355 | |
1356 | /* compare immediate */ | |
d9bce9d9 | 1357 | void OPPROTO op_cmpi (void) |
79aceca5 | 1358 | { |
d9bce9d9 | 1359 | if ((int32_t)T0 < (int32_t)PARAM1) { |
79aceca5 | 1360 | T0 = 0x08; |
d9bce9d9 | 1361 | } else if ((int32_t)T0 > (int32_t)PARAM1) { |
79aceca5 FB |
1362 | T0 = 0x04; |
1363 | } else { | |
1364 | T0 = 0x02; | |
1365 | } | |
966439a6 | 1366 | T0 |= xer_so; |
79aceca5 FB |
1367 | RETURN(); |
1368 | } | |
1369 | ||
d9bce9d9 JM |
1370 | #if defined(TARGET_PPC64) |
1371 | void OPPROTO op_cmpi_64 (void) | |
1372 | { | |
1373 | if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) { | |
1374 | T0 = 0x08; | |
1375 | } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) { | |
1376 | T0 = 0x04; | |
1377 | } else { | |
1378 | T0 = 0x02; | |
1379 | } | |
966439a6 | 1380 | T0 |= xer_so; |
d9bce9d9 JM |
1381 | RETURN(); |
1382 | } | |
1383 | #endif | |
1384 | ||
79aceca5 | 1385 | /* compare logical */ |
d9bce9d9 | 1386 | void OPPROTO op_cmpl (void) |
79aceca5 | 1387 | { |
d9bce9d9 | 1388 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 | 1389 | T0 = 0x08; |
d9bce9d9 | 1390 | } else if ((uint32_t)T0 > (uint32_t)T1) { |
79aceca5 FB |
1391 | T0 = 0x04; |
1392 | } else { | |
1393 | T0 = 0x02; | |
1394 | } | |
966439a6 | 1395 | T0 |= xer_so; |
79aceca5 FB |
1396 | RETURN(); |
1397 | } | |
1398 | ||
d9bce9d9 JM |
1399 | #if defined(TARGET_PPC64) |
1400 | void OPPROTO op_cmpl_64 (void) | |
1401 | { | |
1402 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1403 | T0 = 0x08; | |
1404 | } else if ((uint64_t)T0 > (uint64_t)T1) { | |
1405 | T0 = 0x04; | |
1406 | } else { | |
1407 | T0 = 0x02; | |
1408 | } | |
966439a6 | 1409 | T0 |= xer_so; |
d9bce9d9 JM |
1410 | RETURN(); |
1411 | } | |
1412 | #endif | |
1413 | ||
79aceca5 | 1414 | /* compare logical immediate */ |
d9bce9d9 JM |
1415 | void OPPROTO op_cmpli (void) |
1416 | { | |
1417 | if ((uint32_t)T0 < (uint32_t)PARAM1) { | |
1418 | T0 = 0x08; | |
1419 | } else if ((uint32_t)T0 > (uint32_t)PARAM1) { | |
1420 | T0 = 0x04; | |
1421 | } else { | |
1422 | T0 = 0x02; | |
1423 | } | |
966439a6 | 1424 | T0 |= xer_so; |
d9bce9d9 JM |
1425 | RETURN(); |
1426 | } | |
1427 | ||
1428 | #if defined(TARGET_PPC64) | |
1429 | void OPPROTO op_cmpli_64 (void) | |
79aceca5 | 1430 | { |
d9bce9d9 | 1431 | if ((uint64_t)T0 < (uint64_t)PARAM1) { |
79aceca5 | 1432 | T0 = 0x08; |
d9bce9d9 | 1433 | } else if ((uint64_t)T0 > (uint64_t)PARAM1) { |
79aceca5 FB |
1434 | T0 = 0x04; |
1435 | } else { | |
1436 | T0 = 0x02; | |
1437 | } | |
966439a6 | 1438 | T0 |= xer_so; |
79aceca5 FB |
1439 | RETURN(); |
1440 | } | |
d9bce9d9 JM |
1441 | #endif |
1442 | ||
1443 | void OPPROTO op_isel (void) | |
1444 | { | |
1445 | if (T0) | |
1446 | T0 = T1; | |
1447 | else | |
1448 | T0 = T2; | |
1449 | RETURN(); | |
1450 | } | |
1451 | ||
1452 | void OPPROTO op_popcntb (void) | |
1453 | { | |
1454 | do_popcntb(); | |
1455 | RETURN(); | |
1456 | } | |
1457 | ||
1458 | #if defined(TARGET_PPC64) | |
1459 | void OPPROTO op_popcntb_64 (void) | |
1460 | { | |
1461 | do_popcntb_64(); | |
1462 | RETURN(); | |
1463 | } | |
1464 | #endif | |
79aceca5 FB |
1465 | |
1466 | /*** Integer logical ***/ | |
1467 | /* and */ | |
36081602 | 1468 | void OPPROTO op_and (void) |
79aceca5 FB |
1469 | { |
1470 | T0 &= T1; | |
1471 | RETURN(); | |
1472 | } | |
1473 | ||
1474 | /* andc */ | |
36081602 | 1475 | void OPPROTO op_andc (void) |
79aceca5 FB |
1476 | { |
1477 | T0 &= ~T1; | |
1478 | RETURN(); | |
1479 | } | |
1480 | ||
1481 | /* andi. */ | |
76a66253 | 1482 | void OPPROTO op_andi_T0 (void) |
79aceca5 | 1483 | { |
2f401176 | 1484 | T0 &= (uint32_t)PARAM1; |
79aceca5 FB |
1485 | RETURN(); |
1486 | } | |
1487 | ||
76a66253 JM |
1488 | void OPPROTO op_andi_T1 (void) |
1489 | { | |
2f401176 | 1490 | T1 &= (uint32_t)PARAM1; |
76a66253 JM |
1491 | RETURN(); |
1492 | } | |
1493 | ||
40d0591e JM |
1494 | #if defined(TARGET_PPC64) |
1495 | void OPPROTO op_andi_T0_64 (void) | |
1496 | { | |
2f401176 | 1497 | T0 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1498 | RETURN(); |
1499 | } | |
1500 | ||
1501 | void OPPROTO op_andi_T1_64 (void) | |
1502 | { | |
2f401176 | 1503 | T1 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1504 | RETURN(); |
1505 | } | |
1506 | #endif | |
1507 | ||
79aceca5 | 1508 | /* count leading zero */ |
76a66253 | 1509 | void OPPROTO op_cntlzw (void) |
79aceca5 | 1510 | { |
0487d6a8 | 1511 | T0 = _do_cntlzw(T0); |
79aceca5 FB |
1512 | RETURN(); |
1513 | } | |
1514 | ||
d9bce9d9 JM |
1515 | #if defined(TARGET_PPC64) |
1516 | void OPPROTO op_cntlzd (void) | |
1517 | { | |
0487d6a8 | 1518 | T0 = _do_cntlzd(T0); |
d9bce9d9 JM |
1519 | RETURN(); |
1520 | } | |
1521 | #endif | |
1522 | ||
79aceca5 | 1523 | /* eqv */ |
36081602 | 1524 | void OPPROTO op_eqv (void) |
79aceca5 FB |
1525 | { |
1526 | T0 = ~(T0 ^ T1); | |
1527 | RETURN(); | |
1528 | } | |
1529 | ||
1530 | /* extend sign byte */ | |
d9bce9d9 | 1531 | void OPPROTO op_extsb (void) |
79aceca5 | 1532 | { |
d9bce9d9 JM |
1533 | #if defined (TARGET_PPC64) |
1534 | T0 = (int64_t)((int8_t)T0); | |
1535 | #else | |
1536 | T0 = (int32_t)((int8_t)T0); | |
1537 | #endif | |
79aceca5 FB |
1538 | RETURN(); |
1539 | } | |
1540 | ||
1541 | /* extend sign half word */ | |
d9bce9d9 | 1542 | void OPPROTO op_extsh (void) |
79aceca5 | 1543 | { |
d9bce9d9 JM |
1544 | #if defined (TARGET_PPC64) |
1545 | T0 = (int64_t)((int16_t)T0); | |
1546 | #else | |
1547 | T0 = (int32_t)((int16_t)T0); | |
1548 | #endif | |
79aceca5 FB |
1549 | RETURN(); |
1550 | } | |
1551 | ||
d9bce9d9 JM |
1552 | #if defined (TARGET_PPC64) |
1553 | void OPPROTO op_extsw (void) | |
1554 | { | |
1555 | T0 = (int64_t)((int32_t)T0); | |
1556 | RETURN(); | |
1557 | } | |
1558 | #endif | |
1559 | ||
79aceca5 | 1560 | /* nand */ |
36081602 | 1561 | void OPPROTO op_nand (void) |
79aceca5 FB |
1562 | { |
1563 | T0 = ~(T0 & T1); | |
1564 | RETURN(); | |
1565 | } | |
1566 | ||
1567 | /* nor */ | |
36081602 | 1568 | void OPPROTO op_nor (void) |
79aceca5 FB |
1569 | { |
1570 | T0 = ~(T0 | T1); | |
1571 | RETURN(); | |
1572 | } | |
1573 | ||
1574 | /* or */ | |
36081602 | 1575 | void OPPROTO op_or (void) |
79aceca5 FB |
1576 | { |
1577 | T0 |= T1; | |
1578 | RETURN(); | |
1579 | } | |
1580 | ||
1581 | /* orc */ | |
36081602 | 1582 | void OPPROTO op_orc (void) |
79aceca5 FB |
1583 | { |
1584 | T0 |= ~T1; | |
1585 | RETURN(); | |
1586 | } | |
1587 | ||
1588 | /* ori */ | |
36081602 | 1589 | void OPPROTO op_ori (void) |
79aceca5 | 1590 | { |
2f401176 | 1591 | T0 |= (uint32_t)PARAM1; |
79aceca5 FB |
1592 | RETURN(); |
1593 | } | |
1594 | ||
1595 | /* xor */ | |
36081602 | 1596 | void OPPROTO op_xor (void) |
79aceca5 FB |
1597 | { |
1598 | T0 ^= T1; | |
1599 | RETURN(); | |
1600 | } | |
1601 | ||
1602 | /* xori */ | |
36081602 | 1603 | void OPPROTO op_xori (void) |
79aceca5 | 1604 | { |
2f401176 | 1605 | T0 ^= (uint32_t)PARAM1; |
79aceca5 FB |
1606 | RETURN(); |
1607 | } | |
1608 | ||
1609 | /*** Integer rotate ***/ | |
76a66253 | 1610 | void OPPROTO op_rotl32_T0_T1 (void) |
79aceca5 | 1611 | { |
76a66253 | 1612 | T0 = rotl32(T0, T1 & 0x1F); |
79aceca5 FB |
1613 | RETURN(); |
1614 | } | |
1615 | ||
76a66253 | 1616 | void OPPROTO op_rotli32_T0 (void) |
79aceca5 | 1617 | { |
76a66253 | 1618 | T0 = rotl32(T0, PARAM1); |
79aceca5 FB |
1619 | RETURN(); |
1620 | } | |
1621 | ||
51789c41 JM |
1622 | #if defined(TARGET_PPC64) |
1623 | void OPPROTO op_rotl64_T0_T1 (void) | |
1624 | { | |
1625 | T0 = rotl64(T0, T1 & 0x3F); | |
1626 | RETURN(); | |
1627 | } | |
1628 | ||
1629 | void OPPROTO op_rotli64_T0 (void) | |
1630 | { | |
1631 | T0 = rotl64(T0, PARAM1); | |
1632 | RETURN(); | |
1633 | } | |
1634 | #endif | |
1635 | ||
79aceca5 FB |
1636 | /*** Integer shift ***/ |
1637 | /* shift left word */ | |
d9bce9d9 | 1638 | void OPPROTO op_slw (void) |
79aceca5 FB |
1639 | { |
1640 | if (T1 & 0x20) { | |
1641 | T0 = 0; | |
d9bce9d9 JM |
1642 | } else { |
1643 | T0 = (uint32_t)(T0 << T1); | |
1644 | } | |
1645 | RETURN(); | |
1646 | } | |
1647 | ||
1648 | #if defined(TARGET_PPC64) | |
1649 | void OPPROTO op_sld (void) | |
1650 | { | |
1651 | if (T1 & 0x40) { | |
1652 | T0 = 0; | |
79aceca5 FB |
1653 | } else { |
1654 | T0 = T0 << T1; | |
1655 | } | |
1656 | RETURN(); | |
1657 | } | |
d9bce9d9 | 1658 | #endif |
79aceca5 FB |
1659 | |
1660 | /* shift right algebraic word */ | |
76a66253 | 1661 | void OPPROTO op_sraw (void) |
79aceca5 | 1662 | { |
9a64fbe4 | 1663 | do_sraw(); |
79aceca5 FB |
1664 | RETURN(); |
1665 | } | |
1666 | ||
d9bce9d9 JM |
1667 | #if defined(TARGET_PPC64) |
1668 | void OPPROTO op_srad (void) | |
1669 | { | |
1670 | do_srad(); | |
1671 | RETURN(); | |
1672 | } | |
1673 | #endif | |
1674 | ||
79aceca5 | 1675 | /* shift right algebraic word immediate */ |
d9bce9d9 | 1676 | void OPPROTO op_srawi (void) |
79aceca5 | 1677 | { |
d9bce9d9 JM |
1678 | uint32_t mask = (uint32_t)PARAM2; |
1679 | ||
1680 | T0 = (int32_t)T0 >> PARAM1; | |
1681 | if ((int32_t)T1 < 0 && (T1 & mask) != 0) { | |
79aceca5 FB |
1682 | xer_ca = 1; |
1683 | } else { | |
1684 | xer_ca = 0; | |
1685 | } | |
1686 | RETURN(); | |
1687 | } | |
1688 | ||
d9bce9d9 JM |
1689 | #if defined(TARGET_PPC64) |
1690 | void OPPROTO op_sradi (void) | |
1691 | { | |
1692 | uint64_t mask = ((uint64_t)PARAM2 << 32) | (uint64_t)PARAM3; | |
1693 | ||
1694 | T0 = (int64_t)T0 >> PARAM1; | |
1695 | if ((int64_t)T1 < 0 && ((uint64_t)T1 & mask) != 0) { | |
1696 | xer_ca = 1; | |
1697 | } else { | |
1698 | xer_ca = 0; | |
1699 | } | |
1700 | RETURN(); | |
1701 | } | |
1702 | #endif | |
1703 | ||
79aceca5 | 1704 | /* shift right word */ |
d9bce9d9 | 1705 | void OPPROTO op_srw (void) |
79aceca5 FB |
1706 | { |
1707 | if (T1 & 0x20) { | |
1708 | T0 = 0; | |
1709 | } else { | |
d9bce9d9 JM |
1710 | T0 = (uint32_t)T0 >> T1; |
1711 | } | |
1712 | RETURN(); | |
1713 | } | |
1714 | ||
1715 | #if defined(TARGET_PPC64) | |
1716 | void OPPROTO op_srd (void) | |
1717 | { | |
1718 | if (T1 & 0x40) { | |
1719 | T0 = 0; | |
1720 | } else { | |
1721 | T0 = (uint64_t)T0 >> T1; | |
79aceca5 FB |
1722 | } |
1723 | RETURN(); | |
1724 | } | |
d9bce9d9 | 1725 | #endif |
79aceca5 | 1726 | |
76a66253 JM |
1727 | void OPPROTO op_sl_T0_T1 (void) |
1728 | { | |
1729 | T0 = T0 << T1; | |
1730 | RETURN(); | |
1731 | } | |
1732 | ||
1733 | void OPPROTO op_sli_T0 (void) | |
1734 | { | |
1735 | T0 = T0 << PARAM1; | |
1736 | RETURN(); | |
1737 | } | |
1738 | ||
1739 | void OPPROTO op_srl_T0_T1 (void) | |
1740 | { | |
d9bce9d9 JM |
1741 | T0 = (uint32_t)T0 >> T1; |
1742 | RETURN(); | |
1743 | } | |
1744 | ||
1745 | #if defined(TARGET_PPC64) | |
1746 | void OPPROTO op_srl_T0_T1_64 (void) | |
1747 | { | |
1748 | T0 = (uint32_t)T0 >> T1; | |
76a66253 JM |
1749 | RETURN(); |
1750 | } | |
d9bce9d9 | 1751 | #endif |
76a66253 JM |
1752 | |
1753 | void OPPROTO op_srli_T0 (void) | |
1754 | { | |
d9bce9d9 | 1755 | T0 = (uint32_t)T0 >> PARAM1; |
76a66253 JM |
1756 | RETURN(); |
1757 | } | |
1758 | ||
d9bce9d9 JM |
1759 | #if defined(TARGET_PPC64) |
1760 | void OPPROTO op_srli_T0_64 (void) | |
1761 | { | |
1762 | T0 = (uint64_t)T0 >> PARAM1; | |
1763 | RETURN(); | |
1764 | } | |
1765 | #endif | |
1766 | ||
76a66253 JM |
1767 | void OPPROTO op_srli_T1 (void) |
1768 | { | |
d9bce9d9 | 1769 | T1 = (uint32_t)T1 >> PARAM1; |
76a66253 JM |
1770 | RETURN(); |
1771 | } | |
1772 | ||
d9bce9d9 JM |
1773 | #if defined(TARGET_PPC64) |
1774 | void OPPROTO op_srli_T1_64 (void) | |
1775 | { | |
1776 | T1 = (uint64_t)T1 >> PARAM1; | |
1777 | RETURN(); | |
1778 | } | |
1779 | #endif | |
1780 | ||
79aceca5 | 1781 | /*** Floating-Point arithmetic ***/ |
9a64fbe4 | 1782 | /* fadd - fadd. */ |
36081602 | 1783 | void OPPROTO op_fadd (void) |
79aceca5 | 1784 | { |
7c58044c JM |
1785 | #if USE_PRECISE_EMULATION |
1786 | do_fadd(); | |
1787 | #else | |
76a66253 | 1788 | FT0 = float64_add(FT0, FT1, &env->fp_status); |
7c58044c | 1789 | #endif |
79aceca5 FB |
1790 | RETURN(); |
1791 | } | |
1792 | ||
9a64fbe4 | 1793 | /* fsub - fsub. */ |
36081602 | 1794 | void OPPROTO op_fsub (void) |
79aceca5 | 1795 | { |
7c58044c JM |
1796 | #if USE_PRECISE_EMULATION |
1797 | do_fsub(); | |
1798 | #else | |
76a66253 | 1799 | FT0 = float64_sub(FT0, FT1, &env->fp_status); |
7c58044c | 1800 | #endif |
79aceca5 FB |
1801 | RETURN(); |
1802 | } | |
1803 | ||
9a64fbe4 | 1804 | /* fmul - fmul. */ |
36081602 | 1805 | void OPPROTO op_fmul (void) |
79aceca5 | 1806 | { |
7c58044c JM |
1807 | #if USE_PRECISE_EMULATION |
1808 | do_fmul(); | |
1809 | #else | |
76a66253 | 1810 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
7c58044c | 1811 | #endif |
79aceca5 FB |
1812 | RETURN(); |
1813 | } | |
1814 | ||
9a64fbe4 | 1815 | /* fdiv - fdiv. */ |
36081602 | 1816 | void OPPROTO op_fdiv (void) |
79aceca5 | 1817 | { |
7c58044c JM |
1818 | #if USE_PRECISE_EMULATION |
1819 | do_fdiv(); | |
1820 | #else | |
fdabc366 | 1821 | FT0 = float64_div(FT0, FT1, &env->fp_status); |
7c58044c | 1822 | #endif |
79aceca5 FB |
1823 | RETURN(); |
1824 | } | |
28b6751f | 1825 | |
9a64fbe4 | 1826 | /* fsqrt - fsqrt. */ |
36081602 | 1827 | void OPPROTO op_fsqrt (void) |
28b6751f | 1828 | { |
9a64fbe4 FB |
1829 | do_fsqrt(); |
1830 | RETURN(); | |
28b6751f FB |
1831 | } |
1832 | ||
d7e4b87e JM |
1833 | /* fre - fre. */ |
1834 | void OPPROTO op_fre (void) | |
1835 | { | |
1836 | do_fre(); | |
1837 | RETURN(); | |
1838 | } | |
1839 | ||
9a64fbe4 | 1840 | /* fres - fres. */ |
36081602 | 1841 | void OPPROTO op_fres (void) |
28b6751f | 1842 | { |
9a64fbe4 FB |
1843 | do_fres(); |
1844 | RETURN(); | |
28b6751f FB |
1845 | } |
1846 | ||
9a64fbe4 | 1847 | /* frsqrte - frsqrte. */ |
36081602 | 1848 | void OPPROTO op_frsqrte (void) |
28b6751f | 1849 | { |
4ecc3190 | 1850 | do_frsqrte(); |
9a64fbe4 | 1851 | RETURN(); |
28b6751f FB |
1852 | } |
1853 | ||
9a64fbe4 | 1854 | /* fsel - fsel. */ |
36081602 | 1855 | void OPPROTO op_fsel (void) |
28b6751f | 1856 | { |
9a64fbe4 FB |
1857 | do_fsel(); |
1858 | RETURN(); | |
28b6751f FB |
1859 | } |
1860 | ||
9a64fbe4 FB |
1861 | /*** Floating-Point multiply-and-add ***/ |
1862 | /* fmadd - fmadd. */ | |
36081602 | 1863 | void OPPROTO op_fmadd (void) |
28b6751f | 1864 | { |
e864cabd JM |
1865 | #if USE_PRECISE_EMULATION |
1866 | do_fmadd(); | |
1867 | #else | |
76a66253 JM |
1868 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1869 | FT0 = float64_add(FT0, FT2, &env->fp_status); | |
e864cabd | 1870 | #endif |
9a64fbe4 | 1871 | RETURN(); |
28b6751f FB |
1872 | } |
1873 | ||
9a64fbe4 | 1874 | /* fmsub - fmsub. */ |
36081602 | 1875 | void OPPROTO op_fmsub (void) |
28b6751f | 1876 | { |
e864cabd JM |
1877 | #if USE_PRECISE_EMULATION |
1878 | do_fmsub(); | |
1879 | #else | |
76a66253 JM |
1880 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1881 | FT0 = float64_sub(FT0, FT2, &env->fp_status); | |
e864cabd | 1882 | #endif |
9a64fbe4 | 1883 | RETURN(); |
28b6751f FB |
1884 | } |
1885 | ||
9a64fbe4 | 1886 | /* fnmadd - fnmadd. - fnmadds - fnmadds. */ |
36081602 | 1887 | void OPPROTO op_fnmadd (void) |
28b6751f | 1888 | { |
4b3686fa | 1889 | do_fnmadd(); |
9a64fbe4 | 1890 | RETURN(); |
28b6751f FB |
1891 | } |
1892 | ||
9a64fbe4 | 1893 | /* fnmsub - fnmsub. */ |
36081602 | 1894 | void OPPROTO op_fnmsub (void) |
28b6751f | 1895 | { |
4b3686fa | 1896 | do_fnmsub(); |
9a64fbe4 | 1897 | RETURN(); |
28b6751f FB |
1898 | } |
1899 | ||
9a64fbe4 FB |
1900 | /*** Floating-Point round & convert ***/ |
1901 | /* frsp - frsp. */ | |
36081602 | 1902 | void OPPROTO op_frsp (void) |
28b6751f | 1903 | { |
7c58044c JM |
1904 | #if USE_PRECISE_EMULATION |
1905 | do_frsp(); | |
1906 | #else | |
76a66253 | 1907 | FT0 = float64_to_float32(FT0, &env->fp_status); |
7c58044c | 1908 | #endif |
9a64fbe4 | 1909 | RETURN(); |
28b6751f FB |
1910 | } |
1911 | ||
9a64fbe4 | 1912 | /* fctiw - fctiw. */ |
36081602 | 1913 | void OPPROTO op_fctiw (void) |
28b6751f | 1914 | { |
9a64fbe4 FB |
1915 | do_fctiw(); |
1916 | RETURN(); | |
28b6751f FB |
1917 | } |
1918 | ||
9a64fbe4 | 1919 | /* fctiwz - fctiwz. */ |
36081602 | 1920 | void OPPROTO op_fctiwz (void) |
28b6751f | 1921 | { |
9a64fbe4 FB |
1922 | do_fctiwz(); |
1923 | RETURN(); | |
28b6751f FB |
1924 | } |
1925 | ||
426613db JM |
1926 | #if defined(TARGET_PPC64) |
1927 | /* fcfid - fcfid. */ | |
36081602 | 1928 | void OPPROTO op_fcfid (void) |
426613db JM |
1929 | { |
1930 | do_fcfid(); | |
1931 | RETURN(); | |
1932 | } | |
1933 | ||
1934 | /* fctid - fctid. */ | |
36081602 | 1935 | void OPPROTO op_fctid (void) |
426613db JM |
1936 | { |
1937 | do_fctid(); | |
1938 | RETURN(); | |
1939 | } | |
1940 | ||
1941 | /* fctidz - fctidz. */ | |
36081602 | 1942 | void OPPROTO op_fctidz (void) |
426613db JM |
1943 | { |
1944 | do_fctidz(); | |
1945 | RETURN(); | |
1946 | } | |
1947 | #endif | |
1948 | ||
d7e4b87e JM |
1949 | void OPPROTO op_frin (void) |
1950 | { | |
1951 | do_frin(); | |
1952 | RETURN(); | |
1953 | } | |
1954 | ||
1955 | void OPPROTO op_friz (void) | |
1956 | { | |
1957 | do_friz(); | |
1958 | RETURN(); | |
1959 | } | |
1960 | ||
1961 | void OPPROTO op_frip (void) | |
1962 | { | |
1963 | do_frip(); | |
1964 | RETURN(); | |
1965 | } | |
1966 | ||
1967 | void OPPROTO op_frim (void) | |
1968 | { | |
1969 | do_frim(); | |
1970 | RETURN(); | |
1971 | } | |
1972 | ||
9a64fbe4 FB |
1973 | /*** Floating-Point compare ***/ |
1974 | /* fcmpu */ | |
36081602 | 1975 | void OPPROTO op_fcmpu (void) |
28b6751f | 1976 | { |
9a64fbe4 FB |
1977 | do_fcmpu(); |
1978 | RETURN(); | |
28b6751f FB |
1979 | } |
1980 | ||
9a64fbe4 | 1981 | /* fcmpo */ |
36081602 | 1982 | void OPPROTO op_fcmpo (void) |
fb0eaffc | 1983 | { |
9a64fbe4 FB |
1984 | do_fcmpo(); |
1985 | RETURN(); | |
fb0eaffc FB |
1986 | } |
1987 | ||
9a64fbe4 FB |
1988 | /*** Floating-point move ***/ |
1989 | /* fabs */ | |
36081602 | 1990 | void OPPROTO op_fabs (void) |
fb0eaffc | 1991 | { |
fdabc366 | 1992 | FT0 = float64_abs(FT0); |
fb0eaffc FB |
1993 | RETURN(); |
1994 | } | |
1995 | ||
9a64fbe4 | 1996 | /* fnabs */ |
36081602 | 1997 | void OPPROTO op_fnabs (void) |
fb0eaffc | 1998 | { |
fdabc366 FB |
1999 | FT0 = float64_abs(FT0); |
2000 | FT0 = float64_chs(FT0); | |
fb0eaffc FB |
2001 | RETURN(); |
2002 | } | |
2003 | ||
9a64fbe4 | 2004 | /* fneg */ |
36081602 | 2005 | void OPPROTO op_fneg (void) |
fb0eaffc | 2006 | { |
fdabc366 | 2007 | FT0 = float64_chs(FT0); |
fb0eaffc FB |
2008 | RETURN(); |
2009 | } | |
2010 | ||
9a64fbe4 | 2011 | /* Load and store */ |
9a64fbe4 | 2012 | #define MEMSUFFIX _raw |
76a66253 | 2013 | #include "op_helper.h" |
9a64fbe4 | 2014 | #include "op_mem.h" |
a541f297 | 2015 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 2016 | #define MEMSUFFIX _user |
76a66253 | 2017 | #include "op_helper.h" |
9a64fbe4 | 2018 | #include "op_mem.h" |
9a64fbe4 | 2019 | #define MEMSUFFIX _kernel |
76a66253 | 2020 | #include "op_helper.h" |
9a64fbe4 | 2021 | #include "op_mem.h" |
1e42b8f0 JM |
2022 | #if defined(TARGET_PPC64H) |
2023 | #define MEMSUFFIX _hypv | |
2024 | #include "op_helper.h" | |
2025 | #include "op_mem.h" | |
2026 | #endif | |
9a64fbe4 FB |
2027 | #endif |
2028 | ||
4b3686fa | 2029 | /* Special op to check and maybe clear reservation */ |
d9bce9d9 | 2030 | void OPPROTO op_check_reservation (void) |
4b3686fa | 2031 | { |
fdabc366 FB |
2032 | if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003)) |
2033 | env->reserve = -1; | |
4b3686fa FB |
2034 | RETURN(); |
2035 | } | |
2036 | ||
d9bce9d9 JM |
2037 | #if defined(TARGET_PPC64) |
2038 | void OPPROTO op_check_reservation_64 (void) | |
2039 | { | |
2040 | if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003)) | |
2041 | env->reserve = -1; | |
2042 | RETURN(); | |
2043 | } | |
2044 | #endif | |
2045 | ||
be147d08 JM |
2046 | void OPPROTO op_wait (void) |
2047 | { | |
2048 | env->halted = 1; | |
2049 | RETURN(); | |
2050 | } | |
2051 | ||
9a64fbe4 | 2052 | /* Return from interrupt */ |
76a66253 JM |
2053 | #if !defined(CONFIG_USER_ONLY) |
2054 | void OPPROTO op_rfi (void) | |
28b6751f | 2055 | { |
fdabc366 | 2056 | do_rfi(); |
fb0eaffc FB |
2057 | RETURN(); |
2058 | } | |
d9bce9d9 JM |
2059 | |
2060 | #if defined(TARGET_PPC64) | |
426613db JM |
2061 | void OPPROTO op_rfid (void) |
2062 | { | |
2063 | do_rfid(); | |
2064 | RETURN(); | |
2065 | } | |
d9bce9d9 | 2066 | #endif |
be147d08 JM |
2067 | |
2068 | #if defined(TARGET_PPC64H) | |
2069 | void OPPROTO op_hrfid (void) | |
2070 | { | |
2071 | do_hrfid(); | |
2072 | RETURN(); | |
2073 | } | |
2074 | #endif | |
6f5d427d JM |
2075 | |
2076 | /* Exception vectors */ | |
2077 | void OPPROTO op_store_excp_prefix (void) | |
2078 | { | |
2079 | T0 &= env->ivpr_mask; | |
2080 | env->excp_prefix = T0; | |
2081 | RETURN(); | |
2082 | } | |
2083 | ||
2084 | void OPPROTO op_store_excp_vector (void) | |
2085 | { | |
2086 | T0 &= env->ivor_mask; | |
2087 | env->excp_vectors[PARAM1] = T0; | |
2088 | RETURN(); | |
2089 | } | |
76a66253 | 2090 | #endif |
fb0eaffc | 2091 | |
9a64fbe4 | 2092 | /* Trap word */ |
76a66253 | 2093 | void OPPROTO op_tw (void) |
fb0eaffc | 2094 | { |
76a66253 | 2095 | do_tw(PARAM1); |
fb0eaffc FB |
2096 | RETURN(); |
2097 | } | |
2098 | ||
d9bce9d9 JM |
2099 | #if defined(TARGET_PPC64) |
2100 | void OPPROTO op_td (void) | |
2101 | { | |
2102 | do_td(PARAM1); | |
2103 | RETURN(); | |
2104 | } | |
2105 | #endif | |
2106 | ||
76a66253 | 2107 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 2108 | /* tlbia */ |
36081602 | 2109 | void OPPROTO op_tlbia (void) |
fb0eaffc | 2110 | { |
daf4f96e | 2111 | ppc_tlb_invalidate_all(env); |
9a64fbe4 FB |
2112 | RETURN(); |
2113 | } | |
2114 | ||
2115 | /* tlbie */ | |
d9bce9d9 | 2116 | void OPPROTO op_tlbie (void) |
9a64fbe4 | 2117 | { |
daf4f96e | 2118 | ppc_tlb_invalidate_one(env, (uint32_t)T0); |
fb0eaffc | 2119 | RETURN(); |
28b6751f | 2120 | } |
d9bce9d9 JM |
2121 | |
2122 | #if defined(TARGET_PPC64) | |
2123 | void OPPROTO op_tlbie_64 (void) | |
2124 | { | |
daf4f96e | 2125 | ppc_tlb_invalidate_one(env, T0); |
d9bce9d9 JM |
2126 | RETURN(); |
2127 | } | |
2128 | #endif | |
2129 | ||
2130 | #if defined(TARGET_PPC64) | |
2131 | void OPPROTO op_slbia (void) | |
2132 | { | |
daf4f96e | 2133 | ppc_slb_invalidate_all(env); |
d9bce9d9 JM |
2134 | RETURN(); |
2135 | } | |
2136 | ||
2137 | void OPPROTO op_slbie (void) | |
2138 | { | |
daf4f96e JM |
2139 | ppc_slb_invalidate_one(env, (uint32_t)T0); |
2140 | RETURN(); | |
2141 | } | |
2142 | ||
2143 | void OPPROTO op_slbie_64 (void) | |
2144 | { | |
2145 | ppc_slb_invalidate_one(env, T0); | |
d9bce9d9 JM |
2146 | RETURN(); |
2147 | } | |
2148 | #endif | |
76a66253 | 2149 | #endif |
3fc6c082 | 2150 | |
76a66253 | 2151 | #if !defined(CONFIG_USER_ONLY) |
7dbe11ac | 2152 | /* PowerPC 602/603/755 software TLB load instructions */ |
76a66253 JM |
2153 | void OPPROTO op_6xx_tlbld (void) |
2154 | { | |
2155 | do_load_6xx_tlb(0); | |
2156 | RETURN(); | |
2157 | } | |
2158 | ||
2159 | void OPPROTO op_6xx_tlbli (void) | |
2160 | { | |
2161 | do_load_6xx_tlb(1); | |
2162 | RETURN(); | |
2163 | } | |
7dbe11ac JM |
2164 | |
2165 | /* PowerPC 74xx software TLB load instructions */ | |
2166 | void OPPROTO op_74xx_tlbld (void) | |
2167 | { | |
2168 | do_load_74xx_tlb(0); | |
2169 | RETURN(); | |
2170 | } | |
2171 | ||
2172 | void OPPROTO op_74xx_tlbli (void) | |
2173 | { | |
2174 | do_load_74xx_tlb(1); | |
2175 | RETURN(); | |
2176 | } | |
76a66253 JM |
2177 | #endif |
2178 | ||
2179 | /* 601 specific */ | |
76a66253 JM |
2180 | void OPPROTO op_load_601_rtcl (void) |
2181 | { | |
2182 | T0 = cpu_ppc601_load_rtcl(env); | |
2183 | RETURN(); | |
2184 | } | |
2185 | ||
76a66253 JM |
2186 | void OPPROTO op_load_601_rtcu (void) |
2187 | { | |
2188 | T0 = cpu_ppc601_load_rtcu(env); | |
2189 | RETURN(); | |
2190 | } | |
2191 | ||
2192 | #if !defined(CONFIG_USER_ONLY) | |
76a66253 JM |
2193 | void OPPROTO op_store_601_rtcl (void) |
2194 | { | |
2195 | cpu_ppc601_store_rtcl(env, T0); | |
2196 | RETURN(); | |
2197 | } | |
2198 | ||
76a66253 JM |
2199 | void OPPROTO op_store_601_rtcu (void) |
2200 | { | |
2201 | cpu_ppc601_store_rtcu(env, T0); | |
2202 | RETURN(); | |
2203 | } | |
2204 | ||
2205 | void OPPROTO op_load_601_bat (void) | |
2206 | { | |
2207 | T0 = env->IBAT[PARAM1][PARAM2]; | |
2208 | RETURN(); | |
2209 | } | |
2210 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2211 | ||
2212 | /* 601 unified BATs store. | |
2213 | * To avoid using specific MMU code for 601, we store BATs in | |
2214 | * IBAT and DBAT simultaneously, then emulate unified BATs. | |
2215 | */ | |
2216 | #if !defined(CONFIG_USER_ONLY) | |
2217 | void OPPROTO op_store_601_batl (void) | |
2218 | { | |
2219 | int nr = PARAM1; | |
2220 | ||
2221 | env->IBAT[1][nr] = T0; | |
2222 | env->DBAT[1][nr] = T0; | |
2223 | RETURN(); | |
2224 | } | |
2225 | ||
2226 | void OPPROTO op_store_601_batu (void) | |
2227 | { | |
2228 | do_store_601_batu(PARAM1); | |
2229 | RETURN(); | |
2230 | } | |
2231 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2232 | ||
2233 | /* PowerPC 601 specific instructions (POWER bridge) */ | |
2234 | /* XXX: those micro-ops need tests ! */ | |
2235 | void OPPROTO op_POWER_abs (void) | |
2236 | { | |
2237 | if (T0 == INT32_MIN) | |
2238 | T0 = INT32_MAX; | |
2239 | else if (T0 < 0) | |
2240 | T0 = -T0; | |
2241 | RETURN(); | |
2242 | } | |
2243 | ||
2244 | void OPPROTO op_POWER_abso (void) | |
2245 | { | |
2246 | do_POWER_abso(); | |
2247 | RETURN(); | |
2248 | } | |
2249 | ||
2250 | void OPPROTO op_POWER_clcs (void) | |
2251 | { | |
2252 | do_POWER_clcs(); | |
2253 | RETURN(); | |
2254 | } | |
2255 | ||
2256 | void OPPROTO op_POWER_div (void) | |
2257 | { | |
2258 | do_POWER_div(); | |
2259 | RETURN(); | |
2260 | } | |
2261 | ||
2262 | void OPPROTO op_POWER_divo (void) | |
2263 | { | |
2264 | do_POWER_divo(); | |
2265 | RETURN(); | |
2266 | } | |
2267 | ||
2268 | void OPPROTO op_POWER_divs (void) | |
2269 | { | |
2270 | do_POWER_divs(); | |
2271 | RETURN(); | |
2272 | } | |
2273 | ||
2274 | void OPPROTO op_POWER_divso (void) | |
2275 | { | |
2276 | do_POWER_divso(); | |
2277 | RETURN(); | |
2278 | } | |
2279 | ||
2280 | void OPPROTO op_POWER_doz (void) | |
2281 | { | |
d9bce9d9 | 2282 | if ((int32_t)T1 > (int32_t)T0) |
76a66253 JM |
2283 | T0 = T1 - T0; |
2284 | else | |
2285 | T0 = 0; | |
2286 | RETURN(); | |
2287 | } | |
2288 | ||
2289 | void OPPROTO op_POWER_dozo (void) | |
2290 | { | |
2291 | do_POWER_dozo(); | |
2292 | RETURN(); | |
2293 | } | |
2294 | ||
2295 | void OPPROTO op_load_xer_cmp (void) | |
2296 | { | |
2297 | T2 = xer_cmp; | |
2298 | RETURN(); | |
2299 | } | |
2300 | ||
2301 | void OPPROTO op_POWER_maskg (void) | |
2302 | { | |
2303 | do_POWER_maskg(); | |
2304 | RETURN(); | |
2305 | } | |
2306 | ||
2307 | void OPPROTO op_POWER_maskir (void) | |
2308 | { | |
2309 | T0 = (T0 & ~T2) | (T1 & T2); | |
2310 | RETURN(); | |
2311 | } | |
2312 | ||
2313 | void OPPROTO op_POWER_mul (void) | |
2314 | { | |
2315 | uint64_t tmp; | |
2316 | ||
2317 | tmp = (uint64_t)T0 * (uint64_t)T1; | |
2318 | env->spr[SPR_MQ] = tmp >> 32; | |
2319 | T0 = tmp; | |
2320 | RETURN(); | |
2321 | } | |
2322 | ||
2323 | void OPPROTO op_POWER_mulo (void) | |
2324 | { | |
2325 | do_POWER_mulo(); | |
2326 | RETURN(); | |
2327 | } | |
2328 | ||
2329 | void OPPROTO op_POWER_nabs (void) | |
2330 | { | |
2331 | if (T0 > 0) | |
2332 | T0 = -T0; | |
2333 | RETURN(); | |
2334 | } | |
2335 | ||
2336 | void OPPROTO op_POWER_nabso (void) | |
2337 | { | |
2338 | /* nabs never overflows */ | |
2339 | if (T0 > 0) | |
2340 | T0 = -T0; | |
2341 | xer_ov = 0; | |
2342 | RETURN(); | |
2343 | } | |
2344 | ||
2345 | /* XXX: factorise POWER rotates... */ | |
2346 | void OPPROTO op_POWER_rlmi (void) | |
2347 | { | |
2348 | T0 = rotl32(T0, T2) & PARAM1; | |
2f401176 | 2349 | T0 |= T1 & (uint32_t)PARAM2; |
76a66253 JM |
2350 | RETURN(); |
2351 | } | |
2352 | ||
2353 | void OPPROTO op_POWER_rrib (void) | |
2354 | { | |
2355 | T2 &= 0x1FUL; | |
2356 | T0 = rotl32(T0 & INT32_MIN, T2); | |
2357 | T0 |= T1 & ~rotl32(INT32_MIN, T2); | |
2358 | RETURN(); | |
2359 | } | |
2360 | ||
2361 | void OPPROTO op_POWER_sle (void) | |
2362 | { | |
2363 | T1 &= 0x1FUL; | |
2364 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2365 | T0 = T0 << T1; | |
2366 | RETURN(); | |
2367 | } | |
2368 | ||
2369 | void OPPROTO op_POWER_sleq (void) | |
2370 | { | |
2371 | uint32_t tmp = env->spr[SPR_MQ]; | |
2372 | ||
2373 | T1 &= 0x1FUL; | |
2374 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2375 | T0 = T0 << T1; | |
2376 | T0 |= tmp >> (32 - T1); | |
2377 | RETURN(); | |
2378 | } | |
2379 | ||
2380 | void OPPROTO op_POWER_sllq (void) | |
2381 | { | |
2382 | uint32_t msk = -1; | |
2383 | ||
2384 | msk = msk << (T1 & 0x1FUL); | |
2385 | if (T1 & 0x20UL) | |
2386 | msk = ~msk; | |
2387 | T1 &= 0x1FUL; | |
2388 | T0 = (T0 << T1) & msk; | |
2389 | T0 |= env->spr[SPR_MQ] & ~msk; | |
2390 | RETURN(); | |
2391 | } | |
2392 | ||
2393 | void OPPROTO op_POWER_slq (void) | |
2394 | { | |
2395 | uint32_t msk = -1, tmp; | |
2396 | ||
2397 | msk = msk << (T1 & 0x1FUL); | |
2398 | if (T1 & 0x20UL) | |
2399 | msk = ~msk; | |
2400 | T1 &= 0x1FUL; | |
2401 | tmp = rotl32(T0, T1); | |
2402 | T0 = tmp & msk; | |
2403 | env->spr[SPR_MQ] = tmp; | |
2404 | RETURN(); | |
2405 | } | |
2406 | ||
2407 | void OPPROTO op_POWER_sraq (void) | |
2408 | { | |
2409 | env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL)); | |
2410 | if (T1 & 0x20UL) | |
2411 | T0 = -1L; | |
2412 | else | |
d9bce9d9 | 2413 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2414 | RETURN(); |
2415 | } | |
2416 | ||
2417 | void OPPROTO op_POWER_sre (void) | |
2418 | { | |
2419 | T1 &= 0x1FUL; | |
2420 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
d9bce9d9 | 2421 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2422 | RETURN(); |
2423 | } | |
2424 | ||
2425 | void OPPROTO op_POWER_srea (void) | |
2426 | { | |
2427 | T1 &= 0x1FUL; | |
2428 | env->spr[SPR_MQ] = T0 >> T1; | |
d9bce9d9 | 2429 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2430 | RETURN(); |
2431 | } | |
2432 | ||
2433 | void OPPROTO op_POWER_sreq (void) | |
2434 | { | |
2435 | uint32_t tmp; | |
2436 | int32_t msk; | |
2437 | ||
2438 | T1 &= 0x1FUL; | |
2439 | msk = INT32_MIN >> T1; | |
2440 | tmp = env->spr[SPR_MQ]; | |
2441 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2442 | T0 = T0 >> T1; | |
2443 | T0 |= tmp & msk; | |
2444 | RETURN(); | |
2445 | } | |
2446 | ||
2447 | void OPPROTO op_POWER_srlq (void) | |
2448 | { | |
2449 | uint32_t tmp; | |
2450 | int32_t msk; | |
2451 | ||
2452 | msk = INT32_MIN >> (T1 & 0x1FUL); | |
2453 | if (T1 & 0x20UL) | |
2454 | msk = ~msk; | |
2455 | T1 &= 0x1FUL; | |
2456 | tmp = env->spr[SPR_MQ]; | |
2457 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2458 | T0 = T0 >> T1; | |
2459 | T0 &= msk; | |
2460 | T0 |= tmp & ~msk; | |
2461 | RETURN(); | |
2462 | } | |
2463 | ||
2464 | void OPPROTO op_POWER_srq (void) | |
2465 | { | |
2466 | T1 &= 0x1FUL; | |
2467 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2468 | T0 = T0 >> T1; | |
2469 | RETURN(); | |
2470 | } | |
2471 | ||
2472 | /* POWER instructions not implemented in PowerPC 601 */ | |
2473 | #if !defined(CONFIG_USER_ONLY) | |
2474 | void OPPROTO op_POWER_mfsri (void) | |
2475 | { | |
2476 | T1 = T0 >> 28; | |
2477 | T0 = env->sr[T1]; | |
2478 | RETURN(); | |
2479 | } | |
2480 | ||
2481 | void OPPROTO op_POWER_rac (void) | |
2482 | { | |
2483 | do_POWER_rac(); | |
2484 | RETURN(); | |
2485 | } | |
2486 | ||
2487 | void OPPROTO op_POWER_rfsvc (void) | |
2488 | { | |
2489 | do_POWER_rfsvc(); | |
2490 | RETURN(); | |
2491 | } | |
2492 | #endif | |
2493 | ||
2494 | /* PowerPC 602 specific instruction */ | |
2495 | #if !defined(CONFIG_USER_ONLY) | |
2496 | void OPPROTO op_602_mfrom (void) | |
2497 | { | |
2498 | do_op_602_mfrom(); | |
2499 | RETURN(); | |
2500 | } | |
2501 | #endif | |
2502 | ||
2503 | /* PowerPC 4xx specific micro-ops */ | |
2504 | void OPPROTO op_405_add_T0_T2 (void) | |
2505 | { | |
2506 | T0 = (int32_t)T0 + (int32_t)T2; | |
2507 | RETURN(); | |
2508 | } | |
2509 | ||
2510 | void OPPROTO op_405_mulchw (void) | |
2511 | { | |
2512 | T0 = ((int16_t)T0) * ((int16_t)(T1 >> 16)); | |
2513 | RETURN(); | |
2514 | } | |
2515 | ||
2516 | void OPPROTO op_405_mulchwu (void) | |
2517 | { | |
2518 | T0 = ((uint16_t)T0) * ((uint16_t)(T1 >> 16)); | |
2519 | RETURN(); | |
2520 | } | |
2521 | ||
2522 | void OPPROTO op_405_mulhhw (void) | |
2523 | { | |
2524 | T0 = ((int16_t)(T0 >> 16)) * ((int16_t)(T1 >> 16)); | |
2525 | RETURN(); | |
2526 | } | |
2527 | ||
2528 | void OPPROTO op_405_mulhhwu (void) | |
2529 | { | |
2530 | T0 = ((uint16_t)(T0 >> 16)) * ((uint16_t)(T1 >> 16)); | |
2531 | RETURN(); | |
2532 | } | |
2533 | ||
2534 | void OPPROTO op_405_mullhw (void) | |
2535 | { | |
2536 | T0 = ((int16_t)T0) * ((int16_t)T1); | |
2537 | RETURN(); | |
2538 | } | |
2539 | ||
2540 | void OPPROTO op_405_mullhwu (void) | |
2541 | { | |
2542 | T0 = ((uint16_t)T0) * ((uint16_t)T1); | |
2543 | RETURN(); | |
2544 | } | |
2545 | ||
2546 | void OPPROTO op_405_check_ov (void) | |
2547 | { | |
2548 | do_405_check_ov(); | |
2549 | RETURN(); | |
2550 | } | |
2551 | ||
2552 | void OPPROTO op_405_check_sat (void) | |
2553 | { | |
2554 | do_405_check_sat(); | |
2555 | RETURN(); | |
2556 | } | |
2557 | ||
2558 | void OPPROTO op_405_check_ovu (void) | |
2559 | { | |
2560 | if (likely(T0 >= T2)) { | |
2561 | xer_ov = 0; | |
2562 | } else { | |
2563 | xer_ov = 1; | |
2564 | xer_so = 1; | |
2565 | } | |
2566 | RETURN(); | |
2567 | } | |
2568 | ||
2569 | void OPPROTO op_405_check_satu (void) | |
2570 | { | |
2571 | if (unlikely(T0 < T2)) { | |
2572 | /* Saturate result */ | |
2573 | T0 = -1; | |
2574 | } | |
2575 | RETURN(); | |
2576 | } | |
2577 | ||
a42bd6cc | 2578 | void OPPROTO op_load_dcr (void) |
76a66253 | 2579 | { |
a42bd6cc | 2580 | do_load_dcr(); |
76a66253 JM |
2581 | RETURN(); |
2582 | } | |
2583 | ||
a42bd6cc | 2584 | void OPPROTO op_store_dcr (void) |
76a66253 | 2585 | { |
a42bd6cc | 2586 | do_store_dcr(); |
76a66253 JM |
2587 | RETURN(); |
2588 | } | |
2589 | ||
a750fc0b | 2590 | #if !defined(CONFIG_USER_ONLY) |
76a66253 JM |
2591 | /* Return from critical interrupt : |
2592 | * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1 | |
2593 | */ | |
a42bd6cc JM |
2594 | void OPPROTO op_40x_rfci (void) |
2595 | { | |
2596 | do_40x_rfci(); | |
2597 | RETURN(); | |
2598 | } | |
2599 | ||
2600 | void OPPROTO op_rfci (void) | |
2601 | { | |
2602 | do_rfci(); | |
2603 | RETURN(); | |
2604 | } | |
2605 | ||
2606 | void OPPROTO op_rfdi (void) | |
2607 | { | |
2608 | do_rfdi(); | |
2609 | RETURN(); | |
2610 | } | |
2611 | ||
2612 | void OPPROTO op_rfmci (void) | |
76a66253 | 2613 | { |
a42bd6cc | 2614 | do_rfmci(); |
76a66253 JM |
2615 | RETURN(); |
2616 | } | |
2617 | ||
a42bd6cc | 2618 | void OPPROTO op_wrte (void) |
76a66253 | 2619 | { |
0411a972 JM |
2620 | /* We don't call do_store_msr here as we won't trigger |
2621 | * any special case nor change hflags | |
2622 | */ | |
2623 | T0 &= 1 << MSR_EE; | |
2624 | env->msr &= ~(1 << MSR_EE); | |
2625 | env->msr |= T0; | |
76a66253 JM |
2626 | RETURN(); |
2627 | } | |
2628 | ||
a4bb6c3e | 2629 | void OPPROTO op_440_tlbre (void) |
5eb7995e | 2630 | { |
a4bb6c3e | 2631 | do_440_tlbre(PARAM1); |
5eb7995e JM |
2632 | RETURN(); |
2633 | } | |
2634 | ||
a4bb6c3e | 2635 | void OPPROTO op_440_tlbsx (void) |
5eb7995e | 2636 | { |
daf4f96e | 2637 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF); |
5eb7995e JM |
2638 | RETURN(); |
2639 | } | |
2640 | ||
daf4f96e | 2641 | void OPPROTO op_4xx_tlbsx_check (void) |
5eb7995e | 2642 | { |
daf4f96e JM |
2643 | int tmp; |
2644 | ||
2645 | tmp = xer_so; | |
2646 | if (T0 != -1) | |
2647 | tmp |= 0x02; | |
2648 | env->crf[0] = tmp; | |
5eb7995e JM |
2649 | RETURN(); |
2650 | } | |
2651 | ||
a4bb6c3e | 2652 | void OPPROTO op_440_tlbwe (void) |
5eb7995e | 2653 | { |
a4bb6c3e | 2654 | do_440_tlbwe(PARAM1); |
5eb7995e JM |
2655 | RETURN(); |
2656 | } | |
2657 | ||
76a66253 JM |
2658 | void OPPROTO op_4xx_tlbre_lo (void) |
2659 | { | |
2660 | do_4xx_tlbre_lo(); | |
2661 | RETURN(); | |
2662 | } | |
2663 | ||
2664 | void OPPROTO op_4xx_tlbre_hi (void) | |
2665 | { | |
2666 | do_4xx_tlbre_hi(); | |
2667 | RETURN(); | |
2668 | } | |
2669 | ||
2670 | void OPPROTO op_4xx_tlbsx (void) | |
2671 | { | |
daf4f96e | 2672 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
76a66253 JM |
2673 | RETURN(); |
2674 | } | |
2675 | ||
2676 | void OPPROTO op_4xx_tlbwe_lo (void) | |
2677 | { | |
2678 | do_4xx_tlbwe_lo(); | |
2679 | RETURN(); | |
2680 | } | |
2681 | ||
2682 | void OPPROTO op_4xx_tlbwe_hi (void) | |
2683 | { | |
2684 | do_4xx_tlbwe_hi(); | |
2685 | RETURN(); | |
2686 | } | |
2687 | #endif | |
2688 | ||
2689 | /* SPR micro-ops */ | |
2690 | /* 440 specific */ | |
2691 | void OPPROTO op_440_dlmzb (void) | |
2692 | { | |
2693 | do_440_dlmzb(); | |
2694 | RETURN(); | |
2695 | } | |
2696 | ||
2697 | void OPPROTO op_440_dlmzb_update_Rc (void) | |
2698 | { | |
2699 | if (T0 == 8) | |
2700 | T0 = 0x2; | |
2701 | else if (T0 < 4) | |
2702 | T0 = 0x4; | |
2703 | else | |
2704 | T0 = 0x8; | |
2705 | RETURN(); | |
2706 | } | |
2707 | ||
2708 | #if !defined(CONFIG_USER_ONLY) | |
2709 | void OPPROTO op_store_pir (void) | |
3fc6c082 FB |
2710 | { |
2711 | env->spr[SPR_PIR] = T0 & 0x0000000FUL; | |
2712 | RETURN(); | |
2713 | } | |
76a66253 JM |
2714 | |
2715 | void OPPROTO op_load_403_pb (void) | |
2716 | { | |
2717 | do_load_403_pb(PARAM1); | |
2718 | RETURN(); | |
2719 | } | |
2720 | ||
2721 | void OPPROTO op_store_403_pb (void) | |
2722 | { | |
2723 | do_store_403_pb(PARAM1); | |
2724 | RETURN(); | |
2725 | } | |
2726 | ||
76a66253 JM |
2727 | void OPPROTO op_load_40x_pit (void) |
2728 | { | |
2729 | T0 = load_40x_pit(env); | |
2730 | RETURN(); | |
2731 | } | |
2732 | ||
76a66253 JM |
2733 | void OPPROTO op_store_40x_pit (void) |
2734 | { | |
2735 | store_40x_pit(env, T0); | |
2736 | RETURN(); | |
2737 | } | |
2738 | ||
8ecc7913 JM |
2739 | void OPPROTO op_store_40x_dbcr0 (void) |
2740 | { | |
2741 | store_40x_dbcr0(env, T0); | |
be147d08 | 2742 | RETURN(); |
8ecc7913 JM |
2743 | } |
2744 | ||
c294fc58 JM |
2745 | void OPPROTO op_store_40x_sler (void) |
2746 | { | |
2747 | store_40x_sler(env, T0); | |
2748 | RETURN(); | |
2749 | } | |
2750 | ||
76a66253 JM |
2751 | void OPPROTO op_store_booke_tcr (void) |
2752 | { | |
2753 | store_booke_tcr(env, T0); | |
2754 | RETURN(); | |
2755 | } | |
2756 | ||
76a66253 JM |
2757 | void OPPROTO op_store_booke_tsr (void) |
2758 | { | |
2759 | store_booke_tsr(env, T0); | |
2760 | RETURN(); | |
2761 | } | |
2762 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
0487d6a8 | 2763 | |
35cdaad6 | 2764 | #if defined(TARGET_PPCEMB) |
0487d6a8 JM |
2765 | /* SPE extension */ |
2766 | void OPPROTO op_splatw_T1_64 (void) | |
2767 | { | |
2768 | T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
e864cabd | 2769 | RETURN(); |
0487d6a8 JM |
2770 | } |
2771 | ||
2772 | void OPPROTO op_splatwi_T0_64 (void) | |
2773 | { | |
2774 | uint64_t tmp = PARAM1; | |
2775 | ||
2776 | T0_64 = (tmp << 32) | tmp; | |
e864cabd | 2777 | RETURN(); |
0487d6a8 JM |
2778 | } |
2779 | ||
2780 | void OPPROTO op_splatwi_T1_64 (void) | |
2781 | { | |
2782 | uint64_t tmp = PARAM1; | |
2783 | ||
2784 | T1_64 = (tmp << 32) | tmp; | |
e864cabd | 2785 | RETURN(); |
0487d6a8 JM |
2786 | } |
2787 | ||
2788 | void OPPROTO op_extsh_T1_64 (void) | |
2789 | { | |
2790 | T1_64 = (int32_t)((int16_t)T1_64); | |
2791 | RETURN(); | |
2792 | } | |
2793 | ||
2794 | void OPPROTO op_sli16_T1_64 (void) | |
2795 | { | |
2796 | T1_64 = T1_64 << 16; | |
2797 | RETURN(); | |
2798 | } | |
2799 | ||
2800 | void OPPROTO op_sli32_T1_64 (void) | |
2801 | { | |
2802 | T1_64 = T1_64 << 32; | |
2803 | RETURN(); | |
2804 | } | |
2805 | ||
2806 | void OPPROTO op_srli32_T1_64 (void) | |
2807 | { | |
2808 | T1_64 = T1_64 >> 32; | |
2809 | RETURN(); | |
2810 | } | |
2811 | ||
2812 | void OPPROTO op_evsel (void) | |
2813 | { | |
2814 | do_evsel(); | |
2815 | RETURN(); | |
2816 | } | |
2817 | ||
2818 | void OPPROTO op_evaddw (void) | |
2819 | { | |
2820 | do_evaddw(); | |
2821 | RETURN(); | |
2822 | } | |
2823 | ||
2824 | void OPPROTO op_evsubfw (void) | |
2825 | { | |
2826 | do_evsubfw(); | |
2827 | RETURN(); | |
2828 | } | |
2829 | ||
2830 | void OPPROTO op_evneg (void) | |
2831 | { | |
2832 | do_evneg(); | |
2833 | RETURN(); | |
2834 | } | |
2835 | ||
2836 | void OPPROTO op_evabs (void) | |
2837 | { | |
2838 | do_evabs(); | |
2839 | RETURN(); | |
2840 | } | |
2841 | ||
2842 | void OPPROTO op_evextsh (void) | |
2843 | { | |
2844 | T0_64 = ((uint64_t)((int32_t)(int16_t)(T0_64 >> 32)) << 32) | | |
2845 | (uint64_t)((int32_t)(int16_t)T0_64); | |
2846 | RETURN(); | |
2847 | } | |
2848 | ||
2849 | void OPPROTO op_evextsb (void) | |
2850 | { | |
2851 | T0_64 = ((uint64_t)((int32_t)(int8_t)(T0_64 >> 32)) << 32) | | |
2852 | (uint64_t)((int32_t)(int8_t)T0_64); | |
2853 | RETURN(); | |
2854 | } | |
2855 | ||
2856 | void OPPROTO op_evcntlzw (void) | |
2857 | { | |
2858 | do_evcntlzw(); | |
2859 | RETURN(); | |
2860 | } | |
2861 | ||
2862 | void OPPROTO op_evrndw (void) | |
2863 | { | |
2864 | do_evrndw(); | |
2865 | RETURN(); | |
2866 | } | |
2867 | ||
2868 | void OPPROTO op_brinc (void) | |
2869 | { | |
2870 | do_brinc(); | |
2871 | RETURN(); | |
2872 | } | |
2873 | ||
2874 | void OPPROTO op_evcntlsw (void) | |
2875 | { | |
2876 | do_evcntlsw(); | |
2877 | RETURN(); | |
2878 | } | |
2879 | ||
2880 | void OPPROTO op_evand (void) | |
2881 | { | |
2882 | T0_64 &= T1_64; | |
2883 | RETURN(); | |
2884 | } | |
2885 | ||
2886 | void OPPROTO op_evandc (void) | |
2887 | { | |
2888 | T0_64 &= ~T1_64; | |
2889 | RETURN(); | |
2890 | } | |
2891 | ||
2892 | void OPPROTO op_evor (void) | |
2893 | { | |
2894 | T0_64 |= T1_64; | |
2895 | RETURN(); | |
2896 | } | |
2897 | ||
2898 | void OPPROTO op_evxor (void) | |
2899 | { | |
2900 | T0_64 ^= T1_64; | |
2901 | RETURN(); | |
2902 | } | |
2903 | ||
2904 | void OPPROTO op_eveqv (void) | |
2905 | { | |
2906 | T0_64 = ~(T0_64 ^ T1_64); | |
2907 | RETURN(); | |
2908 | } | |
2909 | ||
2910 | void OPPROTO op_evnor (void) | |
2911 | { | |
2912 | T0_64 = ~(T0_64 | T1_64); | |
2913 | RETURN(); | |
2914 | } | |
2915 | ||
2916 | void OPPROTO op_evorc (void) | |
2917 | { | |
2918 | T0_64 |= ~T1_64; | |
2919 | RETURN(); | |
2920 | } | |
2921 | ||
2922 | void OPPROTO op_evnand (void) | |
2923 | { | |
2924 | T0_64 = ~(T0_64 & T1_64); | |
2925 | RETURN(); | |
2926 | } | |
2927 | ||
2928 | void OPPROTO op_evsrws (void) | |
2929 | { | |
2930 | do_evsrws(); | |
2931 | RETURN(); | |
2932 | } | |
2933 | ||
2934 | void OPPROTO op_evsrwu (void) | |
2935 | { | |
2936 | do_evsrwu(); | |
2937 | RETURN(); | |
2938 | } | |
2939 | ||
2940 | void OPPROTO op_evslw (void) | |
2941 | { | |
2942 | do_evslw(); | |
2943 | RETURN(); | |
2944 | } | |
2945 | ||
2946 | void OPPROTO op_evrlw (void) | |
2947 | { | |
2948 | do_evrlw(); | |
2949 | RETURN(); | |
2950 | } | |
2951 | ||
2952 | void OPPROTO op_evmergelo (void) | |
2953 | { | |
2954 | T0_64 = (T0_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2955 | RETURN(); | |
2956 | } | |
2957 | ||
2958 | void OPPROTO op_evmergehi (void) | |
2959 | { | |
2960 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 >> 32); | |
2961 | RETURN(); | |
2962 | } | |
2963 | ||
2964 | void OPPROTO op_evmergelohi (void) | |
2965 | { | |
2966 | T0_64 = (T0_64 << 32) | (T1_64 >> 32); | |
2967 | RETURN(); | |
2968 | } | |
2969 | ||
2970 | void OPPROTO op_evmergehilo (void) | |
2971 | { | |
2972 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2973 | RETURN(); | |
2974 | } | |
2975 | ||
2976 | void OPPROTO op_evcmpgts (void) | |
2977 | { | |
2978 | do_evcmpgts(); | |
2979 | RETURN(); | |
2980 | } | |
2981 | ||
2982 | void OPPROTO op_evcmpgtu (void) | |
2983 | { | |
2984 | do_evcmpgtu(); | |
2985 | RETURN(); | |
2986 | } | |
2987 | ||
2988 | void OPPROTO op_evcmplts (void) | |
2989 | { | |
2990 | do_evcmplts(); | |
2991 | RETURN(); | |
2992 | } | |
2993 | ||
2994 | void OPPROTO op_evcmpltu (void) | |
2995 | { | |
2996 | do_evcmpltu(); | |
2997 | RETURN(); | |
2998 | } | |
2999 | ||
3000 | void OPPROTO op_evcmpeq (void) | |
3001 | { | |
3002 | do_evcmpeq(); | |
3003 | RETURN(); | |
3004 | } | |
3005 | ||
3006 | void OPPROTO op_evfssub (void) | |
3007 | { | |
3008 | do_evfssub(); | |
3009 | RETURN(); | |
3010 | } | |
3011 | ||
3012 | void OPPROTO op_evfsadd (void) | |
3013 | { | |
3014 | do_evfsadd(); | |
3015 | RETURN(); | |
3016 | } | |
3017 | ||
3018 | void OPPROTO op_evfsnabs (void) | |
3019 | { | |
3020 | do_evfsnabs(); | |
3021 | RETURN(); | |
3022 | } | |
3023 | ||
3024 | void OPPROTO op_evfsabs (void) | |
3025 | { | |
3026 | do_evfsabs(); | |
3027 | RETURN(); | |
3028 | } | |
3029 | ||
3030 | void OPPROTO op_evfsneg (void) | |
3031 | { | |
3032 | do_evfsneg(); | |
3033 | RETURN(); | |
3034 | } | |
3035 | ||
3036 | void OPPROTO op_evfsdiv (void) | |
3037 | { | |
3038 | do_evfsdiv(); | |
3039 | RETURN(); | |
3040 | } | |
3041 | ||
3042 | void OPPROTO op_evfsmul (void) | |
3043 | { | |
3044 | do_evfsmul(); | |
3045 | RETURN(); | |
3046 | } | |
3047 | ||
3048 | void OPPROTO op_evfscmplt (void) | |
3049 | { | |
3050 | do_evfscmplt(); | |
3051 | RETURN(); | |
3052 | } | |
3053 | ||
3054 | void OPPROTO op_evfscmpgt (void) | |
3055 | { | |
3056 | do_evfscmpgt(); | |
3057 | RETURN(); | |
3058 | } | |
3059 | ||
3060 | void OPPROTO op_evfscmpeq (void) | |
3061 | { | |
3062 | do_evfscmpeq(); | |
3063 | RETURN(); | |
3064 | } | |
3065 | ||
3066 | void OPPROTO op_evfscfsi (void) | |
3067 | { | |
3068 | do_evfscfsi(); | |
3069 | RETURN(); | |
3070 | } | |
3071 | ||
3072 | void OPPROTO op_evfscfui (void) | |
3073 | { | |
3074 | do_evfscfui(); | |
3075 | RETURN(); | |
3076 | } | |
3077 | ||
3078 | void OPPROTO op_evfscfsf (void) | |
3079 | { | |
3080 | do_evfscfsf(); | |
3081 | RETURN(); | |
3082 | } | |
3083 | ||
3084 | void OPPROTO op_evfscfuf (void) | |
3085 | { | |
3086 | do_evfscfuf(); | |
3087 | RETURN(); | |
3088 | } | |
3089 | ||
3090 | void OPPROTO op_evfsctsi (void) | |
3091 | { | |
3092 | do_evfsctsi(); | |
3093 | RETURN(); | |
3094 | } | |
3095 | ||
3096 | void OPPROTO op_evfsctui (void) | |
3097 | { | |
3098 | do_evfsctui(); | |
3099 | RETURN(); | |
3100 | } | |
3101 | ||
3102 | void OPPROTO op_evfsctsf (void) | |
3103 | { | |
3104 | do_evfsctsf(); | |
3105 | RETURN(); | |
3106 | } | |
3107 | ||
3108 | void OPPROTO op_evfsctuf (void) | |
3109 | { | |
3110 | do_evfsctuf(); | |
3111 | RETURN(); | |
3112 | } | |
3113 | ||
3114 | void OPPROTO op_evfsctuiz (void) | |
3115 | { | |
3116 | do_evfsctuiz(); | |
3117 | RETURN(); | |
3118 | } | |
3119 | ||
3120 | void OPPROTO op_evfsctsiz (void) | |
3121 | { | |
3122 | do_evfsctsiz(); | |
3123 | RETURN(); | |
3124 | } | |
3125 | ||
3126 | void OPPROTO op_evfststlt (void) | |
3127 | { | |
3128 | do_evfststlt(); | |
3129 | RETURN(); | |
3130 | } | |
3131 | ||
3132 | void OPPROTO op_evfststgt (void) | |
3133 | { | |
3134 | do_evfststgt(); | |
3135 | RETURN(); | |
3136 | } | |
3137 | ||
3138 | void OPPROTO op_evfststeq (void) | |
3139 | { | |
3140 | do_evfststeq(); | |
3141 | RETURN(); | |
3142 | } | |
3143 | ||
3144 | void OPPROTO op_efssub (void) | |
3145 | { | |
3146 | T0_64 = _do_efssub(T0_64, T1_64); | |
3147 | RETURN(); | |
3148 | } | |
3149 | ||
3150 | void OPPROTO op_efsadd (void) | |
3151 | { | |
3152 | T0_64 = _do_efsadd(T0_64, T1_64); | |
3153 | RETURN(); | |
3154 | } | |
3155 | ||
3156 | void OPPROTO op_efsnabs (void) | |
3157 | { | |
3158 | T0_64 = _do_efsnabs(T0_64); | |
3159 | RETURN(); | |
3160 | } | |
3161 | ||
3162 | void OPPROTO op_efsabs (void) | |
3163 | { | |
3164 | T0_64 = _do_efsabs(T0_64); | |
3165 | RETURN(); | |
3166 | } | |
3167 | ||
3168 | void OPPROTO op_efsneg (void) | |
3169 | { | |
3170 | T0_64 = _do_efsneg(T0_64); | |
3171 | RETURN(); | |
3172 | } | |
3173 | ||
3174 | void OPPROTO op_efsdiv (void) | |
3175 | { | |
3176 | T0_64 = _do_efsdiv(T0_64, T1_64); | |
3177 | RETURN(); | |
3178 | } | |
3179 | ||
3180 | void OPPROTO op_efsmul (void) | |
3181 | { | |
3182 | T0_64 = _do_efsmul(T0_64, T1_64); | |
3183 | RETURN(); | |
3184 | } | |
3185 | ||
3186 | void OPPROTO op_efscmplt (void) | |
3187 | { | |
3188 | do_efscmplt(); | |
3189 | RETURN(); | |
3190 | } | |
3191 | ||
3192 | void OPPROTO op_efscmpgt (void) | |
3193 | { | |
3194 | do_efscmpgt(); | |
3195 | RETURN(); | |
3196 | } | |
3197 | ||
3198 | void OPPROTO op_efscfd (void) | |
3199 | { | |
3200 | do_efscfd(); | |
3201 | RETURN(); | |
3202 | } | |
3203 | ||
3204 | void OPPROTO op_efscmpeq (void) | |
3205 | { | |
3206 | do_efscmpeq(); | |
3207 | RETURN(); | |
3208 | } | |
3209 | ||
3210 | void OPPROTO op_efscfsi (void) | |
3211 | { | |
3212 | do_efscfsi(); | |
3213 | RETURN(); | |
3214 | } | |
3215 | ||
3216 | void OPPROTO op_efscfui (void) | |
3217 | { | |
3218 | do_efscfui(); | |
3219 | RETURN(); | |
3220 | } | |
3221 | ||
3222 | void OPPROTO op_efscfsf (void) | |
3223 | { | |
3224 | do_efscfsf(); | |
3225 | RETURN(); | |
3226 | } | |
3227 | ||
3228 | void OPPROTO op_efscfuf (void) | |
3229 | { | |
3230 | do_efscfuf(); | |
3231 | RETURN(); | |
3232 | } | |
3233 | ||
3234 | void OPPROTO op_efsctsi (void) | |
3235 | { | |
3236 | do_efsctsi(); | |
3237 | RETURN(); | |
3238 | } | |
3239 | ||
3240 | void OPPROTO op_efsctui (void) | |
3241 | { | |
3242 | do_efsctui(); | |
3243 | RETURN(); | |
3244 | } | |
3245 | ||
3246 | void OPPROTO op_efsctsf (void) | |
3247 | { | |
3248 | do_efsctsf(); | |
3249 | RETURN(); | |
3250 | } | |
3251 | ||
3252 | void OPPROTO op_efsctuf (void) | |
3253 | { | |
3254 | do_efsctuf(); | |
3255 | RETURN(); | |
3256 | } | |
3257 | ||
3258 | void OPPROTO op_efsctsiz (void) | |
3259 | { | |
3260 | do_efsctsiz(); | |
3261 | RETURN(); | |
3262 | } | |
3263 | ||
3264 | void OPPROTO op_efsctuiz (void) | |
3265 | { | |
3266 | do_efsctuiz(); | |
3267 | RETURN(); | |
3268 | } | |
3269 | ||
3270 | void OPPROTO op_efststlt (void) | |
3271 | { | |
3272 | T0 = _do_efststlt(T0_64, T1_64); | |
3273 | RETURN(); | |
3274 | } | |
3275 | ||
3276 | void OPPROTO op_efststgt (void) | |
3277 | { | |
3278 | T0 = _do_efststgt(T0_64, T1_64); | |
3279 | RETURN(); | |
3280 | } | |
3281 | ||
3282 | void OPPROTO op_efststeq (void) | |
3283 | { | |
3284 | T0 = _do_efststeq(T0_64, T1_64); | |
3285 | RETURN(); | |
3286 | } | |
3287 | ||
3288 | void OPPROTO op_efdsub (void) | |
3289 | { | |
3290 | union { | |
3291 | uint64_t u; | |
3292 | float64 f; | |
3293 | } u1, u2; | |
3294 | u1.u = T0_64; | |
3295 | u2.u = T1_64; | |
3296 | u1.f = float64_sub(u1.f, u2.f, &env->spe_status); | |
3297 | T0_64 = u1.u; | |
3298 | RETURN(); | |
3299 | } | |
3300 | ||
3301 | void OPPROTO op_efdadd (void) | |
3302 | { | |
3303 | union { | |
3304 | uint64_t u; | |
3305 | float64 f; | |
3306 | } u1, u2; | |
3307 | u1.u = T0_64; | |
3308 | u2.u = T1_64; | |
3309 | u1.f = float64_add(u1.f, u2.f, &env->spe_status); | |
3310 | T0_64 = u1.u; | |
3311 | RETURN(); | |
3312 | } | |
3313 | ||
3314 | void OPPROTO op_efdcfsid (void) | |
3315 | { | |
3316 | do_efdcfsi(); | |
3317 | RETURN(); | |
3318 | } | |
3319 | ||
3320 | void OPPROTO op_efdcfuid (void) | |
3321 | { | |
3322 | do_efdcfui(); | |
3323 | RETURN(); | |
3324 | } | |
3325 | ||
3326 | void OPPROTO op_efdnabs (void) | |
3327 | { | |
3328 | T0_64 |= 0x8000000000000000ULL; | |
3329 | RETURN(); | |
3330 | } | |
3331 | ||
3332 | void OPPROTO op_efdabs (void) | |
3333 | { | |
3334 | T0_64 &= ~0x8000000000000000ULL; | |
3335 | RETURN(); | |
3336 | } | |
3337 | ||
3338 | void OPPROTO op_efdneg (void) | |
3339 | { | |
3340 | T0_64 ^= 0x8000000000000000ULL; | |
3341 | RETURN(); | |
3342 | } | |
3343 | ||
3344 | void OPPROTO op_efddiv (void) | |
3345 | { | |
3346 | union { | |
3347 | uint64_t u; | |
3348 | float64 f; | |
3349 | } u1, u2; | |
3350 | u1.u = T0_64; | |
3351 | u2.u = T1_64; | |
3352 | u1.f = float64_div(u1.f, u2.f, &env->spe_status); | |
3353 | T0_64 = u1.u; | |
3354 | RETURN(); | |
3355 | } | |
3356 | ||
3357 | void OPPROTO op_efdmul (void) | |
3358 | { | |
3359 | union { | |
3360 | uint64_t u; | |
3361 | float64 f; | |
3362 | } u1, u2; | |
3363 | u1.u = T0_64; | |
3364 | u2.u = T1_64; | |
3365 | u1.f = float64_mul(u1.f, u2.f, &env->spe_status); | |
3366 | T0_64 = u1.u; | |
3367 | RETURN(); | |
3368 | } | |
3369 | ||
3370 | void OPPROTO op_efdctsidz (void) | |
3371 | { | |
3372 | do_efdctsiz(); | |
3373 | RETURN(); | |
3374 | } | |
3375 | ||
3376 | void OPPROTO op_efdctuidz (void) | |
3377 | { | |
3378 | do_efdctuiz(); | |
3379 | RETURN(); | |
3380 | } | |
3381 | ||
3382 | void OPPROTO op_efdcmplt (void) | |
3383 | { | |
3384 | do_efdcmplt(); | |
3385 | RETURN(); | |
3386 | } | |
3387 | ||
3388 | void OPPROTO op_efdcmpgt (void) | |
3389 | { | |
3390 | do_efdcmpgt(); | |
3391 | RETURN(); | |
3392 | } | |
3393 | ||
3394 | void OPPROTO op_efdcfs (void) | |
3395 | { | |
3396 | do_efdcfs(); | |
3397 | RETURN(); | |
3398 | } | |
3399 | ||
3400 | void OPPROTO op_efdcmpeq (void) | |
3401 | { | |
3402 | do_efdcmpeq(); | |
3403 | RETURN(); | |
3404 | } | |
3405 | ||
3406 | void OPPROTO op_efdcfsi (void) | |
3407 | { | |
3408 | do_efdcfsi(); | |
3409 | RETURN(); | |
3410 | } | |
3411 | ||
3412 | void OPPROTO op_efdcfui (void) | |
3413 | { | |
3414 | do_efdcfui(); | |
3415 | RETURN(); | |
3416 | } | |
3417 | ||
3418 | void OPPROTO op_efdcfsf (void) | |
3419 | { | |
3420 | do_efdcfsf(); | |
3421 | RETURN(); | |
3422 | } | |
3423 | ||
3424 | void OPPROTO op_efdcfuf (void) | |
3425 | { | |
3426 | do_efdcfuf(); | |
3427 | RETURN(); | |
3428 | } | |
3429 | ||
3430 | void OPPROTO op_efdctsi (void) | |
3431 | { | |
3432 | do_efdctsi(); | |
3433 | RETURN(); | |
3434 | } | |
3435 | ||
3436 | void OPPROTO op_efdctui (void) | |
3437 | { | |
3438 | do_efdctui(); | |
3439 | RETURN(); | |
3440 | } | |
3441 | ||
3442 | void OPPROTO op_efdctsf (void) | |
3443 | { | |
3444 | do_efdctsf(); | |
3445 | RETURN(); | |
3446 | } | |
3447 | ||
3448 | void OPPROTO op_efdctuf (void) | |
3449 | { | |
3450 | do_efdctuf(); | |
3451 | RETURN(); | |
3452 | } | |
3453 | ||
3454 | void OPPROTO op_efdctuiz (void) | |
3455 | { | |
3456 | do_efdctuiz(); | |
3457 | RETURN(); | |
3458 | } | |
3459 | ||
3460 | void OPPROTO op_efdctsiz (void) | |
3461 | { | |
3462 | do_efdctsiz(); | |
3463 | RETURN(); | |
3464 | } | |
3465 | ||
3466 | void OPPROTO op_efdtstlt (void) | |
3467 | { | |
3468 | T0 = _do_efdtstlt(T0_64, T1_64); | |
3469 | RETURN(); | |
3470 | } | |
3471 | ||
3472 | void OPPROTO op_efdtstgt (void) | |
3473 | { | |
3474 | T0 = _do_efdtstgt(T0_64, T1_64); | |
3475 | RETURN(); | |
3476 | } | |
3477 | ||
3478 | void OPPROTO op_efdtsteq (void) | |
3479 | { | |
3480 | T0 = _do_efdtsteq(T0_64, T1_64); | |
3481 | RETURN(); | |
3482 | } | |
35cdaad6 | 3483 | #endif /* defined(TARGET_PPCEMB) */ |