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1/*
2 * PPC emulation helpers for qemu.
3 *
4 * Copyright (c) 2003 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <math.h>
21#include "exec.h"
22
23#if defined(CONFIG_USER_ONLY)
24#define MEMSUFFIX _raw
25#include "op_helper_mem.h"
26#else
27#define MEMSUFFIX _user
28#include "op_helper_mem.h"
29#define MEMSUFFIX _kernel
30#include "op_helper_mem.h"
31#endif
32
33/*****************************************************************************/
34/* Exceptions processing helpers */
35void do_queue_exception_err (uint32_t exception, int error_code)
36{
37 /* Queue real PPC exceptions */
38 if (exception < EXCP_PPC_MAX) {
39 env->exceptions |= 1 << exception;
40 env->errors[exception] = error_code;
41 } else {
42 /* Preserve compatibility with qemu core */
43 env->exceptions |= 1;
44 env->exception_index = exception;
45 env->error_code = error_code;
46 }
47}
48
49void do_queue_exception (uint32_t exception)
50{
51 do_queue_exception_err(exception, 0);
52}
53
54void do_check_exception_state (void)
55{
56 if ((env->exceptions & 1) == 1 || check_exception_state(env)) {
57 env->exceptions &= ~1;
58 cpu_loop_exit();
59 }
60}
61
62/*****************************************************************************/
63/* Helpers for "fat" micro operations */
64/* Special registers load and store */
65void do_load_cr (void)
66{
67 T0 = (env->crf[0] << 28) |
68 (env->crf[1] << 24) |
69 (env->crf[2] << 20) |
70 (env->crf[3] << 16) |
71 (env->crf[4] << 12) |
72 (env->crf[5] << 8) |
73 (env->crf[6] << 4) |
74 (env->crf[7] << 0);
75}
76
77void do_store_cr (uint32_t mask)
78{
79 int i, sh;
80
81 for (i = 0, sh = 7; i < 8; i++, sh --) {
82 if (mask & (1 << sh))
83 env->crf[i] = (T0 >> (sh * 4)) & 0xF;
84 }
85}
86
87void do_load_xer (void)
88{
89 T0 = (xer_so << XER_SO) |
90 (xer_ov << XER_OV) |
91 (xer_ca << XER_CA) |
92 (xer_bc << XER_BC);
93}
94
95void do_store_xer (void)
96{
97 xer_so = (T0 >> XER_SO) & 0x01;
98 xer_ov = (T0 >> XER_OV) & 0x01;
99 xer_ca = (T0 >> XER_CA) & 0x01;
100 xer_bc = (T0 >> XER_BC) & 0x1f;
101}
102
103void do_load_msr (void)
104{
105 T0 = (msr_pow << MSR_POW) |
106 (msr_ile << MSR_ILE) |
107 (msr_ee << MSR_EE) |
108 (msr_pr << MSR_PR) |
109 (msr_fp << MSR_FP) |
110 (msr_me << MSR_ME) |
111 (msr_fe0 << MSR_FE0) |
112 (msr_se << MSR_SE) |
113 (msr_be << MSR_BE) |
114 (msr_fe1 << MSR_FE1) |
115 (msr_ip << MSR_IP) |
116 (msr_ir << MSR_IR) |
117 (msr_dr << MSR_DR) |
118 (msr_ri << MSR_RI) |
119 (msr_le << MSR_LE);
120}
121
122void do_store_msr (void)
123{
124 if (((T0 >> MSR_IR) & 0x01) != msr_ir ||
125 ((T0 >> MSR_DR) & 0x01) != msr_dr ||
126 ((T0 >> MSR_PR) & 0x01) != msr_pr) {
127 /* Flush all tlb when changing translation mode or privilege level */
128 do_tlbia();
129 }
130#if 0
131 if ((T0 >> MSR_IP) & 0x01) {
132 printf("Halting CPU. Stop emulation\n");
133 do_queue_exception(EXCP_HLT);
134 cpu_loop_exit();
135 }
136#endif
137 msr_pow = (T0 >> MSR_POW) & 0x03;
138 msr_ile = (T0 >> MSR_ILE) & 0x01;
139 msr_ee = (T0 >> MSR_EE) & 0x01;
140 msr_pr = (T0 >> MSR_PR) & 0x01;
141 msr_fp = (T0 >> MSR_FP) & 0x01;
142 msr_me = (T0 >> MSR_ME) & 0x01;
143 msr_fe0 = (T0 >> MSR_FE0) & 0x01;
144 msr_se = (T0 >> MSR_SE) & 0x01;
145 msr_be = (T0 >> MSR_BE) & 0x01;
146 msr_fe1 = (T0 >> MSR_FE1) & 0x01;
147 msr_ip = (T0 >> MSR_IP) & 0x01;
148 msr_ir = (T0 >> MSR_IR) & 0x01;
149 msr_dr = (T0 >> MSR_DR) & 0x01;
150 msr_ri = (T0 >> MSR_RI) & 0x01;
151 msr_le = (T0 >> MSR_LE) & 0x01;
152}
153
154/* shift right arithmetic helper */
155void do_sraw (void)
156{
157 int32_t ret;
158
159 xer_ca = 0;
160 if (T1 & 0x20) {
161 ret = (-1) * (T0 >> 31);
162 if (ret < 0)
163 xer_ca = 1;
164 } else {
165 ret = (int32_t)T0 >> (T1 & 0x1f);
166 if (ret < 0 && ((int32_t)T0 & ((1 << T1) - 1)) != 0)
167 xer_ca = 1;
168 }
169 (int32_t)T0 = ret;
170}
171
172/* Floating point operations helpers */
173void do_load_fpscr (void)
174{
175 /* The 32 MSB of the target fpr are undefined.
176 * They'll be zero...
177 */
178 union {
179 double d;
180 struct {
181 uint32_t u[2];
182 } s;
183 } u;
184 int i;
185
186 u.s.u[0] = 0;
187 u.s.u[1] = 0;
188 for (i = 0; i < 8; i++)
189 u.s.u[1] |= env->fpscr[i] << (4 * i);
190 FT0 = u.d;
191}
192
193void do_store_fpscr (uint32_t mask)
194{
195 /*
196 * We use only the 32 LSB of the incoming fpr
197 */
198 union {
199 double d;
200 struct {
201 uint32_t u[2];
202 } s;
203 } u;
204 int i;
205
206 u.d = FT0;
207 if (mask & 0x80)
208 env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[1] >> 28) & ~0x9);
209 for (i = 1; i < 7; i++) {
210 if (mask & (1 << (7 - i)))
211 env->fpscr[i] = (u.s.u[1] >> (4 * (7 - i))) & 0xF;
212 }
213 /* TODO: update FEX & VX */
214 /* Set rounding mode */
215 switch (env->fpscr[0] & 0x3) {
216 case 0:
217 /* Best approximation (round to nearest) */
218 fesetround(FE_TONEAREST);
219 break;
220 case 1:
221 /* Smaller magnitude (round toward zero) */
222 fesetround(FE_TOWARDZERO);
223 break;
224 case 2:
225 /* Round toward +infinite */
226 fesetround(FE_UPWARD);
227 break;
228 case 3:
229 /* Round toward -infinite */
230 fesetround(FE_DOWNWARD);
231 break;
232 }
233}
234
235void do_fctiw (void)
236{
237 union {
238 double d;
239 uint64_t i;
240 } *p = (void *)&FT1;
241
242 if (FT0 > (double)0x7FFFFFFF)
243 p->i = 0x7FFFFFFFULL << 32;
244 else if (FT0 < -(double)0x80000000)
245 p->i = 0x80000000ULL << 32;
246 else
247 p->i = 0;
248 p->i |= (uint32_t)FT0;
249 FT0 = p->d;
250}
251
252void do_fctiwz (void)
253{
254 union {
255 double d;
256 uint64_t i;
257 } *p = (void *)&FT1;
258 int cround = fegetround();
259
260 fesetround(FE_TOWARDZERO);
261 if (FT0 > (double)0x7FFFFFFF)
262 p->i = 0x7FFFFFFFULL << 32;
263 else if (FT0 < -(double)0x80000000)
264 p->i = 0x80000000ULL << 32;
265 else
266 p->i = 0;
267 p->i |= (uint32_t)FT0;
268 FT0 = p->d;
269 fesetround(cround);
270}
271
272void do_fsqrt (void)
273{
274 FT0 = sqrt(FT0);
275}
276
277void do_fsqrts (void)
278{
279 FT0 = (float)sqrt((float)FT0);
280}
281
282void do_fres (void)
283{
284 FT0 = 1.0 / FT0;
285}
286
287void do_fsqrte (void)
288{
289 FT0 = 1.0 / sqrt(FT0);
290}
291
292void do_fsel (void)
293{
294 if (FT0 >= 0)
295 FT0 = FT2;
296 else
297 FT0 = FT1;
298}
299
300void do_fcmpu (void)
301{
302 env->fpscr[4] &= ~0x1;
303 if (isnan(FT0) || isnan(FT1)) {
304 T0 = 0x01;
305 env->fpscr[4] |= 0x1;
306 env->fpscr[6] |= 0x1;
307 } else if (FT0 < FT1) {
308 T0 = 0x08;
309 } else if (FT0 > FT1) {
310 T0 = 0x04;
311 } else {
312 T0 = 0x02;
313 }
314 env->fpscr[3] |= T0;
315}
316
317void do_fcmpo (void)
318{
319 env->fpscr[4] &= ~0x1;
320 if (isnan(FT0) || isnan(FT1)) {
321 T0 = 0x01;
322 env->fpscr[4] |= 0x1;
323 /* I don't know how to test "quiet" nan... */
324 if (0 /* || ! quiet_nan(...) */) {
325 env->fpscr[6] |= 0x1;
326 if (!(env->fpscr[1] & 0x8))
327 env->fpscr[4] |= 0x8;
328 } else {
329 env->fpscr[4] |= 0x8;
330 }
331 } else if (FT0 < FT1) {
332 T0 = 0x08;
333 } else if (FT0 > FT1) {
334 T0 = 0x04;
335 } else {
336 T0 = 0x02;
337 }
338 env->fpscr[3] |= T0;
339}
340
341void do_fabs (void)
342{
343 FT0 = fabsl(FT0);
344}
345
346void do_fnabs (void)
347{
348 FT0 = -fabsl(FT0);
349}
350
351/* Instruction cache invalidation helper */
352void do_icbi (void)
353{
354 // tb_invalidate_page(T0);
355}
356
357/* TLB invalidation helpers */
358void do_tlbia (void)
359{
360 tlb_flush(env);
361}
362
363void do_tlbie (void)
364{
365 tlb_flush_page(env, T0);
366}
367
368/*****************************************************************************/
369/* Special helpers for debug */
370void dump_rfi (void)
371{
372#if 0
373 printf("Return from interrupt\n");
374 printf("nip=0x%08x LR=0x%08x CTR=0x%08x MSR=0x%08x\n",
375 env->nip, env->lr, env->ctr,
376 (msr_pow << MSR_POW) | (msr_ile << MSR_ILE) | (msr_ee << MSR_EE) |
377 (msr_pr << MSR_PR) | (msr_fp << MSR_FP) | (msr_me << MSR_ME) |
378 (msr_fe0 << MSR_FE0) | (msr_se << MSR_SE) | (msr_be << MSR_BE) |
379 (msr_fe1 << MSR_FE1) | (msr_ip << MSR_IP) | (msr_ir << MSR_IR) |
380 (msr_dr << MSR_DR) | (msr_ri << MSR_RI) | (msr_le << MSR_LE));
381 {
382 int i;
383 for (i = 0; i < 32; i++) {
384 if ((i & 7) == 0)
385 printf("GPR%02d:", i);
386 printf(" %08x", env->gpr[i]);
387 if ((i & 7) == 7)
388 printf("\n");
389 }
390 printf("CR: 0x");
391 for (i = 0; i < 8; i++)
392 printf("%01x", env->crf[i]);
393 printf(" [");
394 for (i = 0; i < 8; i++) {
395 char a = '-';
396 if (env->crf[i] & 0x08)
397 a = 'L';
398 else if (env->crf[i] & 0x04)
399 a = 'G';
400 else if (env->crf[i] & 0x02)
401 a = 'E';
402 printf(" %c%c", a, env->crf[i] & 0x01 ? 'O' : ' ');
403 }
404 printf(" ] ");
405 }
406 printf("TB: 0x%08x %08x\n", env->tb[1], env->tb[0]);
407 printf("SRR0 0x%08x SRR1 0x%08x\n", env->spr[SRR0], env->spr[SRR1]);
408#endif
409}
410
411void dump_store_sr (int srnum)
412{
413#if 0
414 printf("%s: reg=%d 0x%08x\n", __func__, srnum, T0);
415#endif
416}
417
418static void _dump_store_bat (char ID, int ul, int nr)
419{
420 printf("Set %cBAT%d%c to 0x%08x (0x%08x)\n",
421 ID, nr, ul == 0 ? 'u' : 'l', T0, env->nip);
422}
423
424void dump_store_ibat (int ul, int nr)
425{
426 _dump_store_bat('I', ul, nr);
427}
428
429void dump_store_dbat (int ul, int nr)
430{
431 _dump_store_bat('D', ul, nr);
432}
433
434void dump_store_tb (int ul)
435{
436 printf("Set TB%c to 0x%08x\n", ul == 0 ? 'L' : 'U', T0);
437}
438
439void dump_update_tb(uint32_t param)
440{
441#if 0
442 printf("Update TB: 0x%08x + %d => 0x%08x\n", T1, param, T0);
443#endif
444}
445